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e0a25b6d SW |
1 | /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver |
2 | * | |
3 | * Copyright (C) 2015 Atmel | |
4 | * | |
5 | * Author: Songjun Wu <songjun.wu@atmel.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 or later | |
9 | * as published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/of.h> | |
13 | #include <linux/clk.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/regmap.h> | |
17 | #include <sound/core.h> | |
18 | #include <sound/dmaengine_pcm.h> | |
19 | #include <sound/pcm_params.h> | |
20 | #include <sound/tlv.h> | |
21 | #include "atmel-classd.h" | |
22 | ||
23 | struct atmel_classd_pdata { | |
24 | bool non_overlap_enable; | |
25 | int non_overlap_time; | |
26 | int pwm_type; | |
27 | const char *card_name; | |
28 | }; | |
29 | ||
30 | struct atmel_classd { | |
31 | dma_addr_t phy_base; | |
32 | struct regmap *regmap; | |
33 | struct clk *pclk; | |
34 | struct clk *gclk; | |
35 | struct clk *aclk; | |
36 | int irq; | |
37 | const struct atmel_classd_pdata *pdata; | |
38 | }; | |
39 | ||
40 | #ifdef CONFIG_OF | |
41 | static const struct of_device_id atmel_classd_of_match[] = { | |
42 | { | |
43 | .compatible = "atmel,sama5d2-classd", | |
44 | }, { | |
45 | /* sentinel */ | |
46 | } | |
47 | }; | |
48 | MODULE_DEVICE_TABLE(of, atmel_classd_of_match); | |
49 | ||
50 | static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev) | |
51 | { | |
52 | struct device_node *np = dev->of_node; | |
53 | struct atmel_classd_pdata *pdata; | |
54 | const char *pwm_type; | |
55 | int ret; | |
56 | ||
57 | if (!np) { | |
58 | dev_err(dev, "device node not found\n"); | |
59 | return ERR_PTR(-EINVAL); | |
60 | } | |
61 | ||
62 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
63 | if (!pdata) | |
64 | return ERR_PTR(-ENOMEM); | |
65 | ||
66 | ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type); | |
67 | if ((ret == 0) && (strcmp(pwm_type, "diff") == 0)) | |
68 | pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF; | |
69 | else | |
70 | pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE; | |
71 | ||
72 | ret = of_property_read_u32(np, | |
73 | "atmel,non-overlap-time", &pdata->non_overlap_time); | |
74 | if (ret) | |
75 | pdata->non_overlap_enable = false; | |
76 | else | |
77 | pdata->non_overlap_enable = true; | |
78 | ||
79 | ret = of_property_read_string(np, "atmel,model", &pdata->card_name); | |
80 | if (ret) | |
81 | pdata->card_name = "CLASSD"; | |
82 | ||
83 | return pdata; | |
84 | } | |
85 | #else | |
86 | static inline struct atmel_classd_pdata * | |
87 | atmel_classd_dt_init(struct device *dev) | |
88 | { | |
89 | return ERR_PTR(-EINVAL); | |
90 | } | |
91 | #endif | |
92 | ||
93 | #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \ | |
94 | | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \ | |
95 | | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \ | |
96 | | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \ | |
97 | | SNDRV_PCM_RATE_96000) | |
98 | ||
99 | static const struct snd_pcm_hardware atmel_classd_hw = { | |
100 | .info = SNDRV_PCM_INFO_MMAP | |
101 | | SNDRV_PCM_INFO_MMAP_VALID | |
102 | | SNDRV_PCM_INFO_INTERLEAVED | |
103 | | SNDRV_PCM_INFO_RESUME | |
104 | | SNDRV_PCM_INFO_PAUSE, | |
105 | .formats = (SNDRV_PCM_FMTBIT_S16_LE), | |
106 | .rates = ATMEL_CLASSD_RATES, | |
107 | .rate_min = 8000, | |
108 | .rate_max = 96000, | |
07c55d39 | 109 | .channels_min = 1, |
e0a25b6d SW |
110 | .channels_max = 2, |
111 | .buffer_bytes_max = 64 * 1024, | |
112 | .period_bytes_min = 256, | |
113 | .period_bytes_max = 32 * 1024, | |
114 | .periods_min = 2, | |
115 | .periods_max = 256, | |
116 | }; | |
117 | ||
118 | #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024) | |
119 | ||
120 | /* cpu dai component */ | |
121 | static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream, | |
122 | struct snd_soc_dai *cpu_dai) | |
123 | { | |
124 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
125 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); | |
126 | ||
127 | regmap_write(dd->regmap, CLASSD_THR, 0x0); | |
128 | ||
129 | return clk_prepare_enable(dd->pclk); | |
130 | } | |
131 | ||
132 | static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream, | |
133 | struct snd_soc_dai *cpu_dai) | |
134 | { | |
135 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
136 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); | |
137 | ||
138 | clk_disable_unprepare(dd->pclk); | |
139 | } | |
140 | ||
141 | static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = { | |
142 | .startup = atmel_classd_cpu_dai_startup, | |
143 | .shutdown = atmel_classd_cpu_dai_shutdown, | |
144 | }; | |
145 | ||
146 | static struct snd_soc_dai_driver atmel_classd_cpu_dai = { | |
147 | .playback = { | |
07c55d39 | 148 | .channels_min = 1, |
e0a25b6d SW |
149 | .channels_max = 2, |
150 | .rates = ATMEL_CLASSD_RATES, | |
151 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | |
152 | .ops = &atmel_classd_cpu_dai_ops, | |
153 | }; | |
154 | ||
155 | static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = { | |
156 | .name = "atmel-classd", | |
157 | }; | |
158 | ||
159 | /* platform */ | |
160 | static int | |
161 | atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream, | |
162 | struct snd_pcm_hw_params *params, | |
163 | struct dma_slave_config *slave_config) | |
164 | { | |
165 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
166 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); | |
167 | ||
168 | if (params_physical_width(params) != 16) { | |
169 | dev_err(rtd->platform->dev, | |
170 | "only supports 16-bit audio data\n"); | |
171 | return -EINVAL; | |
172 | } | |
173 | ||
07c55d39 SW |
174 | if (params_channels(params) == 1) |
175 | slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; | |
176 | else | |
177 | slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; | |
178 | ||
e0a25b6d SW |
179 | slave_config->direction = DMA_MEM_TO_DEV; |
180 | slave_config->dst_addr = dd->phy_base + CLASSD_THR; | |
e0a25b6d SW |
181 | slave_config->dst_maxburst = 1; |
182 | slave_config->src_maxburst = 1; | |
183 | slave_config->device_fc = false; | |
184 | ||
185 | return 0; | |
186 | } | |
187 | ||
188 | static const struct snd_dmaengine_pcm_config | |
189 | atmel_classd_dmaengine_pcm_config = { | |
190 | .prepare_slave_config = atmel_classd_platform_configure_dma, | |
191 | .pcm_hardware = &atmel_classd_hw, | |
192 | .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE, | |
193 | }; | |
194 | ||
195 | /* codec */ | |
196 | static const char * const mono_mode_text[] = { | |
197 | "mix", "sat", "left", "right" | |
198 | }; | |
199 | ||
200 | static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum, | |
201 | CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT, | |
202 | mono_mode_text); | |
203 | ||
204 | static const char * const eqcfg_text[] = { | |
205 | "Treble-12dB", "Treble-6dB", | |
206 | "Medium-8dB", "Medium-3dB", | |
207 | "Bass-12dB", "Bass-6dB", | |
208 | "0 dB", | |
209 | "Bass+6dB", "Bass+12dB", | |
210 | "Medium+3dB", "Medium+8dB", | |
211 | "Treble+6dB", "Treble+12dB", | |
212 | }; | |
213 | ||
214 | static const unsigned int eqcfg_value[] = { | |
215 | CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6, | |
216 | CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3, | |
217 | CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6, | |
218 | CLASSD_INTPMR_EQCFG_FLAT, | |
219 | CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12, | |
220 | CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8, | |
221 | CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12, | |
222 | }; | |
223 | ||
224 | static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum, | |
225 | CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf, | |
226 | eqcfg_text, eqcfg_value); | |
227 | ||
228 | static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1); | |
229 | ||
230 | static const struct snd_kcontrol_new atmel_classd_snd_controls[] = { | |
231 | SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR, | |
232 | CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT, | |
233 | 78, 1, classd_digital_tlv), | |
234 | ||
235 | SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR, | |
236 | CLASSD_INTPMR_DEEMP_SHIFT, 1, 0), | |
237 | ||
238 | SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0), | |
239 | ||
240 | SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0), | |
241 | ||
242 | SOC_ENUM("Mono Mode", classd_mono_mode_enum), | |
243 | ||
244 | SOC_ENUM("EQ", classd_eqcfg_enum), | |
245 | }; | |
246 | ||
247 | static const char * const pwm_type[] = { | |
248 | "Single ended", "Differential" | |
249 | }; | |
250 | ||
251 | static int atmel_classd_codec_probe(struct snd_soc_codec *codec) | |
252 | { | |
253 | struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); | |
254 | struct atmel_classd *dd = snd_soc_card_get_drvdata(card); | |
255 | const struct atmel_classd_pdata *pdata = dd->pdata; | |
256 | u32 mask, val; | |
257 | ||
258 | mask = CLASSD_MR_PWMTYP_MASK; | |
259 | val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT; | |
260 | ||
261 | mask |= CLASSD_MR_NON_OVERLAP_MASK; | |
262 | if (pdata->non_overlap_enable) { | |
263 | val |= (CLASSD_MR_NON_OVERLAP_EN | |
264 | << CLASSD_MR_NON_OVERLAP_SHIFT); | |
265 | ||
266 | mask |= CLASSD_MR_NOVR_VAL_MASK; | |
267 | switch (pdata->non_overlap_time) { | |
268 | case 5: | |
269 | val |= (CLASSD_MR_NOVR_VAL_5NS | |
270 | << CLASSD_MR_NOVR_VAL_SHIFT); | |
271 | break; | |
272 | case 10: | |
273 | val |= (CLASSD_MR_NOVR_VAL_10NS | |
274 | << CLASSD_MR_NOVR_VAL_SHIFT); | |
275 | break; | |
276 | case 15: | |
277 | val |= (CLASSD_MR_NOVR_VAL_15NS | |
278 | << CLASSD_MR_NOVR_VAL_SHIFT); | |
279 | break; | |
280 | case 20: | |
281 | val |= (CLASSD_MR_NOVR_VAL_20NS | |
282 | << CLASSD_MR_NOVR_VAL_SHIFT); | |
283 | break; | |
284 | default: | |
285 | val |= (CLASSD_MR_NOVR_VAL_10NS | |
286 | << CLASSD_MR_NOVR_VAL_SHIFT); | |
287 | dev_warn(codec->dev, | |
288 | "non-overlapping value %d is invalid, the default value 10 is specified\n", | |
289 | pdata->non_overlap_time); | |
290 | break; | |
291 | } | |
292 | } | |
293 | ||
294 | snd_soc_update_bits(codec, CLASSD_MR, mask, val); | |
295 | ||
296 | dev_info(codec->dev, | |
297 | "PWM modulation type is %s, non-overlapping is %s\n", | |
298 | pwm_type[pdata->pwm_type], | |
299 | pdata->non_overlap_enable?"enabled":"disabled"); | |
300 | ||
301 | return 0; | |
302 | } | |
303 | ||
61abce13 QS |
304 | static int atmel_classd_codec_resume(struct snd_soc_codec *codec) |
305 | { | |
306 | struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); | |
307 | struct atmel_classd *dd = snd_soc_card_get_drvdata(card); | |
308 | ||
309 | return regcache_sync(dd->regmap); | |
310 | } | |
311 | ||
e0a25b6d SW |
312 | static struct regmap *atmel_classd_codec_get_remap(struct device *dev) |
313 | { | |
314 | return dev_get_regmap(dev, NULL); | |
315 | } | |
316 | ||
317 | static struct snd_soc_codec_driver soc_codec_dev_classd = { | |
318 | .probe = atmel_classd_codec_probe, | |
61abce13 | 319 | .resume = atmel_classd_codec_resume, |
e0a25b6d | 320 | .get_regmap = atmel_classd_codec_get_remap, |
69295df0 KM |
321 | .component_driver = { |
322 | .controls = atmel_classd_snd_controls, | |
323 | .num_controls = ARRAY_SIZE(atmel_classd_snd_controls), | |
324 | }, | |
e0a25b6d SW |
325 | }; |
326 | ||
327 | /* codec dai component */ | |
328 | static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream, | |
329 | struct snd_soc_dai *codec_dai) | |
330 | { | |
331 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
332 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); | |
333 | int ret; | |
334 | ||
335 | ret = clk_prepare_enable(dd->aclk); | |
336 | if (ret) | |
337 | return ret; | |
338 | ||
339 | return clk_prepare_enable(dd->gclk); | |
340 | } | |
341 | ||
342 | static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai, | |
343 | int mute) | |
344 | { | |
345 | struct snd_soc_codec *codec = codec_dai->codec; | |
346 | u32 mask, val; | |
347 | ||
348 | mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK; | |
349 | ||
350 | if (mute) | |
351 | val = mask; | |
352 | else | |
353 | val = 0; | |
354 | ||
355 | snd_soc_update_bits(codec, CLASSD_MR, mask, val); | |
356 | ||
357 | return 0; | |
358 | } | |
359 | ||
360 | #define CLASSD_ACLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) | |
cd3ac9af | 361 | #define CLASSD_ACLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) |
e0a25b6d SW |
362 | |
363 | static struct { | |
364 | int rate; | |
365 | int sample_rate; | |
366 | int dsp_clk; | |
367 | unsigned long aclk_rate; | |
368 | } const sample_rates[] = { | |
369 | { 8000, CLASSD_INTPMR_FRAME_8K, | |
370 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, | |
371 | { 16000, CLASSD_INTPMR_FRAME_16K, | |
372 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, | |
373 | { 32000, CLASSD_INTPMR_FRAME_32K, | |
374 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, | |
375 | { 48000, CLASSD_INTPMR_FRAME_48K, | |
376 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, | |
377 | { 96000, CLASSD_INTPMR_FRAME_96K, | |
378 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, | |
379 | { 22050, CLASSD_INTPMR_FRAME_22K, | |
380 | CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, | |
381 | { 44100, CLASSD_INTPMR_FRAME_44K, | |
382 | CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, | |
383 | { 88200, CLASSD_INTPMR_FRAME_88K, | |
384 | CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, | |
385 | }; | |
386 | ||
387 | static int | |
388 | atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, | |
389 | struct snd_pcm_hw_params *params, | |
390 | struct snd_soc_dai *codec_dai) | |
391 | { | |
392 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
393 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); | |
394 | struct snd_soc_codec *codec = codec_dai->codec; | |
395 | int fs; | |
396 | int i, best, best_val, cur_val, ret; | |
397 | u32 mask, val; | |
398 | ||
399 | fs = params_rate(params); | |
400 | ||
401 | best = 0; | |
402 | best_val = abs(fs - sample_rates[0].rate); | |
403 | for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { | |
404 | /* Closest match */ | |
405 | cur_val = abs(fs - sample_rates[i].rate); | |
406 | if (cur_val < best_val) { | |
407 | best = i; | |
408 | best_val = cur_val; | |
409 | } | |
410 | } | |
411 | ||
412 | dev_dbg(codec->dev, | |
413 | "Selected SAMPLE_RATE of %dHz, ACLK_RATE of %ldHz\n", | |
414 | sample_rates[best].rate, sample_rates[best].aclk_rate); | |
415 | ||
416 | clk_disable_unprepare(dd->gclk); | |
417 | clk_disable_unprepare(dd->aclk); | |
418 | ||
419 | ret = clk_set_rate(dd->aclk, sample_rates[best].aclk_rate); | |
420 | if (ret) | |
421 | return ret; | |
422 | ||
423 | mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK; | |
424 | val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT) | |
425 | | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT); | |
426 | ||
427 | snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val); | |
428 | ||
429 | ret = clk_prepare_enable(dd->aclk); | |
430 | if (ret) | |
431 | return ret; | |
432 | ||
433 | return clk_prepare_enable(dd->gclk); | |
434 | } | |
435 | ||
436 | static void | |
437 | atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream, | |
438 | struct snd_soc_dai *codec_dai) | |
439 | { | |
440 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
441 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); | |
442 | ||
443 | clk_disable_unprepare(dd->gclk); | |
444 | clk_disable_unprepare(dd->aclk); | |
445 | } | |
446 | ||
447 | static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream, | |
448 | struct snd_soc_dai *codec_dai) | |
449 | { | |
450 | struct snd_soc_codec *codec = codec_dai->codec; | |
451 | ||
452 | snd_soc_update_bits(codec, CLASSD_MR, | |
453 | CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK, | |
454 | (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) | |
455 | |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT)); | |
456 | ||
457 | return 0; | |
458 | } | |
459 | ||
460 | static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream, | |
461 | int cmd, struct snd_soc_dai *codec_dai) | |
462 | { | |
463 | struct snd_soc_codec *codec = codec_dai->codec; | |
464 | u32 mask, val; | |
465 | ||
466 | mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK; | |
467 | ||
468 | switch (cmd) { | |
469 | case SNDRV_PCM_TRIGGER_START: | |
470 | case SNDRV_PCM_TRIGGER_RESUME: | |
471 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
472 | val = mask; | |
473 | break; | |
474 | case SNDRV_PCM_TRIGGER_STOP: | |
475 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
476 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
477 | val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) | |
478 | | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT); | |
479 | break; | |
480 | default: | |
481 | return -EINVAL; | |
482 | } | |
483 | ||
484 | snd_soc_update_bits(codec, CLASSD_MR, mask, val); | |
485 | ||
486 | return 0; | |
487 | } | |
488 | ||
489 | static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = { | |
490 | .digital_mute = atmel_classd_codec_dai_digital_mute, | |
491 | .startup = atmel_classd_codec_dai_startup, | |
492 | .shutdown = atmel_classd_codec_dai_shutdown, | |
493 | .hw_params = atmel_classd_codec_dai_hw_params, | |
494 | .prepare = atmel_classd_codec_dai_prepare, | |
495 | .trigger = atmel_classd_codec_dai_trigger, | |
496 | }; | |
497 | ||
498 | #define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi" | |
499 | ||
500 | static struct snd_soc_dai_driver atmel_classd_codec_dai = { | |
501 | .name = ATMEL_CLASSD_CODEC_DAI_NAME, | |
502 | .playback = { | |
503 | .stream_name = "Playback", | |
07c55d39 | 504 | .channels_min = 1, |
e0a25b6d SW |
505 | .channels_max = 2, |
506 | .rates = ATMEL_CLASSD_RATES, | |
507 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
508 | }, | |
509 | .ops = &atmel_classd_codec_dai_ops, | |
510 | }; | |
511 | ||
512 | /* ASoC sound card */ | |
513 | static int atmel_classd_asoc_card_init(struct device *dev, | |
514 | struct snd_soc_card *card) | |
515 | { | |
516 | struct snd_soc_dai_link *dai_link; | |
517 | struct atmel_classd *dd = snd_soc_card_get_drvdata(card); | |
518 | ||
519 | dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); | |
520 | if (!dai_link) | |
521 | return -ENOMEM; | |
522 | ||
523 | dai_link->name = "CLASSD"; | |
524 | dai_link->stream_name = "CLASSD PCM"; | |
525 | dai_link->codec_dai_name = ATMEL_CLASSD_CODEC_DAI_NAME; | |
526 | dai_link->cpu_dai_name = dev_name(dev); | |
527 | dai_link->codec_name = dev_name(dev); | |
528 | dai_link->platform_name = dev_name(dev); | |
529 | ||
530 | card->dai_link = dai_link; | |
531 | card->num_links = 1; | |
532 | card->name = dd->pdata->card_name; | |
533 | card->dev = dev; | |
534 | ||
535 | return 0; | |
536 | }; | |
537 | ||
538 | /* regmap configuration */ | |
539 | static const struct reg_default atmel_classd_reg_defaults[] = { | |
540 | { CLASSD_INTPMR, 0x00301212 }, | |
541 | }; | |
542 | ||
543 | #define ATMEL_CLASSD_REG_MAX 0xE4 | |
544 | static const struct regmap_config atmel_classd_regmap_config = { | |
545 | .reg_bits = 32, | |
546 | .reg_stride = 4, | |
547 | .val_bits = 32, | |
548 | .max_register = ATMEL_CLASSD_REG_MAX, | |
549 | ||
550 | .cache_type = REGCACHE_FLAT, | |
551 | .reg_defaults = atmel_classd_reg_defaults, | |
552 | .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults), | |
553 | }; | |
554 | ||
555 | static int atmel_classd_probe(struct platform_device *pdev) | |
556 | { | |
557 | struct device *dev = &pdev->dev; | |
558 | struct atmel_classd *dd; | |
559 | struct resource *res; | |
560 | void __iomem *io_base; | |
561 | const struct atmel_classd_pdata *pdata; | |
562 | struct snd_soc_card *card; | |
563 | int ret; | |
564 | ||
565 | pdata = dev_get_platdata(dev); | |
566 | if (!pdata) { | |
567 | pdata = atmel_classd_dt_init(dev); | |
568 | if (IS_ERR(pdata)) | |
569 | return PTR_ERR(pdata); | |
570 | } | |
571 | ||
572 | dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); | |
573 | if (!dd) | |
574 | return -ENOMEM; | |
575 | ||
576 | dd->pdata = pdata; | |
577 | ||
578 | dd->irq = platform_get_irq(pdev, 0); | |
579 | if (dd->irq < 0) { | |
580 | ret = dd->irq; | |
581 | dev_err(dev, "failed to could not get irq: %d\n", ret); | |
582 | return ret; | |
583 | } | |
584 | ||
585 | dd->pclk = devm_clk_get(dev, "pclk"); | |
586 | if (IS_ERR(dd->pclk)) { | |
587 | ret = PTR_ERR(dd->pclk); | |
588 | dev_err(dev, "failed to get peripheral clock: %d\n", ret); | |
589 | return ret; | |
590 | } | |
591 | ||
592 | dd->gclk = devm_clk_get(dev, "gclk"); | |
593 | if (IS_ERR(dd->gclk)) { | |
594 | ret = PTR_ERR(dd->gclk); | |
595 | dev_err(dev, "failed to get GCK clock: %d\n", ret); | |
596 | return ret; | |
597 | } | |
598 | ||
599 | dd->aclk = devm_clk_get(dev, "aclk"); | |
600 | if (IS_ERR(dd->aclk)) { | |
601 | ret = PTR_ERR(dd->aclk); | |
602 | dev_err(dev, "failed to get audio clock: %d\n", ret); | |
603 | return ret; | |
604 | } | |
605 | ||
606 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
e0a25b6d SW |
607 | io_base = devm_ioremap_resource(dev, res); |
608 | if (IS_ERR(io_base)) { | |
609 | ret = PTR_ERR(io_base); | |
610 | dev_err(dev, "failed to remap register memory: %d\n", ret); | |
611 | return ret; | |
612 | } | |
613 | ||
614 | dd->phy_base = res->start; | |
615 | ||
616 | dd->regmap = devm_regmap_init_mmio(dev, io_base, | |
617 | &atmel_classd_regmap_config); | |
618 | if (IS_ERR(dd->regmap)) { | |
619 | ret = PTR_ERR(dd->regmap); | |
620 | dev_err(dev, "failed to init register map: %d\n", ret); | |
621 | return ret; | |
622 | } | |
623 | ||
624 | ret = devm_snd_soc_register_component(dev, | |
625 | &atmel_classd_cpu_dai_component, | |
626 | &atmel_classd_cpu_dai, 1); | |
627 | if (ret) { | |
628 | dev_err(dev, "could not register CPU DAI: %d\n", ret); | |
629 | return ret; | |
630 | } | |
631 | ||
632 | ret = devm_snd_dmaengine_pcm_register(dev, | |
633 | &atmel_classd_dmaengine_pcm_config, | |
634 | 0); | |
635 | if (ret) { | |
636 | dev_err(dev, "could not register platform: %d\n", ret); | |
637 | return ret; | |
638 | } | |
639 | ||
640 | ret = snd_soc_register_codec(dev, &soc_codec_dev_classd, | |
641 | &atmel_classd_codec_dai, 1); | |
642 | if (ret) { | |
643 | dev_err(dev, "could not register codec: %d\n", ret); | |
644 | return ret; | |
645 | } | |
646 | ||
647 | /* register sound card */ | |
648 | card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); | |
32e69bad SW |
649 | if (!card) { |
650 | ret = -ENOMEM; | |
651 | goto unregister_codec; | |
652 | } | |
e0a25b6d SW |
653 | |
654 | snd_soc_card_set_drvdata(card, dd); | |
655 | platform_set_drvdata(pdev, card); | |
656 | ||
657 | ret = atmel_classd_asoc_card_init(dev, card); | |
658 | if (ret) { | |
659 | dev_err(dev, "failed to init sound card\n"); | |
32e69bad | 660 | goto unregister_codec; |
e0a25b6d SW |
661 | } |
662 | ||
663 | ret = devm_snd_soc_register_card(dev, card); | |
664 | if (ret) { | |
665 | dev_err(dev, "failed to register sound card: %d\n", ret); | |
32e69bad | 666 | goto unregister_codec; |
e0a25b6d SW |
667 | } |
668 | ||
669 | return 0; | |
32e69bad SW |
670 | |
671 | unregister_codec: | |
672 | snd_soc_unregister_codec(dev); | |
673 | return ret; | |
e0a25b6d SW |
674 | } |
675 | ||
676 | static int atmel_classd_remove(struct platform_device *pdev) | |
677 | { | |
678 | snd_soc_unregister_codec(&pdev->dev); | |
679 | return 0; | |
680 | } | |
681 | ||
682 | static struct platform_driver atmel_classd_driver = { | |
683 | .driver = { | |
684 | .name = "atmel-classd", | |
685 | .of_match_table = of_match_ptr(atmel_classd_of_match), | |
686 | .pm = &snd_soc_pm_ops, | |
687 | }, | |
688 | .probe = atmel_classd_probe, | |
689 | .remove = atmel_classd_remove, | |
690 | }; | |
691 | module_platform_driver(atmel_classd_driver); | |
692 | ||
693 | MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture"); | |
694 | MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>"); | |
695 | MODULE_LICENSE("GPL"); |