[mirror_ubuntu-artful-kernel.git] / sound / soc / codecs / ak4104.c

/*
 * AK4104 ALSA SoC (ASoC) driver
 *
 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 */

#include <linux/module.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <linux/spi/spi.h>
#include <sound/asoundef.h>

/* AK4104 registers addresses */
#define AK4104_REG_CONTROL1		0x00
#define AK4104_REG_RESERVED		0x01
#define AK4104_REG_CONTROL2		0x02
#define AK4104_REG_TX			0x03
#define AK4104_REG_CHN_STATUS(x)	((x) + 0x04)
#define AK4104_NUM_REGS			10

#define AK4104_REG_MASK			0x1f
#define AK4104_READ			0xc0
#define AK4104_WRITE			0xe0
#define AK4104_RESERVED_VAL		0x5b

/* Bit masks for AK4104 registers */
#define AK4104_CONTROL1_RSTN		(1 << 0)
#define AK4104_CONTROL1_PW		(1 << 1)
#define AK4104_CONTROL1_DIF0		(1 << 2)
#define AK4104_CONTROL1_DIF1		(1 << 3)

#define AK4104_CONTROL2_SEL0		(1 << 0)
#define AK4104_CONTROL2_SEL1		(1 << 1)
#define AK4104_CONTROL2_MODE		(1 << 2)

#define AK4104_TX_TXE			(1 << 0)
#define AK4104_TX_V			(1 << 1)

#define DRV_NAME "ak4104-codec"

struct ak4104_private {
	enum snd_soc_control_type control_type;
	void *control_data;
};

static int ak4104_fill_cache(struct snd_soc_codec *codec)
{
	int i;
	u8 *reg_cache = codec->reg_cache;
	struct spi_device *spi = codec->control_data;

	for (i = 0; i < codec->driver->reg_cache_size; i++) {
		int ret = spi_w8r8(spi, i | AK4104_READ);
		if (ret < 0) {
			dev_err(&spi->dev, "SPI write failure\n");
			return ret;
		}

		reg_cache[i] = ret;
	}

	return 0;
}

static unsigned int ak4104_read_reg_cache(struct snd_soc_codec *codec,
					  unsigned int reg)
{
	u8 *reg_cache = codec->reg_cache;

	if (reg >= codec->driver->reg_cache_size)
		return -EINVAL;

	return reg_cache[reg];
}

static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg,
			    unsigned int value)
{
	u8 *cache = codec->reg_cache;
	struct spi_device *spi = codec->control_data;

	if (reg >= codec->driver->reg_cache_size)
		return -EINVAL;

	/* only write to the hardware if value has changed */
	if (cache[reg] != value) {
		u8 tmp[2] = { (reg & AK4104_REG_MASK) | AK4104_WRITE, value };

		if (spi_write(spi, tmp, sizeof(tmp))) {
			dev_err(&spi->dev, "SPI write failed\n");
			return -EIO;
		}

		cache[reg] = value;
	}

	return 0;
}

static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai,
			      unsigned int format)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	int val = 0;

	/* set DAI format */
	switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_RIGHT_J:
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		val |= AK4104_CONTROL1_DIF0;
		break;
	case SND_SOC_DAIFMT_I2S:
		val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1;
		break;
	default:
		dev_err(codec->dev, "invalid dai format\n");
		return -EINVAL;
	}

	/* This device can only be slave */
	if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
		return -EINVAL;

	ret = snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
				  AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1,
				  val);
	if (ret < 0)
		return ret;

	return 0;
}

static int ak4104_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_codec *codec = rtd->codec;
	int val = 0;

	/* set the IEC958 bits: consumer mode, no copyright bit */
	val |= IEC958_AES0_CON_NOT_COPYRIGHT;
	snd_soc_write(codec, AK4104_REG_CHN_STATUS(0), val);

	val = 0;

	switch (params_rate(params)) {
	case 44100:
		val |= IEC958_AES3_CON_FS_44100;
		break;
	case 48000:
		val |= IEC958_AES3_CON_FS_48000;
		break;
	case 32000:
		val |= IEC958_AES3_CON_FS_32000;
		break;
	default:
		dev_err(codec->dev, "unsupported sampling rate\n");
		return -EINVAL;
	}

	return snd_soc_write(codec, AK4104_REG_CHN_STATUS(3), val);
}

static const struct snd_soc_dai_ops ak4101_dai_ops = {
	.hw_params = ak4104_hw_params,
	.set_fmt = ak4104_set_dai_fmt,
};

static struct snd_soc_dai_driver ak4104_dai = {
	.name = "ak4104-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_192000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE  |
			   SNDRV_PCM_FMTBIT_S24_3LE |
			   SNDRV_PCM_FMTBIT_S24_LE
	},
	.ops = &ak4101_dai_ops,
};

static int ak4104_probe(struct snd_soc_codec *codec)
{
	struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
	int ret, val;

	codec->control_data = ak4104->control_data;

	/* read all regs and fill the cache */
	ret = ak4104_fill_cache(codec);
	if (ret < 0) {
		dev_err(codec->dev, "failed to fill register cache\n");
		return ret;
	}

	/* read the 'reserved' register - according to the datasheet, it
	 * should contain 0x5b. Not a good way to verify the presence of
	 * the device, but there is no hardware ID register. */
	if (ak4104_read_reg_cache(codec, AK4104_REG_RESERVED) !=
					 AK4104_RESERVED_VAL)
		return -ENODEV;

	/* set power-up and non-reset bits */
	ret = snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
				  AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN,
				  AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN);
	if (ret < 0)
		return ret;

	/* enable transmitter */
	ret = snd_soc_update_bits(codec, AK4104_REG_TX,
				  AK4104_TX_TXE, AK4104_TX_TXE);
	if (ret < 0)
		return ret;

	return 0;
}

static int ak4104_remove(struct snd_soc_codec *codec)
{
	snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
			    AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN, 0);

	return 0;
}

static struct snd_soc_codec_driver soc_codec_device_ak4104 = {
	.probe =	ak4104_probe,
	.remove =	ak4104_remove,
	.reg_cache_size = AK4104_NUM_REGS,
	.reg_word_size = sizeof(u8),
};

static int ak4104_spi_probe(struct spi_device *spi)
{
	struct ak4104_private *ak4104;
	int ret;

	spi->bits_per_word = 8;
	spi->mode = SPI_MODE_0;
	ret = spi_setup(spi);
	if (ret < 0)
		return ret;

	ak4104 = devm_kzalloc(&spi->dev, sizeof(struct ak4104_private),
			      GFP_KERNEL);
	if (ak4104 == NULL)
		return -ENOMEM;

	ak4104->control_data = spi;
	ak4104->control_type = SND_SOC_SPI;
	spi_set_drvdata(spi, ak4104);

	ret = snd_soc_register_codec(&spi->dev,
			&soc_codec_device_ak4104, &ak4104_dai, 1);
	return ret;
}

static int __devexit ak4104_spi_remove(struct spi_device *spi)
{
	snd_soc_unregister_codec(&spi->dev);
	return 0;
}

static struct spi_driver ak4104_spi_driver = {
	.driver  = {
		.name   = DRV_NAME,
		.owner  = THIS_MODULE,
	},
	.probe  = ak4104_spi_probe,
	.remove = __devexit_p(ak4104_spi_remove),
};

module_spi_driver(ak4104_spi_driver);

MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
a381934e DM	1	/*
	2	* AK4104 ALSA SoC (ASoC) driver
	3	*
	4	* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
5a0e3ad6	13	#include <linux/slab.h>
a381934e DM	14	#include <sound/core.h>
	15	#include <sound/soc.h>
	16	#include <sound/initval.h>
	17	#include <linux/spi/spi.h>
	18	#include <sound/asoundef.h>
	19
a381934e DM	20	/* AK4104 registers addresses */
	21	#define AK4104_REG_CONTROL1 0x00
	22	#define AK4104_REG_RESERVED 0x01
	23	#define AK4104_REG_CONTROL2 0x02
	24	#define AK4104_REG_TX 0x03
	25	#define AK4104_REG_CHN_STATUS(x) ((x) + 0x04)
	26	#define AK4104_NUM_REGS 10
	27
	28	#define AK4104_REG_MASK 0x1f
	29	#define AK4104_READ 0xc0
	30	#define AK4104_WRITE 0xe0
	31	#define AK4104_RESERVED_VAL 0x5b
	32
	33	/* Bit masks for AK4104 registers */
	34	#define AK4104_CONTROL1_RSTN (1 << 0)
	35	#define AK4104_CONTROL1_PW (1 << 1)
	36	#define AK4104_CONTROL1_DIF0 (1 << 2)
	37	#define AK4104_CONTROL1_DIF1 (1 << 3)
	38
	39	#define AK4104_CONTROL2_SEL0 (1 << 0)
	40	#define AK4104_CONTROL2_SEL1 (1 << 1)
	41	#define AK4104_CONTROL2_MODE (1 << 2)
	42
	43	#define AK4104_TX_TXE (1 << 0)
	44	#define AK4104_TX_V (1 << 1)
	45
f0fba2ad	46	#define DRV_NAME "ak4104-codec"
a381934e DM	47
a381934e DM	48	struct ak4104_private {
f0fba2ad LG	49	enum snd_soc_control_type control_type;
f0fba2ad LG	50	void *control_data;
a381934e DM	51	};
	52
	53	static int ak4104_fill_cache(struct snd_soc_codec *codec)
	54	{
	55	int i;
	56	u8 *reg_cache = codec->reg_cache;
	57	struct spi_device *spi = codec->control_data;
	58
f0fba2ad	59	for (i = 0; i < codec->driver->reg_cache_size; i++) {
a381934e DM	60	int ret = spi_w8r8(spi, i \| AK4104_READ);
	61	if (ret < 0) {
	62	dev_err(&spi->dev, "SPI write failure\n");
	63	return ret;
	64	}
	65
	66	reg_cache[i] = ret;
	67	}
	68
	69	return 0;
	70	}
	71
	72	static unsigned int ak4104_read_reg_cache(struct snd_soc_codec *codec,
	73	unsigned int reg)
	74	{
	75	u8 *reg_cache = codec->reg_cache;
	76
f0fba2ad	77	if (reg >= codec->driver->reg_cache_size)
a381934e DM	78	return -EINVAL;
	79
	80	return reg_cache[reg];
	81	}
	82
	83	static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg,
	84	unsigned int value)
	85	{
	86	u8 *cache = codec->reg_cache;
	87	struct spi_device *spi = codec->control_data;
	88
f0fba2ad	89	if (reg >= codec->driver->reg_cache_size)
a381934e DM	90	return -EINVAL;
a381934e DM	91
a381934e DM	92	/* only write to the hardware if value has changed */
a381934e DM	93	if (cache[reg] != value) {
e555317c DM	94	u8 tmp[2] = { (reg & AK4104_REG_MASK) \| AK4104_WRITE, value };
e555317c DM	95
a381934e DM	96	if (spi_write(spi, tmp, sizeof(tmp))) {
	97	dev_err(&spi->dev, "SPI write failed\n");
	98	return -EIO;
	99	}
	100
	101	cache[reg] = value;
	102	}
	103
	104	return 0;
	105	}
	106
	107	static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai,
	108	unsigned int format)
	109	{
	110	struct snd_soc_codec *codec = codec_dai->codec;
	111	int val = 0;
	112
a381934e DM	113	/* set DAI format */
	114	switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
	115	case SND_SOC_DAIFMT_RIGHT_J:
	116	break;
	117	case SND_SOC_DAIFMT_LEFT_J:
	118	val \|= AK4104_CONTROL1_DIF0;
	119	break;
	120	case SND_SOC_DAIFMT_I2S:
	121	val \|= AK4104_CONTROL1_DIF0 \| AK4104_CONTROL1_DIF1;
	122	break;
	123	default:
	124	dev_err(codec->dev, "invalid dai format\n");
	125	return -EINVAL;
	126	}
	127
	128	/* This device can only be slave */
	129	if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
	130	return -EINVAL;
	131
afad95f8 MB	132	ret = snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
	133	AK4104_CONTROL1_DIF0 \| AK4104_CONTROL1_DIF1,
	134	val);
	135	if (ret < 0)
	136	return ret;
	137
	138	return 0;
a381934e DM	139	}
	140
	141	static int ak4104_hw_params(struct snd_pcm_substream *substream,
	142	struct snd_pcm_hw_params *params,
	143	struct snd_soc_dai *dai)
	144	{
	145	struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad	146	struct snd_soc_codec *codec = rtd->codec;
a381934e DM	147	int val = 0;
	148
	149	/* set the IEC958 bits: consumer mode, no copyright bit */
	150	val \|= IEC958_AES0_CON_NOT_COPYRIGHT;
34baf220	151	snd_soc_write(codec, AK4104_REG_CHN_STATUS(0), val);
a381934e DM	152
	153	val = 0;
	154
	155	switch (params_rate(params)) {
	156	case 44100:
	157	val \|= IEC958_AES3_CON_FS_44100;
	158	break;
	159	case 48000:
	160	val \|= IEC958_AES3_CON_FS_48000;
	161	break;
	162	case 32000:
	163	val \|= IEC958_AES3_CON_FS_32000;
	164	break;
	165	default:
	166	dev_err(codec->dev, "unsupported sampling rate\n");
	167	return -EINVAL;
	168	}
	169
34baf220	170	return snd_soc_write(codec, AK4104_REG_CHN_STATUS(3), val);
a381934e DM	171	}
a381934e DM	172
85e7652d	173	static const struct snd_soc_dai_ops ak4101_dai_ops = {
65ec1cd1 MB	174	.hw_params = ak4104_hw_params,
	175	.set_fmt = ak4104_set_dai_fmt,
	176	};
	177
f0fba2ad LG	178	static struct snd_soc_dai_driver ak4104_dai = {
f0fba2ad LG	179	.name = "ak4104-hifi",
a381934e DM	180	.playback = {
	181	.stream_name = "Playback",
	182	.channels_min = 2,
	183	.channels_max = 2,
617b14c5	184	.rates = SNDRV_PCM_RATE_8000_192000,
a381934e DM	185	.formats = SNDRV_PCM_FMTBIT_S16_LE \|
	186	SNDRV_PCM_FMTBIT_S24_3LE \|
	187	SNDRV_PCM_FMTBIT_S24_LE
	188	},
65ec1cd1	189	.ops = &ak4101_dai_ops,
a381934e DM	190	};
a381934e DM	191
f0fba2ad	192	static int ak4104_probe(struct snd_soc_codec *codec)
a381934e	193	{
f0fba2ad	194	struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
a381934e DM	195	int ret, val;
a381934e DM	196
f0fba2ad	197	codec->control_data = ak4104->control_data;
a381934e DM	198
	199	/* read all regs and fill the cache */
	200	ret = ak4104_fill_cache(codec);
	201	if (ret < 0) {
f0fba2ad	202	dev_err(codec->dev, "failed to fill register cache\n");
a381934e DM	203	return ret;
	204	}
	205
	206	/* read the 'reserved' register - according to the datasheet, it
	207	* should contain 0x5b. Not a good way to verify the presence of
	208	* the device, but there is no hardware ID register. */
	209	if (ak4104_read_reg_cache(codec, AK4104_REG_RESERVED) !=
f0fba2ad LG	210	AK4104_RESERVED_VAL)
f0fba2ad LG	211	return -ENODEV;
a381934e DM	212
a381934e DM	213	/* set power-up and non-reset bits */
afad95f8 MB	214	ret = snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
	215	AK4104_CONTROL1_PW \| AK4104_CONTROL1_RSTN,
	216	AK4104_CONTROL1_PW \| AK4104_CONTROL1_RSTN);
a381934e	217	if (ret < 0)
f0fba2ad	218	return ret;
a381934e DM	219
a381934e DM	220	/* enable transmitter */
afad95f8 MB	221	ret = snd_soc_update_bits(codec, AK4104_REG_TX,
afad95f8 MB	222	AK4104_TX_TXE, AK4104_TX_TXE);
a381934e	223	if (ret < 0)
f0fba2ad	224	return ret;
a381934e	225
a381934e	226	return 0;
a381934e DM	227	}
a381934e DM	228
f0fba2ad	229	static int ak4104_remove(struct snd_soc_codec *codec)
a381934e	230	{
afad95f8 MB	231	snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
afad95f8 MB	232	AK4104_CONTROL1_PW \| AK4104_CONTROL1_RSTN, 0);
a381934e	233
afad95f8	234	return 0;
a381934e DM	235	}
a381934e DM	236
f0fba2ad LG	237	static struct snd_soc_codec_driver soc_codec_device_ak4104 = {
	238	.probe = ak4104_probe,
	239	.remove = ak4104_remove,
	240	.reg_cache_size = AK4104_NUM_REGS,
cf0feafb	241	.reg_word_size = sizeof(u8),
f0fba2ad LG	242	};
	243
	244	static int ak4104_spi_probe(struct spi_device *spi)
a381934e	245	{
f0fba2ad	246	struct ak4104_private *ak4104;
a381934e DM	247	int ret;
a381934e DM	248
f0fba2ad LG	249	spi->bits_per_word = 8;
	250	spi->mode = SPI_MODE_0;
	251	ret = spi_setup(spi);
	252	if (ret < 0)
a381934e	253	return ret;
a381934e	254
3922d518 AL	255	ak4104 = devm_kzalloc(&spi->dev, sizeof(struct ak4104_private),
3922d518 AL	256	GFP_KERNEL);
f0fba2ad LG	257	if (ak4104 == NULL)
	258	return -ENOMEM;
	259
	260	ak4104->control_data = spi;
	261	ak4104->control_type = SND_SOC_SPI;
	262	spi_set_drvdata(spi, ak4104);
	263
	264	ret = snd_soc_register_codec(&spi->dev,
	265	&soc_codec_device_ak4104, &ak4104_dai, 1);
f0fba2ad	266	return ret;
a381934e DM	267	}
a381934e DM	268
f0fba2ad	269	static int __devexit ak4104_spi_remove(struct spi_device *spi)
a381934e	270	{
f0fba2ad	271	snd_soc_unregister_codec(&spi->dev);
a381934e	272	return 0;
f0fba2ad	273	}
a381934e DM	274
	275	static struct spi_driver ak4104_spi_driver = {
	276	.driver = {
	277	.name = DRV_NAME,
	278	.owner = THIS_MODULE,
	279	},
	280	.probe = ak4104_spi_probe,
	281	.remove = __devexit_p(ak4104_spi_remove),
	282	};
	283
38d78baf	284	module_spi_driver(ak4104_spi_driver);
a381934e DM	285
	286	MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
	287	MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver");
	288	MODULE_LICENSE("GPL");
	289