[mirror_ubuntu-bionic-kernel.git] / sound / soc / codecs / ak4642.c

/*
 * ak4642.c  --  AK4642/AK4643 ALSA Soc Audio driver
 *
 * Copyright (C) 2009 Renesas Solutions Corp.
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
 *
 * Based on wm8731.c by Richard Purdie
 * Based on ak4535.c by Richard Purdie
 * Based on wm8753.c by Liam Girdwood
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* ** CAUTION **
 *
 * This is very simple driver.
 * It can use headphone output / stereo input only
 *
 * AK4642 is tested.
 * AK4643 is tested.
 * AK4648 is tested.
 */

#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#define AK4642_VERSION "0.0.1"

#define PW_MGMT1	0x00
#define PW_MGMT2	0x01
#define SG_SL1		0x02
#define SG_SL2		0x03
#define MD_CTL1		0x04
#define MD_CTL2		0x05
#define TIMER		0x06
#define ALC_CTL1	0x07
#define ALC_CTL2	0x08
#define L_IVC		0x09
#define L_DVC		0x0a
#define ALC_CTL3	0x0b
#define R_IVC		0x0c
#define R_DVC		0x0d
#define MD_CTL3		0x0e
#define MD_CTL4		0x0f
#define PW_MGMT3	0x10
#define DF_S		0x11
#define FIL3_0		0x12
#define FIL3_1		0x13
#define FIL3_2		0x14
#define FIL3_3		0x15
#define EQ_0		0x16
#define EQ_1		0x17
#define EQ_2		0x18
#define EQ_3		0x19
#define EQ_4		0x1a
#define EQ_5		0x1b
#define FIL1_0		0x1c
#define FIL1_1		0x1d
#define FIL1_2		0x1e
#define FIL1_3		0x1f
#define PW_MGMT4	0x20
#define MD_CTL5		0x21
#define LO_MS		0x22
#define HP_MS		0x23
#define SPK_MS		0x24

/* PW_MGMT1*/
#define PMVCM		(1 << 6) /* VCOM Power Management */
#define PMMIN		(1 << 5) /* MIN Input Power Management */
#define PMDAC		(1 << 2) /* DAC Power Management */
#define PMADL		(1 << 0) /* MIC Amp Lch and ADC Lch Power Management */

/* PW_MGMT2 */
#define HPMTN		(1 << 6)
#define PMHPL		(1 << 5)
#define PMHPR		(1 << 4)
#define MS		(1 << 3) /* master/slave select */
#define MCKO		(1 << 1)
#define PMPLL		(1 << 0)

#define PMHP_MASK	(PMHPL | PMHPR)
#define PMHP		PMHP_MASK

/* PW_MGMT3 */
#define PMADR		(1 << 0) /* MIC L / ADC R Power Management */

/* SG_SL1 */
#define MINS		(1 << 6) /* Switch from MIN to Speaker */
#define DACL		(1 << 4) /* Switch from DAC to Stereo or Receiver */
#define PMMP		(1 << 2) /* MPWR pin Power Management */
#define MGAIN0		(1 << 0) /* MIC amp gain*/

/* TIMER */
#define ZTM(param)	((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
#define WTM(param)	(((param & 0x4) << 4) | ((param & 0x3) << 2))

/* ALC_CTL1 */
#define ALC		(1 << 5) /* ALC Enable */
#define LMTH0		(1 << 0) /* ALC Limiter / Recovery Level */

/* MD_CTL1 */
#define PLL3		(1 << 7)
#define PLL2		(1 << 6)
#define PLL1		(1 << 5)
#define PLL0		(1 << 4)
#define PLL_MASK	(PLL3 | PLL2 | PLL1 | PLL0)

#define BCKO_MASK	(1 << 3)
#define BCKO_64		BCKO_MASK

#define DIF_MASK	(3 << 0)
#define DSP		(0 << 0)
#define RIGHT_J		(1 << 0)
#define LEFT_J		(2 << 0)
#define I2S		(3 << 0)

/* MD_CTL2 */
#define FS0		(1 << 0)
#define FS1		(1 << 1)
#define FS2		(1 << 2)
#define FS3		(1 << 5)
#define FS_MASK		(FS0 | FS1 | FS2 | FS3)

/* MD_CTL3 */
#define BST1		(1 << 3)

/* MD_CTL4 */
#define DACH		(1 << 0)

/*
 * Playback Volume (table 39)
 *
 * max : 0x00 : +12.0 dB
 *       ( 0.5 dB step )
 * min : 0xFE : -115.0 dB
 * mute: 0xFF
 */
static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);

static const struct snd_kcontrol_new ak4642_snd_controls[] = {

	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
			 0, 0xFF, 1, out_tlv),

	SOC_SINGLE("Headphone Switch", PW_MGMT2, 6, 1, 0),
};

static const struct snd_kcontrol_new ak4642_hpout_mixer_controls[] = {
	SOC_DAPM_SINGLE("DACH", MD_CTL4, 0, 1, 0),
};

static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
	SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
};

static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {

	/* Outputs */
	SND_SOC_DAPM_OUTPUT("HPOUTL"),
	SND_SOC_DAPM_OUTPUT("HPOUTR"),
	SND_SOC_DAPM_OUTPUT("LINEOUT"),

	SND_SOC_DAPM_MIXER("HPOUTL Mixer", PW_MGMT2, 5, 0,
			   &ak4642_hpout_mixer_controls[0],
			   ARRAY_SIZE(ak4642_hpout_mixer_controls)),

	SND_SOC_DAPM_MIXER("HPOUTR Mixer", PW_MGMT2, 4, 0,
			   &ak4642_hpout_mixer_controls[0],
			   ARRAY_SIZE(ak4642_hpout_mixer_controls)),

	SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
			   &ak4642_lout_mixer_controls[0],
			   ARRAY_SIZE(ak4642_lout_mixer_controls)),

	/* DAC */
	SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
};

static const struct snd_soc_dapm_route ak4642_intercon[] = {

	/* Outputs */
	{"HPOUTL", NULL, "HPOUTL Mixer"},
	{"HPOUTR", NULL, "HPOUTR Mixer"},
	{"LINEOUT", NULL, "LINEOUT Mixer"},

	{"HPOUTL Mixer", "DACH", "DAC"},
	{"HPOUTR Mixer", "DACH", "DAC"},
	{"LINEOUT Mixer", "DACL", "DAC"},
};

/* codec private data */
struct ak4642_priv {
	unsigned int sysclk;
	enum snd_soc_control_type control_type;
};

/*
 * ak4642 register cache
 */
static const u8 ak4642_reg[] = {
	0x00, 0x00, 0x01, 0x00,
	0x02, 0x00, 0x00, 0x00,
	0xe1, 0xe1, 0x18, 0x00,
	0xe1, 0x18, 0x11, 0x08,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00,
};

static const u8 ak4648_reg[] = {
	0x00, 0x00, 0x01, 0x00,
	0x02, 0x00, 0x00, 0x00,
	0xe1, 0xe1, 0x18, 0x00,
	0xe1, 0x18, 0x11, 0xb8,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x88, 0x88, 0x08,
};

static int ak4642_dai_startup(struct snd_pcm_substream *substream,
			      struct snd_soc_dai *dai)
{
	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	struct snd_soc_codec *codec = dai->codec;

	if (is_play) {
		/*
		 * start headphone output
		 *
		 * PLL, Master Mode
		 * Audio I/F Format :MSB justified (ADC & DAC)
		 * Bass Boost Level : Middle
		 *
		 * This operation came from example code of
		 * "ASAHI KASEI AK4642" (japanese) manual p97.
		 */
		snd_soc_write(codec, L_IVC, 0x91); /* volume */
		snd_soc_write(codec, R_IVC, 0x91); /* volume */
	} else {
		/*
		 * start stereo input
		 *
		 * PLL Master Mode
		 * Audio I/F Format:MSB justified (ADC & DAC)
		 * Pre MIC AMP:+20dB
		 * MIC Power On
		 * ALC setting:Refer to Table 35
		 * ALC bit=“1”
		 *
		 * This operation came from example code of
		 * "ASAHI KASEI AK4642" (japanese) manual p94.
		 */
		snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
		snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
		snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
		snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
		snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
	}

	return 0;
}

static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
			       struct snd_soc_dai *dai)
{
	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	struct snd_soc_codec *codec = dai->codec;

	if (is_play) {
	} else {
		/* stop stereo input */
		snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
		snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
		snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
	}
}

static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
	int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u8 pll;

	switch (freq) {
	case 11289600:
		pll = PLL2;
		break;
	case 12288000:
		pll = PLL2 | PLL0;
		break;
	case 12000000:
		pll = PLL2 | PLL1;
		break;
	case 24000000:
		pll = PLL2 | PLL1 | PLL0;
		break;
	case 13500000:
		pll = PLL3 | PLL2;
		break;
	case 27000000:
		pll = PLL3 | PLL2 | PLL0;
		break;
	default:
		return -EINVAL;
	}
	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);

	return 0;
}

static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = dai->codec;
	u8 data;
	u8 bcko;

	data = MCKO | PMPLL; /* use MCKO */
	bcko = 0;

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		data |= MS;
		bcko = BCKO_64;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}
	snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);

	/* format type */
	data = 0;
	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_LEFT_J:
		data = LEFT_J;
		break;
	case SND_SOC_DAIFMT_I2S:
		data = I2S;
		break;
	/* FIXME
	 * Please add RIGHT_J / DSP support here
	 */
	default:
		return -EINVAL;
		break;
	}
	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);

	return 0;
}

static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
				struct snd_pcm_hw_params *params,
				struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	u8 rate;

	switch (params_rate(params)) {
	case 7350:
		rate = FS2;
		break;
	case 8000:
		rate = 0;
		break;
	case 11025:
		rate = FS2 | FS0;
		break;
	case 12000:
		rate = FS0;
		break;
	case 14700:
		rate = FS2 | FS1;
		break;
	case 16000:
		rate = FS1;
		break;
	case 22050:
		rate = FS2 | FS1 | FS0;
		break;
	case 24000:
		rate = FS1 | FS0;
		break;
	case 29400:
		rate = FS3 | FS2 | FS1;
		break;
	case 32000:
		rate = FS3 | FS1;
		break;
	case 44100:
		rate = FS3 | FS2 | FS1 | FS0;
		break;
	case 48000:
		rate = FS3 | FS1 | FS0;
		break;
	default:
		return -EINVAL;
		break;
	}
	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);

	return 0;
}

static int ak4642_set_bias_level(struct snd_soc_codec *codec,
				 enum snd_soc_bias_level level)
{
	switch (level) {
	case SND_SOC_BIAS_OFF:
		snd_soc_write(codec, PW_MGMT1, 0x00);
		break;
	default:
		snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
		break;
	}
	codec->dapm.bias_level = level;

	return 0;
}

static const struct snd_soc_dai_ops ak4642_dai_ops = {
	.startup	= ak4642_dai_startup,
	.shutdown	= ak4642_dai_shutdown,
	.set_sysclk	= ak4642_dai_set_sysclk,
	.set_fmt	= ak4642_dai_set_fmt,
	.hw_params	= ak4642_dai_hw_params,
};

static struct snd_soc_dai_driver ak4642_dai = {
	.name = "ak4642-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE },
	.capture = {
		.stream_name = "Capture",
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE },
	.ops = &ak4642_dai_ops,
	.symmetric_rates = 1,
};

static int ak4642_resume(struct snd_soc_codec *codec)
{
	snd_soc_cache_sync(codec);
	return 0;
}


static int ak4642_probe(struct snd_soc_codec *codec)
{
	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
	int ret;

	dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION);

	ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
		return ret;
	}

	snd_soc_add_controls(codec, ak4642_snd_controls,
			     ARRAY_SIZE(ak4642_snd_controls));

	ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	return 0;
}

static int ak4642_remove(struct snd_soc_codec *codec)
{
	ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
	.probe			= ak4642_probe,
	.remove			= ak4642_remove,
	.resume			= ak4642_resume,
	.set_bias_level		= ak4642_set_bias_level,
	.reg_cache_default	= ak4642_reg,			/* ak4642 reg */
	.reg_cache_size		= ARRAY_SIZE(ak4642_reg),	/* ak4642 reg */
	.reg_word_size		= sizeof(u8),
	.dapm_widgets		= ak4642_dapm_widgets,
	.num_dapm_widgets	= ARRAY_SIZE(ak4642_dapm_widgets),
	.dapm_routes		= ak4642_intercon,
	.num_dapm_routes	= ARRAY_SIZE(ak4642_intercon),
};

static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
	.probe			= ak4642_probe,
	.remove			= ak4642_remove,
	.resume			= ak4642_resume,
	.set_bias_level		= ak4642_set_bias_level,
	.reg_cache_default	= ak4648_reg,			/* ak4648 reg */
	.reg_cache_size		= ARRAY_SIZE(ak4648_reg),	/* ak4648 reg */
	.reg_word_size		= sizeof(u8),
	.dapm_widgets		= ak4642_dapm_widgets,
	.num_dapm_widgets	= ARRAY_SIZE(ak4642_dapm_widgets),
	.dapm_routes		= ak4642_intercon,
	.num_dapm_routes	= ARRAY_SIZE(ak4642_intercon),
};

#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
				      const struct i2c_device_id *id)
{
	struct ak4642_priv *ak4642;
	int ret;

	ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL);
	if (!ak4642)
		return -ENOMEM;

	i2c_set_clientdata(i2c, ak4642);
	ak4642->control_type = SND_SOC_I2C;

	ret =  snd_soc_register_codec(&i2c->dev,
				(struct snd_soc_codec_driver *)id->driver_data,
				&ak4642_dai, 1);
	if (ret < 0)
		kfree(ak4642);
	return ret;
}

static __devexit int ak4642_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	kfree(i2c_get_clientdata(client));
	return 0;
}

static const struct i2c_device_id ak4642_i2c_id[] = {
	{ "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
	{ "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
	{ "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);

static struct i2c_driver ak4642_i2c_driver = {
	.driver = {
		.name = "ak4642-codec",
		.owner = THIS_MODULE,
	},
	.probe		= ak4642_i2c_probe,
	.remove		= __devexit_p(ak4642_i2c_remove),
	.id_table	= ak4642_i2c_id,
};
#endif

static int __init ak4642_modinit(void)
{
	int ret = 0;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	ret = i2c_add_driver(&ak4642_i2c_driver);
#endif
	return ret;

}
module_init(ak4642_modinit);

static void __exit ak4642_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	i2c_del_driver(&ak4642_i2c_driver);
#endif

}
module_exit(ak4642_exit);

MODULE_DESCRIPTION("Soc AK4642 driver");
MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
a3a83d9a KM	1	/*
	2	* ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
	3	*
	4	* Copyright (C) 2009 Renesas Solutions Corp.
	5	* Kuninori Morimoto <morimoto.kuninori@renesas.com>
	6	*
	7	* Based on wm8731.c by Richard Purdie
	8	* Based on ak4535.c by Richard Purdie
	9	* Based on wm8753.c by Liam Girdwood
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
	15
	16	/* CAUTION
	17	*
	18	* This is very simple driver.
	19	* It can use headphone output / stereo input only
	20	*
20211391	21	* AK4642 is tested.
a3a83d9a	22	* AK4643 is tested.
a9317e8b	23	* AK4648 is tested.
a3a83d9a KM	24	*/
a3a83d9a KM	25
a3a83d9a	26	#include <linux/delay.h>
a3a83d9a KM	27	#include <linux/i2c.h>
a3a83d9a KM	28	#include <linux/platform_device.h>
5a0e3ad6	29	#include <linux/slab.h>
da155d5b	30	#include <linux/module.h>
ce6120cc	31	#include <sound/soc.h>
a3a83d9a	32	#include <sound/initval.h>
a300de3c	33	#include <sound/tlv.h>
a3a83d9a	34
a3a83d9a KM	35	#define AK4642_VERSION "0.0.1"
	36
	37	#define PW_MGMT1 0x00
	38	#define PW_MGMT2 0x01
	39	#define SG_SL1 0x02
	40	#define SG_SL2 0x03
	41	#define MD_CTL1 0x04
	42	#define MD_CTL2 0x05
	43	#define TIMER 0x06
	44	#define ALC_CTL1 0x07
	45	#define ALC_CTL2 0x08
	46	#define L_IVC 0x09
	47	#define L_DVC 0x0a
	48	#define ALC_CTL3 0x0b
	49	#define R_IVC 0x0c
	50	#define R_DVC 0x0d
	51	#define MD_CTL3 0x0e
	52	#define MD_CTL4 0x0f
	53	#define PW_MGMT3 0x10
	54	#define DF_S 0x11
	55	#define FIL3_0 0x12
	56	#define FIL3_1 0x13
	57	#define FIL3_2 0x14
	58	#define FIL3_3 0x15
	59	#define EQ_0 0x16
	60	#define EQ_1 0x17
	61	#define EQ_2 0x18
	62	#define EQ_3 0x19
	63	#define EQ_4 0x1a
	64	#define EQ_5 0x1b
	65	#define FIL1_0 0x1c
	66	#define FIL1_1 0x1d
	67	#define FIL1_2 0x1e
	68	#define FIL1_3 0x1f
	69	#define PW_MGMT4 0x20
	70	#define MD_CTL5 0x21
	71	#define LO_MS 0x22
	72	#define HP_MS 0x23
	73	#define SPK_MS 0x24
	74
a3471239 KM	75	/* PW_MGMT1*/
	76	#define PMVCM (1 << 6) /* VCOM Power Management */
	77	#define PMMIN (1 << 5) /* MIN Input Power Management */
	78	#define PMDAC (1 << 2) /* DAC Power Management */
	79	#define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
	80
0643ce8f KM	81	/* PW_MGMT2 */
	82	#define HPMTN (1 << 6)
	83	#define PMHPL (1 << 5)
	84	#define PMHPR (1 << 4)
	85	#define MS (1 << 3) /* master/slave select */
	86	#define MCKO (1 << 1)
	87	#define PMPLL (1 << 0)
	88
	89	#define PMHP_MASK (PMHPL \| PMHPR)
	90	#define PMHP PMHP_MASK
	91
a3471239 KM	92	/* PW_MGMT3 */
	93	#define PMADR (1 << 0) /* MIC L / ADC R Power Management */
	94
	95	/* SG_SL1 */
	96	#define MINS (1 << 6) /* Switch from MIN to Speaker */
	97	#define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
	98	#define PMMP (1 << 2) /* MPWR pin Power Management */
	99	#define MGAIN0 (1 << 0) /* MIC amp gain*/
	100
	101	/* TIMER */
	102	#define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
	103	#define WTM(param) (((param & 0x4) << 4) \| ((param & 0x3) << 2))
	104
	105	/* ALC_CTL1 */
	106	#define ALC (1 << 5) /* ALC Enable */
	107	#define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
	108
4b6316b4 KM	109	/* MD_CTL1 */
	110	#define PLL3 (1 << 7)
	111	#define PLL2 (1 << 6)
	112	#define PLL1 (1 << 5)
	113	#define PLL0 (1 << 4)
	114	#define PLL_MASK (PLL3 \| PLL2 \| PLL1 \| PLL0)
	115
0643ce8f KM	116	#define BCKO_MASK (1 << 3)
	117	#define BCKO_64 BCKO_MASK
	118
cb9c130a KM	119	#define DIF_MASK (3 << 0)
	120	#define DSP (0 << 0)
	121	#define RIGHT_J (1 << 0)
	122	#define LEFT_J (2 << 0)
	123	#define I2S (3 << 0)
	124
1ad747ca KM	125	/* MD_CTL2 */
	126	#define FS0 (1 << 0)
	127	#define FS1 (1 << 1)
	128	#define FS2 (1 << 2)
	129	#define FS3 (1 << 5)
	130	#define FS_MASK (FS0 \| FS1 \| FS2 \| FS3)
	131
a3471239 KM	132	/* MD_CTL3 */
	133	#define BST1 (1 << 3)
	134
	135	/* MD_CTL4 */
	136	#define DACH (1 << 0)
a3a83d9a	137
a300de3c KM	138	/*
	139	* Playback Volume (table 39)
	140	*
	141	* max : 0x00 : +12.0 dB
	142	* ( 0.5 dB step )
	143	* min : 0xFE : -115.0 dB
	144	* mute: 0xFF
	145	*/
	146	static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);
	147
	148	static const struct snd_kcontrol_new ak4642_snd_controls[] = {
	149
	150	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
	151	0, 0xFF, 1, out_tlv),
3c703526 KM	152
3c703526 KM	153	SOC_SINGLE("Headphone Switch", PW_MGMT2, 6, 1, 0),
a300de3c KM	154	};
a300de3c KM	155
24747dae KM	156	static const struct snd_kcontrol_new ak4642_hpout_mixer_controls[] = {
	157	SOC_DAPM_SINGLE("DACH", MD_CTL4, 0, 1, 0),
	158	};
	159
e8c83dbf KM	160	static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
	161	SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
	162	};
	163
24747dae KM	164	static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
	165
	166	/* Outputs */
	167	SND_SOC_DAPM_OUTPUT("HPOUTL"),
	168	SND_SOC_DAPM_OUTPUT("HPOUTR"),
e8c83dbf	169	SND_SOC_DAPM_OUTPUT("LINEOUT"),
24747dae KM	170
	171	SND_SOC_DAPM_MIXER("HPOUTL Mixer", PW_MGMT2, 5, 0,
	172	&ak4642_hpout_mixer_controls[0],
	173	ARRAY_SIZE(ak4642_hpout_mixer_controls)),
	174
	175	SND_SOC_DAPM_MIXER("HPOUTR Mixer", PW_MGMT2, 4, 0,
	176	&ak4642_hpout_mixer_controls[0],
	177	ARRAY_SIZE(ak4642_hpout_mixer_controls)),
	178
e8c83dbf KM	179	SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
	180	&ak4642_lout_mixer_controls[0],
	181	ARRAY_SIZE(ak4642_lout_mixer_controls)),
	182
24747dae KM	183	/* DAC */
	184	SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
	185	};
	186
	187	static const struct snd_soc_dapm_route ak4642_intercon[] = {
	188
	189	/* Outputs */
	190	{"HPOUTL", NULL, "HPOUTL Mixer"},
	191	{"HPOUTR", NULL, "HPOUTR Mixer"},
e8c83dbf	192	{"LINEOUT", NULL, "LINEOUT Mixer"},
24747dae KM	193
	194	{"HPOUTL Mixer", "DACH", "DAC"},
	195	{"HPOUTR Mixer", "DACH", "DAC"},
e8c83dbf	196	{"LINEOUT Mixer", "DACL", "DAC"},
24747dae	197	};
a300de3c	198
a3a83d9a KM	199	/* codec private data */
a3a83d9a KM	200	struct ak4642_priv {
f0fba2ad LG	201	unsigned int sysclk;
f0fba2ad LG	202	enum snd_soc_control_type control_type;
a3a83d9a KM	203	};
a3a83d9a KM	204
a3a83d9a KM	205	/*
	206	* ak4642 register cache
	207	*/
a9317e8b	208	static const u8 ak4642_reg[] = {
19b115e5 KM	209	0x00, 0x00, 0x01, 0x00,
	210	0x02, 0x00, 0x00, 0x00,
	211	0xe1, 0xe1, 0x18, 0x00,
	212	0xe1, 0x18, 0x11, 0x08,
	213	0x00, 0x00, 0x00, 0x00,
	214	0x00, 0x00, 0x00, 0x00,
	215	0x00, 0x00, 0x00, 0x00,
	216	0x00, 0x00, 0x00, 0x00,
	217	0x00, 0x00, 0x00, 0x00,
	218	0x00,
a3a83d9a KM	219	};
a3a83d9a KM	220
a9317e8b KM	221	static const u8 ak4648_reg[] = {
	222	0x00, 0x00, 0x01, 0x00,
	223	0x02, 0x00, 0x00, 0x00,
	224	0xe1, 0xe1, 0x18, 0x00,
	225	0xe1, 0x18, 0x11, 0xb8,
	226	0x00, 0x00, 0x00, 0x00,
	227	0x00, 0x00, 0x00, 0x00,
	228	0x00, 0x00, 0x00, 0x00,
	229	0x00, 0x00, 0x00, 0x00,
	230	0x00, 0x00, 0x00, 0x00,
	231	0x00, 0x88, 0x88, 0x08,
	232	};
	233
a3a83d9a KM	234	static int ak4642_dai_startup(struct snd_pcm_substream *substream,
	235	struct snd_soc_dai *dai)
	236	{
	237	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	238	struct snd_soc_codec *codec = dai->codec;
	239
	240	if (is_play) {
	241	/*
	242	* start headphone output
	243	*
	244	* PLL, Master Mode
	245	* Audio I/F Format :MSB justified (ADC & DAC)
a3a83d9a KM	246	* Bass Boost Level : Middle
	247	*
	248	* This operation came from example code of
	249	* "ASAHI KASEI AK4642" (japanese) manual p97.
a3a83d9a	250	*/
b91470bb AL	251	snd_soc_write(codec, L_IVC, 0x91); /* volume */
b91470bb AL	252	snd_soc_write(codec, R_IVC, 0x91); /* volume */
a3a83d9a KM	253	} else {
	254	/*
	255	* start stereo input
	256	*
	257	* PLL Master Mode
	258	* Audio I/F Format:MSB justified (ADC & DAC)
a3a83d9a KM	259	* Pre MIC AMP:+20dB
	260	* MIC Power On
	261	* ALC setting:Refer to Table 35
	262	* ALC bit=“1”
	263	*
	264	* This operation came from example code of
	265	* "ASAHI KASEI AK4642" (japanese) manual p94.
	266	*/
b91470bb AL	267	snd_soc_write(codec, SG_SL1, PMMP \| MGAIN0);
	268	snd_soc_write(codec, TIMER, ZTM(0x3) \| WTM(0x3));
	269	snd_soc_write(codec, ALC_CTL1, ALC \| LMTH0);
ed2dd7da	270	snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
a3471239	271	snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
a3a83d9a KM	272	}
	273
	274	return 0;
	275	}
	276
	277	static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
	278	struct snd_soc_dai *dai)
	279	{
	280	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	281	struct snd_soc_codec *codec = dai->codec;
	282
	283	if (is_play) {
a3a83d9a KM	284	} else {
a3a83d9a KM	285	/* stop stereo input */
a3471239 KM	286	snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
	287	snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
	288	snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
a3a83d9a KM	289	}
	290	}
	291
	292	static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
	293	int clk_id, unsigned int freq, int dir)
	294	{
	295	struct snd_soc_codec *codec = codec_dai->codec;
4b6316b4 KM	296	u8 pll;
	297
	298	switch (freq) {
	299	case 11289600:
	300	pll = PLL2;
	301	break;
	302	case 12288000:
	303	pll = PLL2 \| PLL0;
	304	break;
	305	case 12000000:
	306	pll = PLL2 \| PLL1;
	307	break;
	308	case 24000000:
	309	pll = PLL2 \| PLL1 \| PLL0;
	310	break;
	311	case 13500000:
	312	pll = PLL3 \| PLL2;
	313	break;
	314	case 27000000:
	315	pll = PLL3 \| PLL2 \| PLL0;
	316	break;
	317	default:
	318	return -EINVAL;
	319	}
	320	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
a3a83d9a	321
a3a83d9a KM	322	return 0;
	323	}
	324
0643ce8f KM	325	static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
	326	{
	327	struct snd_soc_codec *codec = dai->codec;
	328	u8 data;
	329	u8 bcko;
	330
	331	data = MCKO \| PMPLL; /* use MCKO */
	332	bcko = 0;
	333
	334	/* set master/slave audio interface */
	335	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	336	case SND_SOC_DAIFMT_CBM_CFM:
	337	data \|= MS;
	338	bcko = BCKO_64;
	339	break;
	340	case SND_SOC_DAIFMT_CBS_CFS:
	341	break;
	342	default:
	343	return -EINVAL;
	344	}
bd7fdbca	345	snd_soc_update_bits(codec, PW_MGMT2, MS \| MCKO \| PMPLL, data);
0643ce8f KM	346	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
0643ce8f KM	347
cb9c130a KM	348	/* format type */
	349	data = 0;
	350	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	351	case SND_SOC_DAIFMT_LEFT_J:
	352	data = LEFT_J;
	353	break;
	354	case SND_SOC_DAIFMT_I2S:
	355	data = I2S;
	356	break;
	357	/* FIXME
	358	* Please add RIGHT_J / DSP support here
	359	*/
	360	default:
	361	return -EINVAL;
	362	break;
	363	}
	364	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
	365
0643ce8f KM	366	return 0;
	367	}
	368
1ad747ca KM	369	static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
	370	struct snd_pcm_hw_params *params,
	371	struct snd_soc_dai *dai)
	372	{
	373	struct snd_soc_codec *codec = dai->codec;
	374	u8 rate;
	375
	376	switch (params_rate(params)) {
	377	case 7350:
	378	rate = FS2;
	379	break;
	380	case 8000:
	381	rate = 0;
	382	break;
	383	case 11025:
	384	rate = FS2 \| FS0;
	385	break;
	386	case 12000:
	387	rate = FS0;
	388	break;
	389	case 14700:
	390	rate = FS2 \| FS1;
	391	break;
	392	case 16000:
	393	rate = FS1;
	394	break;
	395	case 22050:
	396	rate = FS2 \| FS1 \| FS0;
	397	break;
	398	case 24000:
	399	rate = FS1 \| FS0;
	400	break;
	401	case 29400:
	402	rate = FS3 \| FS2 \| FS1;
	403	break;
	404	case 32000:
	405	rate = FS3 \| FS1;
	406	break;
	407	case 44100:
	408	rate = FS3 \| FS2 \| FS1 \| FS0;
	409	break;
	410	case 48000:
	411	rate = FS3 \| FS1 \| FS0;
	412	break;
	413	default:
	414	return -EINVAL;
	415	break;
	416	}
	417	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
a3a83d9a	418
a3a83d9a KM	419	return 0;
	420	}
	421
ed2dd7da KM	422	static int ak4642_set_bias_level(struct snd_soc_codec *codec,
	423	enum snd_soc_bias_level level)
	424	{
	425	switch (level) {
	426	case SND_SOC_BIAS_OFF:
	427	snd_soc_write(codec, PW_MGMT1, 0x00);
	428	break;
	429	default:
	430	snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
	431	break;
	432	}
	433	codec->dapm.bias_level = level;
	434
	435	return 0;
	436	}
	437
85e7652d	438	static const struct snd_soc_dai_ops ak4642_dai_ops = {
a3a83d9a KM	439	.startup = ak4642_dai_startup,
	440	.shutdown = ak4642_dai_shutdown,
	441	.set_sysclk = ak4642_dai_set_sysclk,
0643ce8f	442	.set_fmt = ak4642_dai_set_fmt,
1ad747ca	443	.hw_params = ak4642_dai_hw_params,
a3a83d9a KM	444	};
a3a83d9a KM	445
f0fba2ad LG	446	static struct snd_soc_dai_driver ak4642_dai = {
f0fba2ad LG	447	.name = "ak4642-hifi",
a3a83d9a KM	448	.playback = {
	449	.stream_name = "Playback",
	450	.channels_min = 1,
	451	.channels_max = 2,
	452	.rates = SNDRV_PCM_RATE_8000_48000,
	453	.formats = SNDRV_PCM_FMTBIT_S16_LE },
	454	.capture = {
	455	.stream_name = "Capture",
	456	.channels_min = 1,
	457	.channels_max = 2,
	458	.rates = SNDRV_PCM_RATE_8000_48000,
	459	.formats = SNDRV_PCM_FMTBIT_S16_LE },
	460	.ops = &ak4642_dai_ops,
1ad747ca	461	.symmetric_rates = 1,
a3a83d9a	462	};
a3a83d9a	463
f0fba2ad	464	static int ak4642_resume(struct snd_soc_codec *codec)
a3a83d9a	465	{
b91470bb	466	snd_soc_cache_sync(codec);
a3a83d9a KM	467	return 0;
	468	}
	469
f0fba2ad LG	470
f0fba2ad LG	471	static int ak4642_probe(struct snd_soc_codec *codec)
a3a83d9a	472	{
f0fba2ad	473	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
b91470bb	474	int ret;
a3a83d9a	475
f0fba2ad	476	dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION);
a3a83d9a	477
b91470bb AL	478	ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
	479	if (ret < 0) {
	480	dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
	481	return ret;
	482	}
a3a83d9a	483
73bb379f KM	484	snd_soc_add_controls(codec, ak4642_snd_controls,
73bb379f KM	485	ARRAY_SIZE(ak4642_snd_controls));
a3a83d9a	486
ed2dd7da KM	487	ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	488
	489	return 0;
	490	}
	491
	492	static int ak4642_remove(struct snd_soc_codec *codec)
	493	{
	494	ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
f0fba2ad	495	return 0;
a3a83d9a KM	496	}
a3a83d9a KM	497
f0fba2ad	498	static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
0ce75aa4	499	.probe = ak4642_probe,
ed2dd7da	500	.remove = ak4642_remove,
0ce75aa4	501	.resume = ak4642_resume,
ed2dd7da	502	.set_bias_level = ak4642_set_bias_level,
a9317e8b KM	503	.reg_cache_default = ak4642_reg, /* ak4642 reg */
	504	.reg_cache_size = ARRAY_SIZE(ak4642_reg), /* ak4642 reg */
	505	.reg_word_size = sizeof(u8),
	506	.dapm_widgets = ak4642_dapm_widgets,
	507	.num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
	508	.dapm_routes = ak4642_intercon,
	509	.num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
	510	};
	511
	512	static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
	513	.probe = ak4642_probe,
	514	.remove = ak4642_remove,
	515	.resume = ak4642_resume,
	516	.set_bias_level = ak4642_set_bias_level,
	517	.reg_cache_default = ak4648_reg, /* ak4648 reg */
	518	.reg_cache_size = ARRAY_SIZE(ak4648_reg), /* ak4648 reg */
0ce75aa4	519	.reg_word_size = sizeof(u8),
24747dae KM	520	.dapm_widgets = ak4642_dapm_widgets,
	521	.num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
	522	.dapm_routes = ak4642_intercon,
	523	.num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
f0fba2ad LG	524	};
f0fba2ad LG	525
a3a83d9a	526	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
f0fba2ad LG	527	static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
f0fba2ad LG	528	const struct i2c_device_id *id)
a3a83d9a KM	529	{
a3a83d9a KM	530	struct ak4642_priv *ak4642;
a3a83d9a KM	531	int ret;
	532
	533	ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL);
0ce75aa4	534	if (!ak4642)
a3a83d9a KM	535	return -ENOMEM;
a3a83d9a KM	536
a3a83d9a	537	i2c_set_clientdata(i2c, ak4642);
f0fba2ad	538	ak4642->control_type = SND_SOC_I2C;
a3a83d9a	539
f0fba2ad	540	ret = snd_soc_register_codec(&i2c->dev,
a9317e8b KM	541	(struct snd_soc_codec_driver *)id->driver_data,
a9317e8b KM	542	&ak4642_dai, 1);
f0fba2ad	543	if (ret < 0)
7bcaad91	544	kfree(ak4642);
a3a83d9a KM	545	return ret;
	546	}
	547
f0fba2ad	548	static __devexit int ak4642_i2c_remove(struct i2c_client *client)
a3a83d9a	549	{
f0fba2ad LG	550	snd_soc_unregister_codec(&client->dev);
f0fba2ad LG	551	kfree(i2c_get_clientdata(client));
a3a83d9a KM	552	return 0;
	553	}
	554
	555	static const struct i2c_device_id ak4642_i2c_id[] = {
a9317e8b KM	556	{ "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
	557	{ "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
	558	{ "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
a3a83d9a KM	559	{ }
	560	};
	561	MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
	562
	563	static struct i2c_driver ak4642_i2c_driver = {
	564	.driver = {
f0fba2ad	565	.name = "ak4642-codec",
a3a83d9a KM	566	.owner = THIS_MODULE,
a3a83d9a KM	567	},
0ce75aa4 KM	568	.probe = ak4642_i2c_probe,
	569	.remove = __devexit_p(ak4642_i2c_remove),
	570	.id_table = ak4642_i2c_id,
a3a83d9a	571	};
a3a83d9a KM	572	#endif
a3a83d9a KM	573
a3a83d9a KM	574	static int __init ak4642_modinit(void)
a3a83d9a KM	575	{
1cf86f6f	576	int ret = 0;
a3a83d9a KM	577	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	578	ret = i2c_add_driver(&ak4642_i2c_driver);
	579	#endif
	580	return ret;
	581
	582	}
	583	module_init(ak4642_modinit);
	584
	585	static void __exit ak4642_exit(void)
	586	{
	587	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	588	i2c_del_driver(&ak4642_i2c_driver);
	589	#endif
	590
	591	}
	592	module_exit(ak4642_exit);
	593
	594	MODULE_DESCRIPTION("Soc AK4642 driver");
	595	MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
	596	MODULE_LICENSE("GPL");