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94d5f7c0 LR |
1 | /* |
2 | * alc5632.h -- ALC5632 ALSA SoC Audio Codec | |
3 | * | |
4 | * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net> | |
5 | * | |
6 | * Authors: Leon Romanovsky <leon@leon.nu> | |
7 | * Andrey Danin <danindrey@mail.ru> | |
8 | * Ilya Petrov <ilya.muromec@gmail.com> | |
9 | * Marc Dietrich <marvin24@gmx.de> | |
10 | * | |
11 | * Based on alc5623.h by Arnaud Patard | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | */ | |
17 | ||
18 | #ifndef _ALC5632_H | |
19 | #define _ALC5632_H | |
20 | ||
21 | #define ALC5632_RESET 0x00 | |
22 | /* speaker output vol 2 2 */ | |
23 | /* line output vol 4 2 */ | |
24 | /* HP output vol 4 0 4 */ | |
25 | #define ALC5632_SPK_OUT_VOL 0x02 /* spe out vol */ | |
26 | #define ALC5632_SPK_OUT_VOL_STEP 1.5 | |
27 | #define ALC5632_HP_OUT_VOL 0x04 /* hp out vol */ | |
28 | #define ALC5632_AUX_OUT_VOL 0x06 /* aux out vol */ | |
29 | #define ALC5632_PHONE_IN_VOL 0x08 /* phone in vol */ | |
30 | #define ALC5632_LINE_IN_VOL 0x0A /* line in vol */ | |
31 | #define ALC5632_STEREO_DAC_IN_VOL 0x0C /* stereo dac in vol */ | |
32 | #define ALC5632_MIC_VOL 0x0E /* mic in vol */ | |
33 | /* stero dac/mic routing */ | |
34 | #define ALC5632_MIC_ROUTING_CTRL 0x10 | |
35 | #define ALC5632_MIC_ROUTE_MONOMIX (1 << 0) | |
36 | #define ALC5632_MIC_ROUTE_SPK (1 << 1) | |
37 | #define ALC5632_MIC_ROUTE_HP (1 << 2) | |
38 | ||
39 | #define ALC5632_ADC_REC_GAIN 0x12 /* rec gain */ | |
40 | #define ALC5632_ADC_REC_GAIN_RANGE 0x1F1F | |
41 | #define ALC5632_ADC_REC_GAIN_BASE (-16.5) | |
42 | #define ALC5632_ADC_REC_GAIN_STEP 1.5 | |
43 | ||
44 | #define ALC5632_ADC_REC_MIXER 0x14 /* mixer control */ | |
45 | #define ALC5632_ADC_REC_MIC1 (1 << 6) | |
46 | #define ALC5632_ADC_REC_MIC2 (1 << 5) | |
47 | #define ALC5632_ADC_REC_LINE_IN (1 << 4) | |
48 | #define ALC5632_ADC_REC_AUX (1 << 3) | |
49 | #define ALC5632_ADC_REC_HP (1 << 2) | |
50 | #define ALC5632_ADC_REC_SPK (1 << 1) | |
51 | #define ALC5632_ADC_REC_MONOMIX (1 << 0) | |
52 | ||
53 | #define ALC5632_VOICE_DAC_VOL 0x18 /* voice dac vol */ | |
75b3566f | 54 | #define ALC5632_I2S_OUT_CTL 0x1A /* undocumented reg. found in path scheme */ |
94d5f7c0 LR |
55 | /* ALC5632_OUTPUT_MIXER_CTRL : */ |
56 | /* same remark as for reg 2 line vs speaker */ | |
57 | #define ALC5632_OUTPUT_MIXER_CTRL 0x1C /* out mix ctrl */ | |
58 | #define ALC5632_OUTPUT_MIXER_RP (1 << 14) | |
59 | #define ALC5632_OUTPUT_MIXER_WEEK (1 << 12) | |
60 | #define ALC5632_OUTPUT_MIXER_HP (1 << 10) | |
61 | #define ALC5632_OUTPUT_MIXER_AUX_SPK (2 << 6) | |
62 | #define ALC5632_OUTPUT_MIXER_AUX_HP_LR (1 << 6) | |
63 | #define ALC5632_OUTPUT_MIXER_HP_R (1 << 8) | |
64 | #define ALC5632_OUTPUT_MIXER_HP_L (1 << 9) | |
65 | ||
66 | #define ALC5632_MIC_CTRL 0x22 /* mic phone ctrl */ | |
67 | #define ALC5632_MIC_BOOST_BYPASS 0 | |
68 | #define ALC5632_MIC_BOOST_20DB 1 | |
69 | #define ALC5632_MIC_BOOST_30DB 2 | |
70 | #define ALC5632_MIC_BOOST_40DB 3 | |
71 | ||
72 | #define ALC5632_DIGI_BOOST_CTRL 0x24 /* digi mic / bost ctl */ | |
73 | #define ALC5632_MIC_BOOST_RANGE 7 | |
74 | #define ALC5632_MIC_BOOST_STEP 6 | |
75 | #define ALC5632_PWR_DOWN_CTRL_STATUS 0x26 | |
76 | #define ALC5632_PWR_DOWN_CTRL_STATUS_MASK 0xEF00 | |
77 | #define ALC5632_PWR_VREF_PR3 (1 << 11) | |
78 | #define ALC5632_PWR_VREF_PR2 (1 << 10) | |
79 | #define ALC5632_PWR_VREF_STATUS (1 << 3) | |
80 | #define ALC5632_PWR_AMIX_STATUS (1 << 2) | |
81 | #define ALC5632_PWR_DAC_STATUS (1 << 1) | |
82 | #define ALC5632_PWR_ADC_STATUS (1 << 0) | |
83 | /* stereo/voice DAC / stereo adc func ctrl */ | |
84 | #define ALC5632_DAC_FUNC_SELECT 0x2E | |
85 | ||
86 | /* Main serial data port ctrl (i2s) */ | |
87 | #define ALC5632_DAI_CONTROL 0x34 | |
88 | ||
89 | #define ALC5632_DAI_SDP_MASTER_MODE (0 << 15) | |
90 | #define ALC5632_DAI_SDP_SLAVE_MODE (1 << 15) | |
91 | #define ALC5632_DAI_SADLRCK_MODE (1 << 14) | |
92 | /* 0:voice, 1:main */ | |
93 | #define ALC5632_DAI_MAIN_I2S_SYSCLK_SEL (1 << 8) | |
94 | #define ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL (1 << 7) | |
95 | /* 0:normal, 1:invert */ | |
96 | #define ALC5632_DAI_MAIN_I2S_LRCK_INV (1 << 6) | |
97 | #define ALC5632_DAI_I2S_DL_MASK (3 << 2) | |
98 | #define ALC5632_DAI_I2S_DL_8 (3 << 2) | |
99 | #define ALC5632_DAI_I2S_DL_24 (2 << 2) | |
100 | #define ALC5632_DAI_I2S_DL_20 (1 << 2) | |
101 | #define ALC5632_DAI_I2S_DL_16 (0 << 2) | |
102 | #define ALC5632_DAI_I2S_DF_MASK (3 << 0) | |
103 | #define ALC5632_DAI_I2S_DF_PCM_B (3 << 0) | |
104 | #define ALC5632_DAI_I2S_DF_PCM_A (2 << 0) | |
105 | #define ALC5632_DAI_I2S_DF_LEFT (1 << 0) | |
106 | #define ALC5632_DAI_I2S_DF_I2S (0 << 0) | |
107 | /* extend serial data port control (VoDAC_i2c/pcm) */ | |
108 | #define ALC5632_DAI_CONTROL2 0x36 | |
109 | /* 0:gpio func, 1:voice pcm */ | |
110 | #define ALC5632_DAI_VOICE_PCM_ENABLE (1 << 15) | |
111 | /* 0:master, 1:slave */ | |
112 | #define ALC5632_DAI_VOICE_MODE_SEL (1 << 14) | |
113 | /* 0:disable, 1:enable */ | |
114 | #define ALC5632_DAI_HPF_CLK_CTRL (1 << 13) | |
115 | /* 0:main, 1:voice */ | |
116 | #define ALC5632_DAI_VOICE_I2S_SYSCLK_SEL (1 << 8) | |
117 | /* 0:normal, 1:invert */ | |
118 | #define ALC5632_DAI_VOICE_VBCLK_SYSCLK_SEL (1 << 7) | |
119 | /* 0:normal, 1:invert */ | |
120 | #define ALC5632_DAI_VOICE_I2S_LR_INV (1 << 6) | |
121 | #define ALC5632_DAI_VOICE_DL_MASK (3 << 2) | |
122 | #define ALC5632_DAI_VOICE_DL_16 (0 << 2) | |
123 | #define ALC5632_DAI_VOICE_DL_20 (1 << 2) | |
124 | #define ALC5632_DAI_VOICE_DL_24 (2 << 2) | |
125 | #define ALC5632_DAI_VOICE_DL_8 (3 << 2) | |
126 | #define ALC5632_DAI_VOICE_DF_MASK (3 << 0) | |
127 | #define ALC5632_DAI_VOICE_DF_I2S (0 << 0) | |
128 | #define ALC5632_DAI_VOICE_DF_LEFT (1 << 0) | |
129 | #define ALC5632_DAI_VOICE_DF_PCM_A (2 << 0) | |
130 | #define ALC5632_DAI_VOICE_DF_PCM_B (3 << 0) | |
131 | ||
132 | #define ALC5632_PWR_MANAG_ADD1 0x3A | |
133 | #define ALC5632_PWR_MANAG_ADD1_MASK 0xEFFF | |
134 | #define ALC5632_PWR_ADD1_DAC_L_EN (1 << 15) | |
135 | #define ALC5632_PWR_ADD1_DAC_R_EN (1 << 14) | |
136 | #define ALC5632_PWR_ADD1_ZERO_CROSS (1 << 13) | |
137 | #define ALC5632_PWR_ADD1_MAIN_I2S_EN (1 << 11) | |
138 | #define ALC5632_PWR_ADD1_SPK_AMP_EN (1 << 10) | |
139 | #define ALC5632_PWR_ADD1_HP_OUT_AMP (1 << 9) | |
140 | #define ALC5632_PWR_ADD1_HP_OUT_ENH_AMP (1 << 8) | |
141 | #define ALC5632_PWR_ADD1_VOICE_DAC_MIX (1 << 7) | |
142 | #define ALC5632_PWR_ADD1_SOFTGEN_EN (1 << 6) | |
143 | #define ALC5632_PWR_ADD1_MIC1_SHORT_CURR (1 << 5) | |
144 | #define ALC5632_PWR_ADD1_MIC2_SHORT_CURR (1 << 4) | |
145 | #define ALC5632_PWR_ADD1_MIC1_EN (1 << 3) | |
146 | #define ALC5632_PWR_ADD1_MIC2_EN (1 << 2) | |
147 | #define ALC5632_PWR_ADD1_MAIN_BIAS (1 << 1) | |
148 | #define ALC5632_PWR_ADD1_DAC_REF (1 << 0) | |
149 | ||
150 | #define ALC5632_PWR_MANAG_ADD2 0x3C | |
151 | #define ALC5632_PWR_MANAG_ADD2_MASK 0x7FFF | |
152 | #define ALC5632_PWR_ADD2_PLL1 (1 << 15) | |
153 | #define ALC5632_PWR_ADD2_PLL2 (1 << 14) | |
154 | #define ALC5632_PWR_ADD2_VREF (1 << 13) | |
155 | #define ALC5632_PWR_ADD2_OVT_DET (1 << 12) | |
156 | #define ALC5632_PWR_ADD2_VOICE_DAC (1 << 10) | |
157 | #define ALC5632_PWR_ADD2_L_DAC_CLK (1 << 9) | |
158 | #define ALC5632_PWR_ADD2_R_DAC_CLK (1 << 8) | |
159 | #define ALC5632_PWR_ADD2_L_ADC_CLK_GAIN (1 << 7) | |
160 | #define ALC5632_PWR_ADD2_R_ADC_CLK_GAIN (1 << 6) | |
161 | #define ALC5632_PWR_ADD2_L_HP_MIXER (1 << 5) | |
162 | #define ALC5632_PWR_ADD2_R_HP_MIXER (1 << 4) | |
163 | #define ALC5632_PWR_ADD2_SPK_MIXER (1 << 3) | |
164 | #define ALC5632_PWR_ADD2_MONO_MIXER (1 << 2) | |
165 | #define ALC5632_PWR_ADD2_L_ADC_REC_MIXER (1 << 1) | |
166 | #define ALC5632_PWR_ADD2_R_ADC_REC_MIXER (1 << 0) | |
167 | ||
168 | #define ALC5632_PWR_MANAG_ADD3 0x3E | |
169 | #define ALC5632_PWR_MANAG_ADD3_MASK 0x7CFF | |
170 | #define ALC5632_PWR_ADD3_AUXOUT_VOL (1 << 14) | |
171 | #define ALC5632_PWR_ADD3_SPK_L_OUT (1 << 13) | |
172 | #define ALC5632_PWR_ADD3_SPK_R_OUT (1 << 12) | |
173 | #define ALC5632_PWR_ADD3_HP_L_OUT_VOL (1 << 11) | |
174 | #define ALC5632_PWR_ADD3_HP_R_OUT_VOL (1 << 10) | |
175 | #define ALC5632_PWR_ADD3_LINEIN_L_VOL (1 << 7) | |
176 | #define ALC5632_PWR_ADD3_LINEIN_R_VOL (1 << 6) | |
177 | #define ALC5632_PWR_ADD3_AUXIN_VOL (1 << 5) | |
178 | #define ALC5632_PWR_ADD3_AUXIN_MIX (1 << 4) | |
179 | #define ALC5632_PWR_ADD3_MIC1_VOL (1 << 3) | |
180 | #define ALC5632_PWR_ADD3_MIC2_VOL (1 << 2) | |
181 | #define ALC5632_PWR_ADD3_MIC1_BOOST_AD (1 << 1) | |
182 | #define ALC5632_PWR_ADD3_MIC2_BOOST_AD (1 << 0) | |
183 | ||
184 | #define ALC5632_GPCR1 0x40 | |
185 | #define ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1 (1 << 15) | |
186 | #define ALC5632_GPCR1_CLK_SYS_SRC_SEL_MCLK (0 << 15) | |
187 | #define ALC5632_GPCR1_DAC_HI_FLT_EN (1 << 10) | |
188 | #define ALC5632_GPCR1_SPK_AMP_CTRL (7 << 1) | |
189 | #define ALC5632_GPCR1_VDD_100 (5 << 1) | |
190 | #define ALC5632_GPCR1_VDD_125 (4 << 1) | |
191 | #define ALC5632_GPCR1_VDD_150 (3 << 1) | |
192 | #define ALC5632_GPCR1_VDD_175 (2 << 1) | |
193 | #define ALC5632_GPCR1_VDD_200 (1 << 1) | |
194 | #define ALC5632_GPCR1_VDD_225 (0 << 1) | |
195 | ||
196 | #define ALC5632_GPCR2 0x42 | |
197 | #define ALC5632_GPCR2_PLL1_SOUR_SEL (3 << 12) | |
198 | #define ALC5632_PLL_FR_MCLK (0 << 12) | |
199 | #define ALC5632_PLL_FR_BCLK (2 << 12) | |
200 | #define ALC5632_PLL_FR_VBCLK (3 << 12) | |
201 | #define ALC5632_GPCR2_CLK_PLL_PRE_DIV1 (0 << 0) | |
202 | ||
203 | #define ALC5632_PLL1_CTRL 0x44 | |
204 | #define ALC5632_PLL1_CTRL_N_VAL(n) (((n) & 0x0f) << 8) | |
205 | #define ALC5632_PLL1_M_BYPASS (1 << 7) | |
206 | #define ALC5632_PLL1_CTRL_K_VAL(k) (((k) & 0x07) << 4) | |
207 | #define ALC5632_PLL1_CTRL_M_VAL(m) (((m) & 0x0f) << 0) | |
208 | ||
209 | #define ALC5632_PLL2_CTRL 0x46 | |
210 | #define ALC5632_PLL2_EN (1 << 15) | |
211 | #define ALC5632_PLL2_RATIO (0 << 15) | |
212 | ||
213 | #define ALC5632_GPIO_PIN_CONFIG 0x4C | |
214 | #define ALC5632_GPIO_PIN_POLARITY 0x4E | |
215 | #define ALC5632_GPIO_PIN_STICKY 0x50 | |
216 | #define ALC5632_GPIO_PIN_WAKEUP 0x52 | |
217 | #define ALC5632_GPIO_PIN_STATUS 0x54 | |
218 | #define ALC5632_GPIO_PIN_SHARING 0x56 | |
219 | #define ALC5632_OVER_CURR_STATUS 0x58 | |
220 | #define ALC5632_SOFTVOL_CTRL 0x5A | |
221 | #define ALC5632_GPIO_OUPUT_PIN_CTRL 0x5C | |
222 | ||
223 | #define ALC5632_MISC_CTRL 0x5E | |
224 | #define ALC5632_MISC_DISABLE_FAST_VREG (1 << 15) | |
225 | #define ALC5632_MISC_AVC_TRGT_SEL (3 << 12) | |
226 | #define ALC5632_MISC_AVC_TRGT_RIGHT (1 << 12) | |
227 | #define ALC5632_MISC_AVC_TRGT_LEFT (2 << 12) | |
228 | #define ALC5632_MISC_AVC_TRGT_BOTH (3 << 12) | |
229 | #define ALC5632_MISC_HP_DEPOP_MODE1_EN (1 << 9) | |
230 | #define ALC5632_MISC_HP_DEPOP_MODE2_EN (1 << 8) | |
231 | #define ALC5632_MISC_HP_DEPOP_MUTE_L (1 << 7) | |
232 | #define ALC5632_MISC_HP_DEPOP_MUTE_R (1 << 6) | |
233 | #define ALC5632_MISC_HP_DEPOP_MUTE (1 << 5) | |
234 | #define ALC5632_MISC_GPIO_WAKEUP_CTRL (1 << 1) | |
235 | #define ALC5632_MISC_IRQOUT_INV_CTRL (1 << 0) | |
236 | ||
237 | #define ALC5632_DAC_CLK_CTRL1 0x60 | |
238 | #define ALC5632_DAC_CLK_CTRL2 0x62 | |
239 | #define ALC5632_DAC_CLK_CTRL2_DIV1_2 (1 << 0) | |
240 | #define ALC5632_VOICE_DAC_PCM_CLK_CTRL1 0x64 | |
241 | #define ALC5632_PSEUDO_SPATIAL_CTRL 0x68 | |
242 | #define ALC5632_HID_CTRL_INDEX 0x6A | |
243 | #define ALC5632_HID_CTRL_DATA 0x6C | |
244 | #define ALC5632_EQ_CTRL 0x6E | |
245 | ||
246 | /* undocumented */ | |
247 | #define ALC5632_VENDOR_ID1 0x7C | |
248 | #define ALC5632_VENDOR_ID2 0x7E | |
249 | ||
bb39753c LR |
250 | #define ALC5632_MAX_REGISTER 0x7E |
251 | ||
94d5f7c0 | 252 | #endif |