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ASoC: wm5102: Add controls for firmware selection
[mirror_ubuntu-eoan-kernel.git] / sound / soc / codecs / arizona.c
CommitLineData
07ed873e
MB		 1/*
2 * arizona.c - Wolfson Arizona class device shared support
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/gcd.h>
14#include <linux/module.h>
15#include <linux/pm_runtime.h>
16#include <sound/pcm.h>
17#include <sound/pcm_params.h>
18#include <sound/tlv.h>
19
20#include <linux/mfd/arizona/core.h>
21#include <linux/mfd/arizona/registers.h>
22
23#include "arizona.h"
24
25#define ARIZONA_AIF_BCLK_CTRL 0x00
26#define ARIZONA_AIF_TX_PIN_CTRL 0x01
27#define ARIZONA_AIF_RX_PIN_CTRL 0x02
28#define ARIZONA_AIF_RATE_CTRL 0x03
29#define ARIZONA_AIF_FORMAT 0x04
30#define ARIZONA_AIF_TX_BCLK_RATE 0x05
31#define ARIZONA_AIF_RX_BCLK_RATE 0x06
32#define ARIZONA_AIF_FRAME_CTRL_1 0x07
33#define ARIZONA_AIF_FRAME_CTRL_2 0x08
34#define ARIZONA_AIF_FRAME_CTRL_3 0x09
35#define ARIZONA_AIF_FRAME_CTRL_4 0x0A
36#define ARIZONA_AIF_FRAME_CTRL_5 0x0B
37#define ARIZONA_AIF_FRAME_CTRL_6 0x0C
38#define ARIZONA_AIF_FRAME_CTRL_7 0x0D
39#define ARIZONA_AIF_FRAME_CTRL_8 0x0E
40#define ARIZONA_AIF_FRAME_CTRL_9 0x0F
41#define ARIZONA_AIF_FRAME_CTRL_10 0x10
42#define ARIZONA_AIF_FRAME_CTRL_11 0x11
43#define ARIZONA_AIF_FRAME_CTRL_12 0x12
44#define ARIZONA_AIF_FRAME_CTRL_13 0x13
45#define ARIZONA_AIF_FRAME_CTRL_14 0x14
46#define ARIZONA_AIF_FRAME_CTRL_15 0x15
47#define ARIZONA_AIF_FRAME_CTRL_16 0x16
48#define ARIZONA_AIF_FRAME_CTRL_17 0x17
49#define ARIZONA_AIF_FRAME_CTRL_18 0x18
50#define ARIZONA_AIF_TX_ENABLES 0x19
51#define ARIZONA_AIF_RX_ENABLES 0x1A
52#define ARIZONA_AIF_FORCE_WRITE 0x1B
53
54#define arizona_fll_err(_fll, fmt, ...) \
55 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
56#define arizona_fll_warn(_fll, fmt, ...) \
57 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
58#define arizona_fll_dbg(_fll, fmt, ...) \
59 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
60
61#define arizona_aif_err(_dai, fmt, ...) \
62 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
63#define arizona_aif_warn(_dai, fmt, ...) \
64 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
65#define arizona_aif_dbg(_dai, fmt, ...) \
66 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
67
68const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
69 "None",
70 "Tone Generator 1",
71 "Tone Generator 2",
72 "Haptics",
73 "AEC",
74 "Mic Mute Mixer",
75 "Noise Generator",
76 "IN1L",
77 "IN1R",
78 "IN2L",
79 "IN2R",
80 "IN3L",
81 "IN3R",
c9c56fd0
MB		 82 "IN4L",
83 "IN4R",
07ed873e
MB		 84 "AIF1RX1",
85 "AIF1RX2",
86 "AIF1RX3",
87 "AIF1RX4",
88 "AIF1RX5",
89 "AIF1RX6",
90 "AIF1RX7",
91 "AIF1RX8",
92 "AIF2RX1",
93 "AIF2RX2",
94 "AIF3RX1",
95 "AIF3RX2",
96 "SLIMRX1",
97 "SLIMRX2",
98 "SLIMRX3",
99 "SLIMRX4",
100 "SLIMRX5",
101 "SLIMRX6",
102 "SLIMRX7",
103 "SLIMRX8",
104 "EQ1",
105 "EQ2",
106 "EQ3",
107 "EQ4",
108 "DRC1L",
109 "DRC1R",
110 "DRC2L",
111 "DRC2R",
112 "LHPF1",
113 "LHPF2",
114 "LHPF3",
115 "LHPF4",
116 "DSP1.1",
117 "DSP1.2",
118 "DSP1.3",
119 "DSP1.4",
120 "DSP1.5",
121 "DSP1.6",
c922cc4c
MB		 122 "DSP2.1",
123 "DSP2.2",
124 "DSP2.3",
125 "DSP2.4",
126 "DSP2.5",
127 "DSP2.6",
128 "DSP3.1",
129 "DSP3.2",
130 "DSP3.3",
131 "DSP3.4",
132 "DSP3.5",
133 "DSP3.6",
134 "DSP4.1",
135 "DSP4.2",
136 "DSP4.3",
137 "DSP4.4",
138 "DSP4.5",
139 "DSP4.6",
07ed873e
MB		 140 "ASRC1L",
141 "ASRC1R",
142 "ASRC2L",
143 "ASRC2R",
91660bd6
MB		 144 "ISRC1INT1",
145 "ISRC1INT2",
146 "ISRC1INT3",
147 "ISRC1INT4",
148 "ISRC1DEC1",
149 "ISRC1DEC2",
150 "ISRC1DEC3",
151 "ISRC1DEC4",
152 "ISRC2INT1",
153 "ISRC2INT2",
154 "ISRC2INT3",
155 "ISRC2INT4",
156 "ISRC2DEC1",
157 "ISRC2DEC2",
158 "ISRC2DEC3",
159 "ISRC2DEC4",
160 "ISRC3INT1",
161 "ISRC3INT2",
162 "ISRC3INT3",
163 "ISRC3INT4",
164 "ISRC3DEC1",
165 "ISRC3DEC2",
166 "ISRC3DEC3",
167 "ISRC3DEC4",
07ed873e
MB		 168};
169EXPORT_SYMBOL_GPL(arizona_mixer_texts);
170
171int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
172 0x00, /* None */
173 0x04, /* Tone */
174 0x05,
175 0x06, /* Haptics */
176 0x08, /* AEC */
177 0x0c, /* Noise mixer */
178 0x0d, /* Comfort noise */
179 0x10, /* IN1L */
180 0x11,
181 0x12,
182 0x13,
183 0x14,
184 0x15,
c9c56fd0
MB		 185 0x16,
186 0x17,
07ed873e
MB		 187 0x20, /* AIF1RX1 */
188 0x21,
189 0x22,
190 0x23,
191 0x24,
192 0x25,
193 0x26,
194 0x27,
195 0x28, /* AIF2RX1 */
196 0x29,
197 0x30, /* AIF3RX1 */
198 0x31,
199 0x38, /* SLIMRX1 */
200 0x39,
201 0x3a,
202 0x3b,
203 0x3c,
204 0x3d,
205 0x3e,
206 0x3f,
207 0x50, /* EQ1 */
208 0x51,
209 0x52,
210 0x53,
211 0x58, /* DRC1L */
212 0x59,
213 0x5a,
214 0x5b,
215 0x60, /* LHPF1 */
216 0x61,
217 0x62,
218 0x63,
219 0x68, /* DSP1.1 */
220 0x69,
221 0x6a,
222 0x6b,
223 0x6c,
224 0x6d,
c922cc4c
MB		 225 0x70, /* DSP2.1 */
226 0x71,
227 0x72,
228 0x73,
229 0x74,
230 0x75,
231 0x78, /* DSP3.1 */
232 0x79,
233 0x7a,
234 0x7b,
235 0x7c,
236 0x7d,
237 0x80, /* DSP4.1 */
238 0x81,
239 0x82,
240 0x83,
241 0x84,
242 0x85,
07ed873e
MB		 243 0x90, /* ASRC1L */
244 0x91,
245 0x92,
246 0x93,
91660bd6
MB		 247 0xa0, /* ISRC1INT1 */
248 0xa1,
249 0xa2,
250 0xa3,
251 0xa4, /* ISRC1DEC1 */
252 0xa5,
253 0xa6,
254 0xa7,
255 0xa8, /* ISRC2DEC1 */
256 0xa9,
257 0xaa,
258 0xab,
259 0xac, /* ISRC2INT1 */
260 0xad,
261 0xae,
262 0xaf,
263 0xb0, /* ISRC3DEC1 */
264 0xb1,
265 0xb2,
266 0xb3,
267 0xb4, /* ISRC3INT1 */
268 0xb5,
269 0xb6,
270 0xb7,
07ed873e
MB		 271};
272EXPORT_SYMBOL_GPL(arizona_mixer_values);
273
274const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0);
275EXPORT_SYMBOL_GPL(arizona_mixer_tlv);
276
e853a00f
MB		 277static const char *arizona_vol_ramp_text[] = {
278 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
279 "15ms/6dB", "30ms/6dB",
280};
281
282const struct soc_enum arizona_in_vd_ramp =
283 SOC_ENUM_SINGLE(ARIZONA_INPUT_VOLUME_RAMP,
284 ARIZONA_IN_VD_RAMP_SHIFT, 7, arizona_vol_ramp_text);
285EXPORT_SYMBOL_GPL(arizona_in_vd_ramp);
286
287const struct soc_enum arizona_in_vi_ramp =
288 SOC_ENUM_SINGLE(ARIZONA_INPUT_VOLUME_RAMP,
289 ARIZONA_IN_VI_RAMP_SHIFT, 7, arizona_vol_ramp_text);
290EXPORT_SYMBOL_GPL(arizona_in_vi_ramp);
291
292const struct soc_enum arizona_out_vd_ramp =
293 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_VOLUME_RAMP,
294 ARIZONA_OUT_VD_RAMP_SHIFT, 7, arizona_vol_ramp_text);
295EXPORT_SYMBOL_GPL(arizona_out_vd_ramp);
296
297const struct soc_enum arizona_out_vi_ramp =
298 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_VOLUME_RAMP,
299 ARIZONA_OUT_VI_RAMP_SHIFT, 7, arizona_vol_ramp_text);
300EXPORT_SYMBOL_GPL(arizona_out_vi_ramp);
301
07ed873e
MB		 302static const char *arizona_lhpf_mode_text[] = {
303 "Low-pass", "High-pass"
304};
305
306const struct soc_enum arizona_lhpf1_mode =
307 SOC_ENUM_SINGLE(ARIZONA_HPLPF1_1, ARIZONA_LHPF1_MODE_SHIFT, 2,
308 arizona_lhpf_mode_text);
309EXPORT_SYMBOL_GPL(arizona_lhpf1_mode);
310
311const struct soc_enum arizona_lhpf2_mode =
312 SOC_ENUM_SINGLE(ARIZONA_HPLPF2_1, ARIZONA_LHPF2_MODE_SHIFT, 2,
313 arizona_lhpf_mode_text);
314EXPORT_SYMBOL_GPL(arizona_lhpf2_mode);
315
316const struct soc_enum arizona_lhpf3_mode =
317 SOC_ENUM_SINGLE(ARIZONA_HPLPF3_1, ARIZONA_LHPF3_MODE_SHIFT, 2,
318 arizona_lhpf_mode_text);
319EXPORT_SYMBOL_GPL(arizona_lhpf3_mode);
320
321const struct soc_enum arizona_lhpf4_mode =
322 SOC_ENUM_SINGLE(ARIZONA_HPLPF4_1, ARIZONA_LHPF4_MODE_SHIFT, 2,
323 arizona_lhpf_mode_text);
324EXPORT_SYMBOL_GPL(arizona_lhpf4_mode);
325
845571cc
MB		 326static const char *arizona_ng_hold_text[] = {
327 "30ms", "120ms", "250ms", "500ms",
328};
329
330const struct soc_enum arizona_ng_hold =
331 SOC_ENUM_SINGLE(ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_HOLD_SHIFT,
332 4, arizona_ng_hold_text);
333EXPORT_SYMBOL_GPL(arizona_ng_hold);
334
07ed873e
MB		 335int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
336 int event)
337{
338 return 0;
339}
340EXPORT_SYMBOL_GPL(arizona_in_ev);
341
342int arizona_out_ev(struct snd_soc_dapm_widget *w,
343 struct snd_kcontrol *kcontrol,
344 int event)
345{
346 return 0;
347}
348EXPORT_SYMBOL_GPL(arizona_out_ev);
349
cbd840da
MB		 350static unsigned int arizona_sysclk_48k_rates[] = {
351 6144000,
352 12288000,
96e1f18f 353 24576000,
cbd840da 354 49152000,
aeaeee1a
MB		 355 73728000,
356 98304000,
357 147456000,
cbd840da
MB		 358};
359
360static unsigned int arizona_sysclk_44k1_rates[] = {
361 5644800,
362 11289600,
96e1f18f 363 22579200,
cbd840da 364 45158400,
aeaeee1a
MB		 365 67737600,
366 90316800,
367 135475200,
cbd840da
MB		 368};
369
370static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk,
371 unsigned int freq)
372{
373 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
374 unsigned int reg;
375 unsigned int *rates;
376 int ref, div, refclk;
377
378 switch (clk) {
379 case ARIZONA_CLK_OPCLK:
380 reg = ARIZONA_OUTPUT_SYSTEM_CLOCK;
381 refclk = priv->sysclk;
382 break;
383 case ARIZONA_CLK_ASYNC_OPCLK:
384 reg = ARIZONA_OUTPUT_ASYNC_CLOCK;
385 refclk = priv->asyncclk;
386 break;
387 default:
388 return -EINVAL;
389 }
390
391 if (refclk % 8000)
392 rates = arizona_sysclk_44k1_rates;
393 else
394 rates = arizona_sysclk_48k_rates;
395
396 for (ref = 0; ref < ARRAY_SIZE(arizona_sysclk_48k_rates) &&
397 rates[ref] <= refclk; ref++) {
398 div = 1;
399 while (rates[ref] / div >= freq && div < 32) {
400 if (rates[ref] / div == freq) {
401 dev_dbg(codec->dev, "Configured %dHz OPCLK\n",
402 freq);
403 snd_soc_update_bits(codec, reg,
404 ARIZONA_OPCLK_DIV_MASK |
405 ARIZONA_OPCLK_SEL_MASK,
406 (div <<
407 ARIZONA_OPCLK_DIV_SHIFT) |
408 ref);
409 return 0;
410 }
411 div++;
412 }
413 }
414
415 dev_err(codec->dev, "Unable to generate %dHz OPCLK\n", freq);
416 return -EINVAL;
417}
418
07ed873e
MB		 419int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
420 int source, unsigned int freq, int dir)
421{
422 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
423 struct arizona *arizona = priv->arizona;
424 char *name;
425 unsigned int reg;
426 unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK;
427 unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT;
428 unsigned int *clk;
429
430 switch (clk_id) {
431 case ARIZONA_CLK_SYSCLK:
432 name = "SYSCLK";
433 reg = ARIZONA_SYSTEM_CLOCK_1;
434 clk = &priv->sysclk;
435 mask |= ARIZONA_SYSCLK_FRAC;
436 break;
437 case ARIZONA_CLK_ASYNCCLK:
438 name = "ASYNCCLK";
439 reg = ARIZONA_ASYNC_CLOCK_1;
440 clk = &priv->asyncclk;
441 break;
cbd840da
MB		 442 case ARIZONA_CLK_OPCLK:
443 case ARIZONA_CLK_ASYNC_OPCLK:
444 return arizona_set_opclk(codec, clk_id, freq);
07ed873e
MB		 445 default:
446 return -EINVAL;
447 }
448
449 switch (freq) {
450 case 5644800:
451 case 6144000:
452 break;
453 case 11289600:
454 case 12288000:
455 val |= 1 << ARIZONA_SYSCLK_FREQ_SHIFT;
456 break;
457 case 22579200:
458 case 24576000:
459 val |= 2 << ARIZONA_SYSCLK_FREQ_SHIFT;
460 break;
461 case 45158400:
462 case 49152000:
463 val |= 3 << ARIZONA_SYSCLK_FREQ_SHIFT;
464 break;
38113360
MB		 465 case 67737600:
466 case 73728000:
467 val |= 4 << ARIZONA_SYSCLK_FREQ_SHIFT;
468 break;
469 case 90316800:
470 case 98304000:
471 val |= 5 << ARIZONA_SYSCLK_FREQ_SHIFT;
472 break;
473 case 135475200:
474 case 147456000:
475 val |= 6 << ARIZONA_SYSCLK_FREQ_SHIFT;
476 break;
07ed873e
MB		 477 default:
478 return -EINVAL;
479 }
480
481 *clk = freq;
482
483 if (freq % 6144000)
484 val |= ARIZONA_SYSCLK_FRAC;
485
486 dev_dbg(arizona->dev, "%s set to %uHz", name, freq);
487
488 return regmap_update_bits(arizona->regmap, reg, mask, val);
489}
490EXPORT_SYMBOL_GPL(arizona_set_sysclk);
491
492static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
493{
494 struct snd_soc_codec *codec = dai->codec;
495 int lrclk, bclk, mode, base;
496
497 base = dai->driver->base;
498
499 lrclk = 0;
500 bclk = 0;
501
502 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
503 case SND_SOC_DAIFMT_DSP_A:
504 mode = 0;
505 break;
07ed873e
MB		 506 case SND_SOC_DAIFMT_I2S:
507 mode = 2;
508 break;
07ed873e
MB		 509 default:
510 arizona_aif_err(dai, "Unsupported DAI format %d\n",
511 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
512 return -EINVAL;
513 }
514
515 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
516 case SND_SOC_DAIFMT_CBS_CFS:
517 break;
518 case SND_SOC_DAIFMT_CBS_CFM:
519 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
520 break;
521 case SND_SOC_DAIFMT_CBM_CFS:
522 bclk |= ARIZONA_AIF1_BCLK_MSTR;
523 break;
524 case SND_SOC_DAIFMT_CBM_CFM:
525 bclk |= ARIZONA_AIF1_BCLK_MSTR;
526 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
527 break;
528 default:
529 arizona_aif_err(dai, "Unsupported master mode %d\n",
530 fmt & SND_SOC_DAIFMT_MASTER_MASK);
531 return -EINVAL;
532 }
533
534 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
535 case SND_SOC_DAIFMT_NB_NF:
536 break;
537 case SND_SOC_DAIFMT_IB_IF:
538 bclk |= ARIZONA_AIF1_BCLK_INV;
539 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
540 break;
541 case SND_SOC_DAIFMT_IB_NF:
542 bclk |= ARIZONA_AIF1_BCLK_INV;
543 break;
544 case SND_SOC_DAIFMT_NB_IF:
545 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
546 break;
547 default:
548 return -EINVAL;
549 }
550
551 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL,
552 ARIZONA_AIF1_BCLK_INV | ARIZONA_AIF1_BCLK_MSTR,
553 bclk);
554 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_PIN_CTRL,
555 ARIZONA_AIF1TX_LRCLK_INV |
556 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
557 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_PIN_CTRL,
558 ARIZONA_AIF1RX_LRCLK_INV |
559 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
560 snd_soc_update_bits(codec, base + ARIZONA_AIF_FORMAT,
561 ARIZONA_AIF1_FMT_MASK, mode);
562
563 return 0;
564}
565
949e6bc7 566static const int arizona_48k_bclk_rates[] = {
07ed873e
MB		 567 -1,
568 48000,
569 64000,
570 96000,
571 128000,
572 192000,
573 256000,
574 384000,
575 512000,
576 768000,
577 1024000,
578 1536000,
579 2048000,
580 3072000,
581 4096000,
582 6144000,
583 8192000,
584 12288000,
585 24576000,
586};
587
5b2eec3f
MB		 588static const unsigned int arizona_48k_rates[] = {
589 12000,
590 24000,
591 48000,
592 96000,
593 192000,
594 384000,
595 768000,
596 4000,
597 8000,
598 16000,
599 32000,
600 64000,
601 128000,
602 256000,
603 512000,
604};
605
606static const struct snd_pcm_hw_constraint_list arizona_48k_constraint = {
607 .count = ARRAY_SIZE(arizona_48k_rates),
608 .list = arizona_48k_rates,
609};
610
949e6bc7 611static const int arizona_44k1_bclk_rates[] = {
07ed873e
MB		 612 -1,
613 44100,
614 58800,
615 88200,
616 117600,
617 177640,
618 235200,
619 352800,
620 470400,
621 705600,
622 940800,
623 1411200,
624 1881600,
4758be37 625 2822400,
07ed873e
MB		 626 3763200,
627 5644800,
628 7526400,
629 11289600,
630 22579200,
631};
632
5b2eec3f
MB		 633static const unsigned int arizona_44k1_rates[] = {
634 11025,
635 22050,
636 44100,
637 88200,
638 176400,
639 352800,
640 705600,
641};
642
643static const struct snd_pcm_hw_constraint_list arizona_44k1_constraint = {
644 .count = ARRAY_SIZE(arizona_44k1_rates),
645 .list = arizona_44k1_rates,
646};
647
07ed873e
MB		 648static int arizona_sr_vals[] = {
649 0,
650 12000,
651 24000,
652 48000,
653 96000,
654 192000,
655 384000,
656 768000,
657 0,
658 11025,
659 22050,
660 44100,
661 88200,
662 176400,
663 352800,
664 705600,
665 4000,
666 8000,
667 16000,
668 32000,
669 64000,
670 128000,
671 256000,
672 512000,
673};
674
5b2eec3f
MB		 675static int arizona_startup(struct snd_pcm_substream *substream,
676 struct snd_soc_dai *dai)
677{
678 struct snd_soc_codec *codec = dai->codec;
679 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
680 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
681 const struct snd_pcm_hw_constraint_list *constraint;
682 unsigned int base_rate;
683
684 switch (dai_priv->clk) {
685 case ARIZONA_CLK_SYSCLK:
686 base_rate = priv->sysclk;
687 break;
688 case ARIZONA_CLK_ASYNCCLK:
689 base_rate = priv->asyncclk;
690 break;
691 default:
692 return 0;
693 }
694
695 if (base_rate % 8000)
696 constraint = &arizona_44k1_constraint;
697 else
698 constraint = &arizona_48k_constraint;
699
700 return snd_pcm_hw_constraint_list(substream->runtime, 0,
701 SNDRV_PCM_HW_PARAM_RATE,
702 constraint);
703}
704
b272efc8
MB		 705static int arizona_hw_params_rate(struct snd_pcm_substream *substream,
706 struct snd_pcm_hw_params *params,
707 struct snd_soc_dai *dai)
708{
709 struct snd_soc_codec *codec = dai->codec;
710 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
711 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
712 int base = dai->driver->base;
713 int i, sr_val;
714
715 /*
716 * We will need to be more flexible than this in future,
717 * currently we use a single sample rate for SYSCLK.
718 */
719 for (i = 0; i < ARRAY_SIZE(arizona_sr_vals); i++)
720 if (arizona_sr_vals[i] == params_rate(params))
721 break;
722 if (i == ARRAY_SIZE(arizona_sr_vals)) {
723 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
724 params_rate(params));
725 return -EINVAL;
726 }
727 sr_val = i;
728
729 switch (dai_priv->clk) {
730 case ARIZONA_CLK_SYSCLK:
731 snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1,
732 ARIZONA_SAMPLE_RATE_1_MASK, sr_val);
733 if (base)
734 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
735 ARIZONA_AIF1_RATE_MASK, 0);
736 break;
737 case ARIZONA_CLK_ASYNCCLK:
738 snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1,
739 ARIZONA_ASYNC_SAMPLE_RATE_MASK, sr_val);
740 if (base)
741 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
742 ARIZONA_AIF1_RATE_MASK,
743 8 << ARIZONA_AIF1_RATE_SHIFT);
744 break;
745 default:
746 arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
747 return -EINVAL;
748 }
749
750 return 0;
751}
752
07ed873e
MB		 753static int arizona_hw_params(struct snd_pcm_substream *substream,
754 struct snd_pcm_hw_params *params,
755 struct snd_soc_dai *dai)
756{
757 struct snd_soc_codec *codec = dai->codec;
758 int base = dai->driver->base;
759 const int *rates;
b272efc8
MB		 760 int i, ret;
761 int bclk, lrclk, wl, frame;
07ed873e
MB		 762
763 if (params_rate(params) % 8000)
949e6bc7 764 rates = &arizona_44k1_bclk_rates[0];
07ed873e 765 else
949e6bc7 766 rates = &arizona_48k_bclk_rates[0];
07ed873e 767
949e6bc7 768 for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) {
5001765f
MB		 769 if (rates[i] >= snd_soc_params_to_bclk(params) &&
770 rates[i] % params_rate(params) == 0) {
07ed873e
MB		 771 bclk = i;
772 break;
773 }
774 }
949e6bc7 775 if (i == ARRAY_SIZE(arizona_44k1_bclk_rates)) {
07ed873e
MB		 776 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
777 params_rate(params));
778 return -EINVAL;
779 }
780
b59e0f82 781 lrclk = rates[bclk] / params_rate(params);
07ed873e
MB		 782
783 arizona_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n",
784 rates[bclk], rates[bclk] / lrclk);
785
786 wl = snd_pcm_format_width(params_format(params));
787 frame = wl << ARIZONA_AIF1TX_WL_SHIFT | wl;
788
b272efc8
MB		 789 ret = arizona_hw_params_rate(substream, params, dai);
790 if (ret != 0)
791 return ret;
c013b27a 792
07ed873e
MB		 793 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL,
794 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
795 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE,
796 ARIZONA_AIF1TX_BCPF_MASK, lrclk);
797 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE,
798 ARIZONA_AIF1RX_BCPF_MASK, lrclk);
799 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1,
800 ARIZONA_AIF1TX_WL_MASK |
801 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
802 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2,
803 ARIZONA_AIF1RX_WL_MASK |
804 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
805
806 return 0;
807}
808
410837a7
MB		 809static const char *arizona_dai_clk_str(int clk_id)
810{
811 switch (clk_id) {
812 case ARIZONA_CLK_SYSCLK:
813 return "SYSCLK";
814 case ARIZONA_CLK_ASYNCCLK:
815 return "ASYNCCLK";
816 default:
817 return "Unknown clock";
818 }
819}
820
5b2eec3f
MB		 821static int arizona_dai_set_sysclk(struct snd_soc_dai *dai,
822 int clk_id, unsigned int freq, int dir)
823{
824 struct snd_soc_codec *codec = dai->codec;
825 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
826 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
410837a7 827 struct snd_soc_dapm_route routes[2];
5b2eec3f
MB		 828
829 switch (clk_id) {
830 case ARIZONA_CLK_SYSCLK:
831 case ARIZONA_CLK_ASYNCCLK:
832 break;
833 default:
834 return -EINVAL;
835 }
836
410837a7
MB		 837 if (clk_id == dai_priv->clk)
838 return 0;
839
840 if (dai->active) {
5b2eec3f
MB		 841 dev_err(codec->dev, "Can't change clock on active DAI %d\n",
842 dai->id);
843 return -EBUSY;
844 }
845
c8d35a6a
MB		 846 dev_dbg(codec->dev, "Setting AIF%d to %s\n", dai->id + 1,
847 arizona_dai_clk_str(clk_id));
848
410837a7
MB		 849 memset(&routes, 0, sizeof(routes));
850 routes[0].sink = dai->driver->capture.stream_name;
851 routes[1].sink = dai->driver->playback.stream_name;
5b2eec3f 852
410837a7
MB		 853 routes[0].source = arizona_dai_clk_str(dai_priv->clk);
854 routes[1].source = arizona_dai_clk_str(dai_priv->clk);
855 snd_soc_dapm_del_routes(&codec->dapm, routes, ARRAY_SIZE(routes));
856
857 routes[0].source = arizona_dai_clk_str(clk_id);
858 routes[1].source = arizona_dai_clk_str(clk_id);
859 snd_soc_dapm_add_routes(&codec->dapm, routes, ARRAY_SIZE(routes));
860
0c778e86
MB		 861 dai_priv->clk = clk_id;
862
410837a7 863 return snd_soc_dapm_sync(&codec->dapm);
5b2eec3f
MB		 864}
865
01df259f
MB		 866static int arizona_set_tristate(struct snd_soc_dai *dai, int tristate)
867{
868 struct snd_soc_codec *codec = dai->codec;
869 int base = dai->driver->base;
870 unsigned int reg;
871
872 if (tristate)
873 reg = ARIZONA_AIF1_TRI;
874 else
875 reg = 0;
876
877 return snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
878 ARIZONA_AIF1_TRI, reg);
879}
880
07ed873e 881const struct snd_soc_dai_ops arizona_dai_ops = {
5b2eec3f 882 .startup = arizona_startup,
07ed873e
MB		 883 .set_fmt = arizona_set_fmt,
884 .hw_params = arizona_hw_params,
5b2eec3f 885 .set_sysclk = arizona_dai_set_sysclk,
01df259f 886 .set_tristate = arizona_set_tristate,
07ed873e 887};
a837987e 888EXPORT_SYMBOL_GPL(arizona_dai_ops);
07ed873e 889
5b2eec3f
MB		 890int arizona_init_dai(struct arizona_priv *priv, int id)
891{
892 struct arizona_dai_priv *dai_priv = &priv->dai[id];
893
894 dai_priv->clk = ARIZONA_CLK_SYSCLK;
895
896 return 0;
897}
898EXPORT_SYMBOL_GPL(arizona_init_dai);
899
07ed873e
MB		 900static irqreturn_t arizona_fll_clock_ok(int irq, void *data)
901{
902 struct arizona_fll *fll = data;
903
904 arizona_fll_dbg(fll, "clock OK\n");
905
906 complete(&fll->ok);
907
908 return IRQ_HANDLED;
909}
910
911static struct {
912 unsigned int min;
913 unsigned int max;
914 u16 fratio;
915 int ratio;
916} fll_fratios[] = {
917 { 0, 64000, 4, 16 },
918 { 64000, 128000, 3, 8 },
919 { 128000, 256000, 2, 4 },
920 { 256000, 1000000, 1, 2 },
921 { 1000000, 13500000, 0, 1 },
922};
923
924struct arizona_fll_cfg {
925 int n;
926 int theta;
927 int lambda;
928 int refdiv;
929 int outdiv;
930 int fratio;
931};
932
933static int arizona_calc_fll(struct arizona_fll *fll,
934 struct arizona_fll_cfg *cfg,
935 unsigned int Fref,
936 unsigned int Fout)
937{
938 unsigned int target, div, gcd_fll;
939 int i, ratio;
940
941 arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, Fout);
942
943 /* Fref must be <=13.5MHz */
944 div = 1;
945 cfg->refdiv = 0;
946 while ((Fref / div) > 13500000) {
947 div *= 2;
948 cfg->refdiv++;
949
950 if (div > 8) {
951 arizona_fll_err(fll,
952 "Can't scale %dMHz in to <=13.5MHz\n",
953 Fref);
954 return -EINVAL;
955 }
956 }
957
958 /* Apply the division for our remaining calculations */
959 Fref /= div;
960
2b4d39fc 961 /* Fvco should be over the targt; don't check the upper bound */
07ed873e 962 div = 1;
2b4d39fc 963 while (Fout * div < 90000000 * fll->vco_mult) {
07ed873e
MB		 964 div++;
965 if (div > 7) {
966 arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
967 Fout);
968 return -EINVAL;
969 }
970 }
2b4d39fc 971 target = Fout * div / fll->vco_mult;
07ed873e
MB		 972 cfg->outdiv = div;
973
974 arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
975
976 /* Find an appropraite FLL_FRATIO and factor it out of the target */
977 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
978 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
979 cfg->fratio = fll_fratios[i].fratio;
980 ratio = fll_fratios[i].ratio;
981 break;
982 }
983 }
984 if (i == ARRAY_SIZE(fll_fratios)) {
985 arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n",
986 Fref);
987 return -EINVAL;
988 }
989
990 cfg->n = target / (ratio * Fref);
991
992 if (target % Fref) {
993 gcd_fll = gcd(target, ratio * Fref);
994 arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll);
995
996 cfg->theta = (target - (cfg->n * ratio * Fref))
997 / gcd_fll;
998 cfg->lambda = (ratio * Fref) / gcd_fll;
999 } else {
1000 cfg->theta = 0;
1001 cfg->lambda = 0;
1002 }
1003
1004 arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n",
1005 cfg->n, cfg->theta, cfg->lambda);
1006 arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n",
1007 cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv);
1008
1009 return 0;
1010
1011}
1012
1013static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
1014 struct arizona_fll_cfg *cfg, int source)
1015{
1016 regmap_update_bits(arizona->regmap, base + 3,
1017 ARIZONA_FLL1_THETA_MASK, cfg->theta);
1018 regmap_update_bits(arizona->regmap, base + 4,
1019 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
1020 regmap_update_bits(arizona->regmap, base + 5,
1021 ARIZONA_FLL1_FRATIO_MASK,
1022 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
1023 regmap_update_bits(arizona->regmap, base + 6,
1024 ARIZONA_FLL1_CLK_REF_DIV_MASK |
1025 ARIZONA_FLL1_CLK_REF_SRC_MASK,
1026 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
1027 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
1028
1029 regmap_update_bits(arizona->regmap, base + 2,
1030 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
1031 ARIZONA_FLL1_CTRL_UPD | cfg->n);
1032}
1033
1034int arizona_set_fll(struct arizona_fll *fll, int source,
1035 unsigned int Fref, unsigned int Fout)
1036{
1037 struct arizona *arizona = fll->arizona;
1038 struct arizona_fll_cfg cfg, sync;
1039 unsigned int reg, val;
1040 int syncsrc;
1041 bool ena;
1042 int ret;
1043
1cbe4bca
MB		 1044 if (fll->fref == Fref && fll->fout == Fout)
1045 return 0;
1046
07ed873e
MB		 1047 ret = regmap_read(arizona->regmap, fll->base + 1, &reg);
1048 if (ret != 0) {
1049 arizona_fll_err(fll, "Failed to read current state: %d\n",
1050 ret);
1051 return ret;
1052 }
1053 ena = reg & ARIZONA_FLL1_ENA;
1054
1055 if (Fout) {
1056 /* Do we have a 32kHz reference? */
1057 regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
1058 switch (val & ARIZONA_CLK_32K_SRC_MASK) {
1059 case ARIZONA_CLK_SRC_MCLK1:
1060 case ARIZONA_CLK_SRC_MCLK2:
1061 syncsrc = val & ARIZONA_CLK_32K_SRC_MASK;
1062 break;
1063 default:
1064 syncsrc = -1;
1065 }
1066
1067 if (source == syncsrc)
1068 syncsrc = -1;
1069
1070 if (syncsrc >= 0) {
1071 ret = arizona_calc_fll(fll, &sync, Fref, Fout);
1072 if (ret != 0)
1073 return ret;
1074
1075 ret = arizona_calc_fll(fll, &cfg, 32768, Fout);
1076 if (ret != 0)
1077 return ret;
1078 } else {
1079 ret = arizona_calc_fll(fll, &cfg, Fref, Fout);
1080 if (ret != 0)
1081 return ret;
1082 }
1083 } else {
1084 regmap_update_bits(arizona->regmap, fll->base + 1,
1085 ARIZONA_FLL1_ENA, 0);
1086 regmap_update_bits(arizona->regmap, fll->base + 0x11,
1087 ARIZONA_FLL1_SYNC_ENA, 0);
1088
1089 if (ena)
1090 pm_runtime_put_autosuspend(arizona->dev);
1091
50fcfe45
MB		 1092 fll->fref = Fref;
1093 fll->fout = Fout;
1094
07ed873e
MB		 1095 return 0;
1096 }
1097
1098 regmap_update_bits(arizona->regmap, fll->base + 5,
1099 ARIZONA_FLL1_OUTDIV_MASK,
1100 cfg.outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1101
1102 if (syncsrc >= 0) {
1103 arizona_apply_fll(arizona, fll->base, &cfg, syncsrc);
1104 arizona_apply_fll(arizona, fll->base + 0x10, &sync, source);
1105 } else {
1106 arizona_apply_fll(arizona, fll->base, &cfg, source);
1107 }
1108
1109 if (!ena)
1110 pm_runtime_get(arizona->dev);
1111
1112 /* Clear any pending completions */
1113 try_wait_for_completion(&fll->ok);
1114
1115 regmap_update_bits(arizona->regmap, fll->base + 1,
1116 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
1117 if (syncsrc >= 0)
1118 regmap_update_bits(arizona->regmap, fll->base + 0x11,
1119 ARIZONA_FLL1_SYNC_ENA,
1120 ARIZONA_FLL1_SYNC_ENA);
1121
1122 ret = wait_for_completion_timeout(&fll->ok,
09871a94 1123 msecs_to_jiffies(250));
07ed873e
MB		 1124 if (ret == 0)
1125 arizona_fll_warn(fll, "Timed out waiting for lock\n");
1126
1cbe4bca
MB		 1127 fll->fref = Fref;
1128 fll->fout = Fout;
1129
07ed873e
MB		 1130 return 0;
1131}
1132EXPORT_SYMBOL_GPL(arizona_set_fll);
1133
1134int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq,
1135 int ok_irq, struct arizona_fll *fll)
1136{
1137 int ret;
1138
07ed873e
MB		 1139 init_completion(&fll->ok);
1140
1141 fll->id = id;
1142 fll->base = base;
1143 fll->arizona = arizona;
1144
1145 snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
1146 snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
1147 "FLL%d clock OK", id);
1148
07ed873e
MB		 1149 ret = arizona_request_irq(arizona, ok_irq, fll->clock_ok_name,
1150 arizona_fll_clock_ok, fll);
1151 if (ret != 0) {
1152 dev_err(arizona->dev, "Failed to get FLL%d clock OK IRQ: %d\n",
1153 id, ret);
1154 }
1155
e31c1946
CK		 1156 regmap_update_bits(arizona->regmap, fll->base + 1,
1157 ARIZONA_FLL1_FREERUN, 0);
1158
07ed873e
MB		 1159 return 0;
1160}
1161EXPORT_SYMBOL_GPL(arizona_init_fll);
1162
bc9ab6d3
MB		 1163/**
1164 * arizona_set_output_mode - Set the mode of the specified output
1165 *
1166 * @codec: Device to configure
1167 * @output: Output number
1168 * @diff: True to set the output to differential mode
1169 *
1170 * Some systems use external analogue switches to connect more
1171 * analogue devices to the CODEC than are supported by the device. In
1172 * some systems this requires changing the switched output from single
1173 * ended to differential mode dynamically at runtime, an operation
1174 * supported using this function.
1175 *
1176 * Most systems have a single static configuration and should use
1177 * platform data instead.
1178 */
1179int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff)
1180{
1181 unsigned int reg, val;
1182
1183 if (output < 1 || output > 6)
1184 return -EINVAL;
1185
1186 reg = ARIZONA_OUTPUT_PATH_CONFIG_1L + (output - 1) * 8;
1187
1188 if (diff)
1189 val = ARIZONA_OUT1_MONO;
1190 else
1191 val = 0;
1192
1193 return snd_soc_update_bits(codec, reg, ARIZONA_OUT1_MONO, val);
1194}
1195EXPORT_SYMBOL_GPL(arizona_set_output_mode);
1196
07ed873e
MB		 1197MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support");
1198MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1199MODULE_LICENSE("GPL");
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