[mirror_ubuntu-zesty-kernel.git] / sound / soc / codecs / cs35l32.c

/*
 * cs35l32.c -- CS35L32 ALSA SoC audio driver
 *
 * Copyright 2014 CirrusLogic, Inc.
 *
 * Author: Brian Austin <brian.austin@cirrus.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/gpio/consumer.h>
#include <linux/of_device.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include <dt-bindings/sound/cs35l32.h>

#include "cs35l32.h"

#define CS35L32_NUM_SUPPLIES 2
static const char *const cs35l32_supply_names[CS35L32_NUM_SUPPLIES] = {
	"VA",
	"VP",
};

struct  cs35l32_private {
	struct regmap *regmap;
	struct snd_soc_codec *codec;
	struct regulator_bulk_data supplies[CS35L32_NUM_SUPPLIES];
	struct cs35l32_platform_data pdata;
	struct gpio_desc *reset_gpio;
};

static const struct reg_default cs35l32_reg_defaults[] = {

	{ 0x06, 0x04 }, /* Power Ctl 1 */
	{ 0x07, 0xE8 }, /* Power Ctl 2 */
	{ 0x08, 0x40 }, /* Clock Ctl */
	{ 0x09, 0x20 }, /* Low Battery Threshold */
	{ 0x0A, 0x00 }, /* Voltage Monitor [RO] */
	{ 0x0B, 0x40 }, /* Conv Peak Curr Protection CTL */
	{ 0x0C, 0x07 }, /* IMON Scaling */
	{ 0x0D, 0x03 }, /* Audio/LED Pwr Manager */
	{ 0x0F, 0x20 }, /* Serial Port Control */
	{ 0x10, 0x14 }, /* Class D Amp CTL */
	{ 0x11, 0x00 }, /* Protection Release CTL */
	{ 0x12, 0xFF }, /* Interrupt Mask 1 */
	{ 0x13, 0xFF }, /* Interrupt Mask 2 */
	{ 0x14, 0xFF }, /* Interrupt Mask 3 */
	{ 0x19, 0x00 }, /* LED Flash Mode Current */
	{ 0x1A, 0x00 }, /* LED Movie Mode Current */
	{ 0x1B, 0x20 }, /* LED Flash Timer */
	{ 0x1C, 0x00 }, /* LED Flash Inhibit Current */
};

static bool cs35l32_readable_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case CS35L32_DEVID_AB ... CS35L32_AUDIO_LED_MNGR:
	case CS35L32_ADSP_CTL ... CS35L32_FLASH_INHIBIT:
		return true;
	default:
		return false;
	}
}

static bool cs35l32_volatile_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case CS35L32_DEVID_AB ... CS35L32_REV_ID:
	case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
		return true;
	default:
		return false;
	}
}

static bool cs35l32_precious_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
		return true;
	default:
		return false;
	}
}

static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 300, 0);

static const struct snd_kcontrol_new imon_ctl =
	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 6, 1, 1);

static const struct snd_kcontrol_new vmon_ctl =
	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 7, 1, 1);

static const struct snd_kcontrol_new vpmon_ctl =
	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 5, 1, 1);

static const struct snd_kcontrol_new cs35l32_snd_controls[] = {
	SOC_SINGLE_TLV("Speaker Volume", CS35L32_CLASSD_CTL,
		       3, 0x04, 1, classd_ctl_tlv),
	SOC_SINGLE("Zero Cross Switch", CS35L32_CLASSD_CTL, 2, 1, 0),
	SOC_SINGLE("Gain Manager Switch", CS35L32_AUDIO_LED_MNGR, 3, 1, 0),
};

static const struct snd_soc_dapm_widget cs35l32_dapm_widgets[] = {

	SND_SOC_DAPM_SUPPLY("BOOST", CS35L32_PWRCTL1, 2, 1, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("Speaker", CS35L32_PWRCTL1, 7, 1, NULL, 0),

	SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L32_PWRCTL2, 3, 1),

	SND_SOC_DAPM_INPUT("VP"),
	SND_SOC_DAPM_INPUT("ISENSE"),
	SND_SOC_DAPM_INPUT("VSENSE"),

	SND_SOC_DAPM_SWITCH("VMON ADC", CS35L32_PWRCTL2, 7, 1, &vmon_ctl),
	SND_SOC_DAPM_SWITCH("IMON ADC", CS35L32_PWRCTL2, 6, 1, &imon_ctl),
	SND_SOC_DAPM_SWITCH("VPMON ADC", CS35L32_PWRCTL2, 5, 1, &vpmon_ctl),
};

static const struct snd_soc_dapm_route cs35l32_audio_map[] = {

	{"Speaker", NULL, "BOOST"},

	{"VMON ADC", NULL, "VSENSE"},
	{"IMON ADC", NULL, "ISENSE"},
	{"VPMON ADC", NULL, "VP"},

	{"SDOUT", "Switch", "VMON ADC"},
	{"SDOUT",  "Switch", "IMON ADC"},
	{"SDOUT", "Switch", "VPMON ADC"},

	{"Capture", NULL, "SDOUT"},
};

static int cs35l32_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		snd_soc_update_bits(codec, CS35L32_ADSP_CTL,
				    CS35L32_ADSP_MASTER_MASK,
				CS35L32_ADSP_MASTER_MASK);
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		snd_soc_update_bits(codec, CS35L32_ADSP_CTL,
				    CS35L32_ADSP_MASTER_MASK, 0);
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static int cs35l32_set_tristate(struct snd_soc_dai *dai, int tristate)
{
	struct snd_soc_codec *codec = dai->codec;

	return snd_soc_update_bits(codec, CS35L32_PWRCTL2,
					CS35L32_SDOUT_3ST, tristate << 3);
}

static const struct snd_soc_dai_ops cs35l32_ops = {
	.set_fmt = cs35l32_set_dai_fmt,
	.set_tristate = cs35l32_set_tristate,
};

static struct snd_soc_dai_driver cs35l32_dai[] = {
	{
		.name = "cs35l32-monitor",
		.id = 0,
		.capture = {
			.stream_name = "Capture",
			.channels_min = 2,
			.channels_max = 2,
			.rates = CS35L32_RATES,
			.formats = CS35L32_FORMATS,
		},
		.ops = &cs35l32_ops,
		.symmetric_rates = 1,
	}
};

static int cs35l32_codec_set_sysclk(struct snd_soc_codec *codec,
			      int clk_id, int source, unsigned int freq, int dir)
{
	unsigned int val;

	switch (freq) {
	case 6000000:
		val = CS35L32_MCLK_RATIO;
		break;
	case 12000000:
		val = CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO;
		break;
	case 6144000:
		val = 0;
		break;
	case 12288000:
		val = CS35L32_MCLK_DIV2_MASK;
		break;
	default:
		return -EINVAL;
	}

	return snd_soc_update_bits(codec, CS35L32_CLK_CTL,
			CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO_MASK, val);
}

static const struct snd_soc_codec_driver soc_codec_dev_cs35l32 = {
	.set_sysclk = cs35l32_codec_set_sysclk,

	.component_driver = {
		.controls		= cs35l32_snd_controls,
		.num_controls		= ARRAY_SIZE(cs35l32_snd_controls),
		.dapm_widgets		= cs35l32_dapm_widgets,
		.num_dapm_widgets	= ARRAY_SIZE(cs35l32_dapm_widgets),
		.dapm_routes		= cs35l32_audio_map,
		.num_dapm_routes	= ARRAY_SIZE(cs35l32_audio_map),
	},
};

/* Current and threshold powerup sequence Pg37 in datasheet */
static const struct reg_sequence cs35l32_monitor_patch[] = {

	{ 0x00, 0x99 },
	{ 0x48, 0x17 },
	{ 0x49, 0x56 },
	{ 0x43, 0x01 },
	{ 0x3B, 0x62 },
	{ 0x3C, 0x80 },
	{ 0x00, 0x00 },
};

static const struct regmap_config cs35l32_regmap = {
	.reg_bits = 8,
	.val_bits = 8,

	.max_register = CS35L32_MAX_REGISTER,
	.reg_defaults = cs35l32_reg_defaults,
	.num_reg_defaults = ARRAY_SIZE(cs35l32_reg_defaults),
	.volatile_reg = cs35l32_volatile_register,
	.readable_reg = cs35l32_readable_register,
	.precious_reg = cs35l32_precious_register,
	.cache_type = REGCACHE_RBTREE,
};

static int cs35l32_handle_of_data(struct i2c_client *i2c_client,
				    struct cs35l32_platform_data *pdata)
{
	struct device_node *np = i2c_client->dev.of_node;
	unsigned int val;

	if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0)
		pdata->sdout_share = val;

	if (of_property_read_u32(np, "cirrus,boost-manager", &val))
		val = -1u;

	switch (val) {
	case CS35L32_BOOST_MGR_AUTO:
	case CS35L32_BOOST_MGR_AUTO_AUDIO:
	case CS35L32_BOOST_MGR_BYPASS:
	case CS35L32_BOOST_MGR_FIXED:
		pdata->boost_mng = val;
		break;
	case -1u:
	default:
		dev_err(&i2c_client->dev,
			"Wrong cirrus,boost-manager DT value %d\n", val);
		pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS;
	}

	if (of_property_read_u32(np, "cirrus,sdout-datacfg", &val))
		val = -1u;
	switch (val) {
	case CS35L32_DATA_CFG_LR_VP:
	case CS35L32_DATA_CFG_LR_STAT:
	case CS35L32_DATA_CFG_LR:
	case CS35L32_DATA_CFG_LR_VPSTAT:
		pdata->sdout_datacfg = val;
		break;
	case -1u:
	default:
		dev_err(&i2c_client->dev,
			"Wrong cirrus,sdout-datacfg DT value %d\n", val);
		pdata->sdout_datacfg = CS35L32_DATA_CFG_LR;
	}

	if (of_property_read_u32(np, "cirrus,battery-threshold", &val))
		val = -1u;
	switch (val) {
	case CS35L32_BATT_THRESH_3_1V:
	case CS35L32_BATT_THRESH_3_2V:
	case CS35L32_BATT_THRESH_3_3V:
	case CS35L32_BATT_THRESH_3_4V:
		pdata->batt_thresh = val;
		break;
	case -1u:
	default:
		dev_err(&i2c_client->dev,
			"Wrong cirrus,battery-threshold DT value %d\n", val);
		pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V;
	}

	if (of_property_read_u32(np, "cirrus,battery-recovery", &val))
		val = -1u;
	switch (val) {
	case CS35L32_BATT_RECOV_3_1V:
	case CS35L32_BATT_RECOV_3_2V:
	case CS35L32_BATT_RECOV_3_3V:
	case CS35L32_BATT_RECOV_3_4V:
	case CS35L32_BATT_RECOV_3_5V:
	case CS35L32_BATT_RECOV_3_6V:
		pdata->batt_recov = val;
		break;
	case -1u:
	default:
		dev_err(&i2c_client->dev,
			"Wrong cirrus,battery-recovery DT value %d\n", val);
		pdata->batt_recov = CS35L32_BATT_RECOV_3_4V;
	}

	return 0;
}

static int cs35l32_i2c_probe(struct i2c_client *i2c_client,
				       const struct i2c_device_id *id)
{
	struct cs35l32_private *cs35l32;
	struct cs35l32_platform_data *pdata =
		dev_get_platdata(&i2c_client->dev);
	int ret, i;
	unsigned int devid = 0;
	unsigned int reg;


	cs35l32 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs35l32_private),
			       GFP_KERNEL);
	if (!cs35l32) {
		dev_err(&i2c_client->dev, "could not allocate codec\n");
		return -ENOMEM;
	}

	i2c_set_clientdata(i2c_client, cs35l32);

	cs35l32->regmap = devm_regmap_init_i2c(i2c_client, &cs35l32_regmap);
	if (IS_ERR(cs35l32->regmap)) {
		ret = PTR_ERR(cs35l32->regmap);
		dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
		return ret;
	}

	if (pdata) {
		cs35l32->pdata = *pdata;
	} else {
		pdata = devm_kzalloc(&i2c_client->dev,
				     sizeof(struct cs35l32_platform_data),
				GFP_KERNEL);
		if (!pdata) {
			dev_err(&i2c_client->dev, "could not allocate pdata\n");
			return -ENOMEM;
		}
		if (i2c_client->dev.of_node) {
			ret = cs35l32_handle_of_data(i2c_client,
						     &cs35l32->pdata);
			if (ret != 0)
				return ret;
		}
	}

	for (i = 0; i < ARRAY_SIZE(cs35l32->supplies); i++)
		cs35l32->supplies[i].supply = cs35l32_supply_names[i];

	ret = devm_regulator_bulk_get(&i2c_client->dev,
				      ARRAY_SIZE(cs35l32->supplies),
				      cs35l32->supplies);
	if (ret != 0) {
		dev_err(&i2c_client->dev,
			"Failed to request supplies: %d\n", ret);
		return ret;
	}

	ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
				    cs35l32->supplies);
	if (ret != 0) {
		dev_err(&i2c_client->dev,
			"Failed to enable supplies: %d\n", ret);
		return ret;
	}

	/* Reset the Device */
	cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
		"reset", GPIOD_OUT_LOW);
	if (IS_ERR(cs35l32->reset_gpio))
		return PTR_ERR(cs35l32->reset_gpio);

	gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);

	/* initialize codec */
	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_AB, &reg);
	devid = (reg & 0xFF) << 12;

	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_CD, &reg);
	devid |= (reg & 0xFF) << 4;

	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_E, &reg);
	devid |= (reg & 0xF0) >> 4;

	if (devid != CS35L32_CHIP_ID) {
		ret = -ENODEV;
		dev_err(&i2c_client->dev,
			"CS35L32 Device ID (%X). Expected %X\n",
			devid, CS35L32_CHIP_ID);
		return ret;
	}

	ret = regmap_read(cs35l32->regmap, CS35L32_REV_ID, &reg);
	if (ret < 0) {
		dev_err(&i2c_client->dev, "Get Revision ID failed\n");
		return ret;
	}

	ret = regmap_register_patch(cs35l32->regmap, cs35l32_monitor_patch,
				    ARRAY_SIZE(cs35l32_monitor_patch));
	if (ret < 0) {
		dev_err(&i2c_client->dev, "Failed to apply errata patch\n");
		return ret;
	}

	dev_info(&i2c_client->dev,
		 "Cirrus Logic CS35L32, Revision: %02X\n", reg & 0xFF);

	/* Setup VBOOST Management */
	if (cs35l32->pdata.boost_mng)
		regmap_update_bits(cs35l32->regmap, CS35L32_AUDIO_LED_MNGR,
				   CS35L32_BOOST_MASK,
				cs35l32->pdata.boost_mng);

	/* Setup ADSP Format Config */
	if (cs35l32->pdata.sdout_share)
		regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
				    CS35L32_ADSP_SHARE_MASK,
				cs35l32->pdata.sdout_share << 3);

	/* Setup ADSP Data Configuration */
	if (cs35l32->pdata.sdout_datacfg)
		regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
				   CS35L32_ADSP_DATACFG_MASK,
				cs35l32->pdata.sdout_datacfg << 4);

	/* Setup Low Battery Recovery  */
	if (cs35l32->pdata.batt_recov)
		regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
				   CS35L32_BATT_REC_MASK,
				cs35l32->pdata.batt_recov << 1);

	/* Setup Low Battery Threshold */
	if (cs35l32->pdata.batt_thresh)
		regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
				   CS35L32_BATT_THRESH_MASK,
				cs35l32->pdata.batt_thresh << 4);

	/* Power down the AMP */
	regmap_update_bits(cs35l32->regmap, CS35L32_PWRCTL1, CS35L32_PDN_AMP,
			    CS35L32_PDN_AMP);

	/* Clear MCLK Error Bit since we don't have the clock yet */
	ret = regmap_read(cs35l32->regmap, CS35L32_INT_STATUS_1, &reg);

	ret =  snd_soc_register_codec(&i2c_client->dev,
			&soc_codec_dev_cs35l32, cs35l32_dai,
			ARRAY_SIZE(cs35l32_dai));
	if (ret < 0)
		goto err_disable;

	return 0;

err_disable:
	regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
			       cs35l32->supplies);
	return ret;
}

static int cs35l32_i2c_remove(struct i2c_client *i2c_client)
{
	struct cs35l32_private *cs35l32 = i2c_get_clientdata(i2c_client);

	snd_soc_unregister_codec(&i2c_client->dev);

	/* Hold down reset */
	gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);

	return 0;
}

#ifdef CONFIG_PM
static int cs35l32_runtime_suspend(struct device *dev)
{
	struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);

	regcache_cache_only(cs35l32->regmap, true);
	regcache_mark_dirty(cs35l32->regmap);

	/* Hold down reset */
	gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);

	/* remove power */
	regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
			       cs35l32->supplies);

	return 0;
}

static int cs35l32_runtime_resume(struct device *dev)
{
	struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
	int ret;

	/* Enable power */
	ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
				    cs35l32->supplies);
	if (ret != 0) {
		dev_err(dev, "Failed to enable supplies: %d\n",
			ret);
		return ret;
	}

	gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);

	regcache_cache_only(cs35l32->regmap, false);
	regcache_sync(cs35l32->regmap);

	return 0;
}
#endif

static const struct dev_pm_ops cs35l32_runtime_pm = {
	SET_RUNTIME_PM_OPS(cs35l32_runtime_suspend, cs35l32_runtime_resume,
			   NULL)
};

static const struct of_device_id cs35l32_of_match[] = {
	{ .compatible = "cirrus,cs35l32", },
	{},
};
MODULE_DEVICE_TABLE(of, cs35l32_of_match);


static const struct i2c_device_id cs35l32_id[] = {
	{"cs35l32", 0},
	{}
};

MODULE_DEVICE_TABLE(i2c, cs35l32_id);

static struct i2c_driver cs35l32_i2c_driver = {
	.driver = {
		   .name = "cs35l32",
		   .pm = &cs35l32_runtime_pm,
		   .of_match_table = cs35l32_of_match,
		   },
	.id_table = cs35l32_id,
	.probe = cs35l32_i2c_probe,
	.remove = cs35l32_i2c_remove,
};

module_i2c_driver(cs35l32_i2c_driver);

MODULE_DESCRIPTION("ASoC CS35L32 driver");
MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
eef5bb24 BA	1	/*
	2	* cs35l32.c -- CS35L32 ALSA SoC audio driver
	3	*
	4	* Copyright 2014 CirrusLogic, Inc.
	5	*
	6	* Author: Brian Austin <brian.austin@cirrus.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/moduleparam.h>
eef5bb24 BA	16	#include <linux/kernel.h>
	17	#include <linux/init.h>
	18	#include <linux/delay.h>
	19	#include <linux/i2c.h>
	20	#include <linux/gpio.h>
	21	#include <linux/regmap.h>
	22	#include <linux/slab.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/regulator/consumer.h>
	25	#include <linux/gpio/consumer.h>
	26	#include <linux/of_device.h>
eef5bb24 BA	27	#include <sound/core.h>
	28	#include <sound/pcm.h>
	29	#include <sound/pcm_params.h>
	30	#include <sound/soc.h>
	31	#include <sound/soc-dapm.h>
	32	#include <sound/initval.h>
	33	#include <sound/tlv.h>
	34	#include <dt-bindings/sound/cs35l32.h>
	35
	36	#include "cs35l32.h"
	37
	38	#define CS35L32_NUM_SUPPLIES 2
	39	static const char *const cs35l32_supply_names[CS35L32_NUM_SUPPLIES] = {
	40	"VA",
	41	"VP",
	42	};
	43
	44	struct cs35l32_private {
	45	struct regmap *regmap;
	46	struct snd_soc_codec *codec;
	47	struct regulator_bulk_data supplies[CS35L32_NUM_SUPPLIES];
	48	struct cs35l32_platform_data pdata;
	49	struct gpio_desc *reset_gpio;
	50	};
	51
	52	static const struct reg_default cs35l32_reg_defaults[] = {
	53
	54	{ 0x06, 0x04 }, /* Power Ctl 1 */
	55	{ 0x07, 0xE8 }, /* Power Ctl 2 */
	56	{ 0x08, 0x40 }, /* Clock Ctl */
	57	{ 0x09, 0x20 }, /* Low Battery Threshold */
	58	{ 0x0A, 0x00 }, /* Voltage Monitor [RO] */
	59	{ 0x0B, 0x40 }, /* Conv Peak Curr Protection CTL */
	60	{ 0x0C, 0x07 }, /* IMON Scaling */
	61	{ 0x0D, 0x03 }, /* Audio/LED Pwr Manager */
	62	{ 0x0F, 0x20 }, /* Serial Port Control */
	63	{ 0x10, 0x14 }, /* Class D Amp CTL */
	64	{ 0x11, 0x00 }, /* Protection Release CTL */
	65	{ 0x12, 0xFF }, /* Interrupt Mask 1 */
	66	{ 0x13, 0xFF }, /* Interrupt Mask 2 */
	67	{ 0x14, 0xFF }, /* Interrupt Mask 3 */
	68	{ 0x19, 0x00 }, /* LED Flash Mode Current */
	69	{ 0x1A, 0x00 }, /* LED Movie Mode Current */
	70	{ 0x1B, 0x20 }, /* LED Flash Timer */
	71	{ 0x1C, 0x00 }, /* LED Flash Inhibit Current */
	72	};
	73
	74	static bool cs35l32_readable_register(struct device *dev, unsigned int reg)
	75	{
	76	switch (reg) {
c1763308 AL	77	case CS35L32_DEVID_AB ... CS35L32_AUDIO_LED_MNGR:
c1763308 AL	78	case CS35L32_ADSP_CTL ... CS35L32_FLASH_INHIBIT:
eef5bb24 BA	79	return true;
	80	default:
	81	return false;
	82	}
	83	}
	84
	85	static bool cs35l32_volatile_register(struct device *dev, unsigned int reg)
	86	{
	87	switch (reg) {
c1763308 AL	88	case CS35L32_DEVID_AB ... CS35L32_REV_ID:
c1763308 AL	89	case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
7eef0855	90	return true;
eef5bb24	91	default:
7eef0855	92	return false;
eef5bb24 BA	93	}
	94	}
	95
	96	static bool cs35l32_precious_register(struct device *dev, unsigned int reg)
	97	{
	98	switch (reg) {
c1763308	99	case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
7eef0855	100	return true;
eef5bb24	101	default:
7eef0855	102	return false;
eef5bb24 BA	103	}
	104	}
	105
	106	static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 300, 0);
	107
	108	static const struct snd_kcontrol_new imon_ctl =
	109	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 6, 1, 1);
	110
	111	static const struct snd_kcontrol_new vmon_ctl =
	112	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 7, 1, 1);
	113
	114	static const struct snd_kcontrol_new vpmon_ctl =
	115	SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 5, 1, 1);
	116
	117	static const struct snd_kcontrol_new cs35l32_snd_controls[] = {
	118	SOC_SINGLE_TLV("Speaker Volume", CS35L32_CLASSD_CTL,
	119	3, 0x04, 1, classd_ctl_tlv),
	120	SOC_SINGLE("Zero Cross Switch", CS35L32_CLASSD_CTL, 2, 1, 0),
	121	SOC_SINGLE("Gain Manager Switch", CS35L32_AUDIO_LED_MNGR, 3, 1, 0),
	122	};
	123
	124	static const struct snd_soc_dapm_widget cs35l32_dapm_widgets[] = {
	125
	126	SND_SOC_DAPM_SUPPLY("BOOST", CS35L32_PWRCTL1, 2, 1, NULL, 0),
	127	SND_SOC_DAPM_OUT_DRV("Speaker", CS35L32_PWRCTL1, 7, 1, NULL, 0),
	128
	129	SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L32_PWRCTL2, 3, 1),
	130
	131	SND_SOC_DAPM_INPUT("VP"),
	132	SND_SOC_DAPM_INPUT("ISENSE"),
	133	SND_SOC_DAPM_INPUT("VSENSE"),
	134
	135	SND_SOC_DAPM_SWITCH("VMON ADC", CS35L32_PWRCTL2, 7, 1, &vmon_ctl),
	136	SND_SOC_DAPM_SWITCH("IMON ADC", CS35L32_PWRCTL2, 6, 1, &imon_ctl),
	137	SND_SOC_DAPM_SWITCH("VPMON ADC", CS35L32_PWRCTL2, 5, 1, &vpmon_ctl),
	138	};
	139
	140	static const struct snd_soc_dapm_route cs35l32_audio_map[] = {
	141
	142	{"Speaker", NULL, "BOOST"},
	143
	144	{"VMON ADC", NULL, "VSENSE"},
	145	{"IMON ADC", NULL, "ISENSE"},
	146	{"VPMON ADC", NULL, "VP"},
	147
	148	{"SDOUT", "Switch", "VMON ADC"},
	149	{"SDOUT", "Switch", "IMON ADC"},
	150	{"SDOUT", "Switch", "VPMON ADC"},
	151
	152	{"Capture", NULL, "SDOUT"},
	153	};
	154
	155	static int cs35l32_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
	156	{
	157	struct snd_soc_codec *codec = codec_dai->codec;
	158
	159	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	160	case SND_SOC_DAIFMT_CBM_CFM:
	161	snd_soc_update_bits(codec, CS35L32_ADSP_CTL,
	162	CS35L32_ADSP_MASTER_MASK,
	163	CS35L32_ADSP_MASTER_MASK);
	164	break;
	165	case SND_SOC_DAIFMT_CBS_CFS:
	166	snd_soc_update_bits(codec, CS35L32_ADSP_CTL,
167	CS35L32_ADSP_MASTER_MASK, 0);
168	break;
169	default:
170	return -EINVAL;
171	}
172
173	return 0;
174	}
175
176	static int cs35l32_set_tristate(struct snd_soc_dai *dai, int tristate)
177	{
178	struct snd_soc_codec *codec = dai->codec;
179
180	return snd_soc_update_bits(codec, CS35L32_PWRCTL2,
181	CS35L32_SDOUT_3ST, tristate << 3);
182	}
183
184	static const struct snd_soc_dai_ops cs35l32_ops = {
185	.set_fmt = cs35l32_set_dai_fmt,
186	.set_tristate = cs35l32_set_tristate,
187	};
188
189	static struct snd_soc_dai_driver cs35l32_dai[] = {
190	{
191	.name = "cs35l32-monitor",
192	.id = 0,
193	.capture = {
194	.stream_name = "Capture",
195	.channels_min = 2,
196	.channels_max = 2,
197	.rates = CS35L32_RATES,
198	.formats = CS35L32_FORMATS,
199	},
200	.ops = &cs35l32_ops,
201	.symmetric_rates = 1,
202	}
203	};
204
205	static int cs35l32_codec_set_sysclk(struct snd_soc_codec *codec,
206	int clk_id, int source, unsigned int freq, int dir)
207	{
5f609f28	208	unsigned int val;
eef5bb24 BA	209
	210	switch (freq) {
	211	case 6000000:
5f609f28	212	val = CS35L32_MCLK_RATIO;
eef5bb24 BA	213	break;
eef5bb24 BA	214	case 12000000:
5f609f28	215	val = CS35L32_MCLK_DIV2_MASK \| CS35L32_MCLK_RATIO;
eef5bb24 BA	216	break;
eef5bb24 BA	217	case 6144000:
5f609f28	218	val = 0;
eef5bb24 BA	219	break;
eef5bb24 BA	220	case 12288000:
5f609f28	221	val = CS35L32_MCLK_DIV2_MASK;
eef5bb24 BA	222	break;
	223	default:
	224	return -EINVAL;
	225	}
	226
5f609f28 AL	227	return snd_soc_update_bits(codec, CS35L32_CLK_CTL,
5f609f28 AL	228	CS35L32_MCLK_DIV2_MASK \| CS35L32_MCLK_RATIO_MASK, val);
eef5bb24 BA	229	}
eef5bb24 BA	230
d883641f	231	static const struct snd_soc_codec_driver soc_codec_dev_cs35l32 = {
eef5bb24 BA	232	.set_sysclk = cs35l32_codec_set_sysclk,
eef5bb24 BA	233
1728f9d1 KM	234	.component_driver = {
	235	.controls = cs35l32_snd_controls,
	236	.num_controls = ARRAY_SIZE(cs35l32_snd_controls),
	237	.dapm_widgets = cs35l32_dapm_widgets,
	238	.num_dapm_widgets = ARRAY_SIZE(cs35l32_dapm_widgets),
	239	.dapm_routes = cs35l32_audio_map,
	240	.num_dapm_routes = ARRAY_SIZE(cs35l32_audio_map),
	241	},
eef5bb24 BA	242	};
	243
	244	/* Current and threshold powerup sequence Pg37 in datasheet */
8019ff6c	245	static const struct reg_sequence cs35l32_monitor_patch[] = {
eef5bb24 BA	246
	247	{ 0x00, 0x99 },
	248	{ 0x48, 0x17 },
	249	{ 0x49, 0x56 },
	250	{ 0x43, 0x01 },
	251	{ 0x3B, 0x62 },
	252	{ 0x3C, 0x80 },
	253	{ 0x00, 0x00 },
	254	};
	255
d883641f	256	static const struct regmap_config cs35l32_regmap = {
eef5bb24 BA	257	.reg_bits = 8,
	258	.val_bits = 8,
	259
	260	.max_register = CS35L32_MAX_REGISTER,
	261	.reg_defaults = cs35l32_reg_defaults,
	262	.num_reg_defaults = ARRAY_SIZE(cs35l32_reg_defaults),
	263	.volatile_reg = cs35l32_volatile_register,
	264	.readable_reg = cs35l32_readable_register,
	265	.precious_reg = cs35l32_precious_register,
	266	.cache_type = REGCACHE_RBTREE,
	267	};
	268
	269	static int cs35l32_handle_of_data(struct i2c_client *i2c_client,
	270	struct cs35l32_platform_data *pdata)
	271	{
	272	struct device_node *np = i2c_client->dev.of_node;
	273	unsigned int val;
	274
	275	if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0)
	276	pdata->sdout_share = val;
	277
dd5dc001 AB	278	if (of_property_read_u32(np, "cirrus,boost-manager", &val))
	279	val = -1u;
	280
eef5bb24 BA	281	switch (val) {
	282	case CS35L32_BOOST_MGR_AUTO:
	283	case CS35L32_BOOST_MGR_AUTO_AUDIO:
	284	case CS35L32_BOOST_MGR_BYPASS:
	285	case CS35L32_BOOST_MGR_FIXED:
	286	pdata->boost_mng = val;
	287	break;
dd5dc001	288	case -1u:
eef5bb24 BA	289	default:
	290	dev_err(&i2c_client->dev,
	291	"Wrong cirrus,boost-manager DT value %d\n", val);
	292	pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS;
	293	}
	294
dd5dc001 AB	295	if (of_property_read_u32(np, "cirrus,sdout-datacfg", &val))
dd5dc001 AB	296	val = -1u;
eef5bb24 BA	297	switch (val) {
	298	case CS35L32_DATA_CFG_LR_VP:
	299	case CS35L32_DATA_CFG_LR_STAT:
	300	case CS35L32_DATA_CFG_LR:
	301	case CS35L32_DATA_CFG_LR_VPSTAT:
	302	pdata->sdout_datacfg = val;
	303	break;
dd5dc001	304	case -1u:
eef5bb24 BA	305	default:
	306	dev_err(&i2c_client->dev,
	307	"Wrong cirrus,sdout-datacfg DT value %d\n", val);
	308	pdata->sdout_datacfg = CS35L32_DATA_CFG_LR;
	309	}
	310
dd5dc001 AB	311	if (of_property_read_u32(np, "cirrus,battery-threshold", &val))
dd5dc001 AB	312	val = -1u;
eef5bb24 BA	313	switch (val) {
	314	case CS35L32_BATT_THRESH_3_1V:
	315	case CS35L32_BATT_THRESH_3_2V:
	316	case CS35L32_BATT_THRESH_3_3V:
	317	case CS35L32_BATT_THRESH_3_4V:
	318	pdata->batt_thresh = val;
	319	break;
dd5dc001	320	case -1u:
eef5bb24 BA	321	default:
	322	dev_err(&i2c_client->dev,
	323	"Wrong cirrus,battery-threshold DT value %d\n", val);
	324	pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V;
	325	}
	326
dd5dc001 AB	327	if (of_property_read_u32(np, "cirrus,battery-recovery", &val))
dd5dc001 AB	328	val = -1u;
eef5bb24 BA	329	switch (val) {
	330	case CS35L32_BATT_RECOV_3_1V:
	331	case CS35L32_BATT_RECOV_3_2V:
	332	case CS35L32_BATT_RECOV_3_3V:
	333	case CS35L32_BATT_RECOV_3_4V:
	334	case CS35L32_BATT_RECOV_3_5V:
	335	case CS35L32_BATT_RECOV_3_6V:
	336	pdata->batt_recov = val;
	337	break;
dd5dc001	338	case -1u:
eef5bb24 BA	339	default:
	340	dev_err(&i2c_client->dev,
	341	"Wrong cirrus,battery-recovery DT value %d\n", val);
	342	pdata->batt_recov = CS35L32_BATT_RECOV_3_4V;
	343	}
	344
	345	return 0;
	346	}
	347
	348	static int cs35l32_i2c_probe(struct i2c_client *i2c_client,
	349	const struct i2c_device_id *id)
	350	{
	351	struct cs35l32_private *cs35l32;
	352	struct cs35l32_platform_data *pdata =
	353	dev_get_platdata(&i2c_client->dev);
	354	int ret, i;
	355	unsigned int devid = 0;
	356	unsigned int reg;
	357
	358
	359	cs35l32 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs35l32_private),
	360	GFP_KERNEL);
	361	if (!cs35l32) {
	362	dev_err(&i2c_client->dev, "could not allocate codec\n");
	363	return -ENOMEM;
	364	}
	365
	366	i2c_set_clientdata(i2c_client, cs35l32);
	367
	368	cs35l32->regmap = devm_regmap_init_i2c(i2c_client, &cs35l32_regmap);
	369	if (IS_ERR(cs35l32->regmap)) {
	370	ret = PTR_ERR(cs35l32->regmap);
	371	dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
	372	return ret;
	373	}
	374
	375	if (pdata) {
	376	cs35l32->pdata = *pdata;
	377	} else {
	378	pdata = devm_kzalloc(&i2c_client->dev,
	379	sizeof(struct cs35l32_platform_data),
	380	GFP_KERNEL);
	381	if (!pdata) {
	382	dev_err(&i2c_client->dev, "could not allocate pdata\n");
	383	return -ENOMEM;
	384	}
	385	if (i2c_client->dev.of_node) {
	386	ret = cs35l32_handle_of_data(i2c_client,
	387	&cs35l32->pdata);
	388	if (ret != 0)
	389	return ret;
	390	}
	391	}
	392
	393	for (i = 0; i < ARRAY_SIZE(cs35l32->supplies); i++)
	394	cs35l32->supplies[i].supply = cs35l32_supply_names[i];
	395
	396	ret = devm_regulator_bulk_get(&i2c_client->dev,
	397	ARRAY_SIZE(cs35l32->supplies),
	398	cs35l32->supplies);
	399	if (ret != 0) {
	400	dev_err(&i2c_client->dev,
	401	"Failed to request supplies: %d\n", ret);
	402	return ret;
403	}
404
405	ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
406	cs35l32->supplies);
407	if (ret != 0) {
408	dev_err(&i2c_client->dev,
409	"Failed to enable supplies: %d\n", ret);
410	return ret;
411	}
412
413	/* Reset the Device */
34d7c390 UKK	414	cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
	415	"reset", GPIOD_OUT_LOW);
	416	if (IS_ERR(cs35l32->reset_gpio))
	417	return PTR_ERR(cs35l32->reset_gpio);
	418
d5a78c8e	419	gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
eef5bb24 BA	420
	421	/* initialize codec */
	422	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_AB, &reg);
	423	devid = (reg & 0xFF) << 12;
	424
	425	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_CD, &reg);
	426	devid \|= (reg & 0xFF) << 4;
	427
	428	ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_E, &reg);
	429	devid \|= (reg & 0xF0) >> 4;
	430
	431	if (devid != CS35L32_CHIP_ID) {
	432	ret = -ENODEV;
	433	dev_err(&i2c_client->dev,
	434	"CS35L32 Device ID (%X). Expected %X\n",
	435	devid, CS35L32_CHIP_ID);
	436	return ret;
	437	}
	438
	439	ret = regmap_read(cs35l32->regmap, CS35L32_REV_ID, &reg);
	440	if (ret < 0) {
	441	dev_err(&i2c_client->dev, "Get Revision ID failed\n");
	442	return ret;
	443	}
	444
	445	ret = regmap_register_patch(cs35l32->regmap, cs35l32_monitor_patch,
	446	ARRAY_SIZE(cs35l32_monitor_patch));
	447	if (ret < 0) {
	448	dev_err(&i2c_client->dev, "Failed to apply errata patch\n");
	449	return ret;
	450	}
	451
	452	dev_info(&i2c_client->dev,
	453	"Cirrus Logic CS35L32, Revision: %02X\n", reg & 0xFF);
	454
	455	/* Setup VBOOST Management */
	456	if (cs35l32->pdata.boost_mng)
	457	regmap_update_bits(cs35l32->regmap, CS35L32_AUDIO_LED_MNGR,
	458	CS35L32_BOOST_MASK,
	459	cs35l32->pdata.boost_mng);
	460
	461	/* Setup ADSP Format Config */
	462	if (cs35l32->pdata.sdout_share)
	463	regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
	464	CS35L32_ADSP_SHARE_MASK,
	465	cs35l32->pdata.sdout_share << 3);
	466
	467	/* Setup ADSP Data Configuration */
	468	if (cs35l32->pdata.sdout_datacfg)
	469	regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
	470	CS35L32_ADSP_DATACFG_MASK,
	471	cs35l32->pdata.sdout_datacfg << 4);
	472
	473	/* Setup Low Battery Recovery */
	474	if (cs35l32->pdata.batt_recov)
	475	regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
	476	CS35L32_BATT_REC_MASK,
	477	cs35l32->pdata.batt_recov << 1);
	478
	479	/* Setup Low Battery Threshold */
	480	if (cs35l32->pdata.batt_thresh)
	481	regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
	482	CS35L32_BATT_THRESH_MASK,
	483	cs35l32->pdata.batt_thresh << 4);
484
485	/* Power down the AMP */
486	regmap_update_bits(cs35l32->regmap, CS35L32_PWRCTL1, CS35L32_PDN_AMP,
487	CS35L32_PDN_AMP);
488
489	/* Clear MCLK Error Bit since we don't have the clock yet */
490	ret = regmap_read(cs35l32->regmap, CS35L32_INT_STATUS_1, &reg);
491
492	ret = snd_soc_register_codec(&i2c_client->dev,
493	&soc_codec_dev_cs35l32, cs35l32_dai,
494	ARRAY_SIZE(cs35l32_dai));
495	if (ret < 0)
496	goto err_disable;
497
498	return 0;
499
500	err_disable:
501	regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
502	cs35l32->supplies);
38f57532	503	return ret;
eef5bb24 BA	504	}
	505
	506	static int cs35l32_i2c_remove(struct i2c_client *i2c_client)
	507	{
	508	struct cs35l32_private *cs35l32 = i2c_get_clientdata(i2c_client);
	509
	510	snd_soc_unregister_codec(&i2c_client->dev);
	511
	512	/* Hold down reset */
d5a78c8e	513	gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
eef5bb24	514
eef5bb24 BA	515	return 0;
	516	}
	517
641d334b	518	#ifdef CONFIG_PM
eef5bb24 BA	519	static int cs35l32_runtime_suspend(struct device *dev)
	520	{
	521	struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
	522
	523	regcache_cache_only(cs35l32->regmap, true);
	524	regcache_mark_dirty(cs35l32->regmap);
	525
	526	/* Hold down reset */
d5a78c8e	527	gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
eef5bb24 BA	528
	529	/* remove power */
	530	regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
	531	cs35l32->supplies);
	532
	533	return 0;
	534	}
	535
	536	static int cs35l32_runtime_resume(struct device *dev)
	537	{
	538	struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
	539	int ret;
	540
	541	/* Enable power */
	542	ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
	543	cs35l32->supplies);
	544	if (ret != 0) {
	545	dev_err(dev, "Failed to enable supplies: %d\n",
	546	ret);
	547	return ret;
	548	}
	549
d5a78c8e	550	gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
eef5bb24 BA	551
	552	regcache_cache_only(cs35l32->regmap, false);
	553	regcache_sync(cs35l32->regmap);
	554
	555	return 0;
	556	}
	557	#endif
	558
	559	static const struct dev_pm_ops cs35l32_runtime_pm = {
	560	SET_RUNTIME_PM_OPS(cs35l32_runtime_suspend, cs35l32_runtime_resume,
	561	NULL)
	562	};
	563
	564	static const struct of_device_id cs35l32_of_match[] = {
	565	{ .compatible = "cirrus,cs35l32", },
	566	{},
	567	};
	568	MODULE_DEVICE_TABLE(of, cs35l32_of_match);
	569
	570
	571	static const struct i2c_device_id cs35l32_id[] = {
	572	{"cs35l32", 0},
	573	{}
	574	};
	575
	576	MODULE_DEVICE_TABLE(i2c, cs35l32_id);
	577
	578	static struct i2c_driver cs35l32_i2c_driver = {
	579	.driver = {
	580	.name = "cs35l32",
eef5bb24 BA	581	.pm = &cs35l32_runtime_pm,
	582	.of_match_table = cs35l32_of_match,
	583	},
	584	.id_table = cs35l32_id,
	585	.probe = cs35l32_i2c_probe,
	586	.remove = cs35l32_i2c_remove,
	587	};
	588
	589	module_i2c_driver(cs35l32_i2c_driver);
	590
	591	MODULE_DESCRIPTION("ASoC CS35L32 driver");
	592	MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>");
	593	MODULE_LICENSE("GPL");