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eef5bb24 BA |
1 | /* |
2 | * cs35l32.c -- CS35L32 ALSA SoC audio driver | |
3 | * | |
4 | * Copyright 2014 CirrusLogic, Inc. | |
5 | * | |
6 | * Author: Brian Austin <brian.austin@cirrus.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
eef5bb24 BA |
16 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/gpio.h> | |
21 | #include <linux/regmap.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/regulator/consumer.h> | |
25 | #include <linux/gpio/consumer.h> | |
26 | #include <linux/of_device.h> | |
eef5bb24 BA |
27 | #include <sound/core.h> |
28 | #include <sound/pcm.h> | |
29 | #include <sound/pcm_params.h> | |
30 | #include <sound/soc.h> | |
31 | #include <sound/soc-dapm.h> | |
32 | #include <sound/initval.h> | |
33 | #include <sound/tlv.h> | |
34 | #include <dt-bindings/sound/cs35l32.h> | |
35 | ||
36 | #include "cs35l32.h" | |
37 | ||
38 | #define CS35L32_NUM_SUPPLIES 2 | |
39 | static const char *const cs35l32_supply_names[CS35L32_NUM_SUPPLIES] = { | |
40 | "VA", | |
41 | "VP", | |
42 | }; | |
43 | ||
44 | struct cs35l32_private { | |
45 | struct regmap *regmap; | |
46 | struct snd_soc_codec *codec; | |
47 | struct regulator_bulk_data supplies[CS35L32_NUM_SUPPLIES]; | |
48 | struct cs35l32_platform_data pdata; | |
49 | struct gpio_desc *reset_gpio; | |
50 | }; | |
51 | ||
52 | static const struct reg_default cs35l32_reg_defaults[] = { | |
53 | ||
54 | { 0x06, 0x04 }, /* Power Ctl 1 */ | |
55 | { 0x07, 0xE8 }, /* Power Ctl 2 */ | |
56 | { 0x08, 0x40 }, /* Clock Ctl */ | |
57 | { 0x09, 0x20 }, /* Low Battery Threshold */ | |
58 | { 0x0A, 0x00 }, /* Voltage Monitor [RO] */ | |
59 | { 0x0B, 0x40 }, /* Conv Peak Curr Protection CTL */ | |
60 | { 0x0C, 0x07 }, /* IMON Scaling */ | |
61 | { 0x0D, 0x03 }, /* Audio/LED Pwr Manager */ | |
62 | { 0x0F, 0x20 }, /* Serial Port Control */ | |
63 | { 0x10, 0x14 }, /* Class D Amp CTL */ | |
64 | { 0x11, 0x00 }, /* Protection Release CTL */ | |
65 | { 0x12, 0xFF }, /* Interrupt Mask 1 */ | |
66 | { 0x13, 0xFF }, /* Interrupt Mask 2 */ | |
67 | { 0x14, 0xFF }, /* Interrupt Mask 3 */ | |
68 | { 0x19, 0x00 }, /* LED Flash Mode Current */ | |
69 | { 0x1A, 0x00 }, /* LED Movie Mode Current */ | |
70 | { 0x1B, 0x20 }, /* LED Flash Timer */ | |
71 | { 0x1C, 0x00 }, /* LED Flash Inhibit Current */ | |
72 | }; | |
73 | ||
74 | static bool cs35l32_readable_register(struct device *dev, unsigned int reg) | |
75 | { | |
76 | switch (reg) { | |
77 | case CS35L32_DEVID_AB: | |
78 | case CS35L32_DEVID_CD: | |
79 | case CS35L32_DEVID_E: | |
80 | case CS35L32_FAB_ID: | |
81 | case CS35L32_REV_ID: | |
82 | case CS35L32_PWRCTL1: | |
83 | case CS35L32_PWRCTL2: | |
84 | case CS35L32_CLK_CTL: | |
85 | case CS35L32_BATT_THRESHOLD: | |
86 | case CS35L32_VMON: | |
87 | case CS35L32_BST_CPCP_CTL: | |
88 | case CS35L32_IMON_SCALING: | |
89 | case CS35L32_AUDIO_LED_MNGR: | |
90 | case CS35L32_ADSP_CTL: | |
91 | case CS35L32_CLASSD_CTL: | |
92 | case CS35L32_PROTECT_CTL: | |
93 | case CS35L32_INT_MASK_1: | |
94 | case CS35L32_INT_MASK_2: | |
95 | case CS35L32_INT_MASK_3: | |
96 | case CS35L32_INT_STATUS_1: | |
97 | case CS35L32_INT_STATUS_2: | |
98 | case CS35L32_INT_STATUS_3: | |
99 | case CS35L32_LED_STATUS: | |
100 | case CS35L32_FLASH_MODE: | |
101 | case CS35L32_MOVIE_MODE: | |
102 | case CS35L32_FLASH_TIMER: | |
103 | case CS35L32_FLASH_INHIBIT: | |
104 | return true; | |
105 | default: | |
106 | return false; | |
107 | } | |
108 | } | |
109 | ||
110 | static bool cs35l32_volatile_register(struct device *dev, unsigned int reg) | |
111 | { | |
112 | switch (reg) { | |
113 | case CS35L32_DEVID_AB: | |
114 | case CS35L32_DEVID_CD: | |
115 | case CS35L32_DEVID_E: | |
116 | case CS35L32_FAB_ID: | |
117 | case CS35L32_REV_ID: | |
118 | case CS35L32_INT_STATUS_1: | |
119 | case CS35L32_INT_STATUS_2: | |
120 | case CS35L32_INT_STATUS_3: | |
121 | case CS35L32_LED_STATUS: | |
7eef0855 | 122 | return true; |
eef5bb24 | 123 | default: |
7eef0855 | 124 | return false; |
eef5bb24 BA |
125 | } |
126 | } | |
127 | ||
128 | static bool cs35l32_precious_register(struct device *dev, unsigned int reg) | |
129 | { | |
130 | switch (reg) { | |
131 | case CS35L32_INT_STATUS_1: | |
132 | case CS35L32_INT_STATUS_2: | |
133 | case CS35L32_INT_STATUS_3: | |
134 | case CS35L32_LED_STATUS: | |
7eef0855 | 135 | return true; |
eef5bb24 | 136 | default: |
7eef0855 | 137 | return false; |
eef5bb24 BA |
138 | } |
139 | } | |
140 | ||
141 | static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 300, 0); | |
142 | ||
143 | static const struct snd_kcontrol_new imon_ctl = | |
144 | SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 6, 1, 1); | |
145 | ||
146 | static const struct snd_kcontrol_new vmon_ctl = | |
147 | SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 7, 1, 1); | |
148 | ||
149 | static const struct snd_kcontrol_new vpmon_ctl = | |
150 | SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 5, 1, 1); | |
151 | ||
152 | static const struct snd_kcontrol_new cs35l32_snd_controls[] = { | |
153 | SOC_SINGLE_TLV("Speaker Volume", CS35L32_CLASSD_CTL, | |
154 | 3, 0x04, 1, classd_ctl_tlv), | |
155 | SOC_SINGLE("Zero Cross Switch", CS35L32_CLASSD_CTL, 2, 1, 0), | |
156 | SOC_SINGLE("Gain Manager Switch", CS35L32_AUDIO_LED_MNGR, 3, 1, 0), | |
157 | }; | |
158 | ||
159 | static const struct snd_soc_dapm_widget cs35l32_dapm_widgets[] = { | |
160 | ||
161 | SND_SOC_DAPM_SUPPLY("BOOST", CS35L32_PWRCTL1, 2, 1, NULL, 0), | |
162 | SND_SOC_DAPM_OUT_DRV("Speaker", CS35L32_PWRCTL1, 7, 1, NULL, 0), | |
163 | ||
164 | SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L32_PWRCTL2, 3, 1), | |
165 | ||
166 | SND_SOC_DAPM_INPUT("VP"), | |
167 | SND_SOC_DAPM_INPUT("ISENSE"), | |
168 | SND_SOC_DAPM_INPUT("VSENSE"), | |
169 | ||
170 | SND_SOC_DAPM_SWITCH("VMON ADC", CS35L32_PWRCTL2, 7, 1, &vmon_ctl), | |
171 | SND_SOC_DAPM_SWITCH("IMON ADC", CS35L32_PWRCTL2, 6, 1, &imon_ctl), | |
172 | SND_SOC_DAPM_SWITCH("VPMON ADC", CS35L32_PWRCTL2, 5, 1, &vpmon_ctl), | |
173 | }; | |
174 | ||
175 | static const struct snd_soc_dapm_route cs35l32_audio_map[] = { | |
176 | ||
177 | {"Speaker", NULL, "BOOST"}, | |
178 | ||
179 | {"VMON ADC", NULL, "VSENSE"}, | |
180 | {"IMON ADC", NULL, "ISENSE"}, | |
181 | {"VPMON ADC", NULL, "VP"}, | |
182 | ||
183 | {"SDOUT", "Switch", "VMON ADC"}, | |
184 | {"SDOUT", "Switch", "IMON ADC"}, | |
185 | {"SDOUT", "Switch", "VPMON ADC"}, | |
186 | ||
187 | {"Capture", NULL, "SDOUT"}, | |
188 | }; | |
189 | ||
190 | static int cs35l32_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) | |
191 | { | |
192 | struct snd_soc_codec *codec = codec_dai->codec; | |
193 | ||
194 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
195 | case SND_SOC_DAIFMT_CBM_CFM: | |
196 | snd_soc_update_bits(codec, CS35L32_ADSP_CTL, | |
197 | CS35L32_ADSP_MASTER_MASK, | |
198 | CS35L32_ADSP_MASTER_MASK); | |
199 | break; | |
200 | case SND_SOC_DAIFMT_CBS_CFS: | |
201 | snd_soc_update_bits(codec, CS35L32_ADSP_CTL, | |
202 | CS35L32_ADSP_MASTER_MASK, 0); | |
203 | break; | |
204 | default: | |
205 | return -EINVAL; | |
206 | } | |
207 | ||
208 | return 0; | |
209 | } | |
210 | ||
211 | static int cs35l32_set_tristate(struct snd_soc_dai *dai, int tristate) | |
212 | { | |
213 | struct snd_soc_codec *codec = dai->codec; | |
214 | ||
215 | return snd_soc_update_bits(codec, CS35L32_PWRCTL2, | |
216 | CS35L32_SDOUT_3ST, tristate << 3); | |
217 | } | |
218 | ||
219 | static const struct snd_soc_dai_ops cs35l32_ops = { | |
220 | .set_fmt = cs35l32_set_dai_fmt, | |
221 | .set_tristate = cs35l32_set_tristate, | |
222 | }; | |
223 | ||
224 | static struct snd_soc_dai_driver cs35l32_dai[] = { | |
225 | { | |
226 | .name = "cs35l32-monitor", | |
227 | .id = 0, | |
228 | .capture = { | |
229 | .stream_name = "Capture", | |
230 | .channels_min = 2, | |
231 | .channels_max = 2, | |
232 | .rates = CS35L32_RATES, | |
233 | .formats = CS35L32_FORMATS, | |
234 | }, | |
235 | .ops = &cs35l32_ops, | |
236 | .symmetric_rates = 1, | |
237 | } | |
238 | }; | |
239 | ||
240 | static int cs35l32_codec_set_sysclk(struct snd_soc_codec *codec, | |
241 | int clk_id, int source, unsigned int freq, int dir) | |
242 | { | |
5f609f28 | 243 | unsigned int val; |
eef5bb24 BA |
244 | |
245 | switch (freq) { | |
246 | case 6000000: | |
5f609f28 | 247 | val = CS35L32_MCLK_RATIO; |
eef5bb24 BA |
248 | break; |
249 | case 12000000: | |
5f609f28 | 250 | val = CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO; |
eef5bb24 BA |
251 | break; |
252 | case 6144000: | |
5f609f28 | 253 | val = 0; |
eef5bb24 BA |
254 | break; |
255 | case 12288000: | |
5f609f28 | 256 | val = CS35L32_MCLK_DIV2_MASK; |
eef5bb24 BA |
257 | break; |
258 | default: | |
259 | return -EINVAL; | |
260 | } | |
261 | ||
5f609f28 AL |
262 | return snd_soc_update_bits(codec, CS35L32_CLK_CTL, |
263 | CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO_MASK, val); | |
eef5bb24 BA |
264 | } |
265 | ||
d883641f | 266 | static const struct snd_soc_codec_driver soc_codec_dev_cs35l32 = { |
eef5bb24 BA |
267 | .set_sysclk = cs35l32_codec_set_sysclk, |
268 | ||
269 | .dapm_widgets = cs35l32_dapm_widgets, | |
270 | .num_dapm_widgets = ARRAY_SIZE(cs35l32_dapm_widgets), | |
271 | .dapm_routes = cs35l32_audio_map, | |
272 | .num_dapm_routes = ARRAY_SIZE(cs35l32_audio_map), | |
273 | ||
274 | .controls = cs35l32_snd_controls, | |
275 | .num_controls = ARRAY_SIZE(cs35l32_snd_controls), | |
276 | }; | |
277 | ||
278 | /* Current and threshold powerup sequence Pg37 in datasheet */ | |
279 | static const struct reg_default cs35l32_monitor_patch[] = { | |
280 | ||
281 | { 0x00, 0x99 }, | |
282 | { 0x48, 0x17 }, | |
283 | { 0x49, 0x56 }, | |
284 | { 0x43, 0x01 }, | |
285 | { 0x3B, 0x62 }, | |
286 | { 0x3C, 0x80 }, | |
287 | { 0x00, 0x00 }, | |
288 | }; | |
289 | ||
d883641f | 290 | static const struct regmap_config cs35l32_regmap = { |
eef5bb24 BA |
291 | .reg_bits = 8, |
292 | .val_bits = 8, | |
293 | ||
294 | .max_register = CS35L32_MAX_REGISTER, | |
295 | .reg_defaults = cs35l32_reg_defaults, | |
296 | .num_reg_defaults = ARRAY_SIZE(cs35l32_reg_defaults), | |
297 | .volatile_reg = cs35l32_volatile_register, | |
298 | .readable_reg = cs35l32_readable_register, | |
299 | .precious_reg = cs35l32_precious_register, | |
300 | .cache_type = REGCACHE_RBTREE, | |
301 | }; | |
302 | ||
303 | static int cs35l32_handle_of_data(struct i2c_client *i2c_client, | |
304 | struct cs35l32_platform_data *pdata) | |
305 | { | |
306 | struct device_node *np = i2c_client->dev.of_node; | |
307 | unsigned int val; | |
308 | ||
309 | if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0) | |
310 | pdata->sdout_share = val; | |
311 | ||
312 | of_property_read_u32(np, "cirrus,boost-manager", &val); | |
313 | switch (val) { | |
314 | case CS35L32_BOOST_MGR_AUTO: | |
315 | case CS35L32_BOOST_MGR_AUTO_AUDIO: | |
316 | case CS35L32_BOOST_MGR_BYPASS: | |
317 | case CS35L32_BOOST_MGR_FIXED: | |
318 | pdata->boost_mng = val; | |
319 | break; | |
320 | default: | |
321 | dev_err(&i2c_client->dev, | |
322 | "Wrong cirrus,boost-manager DT value %d\n", val); | |
323 | pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS; | |
324 | } | |
325 | ||
326 | of_property_read_u32(np, "cirrus,sdout-datacfg", &val); | |
327 | switch (val) { | |
328 | case CS35L32_DATA_CFG_LR_VP: | |
329 | case CS35L32_DATA_CFG_LR_STAT: | |
330 | case CS35L32_DATA_CFG_LR: | |
331 | case CS35L32_DATA_CFG_LR_VPSTAT: | |
332 | pdata->sdout_datacfg = val; | |
333 | break; | |
334 | default: | |
335 | dev_err(&i2c_client->dev, | |
336 | "Wrong cirrus,sdout-datacfg DT value %d\n", val); | |
337 | pdata->sdout_datacfg = CS35L32_DATA_CFG_LR; | |
338 | } | |
339 | ||
340 | of_property_read_u32(np, "cirrus,battery-threshold", &val); | |
341 | switch (val) { | |
342 | case CS35L32_BATT_THRESH_3_1V: | |
343 | case CS35L32_BATT_THRESH_3_2V: | |
344 | case CS35L32_BATT_THRESH_3_3V: | |
345 | case CS35L32_BATT_THRESH_3_4V: | |
346 | pdata->batt_thresh = val; | |
347 | break; | |
348 | default: | |
349 | dev_err(&i2c_client->dev, | |
350 | "Wrong cirrus,battery-threshold DT value %d\n", val); | |
351 | pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V; | |
352 | } | |
353 | ||
354 | of_property_read_u32(np, "cirrus,battery-recovery", &val); | |
355 | switch (val) { | |
356 | case CS35L32_BATT_RECOV_3_1V: | |
357 | case CS35L32_BATT_RECOV_3_2V: | |
358 | case CS35L32_BATT_RECOV_3_3V: | |
359 | case CS35L32_BATT_RECOV_3_4V: | |
360 | case CS35L32_BATT_RECOV_3_5V: | |
361 | case CS35L32_BATT_RECOV_3_6V: | |
362 | pdata->batt_recov = val; | |
363 | break; | |
364 | default: | |
365 | dev_err(&i2c_client->dev, | |
366 | "Wrong cirrus,battery-recovery DT value %d\n", val); | |
367 | pdata->batt_recov = CS35L32_BATT_RECOV_3_4V; | |
368 | } | |
369 | ||
370 | return 0; | |
371 | } | |
372 | ||
373 | static int cs35l32_i2c_probe(struct i2c_client *i2c_client, | |
374 | const struct i2c_device_id *id) | |
375 | { | |
376 | struct cs35l32_private *cs35l32; | |
377 | struct cs35l32_platform_data *pdata = | |
378 | dev_get_platdata(&i2c_client->dev); | |
379 | int ret, i; | |
380 | unsigned int devid = 0; | |
381 | unsigned int reg; | |
382 | ||
383 | ||
384 | cs35l32 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs35l32_private), | |
385 | GFP_KERNEL); | |
386 | if (!cs35l32) { | |
387 | dev_err(&i2c_client->dev, "could not allocate codec\n"); | |
388 | return -ENOMEM; | |
389 | } | |
390 | ||
391 | i2c_set_clientdata(i2c_client, cs35l32); | |
392 | ||
393 | cs35l32->regmap = devm_regmap_init_i2c(i2c_client, &cs35l32_regmap); | |
394 | if (IS_ERR(cs35l32->regmap)) { | |
395 | ret = PTR_ERR(cs35l32->regmap); | |
396 | dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); | |
397 | return ret; | |
398 | } | |
399 | ||
400 | if (pdata) { | |
401 | cs35l32->pdata = *pdata; | |
402 | } else { | |
403 | pdata = devm_kzalloc(&i2c_client->dev, | |
404 | sizeof(struct cs35l32_platform_data), | |
405 | GFP_KERNEL); | |
406 | if (!pdata) { | |
407 | dev_err(&i2c_client->dev, "could not allocate pdata\n"); | |
408 | return -ENOMEM; | |
409 | } | |
410 | if (i2c_client->dev.of_node) { | |
411 | ret = cs35l32_handle_of_data(i2c_client, | |
412 | &cs35l32->pdata); | |
413 | if (ret != 0) | |
414 | return ret; | |
415 | } | |
416 | } | |
417 | ||
418 | for (i = 0; i < ARRAY_SIZE(cs35l32->supplies); i++) | |
419 | cs35l32->supplies[i].supply = cs35l32_supply_names[i]; | |
420 | ||
421 | ret = devm_regulator_bulk_get(&i2c_client->dev, | |
422 | ARRAY_SIZE(cs35l32->supplies), | |
423 | cs35l32->supplies); | |
424 | if (ret != 0) { | |
425 | dev_err(&i2c_client->dev, | |
426 | "Failed to request supplies: %d\n", ret); | |
427 | return ret; | |
428 | } | |
429 | ||
430 | ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies), | |
431 | cs35l32->supplies); | |
432 | if (ret != 0) { | |
433 | dev_err(&i2c_client->dev, | |
434 | "Failed to enable supplies: %d\n", ret); | |
435 | return ret; | |
436 | } | |
437 | ||
438 | /* Reset the Device */ | |
34d7c390 UKK |
439 | cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, |
440 | "reset", GPIOD_OUT_LOW); | |
441 | if (IS_ERR(cs35l32->reset_gpio)) | |
442 | return PTR_ERR(cs35l32->reset_gpio); | |
443 | ||
444 | if (cs35l32->reset_gpio) | |
eef5bb24 | 445 | gpiod_set_value_cansleep(cs35l32->reset_gpio, 1); |
eef5bb24 BA |
446 | |
447 | /* initialize codec */ | |
448 | ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_AB, ®); | |
449 | devid = (reg & 0xFF) << 12; | |
450 | ||
451 | ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_CD, ®); | |
452 | devid |= (reg & 0xFF) << 4; | |
453 | ||
454 | ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_E, ®); | |
455 | devid |= (reg & 0xF0) >> 4; | |
456 | ||
457 | if (devid != CS35L32_CHIP_ID) { | |
458 | ret = -ENODEV; | |
459 | dev_err(&i2c_client->dev, | |
460 | "CS35L32 Device ID (%X). Expected %X\n", | |
461 | devid, CS35L32_CHIP_ID); | |
462 | return ret; | |
463 | } | |
464 | ||
465 | ret = regmap_read(cs35l32->regmap, CS35L32_REV_ID, ®); | |
466 | if (ret < 0) { | |
467 | dev_err(&i2c_client->dev, "Get Revision ID failed\n"); | |
468 | return ret; | |
469 | } | |
470 | ||
471 | ret = regmap_register_patch(cs35l32->regmap, cs35l32_monitor_patch, | |
472 | ARRAY_SIZE(cs35l32_monitor_patch)); | |
473 | if (ret < 0) { | |
474 | dev_err(&i2c_client->dev, "Failed to apply errata patch\n"); | |
475 | return ret; | |
476 | } | |
477 | ||
478 | dev_info(&i2c_client->dev, | |
479 | "Cirrus Logic CS35L32, Revision: %02X\n", reg & 0xFF); | |
480 | ||
481 | /* Setup VBOOST Management */ | |
482 | if (cs35l32->pdata.boost_mng) | |
483 | regmap_update_bits(cs35l32->regmap, CS35L32_AUDIO_LED_MNGR, | |
484 | CS35L32_BOOST_MASK, | |
485 | cs35l32->pdata.boost_mng); | |
486 | ||
487 | /* Setup ADSP Format Config */ | |
488 | if (cs35l32->pdata.sdout_share) | |
489 | regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL, | |
490 | CS35L32_ADSP_SHARE_MASK, | |
491 | cs35l32->pdata.sdout_share << 3); | |
492 | ||
493 | /* Setup ADSP Data Configuration */ | |
494 | if (cs35l32->pdata.sdout_datacfg) | |
495 | regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL, | |
496 | CS35L32_ADSP_DATACFG_MASK, | |
497 | cs35l32->pdata.sdout_datacfg << 4); | |
498 | ||
499 | /* Setup Low Battery Recovery */ | |
500 | if (cs35l32->pdata.batt_recov) | |
501 | regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD, | |
502 | CS35L32_BATT_REC_MASK, | |
503 | cs35l32->pdata.batt_recov << 1); | |
504 | ||
505 | /* Setup Low Battery Threshold */ | |
506 | if (cs35l32->pdata.batt_thresh) | |
507 | regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD, | |
508 | CS35L32_BATT_THRESH_MASK, | |
509 | cs35l32->pdata.batt_thresh << 4); | |
510 | ||
511 | /* Power down the AMP */ | |
512 | regmap_update_bits(cs35l32->regmap, CS35L32_PWRCTL1, CS35L32_PDN_AMP, | |
513 | CS35L32_PDN_AMP); | |
514 | ||
515 | /* Clear MCLK Error Bit since we don't have the clock yet */ | |
516 | ret = regmap_read(cs35l32->regmap, CS35L32_INT_STATUS_1, ®); | |
517 | ||
518 | ret = snd_soc_register_codec(&i2c_client->dev, | |
519 | &soc_codec_dev_cs35l32, cs35l32_dai, | |
520 | ARRAY_SIZE(cs35l32_dai)); | |
521 | if (ret < 0) | |
522 | goto err_disable; | |
523 | ||
524 | return 0; | |
525 | ||
526 | err_disable: | |
527 | regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies), | |
528 | cs35l32->supplies); | |
38f57532 | 529 | return ret; |
eef5bb24 BA |
530 | } |
531 | ||
532 | static int cs35l32_i2c_remove(struct i2c_client *i2c_client) | |
533 | { | |
534 | struct cs35l32_private *cs35l32 = i2c_get_clientdata(i2c_client); | |
535 | ||
536 | snd_soc_unregister_codec(&i2c_client->dev); | |
537 | ||
538 | /* Hold down reset */ | |
539 | if (cs35l32->reset_gpio) | |
540 | gpiod_set_value_cansleep(cs35l32->reset_gpio, 0); | |
541 | ||
eef5bb24 BA |
542 | return 0; |
543 | } | |
544 | ||
641d334b | 545 | #ifdef CONFIG_PM |
eef5bb24 BA |
546 | static int cs35l32_runtime_suspend(struct device *dev) |
547 | { | |
548 | struct cs35l32_private *cs35l32 = dev_get_drvdata(dev); | |
549 | ||
550 | regcache_cache_only(cs35l32->regmap, true); | |
551 | regcache_mark_dirty(cs35l32->regmap); | |
552 | ||
553 | /* Hold down reset */ | |
554 | if (cs35l32->reset_gpio) | |
555 | gpiod_set_value_cansleep(cs35l32->reset_gpio, 0); | |
556 | ||
557 | /* remove power */ | |
558 | regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies), | |
559 | cs35l32->supplies); | |
560 | ||
561 | return 0; | |
562 | } | |
563 | ||
564 | static int cs35l32_runtime_resume(struct device *dev) | |
565 | { | |
566 | struct cs35l32_private *cs35l32 = dev_get_drvdata(dev); | |
567 | int ret; | |
568 | ||
569 | /* Enable power */ | |
570 | ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies), | |
571 | cs35l32->supplies); | |
572 | if (ret != 0) { | |
573 | dev_err(dev, "Failed to enable supplies: %d\n", | |
574 | ret); | |
575 | return ret; | |
576 | } | |
577 | ||
578 | if (cs35l32->reset_gpio) | |
579 | gpiod_set_value_cansleep(cs35l32->reset_gpio, 1); | |
580 | ||
581 | regcache_cache_only(cs35l32->regmap, false); | |
582 | regcache_sync(cs35l32->regmap); | |
583 | ||
584 | return 0; | |
585 | } | |
586 | #endif | |
587 | ||
588 | static const struct dev_pm_ops cs35l32_runtime_pm = { | |
589 | SET_RUNTIME_PM_OPS(cs35l32_runtime_suspend, cs35l32_runtime_resume, | |
590 | NULL) | |
591 | }; | |
592 | ||
593 | static const struct of_device_id cs35l32_of_match[] = { | |
594 | { .compatible = "cirrus,cs35l32", }, | |
595 | {}, | |
596 | }; | |
597 | MODULE_DEVICE_TABLE(of, cs35l32_of_match); | |
598 | ||
599 | ||
600 | static const struct i2c_device_id cs35l32_id[] = { | |
601 | {"cs35l32", 0}, | |
602 | {} | |
603 | }; | |
604 | ||
605 | MODULE_DEVICE_TABLE(i2c, cs35l32_id); | |
606 | ||
607 | static struct i2c_driver cs35l32_i2c_driver = { | |
608 | .driver = { | |
609 | .name = "cs35l32", | |
610 | .owner = THIS_MODULE, | |
611 | .pm = &cs35l32_runtime_pm, | |
612 | .of_match_table = cs35l32_of_match, | |
613 | }, | |
614 | .id_table = cs35l32_id, | |
615 | .probe = cs35l32_i2c_probe, | |
616 | .remove = cs35l32_i2c_remove, | |
617 | }; | |
618 | ||
619 | module_i2c_driver(cs35l32_i2c_driver); | |
620 | ||
621 | MODULE_DESCRIPTION("ASoC CS35L32 driver"); | |
622 | MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>"); | |
623 | MODULE_LICENSE("GPL"); |