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ASoC: da7210: Add support for ADC & DAC equalizers
[mirror_ubuntu-bionic-kernel.git] / sound / soc / codecs / da7210.c
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98615454
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1/*
2 * DA7210 ALSA Soc codec driver
3 *
4 * Copyright (c) 2009 Dialog Semiconductor
5 * Written by David Chen <Dajun.chen@diasemi.com>
6 *
7 * Copyright (C) 2009 Renesas Solutions Corp.
8 * Cleanups by Kuninori Morimoto <morimoto.kuninori@renesas.com>
9 *
10 * Tested on SuperH Ecovec24 board with S16/S24 LE in 48KHz using I2S
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17
98615454 18#include <linux/delay.h>
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19#include <linux/i2c.h>
20#include <linux/platform_device.h>
5a0e3ad6 21#include <linux/slab.h>
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22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
ce6120cc 24#include <sound/soc.h>
98615454 25#include <sound/initval.h>
a7e7cd5b 26#include <sound/tlv.h>
98615454 27
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28/* DA7210 register space */
29#define DA7210_STATUS 0x02
30#define DA7210_STARTUP1 0x03
31#define DA7210_MIC_L 0x07
32#define DA7210_MIC_R 0x08
33#define DA7210_INMIX_L 0x0D
34#define DA7210_INMIX_R 0x0E
35#define DA7210_ADC_HPF 0x0F
36#define DA7210_ADC 0x10
0ee6e9e7
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37#define DA7210_ADC_EQ1_2 0X11
38#define DA7210_ADC_EQ3_4 0x12
39#define DA7210_ADC_EQ5 0x13
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40#define DA7210_DAC_HPF 0x14
41#define DA7210_DAC_L 0x15
42#define DA7210_DAC_R 0x16
43#define DA7210_DAC_SEL 0x17
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44#define DA7210_DAC_EQ1_2 0x19
45#define DA7210_DAC_EQ3_4 0x1A
46#define DA7210_DAC_EQ5 0x1B
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47#define DA7210_OUTMIX_L 0x1C
48#define DA7210_OUTMIX_R 0x1D
49#define DA7210_HP_L_VOL 0x21
50#define DA7210_HP_R_VOL 0x22
51#define DA7210_HP_CFG 0x23
52#define DA7210_DAI_SRC_SEL 0x25
53#define DA7210_DAI_CFG1 0x26
54#define DA7210_DAI_CFG3 0x28
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55#define DA7210_PLL_DIV1 0x29
56#define DA7210_PLL_DIV2 0x2A
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57#define DA7210_PLL_DIV3 0x2B
58#define DA7210_PLL 0x2C
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59#define DA7210_A_HID_UNLOCK 0x8A
60#define DA7210_A_TEST_UNLOCK 0x8B
61#define DA7210_A_PLL1 0x90
62#define DA7210_A_CP_MODE 0xA7
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63
64/* STARTUP1 bit fields */
65#define DA7210_SC_MST_EN (1 << 0)
66
67/* MIC_L bit fields */
68#define DA7210_MICBIAS_EN (1 << 6)
69#define DA7210_MIC_L_EN (1 << 7)
70
71/* MIC_R bit fields */
72#define DA7210_MIC_R_EN (1 << 7)
73
74/* INMIX_L bit fields */
75#define DA7210_IN_L_EN (1 << 7)
76
77/* INMIX_R bit fields */
78#define DA7210_IN_R_EN (1 << 7)
79
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80/* ADC bit fields */
81#define DA7210_ADC_L_EN (1 << 3)
82#define DA7210_ADC_R_EN (1 << 7)
83
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84/* DAC/ADC HPF fields */
85#define DA7210_VOICE_F0_MASK (0x7 << 4)
86#define DA7210_VOICE_F0_25 (1 << 4)
87#define DA7210_VOICE_EN (1 << 7)
c2151433 88
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89/* DAC_SEL bit fields */
90#define DA7210_DAC_L_SRC_DAI_L (4 << 0)
91#define DA7210_DAC_L_EN (1 << 3)
92#define DA7210_DAC_R_SRC_DAI_R (5 << 4)
93#define DA7210_DAC_R_EN (1 << 7)
94
95/* OUTMIX_L bit fields */
96#define DA7210_OUT_L_EN (1 << 7)
97
98/* OUTMIX_R bit fields */
99#define DA7210_OUT_R_EN (1 << 7)
100
101/* HP_CFG bit fields */
102#define DA7210_HP_2CAP_MODE (1 << 1)
103#define DA7210_HP_SENSE_EN (1 << 2)
104#define DA7210_HP_L_EN (1 << 3)
105#define DA7210_HP_MODE (1 << 6)
106#define DA7210_HP_R_EN (1 << 7)
107
108/* DAI_SRC_SEL bit fields */
109#define DA7210_DAI_OUT_L_SRC (6 << 0)
110#define DA7210_DAI_OUT_R_SRC (7 << 4)
111
112/* DAI_CFG1 bit fields */
113#define DA7210_DAI_WORD_S16_LE (0 << 0)
0f8ea586 114#define DA7210_DAI_WORD_S20_3LE (1 << 0)
98615454 115#define DA7210_DAI_WORD_S24_LE (2 << 0)
0f8ea586 116#define DA7210_DAI_WORD_S32_LE (3 << 0)
98615454 117#define DA7210_DAI_FLEN_64BIT (1 << 2)
0f8ea586 118#define DA7210_DAI_MODE_SLAVE (0 << 7)
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119#define DA7210_DAI_MODE_MASTER (1 << 7)
120
121/* DAI_CFG3 bit fields */
122#define DA7210_DAI_FORMAT_I2SMODE (0 << 0)
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123#define DA7210_DAI_FORMAT_LEFT_J (1 << 0)
124#define DA7210_DAI_FORMAT_RIGHT_J (2 << 0)
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125#define DA7210_DAI_OE (1 << 3)
126#define DA7210_DAI_EN (1 << 7)
127
128/*PLL_DIV3 bit fields */
129#define DA7210_MCLK_RANGE_10_20_MHZ (1 << 4)
130#define DA7210_PLL_BYP (1 << 6)
131
132/* PLL bit fields */
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133#define DA7210_PLL_FS_MASK (0xF << 0)
134#define DA7210_PLL_FS_8000 (0x1 << 0)
960b3b4b 135#define DA7210_PLL_FS_11025 (0x2 << 0)
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136#define DA7210_PLL_FS_12000 (0x3 << 0)
137#define DA7210_PLL_FS_16000 (0x5 << 0)
960b3b4b 138#define DA7210_PLL_FS_22050 (0x6 << 0)
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139#define DA7210_PLL_FS_24000 (0x7 << 0)
140#define DA7210_PLL_FS_32000 (0x9 << 0)
960b3b4b 141#define DA7210_PLL_FS_44100 (0xA << 0)
3a9d6202 142#define DA7210_PLL_FS_48000 (0xB << 0)
960b3b4b 143#define DA7210_PLL_FS_88200 (0xE << 0)
3a9d6202 144#define DA7210_PLL_FS_96000 (0xF << 0)
960b3b4b 145#define DA7210_PLL_EN (0x1 << 7)
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146
147#define DA7210_VERSION "0.0.1"
148
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149/*
150 * Playback Volume
151 *
152 * max : 0x3F (+15.0 dB)
153 * (1.5 dB step)
154 * min : 0x11 (-54.0 dB)
155 * mute : 0x10
156 * reserved : 0x00 - 0x0F
157 *
a7e7cd5b 158 * Reserved area are considered as "mute".
a7e7cd5b 159 */
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AC
160static const unsigned int hp_out_tlv[] = {
161 TLV_DB_RANGE_HEAD(2),
162 0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
163 /* -54 dB to +15 dB */
164 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0),
165};
a7e7cd5b 166
0ee6e9e7
AC
167static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
168static const DECLARE_TLV_DB_SCALE(adc_eq_master_gain_tlv, -1800, 600, 1);
169
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170static const struct snd_kcontrol_new da7210_snd_controls[] = {
171
172 SOC_DOUBLE_R_TLV("HeadPhone Playback Volume",
173 DA7210_HP_L_VOL, DA7210_HP_R_VOL,
174 0, 0x3F, 0, hp_out_tlv),
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AC
175
176 /* DAC Equalizer controls */
177 SOC_SINGLE("DAC EQ Switch", DA7210_DAC_EQ5, 7, 1, 0),
178 SOC_SINGLE_TLV("DAC EQ1 Volume", DA7210_DAC_EQ1_2, 0, 0xf, 1,
179 eq_gain_tlv),
180 SOC_SINGLE_TLV("DAC EQ2 Volume", DA7210_DAC_EQ1_2, 4, 0xf, 1,
181 eq_gain_tlv),
182 SOC_SINGLE_TLV("DAC EQ3 Volume", DA7210_DAC_EQ3_4, 0, 0xf, 1,
183 eq_gain_tlv),
184 SOC_SINGLE_TLV("DAC EQ4 Volume", DA7210_DAC_EQ3_4, 4, 0xf, 1,
185 eq_gain_tlv),
186 SOC_SINGLE_TLV("DAC EQ5 Volume", DA7210_DAC_EQ5, 0, 0xf, 1,
187 eq_gain_tlv),
188
189 /* ADC Equalizer controls */
190 SOC_SINGLE("ADC EQ Switch", DA7210_ADC_EQ5, 7, 1, 0),
191 SOC_SINGLE_TLV("ADC EQ Master Volume", DA7210_ADC_EQ5, 4, 0x3,
192 1, adc_eq_master_gain_tlv),
193 SOC_SINGLE_TLV("ADC EQ1 Volume", DA7210_ADC_EQ1_2, 0, 0xf, 1,
194 eq_gain_tlv),
195 SOC_SINGLE_TLV("ADC EQ2 Volume", DA7210_ADC_EQ1_2, 4, 0xf, 1,
196 eq_gain_tlv),
197 SOC_SINGLE_TLV("ADC EQ3 Volume", DA7210_ADC_EQ3_4, 0, 0xf, 1,
198 eq_gain_tlv),
199 SOC_SINGLE_TLV("ADC EQ4 Volume", DA7210_ADC_EQ3_4, 4, 0xf, 1,
200 eq_gain_tlv),
201 SOC_SINGLE_TLV("ADC EQ5 Volume", DA7210_ADC_EQ5, 0, 0xf, 1,
202 eq_gain_tlv),
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203};
204
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205/* Codec private data */
206struct da7210_priv {
f0fba2ad 207 enum snd_soc_control_type control_type;
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208};
209
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210/*
211 * Register cache
212 */
213static const u8 da7210_reg[] = {
214 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R0 - R7 */
215 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, /* R8 - RF */
216 0x00, 0x00, 0x00, 0x00, 0x08, 0x10, 0x10, 0x54, /* R10 - R17 */
217 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R18 - R1F */
218 0x00, 0x00, 0x00, 0x02, 0x00, 0x76, 0x00, 0x00, /* R20 - R27 */
219 0x04, 0x00, 0x00, 0x30, 0x2A, 0x00, 0x40, 0x00, /* R28 - R2F */
220 0x40, 0x00, 0x40, 0x00, 0x40, 0x00, 0x40, 0x00, /* R30 - R37 */
221 0x40, 0x00, 0x40, 0x00, 0x40, 0x00, 0x00, 0x00, /* R38 - R3F */
222 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R40 - R4F */
223 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R48 - R4F */
224 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R50 - R57 */
225 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R58 - R5F */
226 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R60 - R67 */
227 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R68 - R6F */
228 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* R70 - R77 */
229 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x54, 0x00, /* R78 - R7F */
230 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, /* R80 - R87 */
231 0x00, /* R88 */
232};
233
40a49710
AL
234static int da7210_volatile_register(struct snd_soc_codec *codec,
235 unsigned int reg)
98615454 236{
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AL
237 switch (reg) {
238 case DA7210_STATUS:
239 return 1;
240 default:
241 return 0;
242 }
98615454 243}
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244static int da7210_startup(struct snd_pcm_substream *substream,
245 struct snd_soc_dai *dai)
246{
247 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
248 struct snd_soc_codec *codec = dai->codec;
249
250 if (is_play) {
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251 /* Enable Out */
252 snd_soc_update_bits(codec, DA7210_OUTMIX_L, 0x1F, 0x10);
253 snd_soc_update_bits(codec, DA7210_OUTMIX_R, 0x1F, 0x10);
254
255 } else {
256 /* Volume 7 */
257 snd_soc_update_bits(codec, DA7210_MIC_L, 0x7, 0x7);
258 snd_soc_update_bits(codec, DA7210_MIC_R, 0x7, 0x7);
259
260 /* Enable Mic */
261 snd_soc_update_bits(codec, DA7210_INMIX_L, 0x1F, 0x1);
262 snd_soc_update_bits(codec, DA7210_INMIX_R, 0x1F, 0x1);
263 }
264
265 return 0;
266}
267
268/*
269 * Set PCM DAI word length.
270 */
271static int da7210_hw_params(struct snd_pcm_substream *substream,
272 struct snd_pcm_hw_params *params,
273 struct snd_soc_dai *dai)
274{
275 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 276 struct snd_soc_codec *codec = rtd->codec;
98615454 277 u32 dai_cfg1;
3a9d6202 278 u32 hpf_reg, hpf_mask, hpf_value;
960b3b4b 279 u32 fs, bypass;
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280
281 /* set DAI source to Left and Right ADC */
40a49710 282 snd_soc_write(codec, DA7210_DAI_SRC_SEL,
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283 DA7210_DAI_OUT_R_SRC | DA7210_DAI_OUT_L_SRC);
284
285 /* Enable DAI */
40a49710 286 snd_soc_write(codec, DA7210_DAI_CFG3, DA7210_DAI_OE | DA7210_DAI_EN);
98615454 287
40a49710 288 dai_cfg1 = 0xFC & snd_soc_read(codec, DA7210_DAI_CFG1);
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289
290 switch (params_format(params)) {
291 case SNDRV_PCM_FORMAT_S16_LE:
292 dai_cfg1 |= DA7210_DAI_WORD_S16_LE;
293 break;
0f8ea586
AC
294 case SNDRV_PCM_FORMAT_S20_3LE:
295 dai_cfg1 |= DA7210_DAI_WORD_S20_3LE;
296 break;
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297 case SNDRV_PCM_FORMAT_S24_LE:
298 dai_cfg1 |= DA7210_DAI_WORD_S24_LE;
299 break;
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300 case SNDRV_PCM_FORMAT_S32_LE:
301 dai_cfg1 |= DA7210_DAI_WORD_S32_LE;
302 break;
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303 default:
304 return -EINVAL;
305 }
306
40a49710 307 snd_soc_write(codec, DA7210_DAI_CFG1, dai_cfg1);
98615454 308
3a9d6202
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309 hpf_reg = (SNDRV_PCM_STREAM_PLAYBACK == substream->stream) ?
310 DA7210_DAC_HPF : DA7210_ADC_HPF;
311
98615454 312 switch (params_rate(params)) {
3a9d6202
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313 case 8000:
314 fs = DA7210_PLL_FS_8000;
315 hpf_mask = DA7210_VOICE_F0_MASK | DA7210_VOICE_EN;
316 hpf_value = DA7210_VOICE_F0_25 | DA7210_VOICE_EN;
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317 bypass = DA7210_PLL_BYP;
318 break;
319 case 11025:
320 fs = DA7210_PLL_FS_11025;
321 hpf_mask = DA7210_VOICE_F0_MASK | DA7210_VOICE_EN;
322 hpf_value = DA7210_VOICE_F0_25 | DA7210_VOICE_EN;
323 bypass = 0;
3a9d6202
KM
324 break;
325 case 12000:
326 fs = DA7210_PLL_FS_12000;
327 hpf_mask = DA7210_VOICE_F0_MASK | DA7210_VOICE_EN;
328 hpf_value = DA7210_VOICE_F0_25 | DA7210_VOICE_EN;
960b3b4b 329 bypass = DA7210_PLL_BYP;
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KM
330 break;
331 case 16000:
332 fs = DA7210_PLL_FS_16000;
333 hpf_mask = DA7210_VOICE_F0_MASK | DA7210_VOICE_EN;
334 hpf_value = DA7210_VOICE_F0_25 | DA7210_VOICE_EN;
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335 bypass = DA7210_PLL_BYP;
336 break;
337 case 22050:
338 fs = DA7210_PLL_FS_22050;
339 hpf_mask = DA7210_VOICE_EN;
340 hpf_value = 0;
341 bypass = 0;
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342 break;
343 case 32000:
344 fs = DA7210_PLL_FS_32000;
345 hpf_mask = DA7210_VOICE_EN;
346 hpf_value = 0;
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347 bypass = DA7210_PLL_BYP;
348 break;
349 case 44100:
350 fs = DA7210_PLL_FS_44100;
351 hpf_mask = DA7210_VOICE_EN;
352 hpf_value = 0;
353 bypass = 0;
3a9d6202 354 break;
98615454 355 case 48000:
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KM
356 fs = DA7210_PLL_FS_48000;
357 hpf_mask = DA7210_VOICE_EN;
358 hpf_value = 0;
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359 bypass = DA7210_PLL_BYP;
360 break;
361 case 88200:
362 fs = DA7210_PLL_FS_88200;
363 hpf_mask = DA7210_VOICE_EN;
364 hpf_value = 0;
365 bypass = 0;
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KM
366 break;
367 case 96000:
368 fs = DA7210_PLL_FS_96000;
369 hpf_mask = DA7210_VOICE_EN;
370 hpf_value = 0;
960b3b4b 371 bypass = DA7210_PLL_BYP;
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372 break;
373 default:
374 return -EINVAL;
375 }
376
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377 /* Disable active mode */
378 snd_soc_update_bits(codec, DA7210_STARTUP1, DA7210_SC_MST_EN, 0);
379
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380 snd_soc_update_bits(codec, hpf_reg, hpf_mask, hpf_value);
381 snd_soc_update_bits(codec, DA7210_PLL, DA7210_PLL_FS_MASK, fs);
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382 snd_soc_update_bits(codec, DA7210_PLL_DIV3, DA7210_PLL_BYP, bypass);
383
384 /* Enable active mode */
385 snd_soc_update_bits(codec, DA7210_STARTUP1,
386 DA7210_SC_MST_EN, DA7210_SC_MST_EN);
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387
388 return 0;
389}
390
391/*
392 * Set DAI mode and Format
393 */
394static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
395{
396 struct snd_soc_codec *codec = codec_dai->codec;
397 u32 dai_cfg1;
398 u32 dai_cfg3;
399
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AL
400 dai_cfg1 = 0x7f & snd_soc_read(codec, DA7210_DAI_CFG1);
401 dai_cfg3 = 0xfc & snd_soc_read(codec, DA7210_DAI_CFG3);
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402
403 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
404 case SND_SOC_DAIFMT_CBM_CFM:
405 dai_cfg1 |= DA7210_DAI_MODE_MASTER;
406 break;
0f8ea586
AC
407 case SND_SOC_DAIFMT_CBS_CFS:
408 dai_cfg1 |= DA7210_DAI_MODE_SLAVE;
409 break;
98615454
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410 default:
411 return -EINVAL;
412 }
413
414 /* FIXME
415 *
416 * It support I2S only now
417 */
418 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
419 case SND_SOC_DAIFMT_I2S:
420 dai_cfg3 |= DA7210_DAI_FORMAT_I2SMODE;
421 break;
0f8ea586
AC
422 case SND_SOC_DAIFMT_LEFT_J:
423 dai_cfg3 |= DA7210_DAI_FORMAT_LEFT_J;
424 break;
425 case SND_SOC_DAIFMT_RIGHT_J:
426 dai_cfg3 |= DA7210_DAI_FORMAT_RIGHT_J;
427 break;
98615454
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428 default:
429 return -EINVAL;
430 }
431
432 /* FIXME
433 *
434 * It support 64bit data transmission only now
435 */
436 dai_cfg1 |= DA7210_DAI_FLEN_64BIT;
437
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438 snd_soc_write(codec, DA7210_DAI_CFG1, dai_cfg1);
439 snd_soc_write(codec, DA7210_DAI_CFG3, dai_cfg3);
98615454
KM
440
441 return 0;
442}
443
0f8ea586
AC
444#define DA7210_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
445 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
98615454
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446
447/* DAI operations */
448static struct snd_soc_dai_ops da7210_dai_ops = {
449 .startup = da7210_startup,
450 .hw_params = da7210_hw_params,
451 .set_fmt = da7210_set_dai_fmt,
452};
453
f0fba2ad
LG
454static struct snd_soc_dai_driver da7210_dai = {
455 .name = "da7210-hifi",
98615454
KM
456 /* playback capabilities */
457 .playback = {
458 .stream_name = "Playback",
459 .channels_min = 1,
460 .channels_max = 2,
461 .rates = SNDRV_PCM_RATE_8000_96000,
462 .formats = DA7210_FORMATS,
463 },
464 /* capture capabilities */
465 .capture = {
466 .stream_name = "Capture",
467 .channels_min = 1,
468 .channels_max = 2,
469 .rates = SNDRV_PCM_RATE_8000_96000,
470 .formats = DA7210_FORMATS,
471 },
472 .ops = &da7210_dai_ops,
960b3b4b 473 .symmetric_rates = 1,
98615454 474};
98615454 475
f0fba2ad 476static int da7210_probe(struct snd_soc_codec *codec)
98615454 477{
f0fba2ad 478 struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec);
40a49710 479 int ret;
98615454 480
f0fba2ad 481 dev_info(codec->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
98615454 482
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AL
483 ret = snd_soc_codec_set_cache_io(codec, 8, 8, da7210->control_type);
484 if (ret < 0) {
485 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
486 return ret;
487 }
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488
489 /* FIXME
490 *
491 * This driver use fixed value here
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492 * And below settings expects MCLK = 12.288MHz
493 *
494 * When you select different MCLK, please check...
495 * DA7210_PLL_DIV1 val
496 * DA7210_PLL_DIV2 val
497 * DA7210_PLL_DIV3 val
498 * DA7210_PLL_DIV3 :: DA7210_MCLK_RANGExxx
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499 */
500
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501 /*
502 * make sure that DA7210 use bypass mode before start up
98615454 503 */
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504 snd_soc_write(codec, DA7210_STARTUP1, 0);
505 snd_soc_write(codec, DA7210_PLL_DIV3,
960b3b4b 506 DA7210_MCLK_RANGE_10_20_MHZ | DA7210_PLL_BYP);
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507
508 /*
509 * ADC settings
510 */
511
512 /* Enable Left & Right MIC PGA and Mic Bias */
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513 snd_soc_write(codec, DA7210_MIC_L, DA7210_MIC_L_EN | DA7210_MICBIAS_EN);
514 snd_soc_write(codec, DA7210_MIC_R, DA7210_MIC_R_EN);
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515
516 /* Enable Left and Right input PGA */
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517 snd_soc_write(codec, DA7210_INMIX_L, DA7210_IN_L_EN);
518 snd_soc_write(codec, DA7210_INMIX_R, DA7210_IN_R_EN);
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519
520 /* Enable Left and Right ADC */
40a49710 521 snd_soc_write(codec, DA7210_ADC, DA7210_ADC_L_EN | DA7210_ADC_R_EN);
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522
523 /*
524 * DAC settings
525 */
526
527 /* Enable Left and Right DAC */
40a49710 528 snd_soc_write(codec, DA7210_DAC_SEL,
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529 DA7210_DAC_L_SRC_DAI_L | DA7210_DAC_L_EN |
530 DA7210_DAC_R_SRC_DAI_R | DA7210_DAC_R_EN);
531
532 /* Enable Left and Right out PGA */
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533 snd_soc_write(codec, DA7210_OUTMIX_L, DA7210_OUT_L_EN);
534 snd_soc_write(codec, DA7210_OUTMIX_R, DA7210_OUT_R_EN);
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535
536 /* Enable Left and Right HeadPhone PGA */
40a49710 537 snd_soc_write(codec, DA7210_HP_CFG,
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538 DA7210_HP_2CAP_MODE | DA7210_HP_SENSE_EN |
539 DA7210_HP_L_EN | DA7210_HP_MODE | DA7210_HP_R_EN);
540
541 /* Diable PLL and bypass it */
40a49710 542 snd_soc_write(codec, DA7210_PLL, DA7210_PLL_FS_48000);
98615454 543
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544 /*
545 * If 48kHz sound came, it use bypass mode,
546 * and when it is 44.1kHz, it use PLL.
547 *
548 * This time, this driver sets PLL always ON
549 * and controls bypass/PLL mode by switching
550 * DA7210_PLL_DIV3 :: DA7210_PLL_BYP bit.
551 * see da7210_hw_params
552 */
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553 snd_soc_write(codec, DA7210_PLL_DIV1, 0xE5); /* MCLK = 12.288MHz */
554 snd_soc_write(codec, DA7210_PLL_DIV2, 0x99);
555 snd_soc_write(codec, DA7210_PLL_DIV3, 0x0A |
98615454 556 DA7210_MCLK_RANGE_10_20_MHZ | DA7210_PLL_BYP);
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557 snd_soc_update_bits(codec, DA7210_PLL, DA7210_PLL_EN, DA7210_PLL_EN);
558
559 /* As suggested by Dialog */
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560 snd_soc_write(codec, DA7210_A_HID_UNLOCK, 0x8B); /* unlock */
561 snd_soc_write(codec, DA7210_A_TEST_UNLOCK, 0xB4);
562 snd_soc_write(codec, DA7210_A_PLL1, 0x01);
563 snd_soc_write(codec, DA7210_A_CP_MODE, 0x7C);
564 snd_soc_write(codec, DA7210_A_HID_UNLOCK, 0x00); /* re-lock */
565 snd_soc_write(codec, DA7210_A_TEST_UNLOCK, 0x00);
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566
567 /* Activate all enabled subsystem */
40a49710 568 snd_soc_write(codec, DA7210_STARTUP1, DA7210_SC_MST_EN);
98615454 569
f0fba2ad 570 dev_info(codec->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
98615454 571
f0fba2ad 572 return 0;
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573}
574
f0fba2ad 575static struct snd_soc_codec_driver soc_codec_dev_da7210 = {
4c62ed9b 576 .probe = da7210_probe,
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577 .reg_cache_size = ARRAY_SIZE(da7210_reg),
578 .reg_word_size = sizeof(u8),
f0fba2ad 579 .reg_cache_default = da7210_reg,
40a49710 580 .volatile_register = da7210_volatile_register,
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581
582 .controls = da7210_snd_controls,
583 .num_controls = ARRAY_SIZE(da7210_snd_controls),
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584};
585
98615454 586#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
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587static int __devinit da7210_i2c_probe(struct i2c_client *i2c,
588 const struct i2c_device_id *id)
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589{
590 struct da7210_priv *da7210;
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591 int ret;
592
593 da7210 = kzalloc(sizeof(struct da7210_priv), GFP_KERNEL);
594 if (!da7210)
595 return -ENOMEM;
596
98615454 597 i2c_set_clientdata(i2c, da7210);
f0fba2ad 598 da7210->control_type = SND_SOC_I2C;
98615454 599
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600 ret = snd_soc_register_codec(&i2c->dev,
601 &soc_codec_dev_da7210, &da7210_dai, 1);
602 if (ret < 0)
085efd28 603 kfree(da7210);
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604
605 return ret;
606}
607
735fe4cf 608static int __devexit da7210_i2c_remove(struct i2c_client *client)
98615454 609{
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610 snd_soc_unregister_codec(&client->dev);
611 kfree(i2c_get_clientdata(client));
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612 return 0;
613}
614
615static const struct i2c_device_id da7210_i2c_id[] = {
616 { "da7210", 0 },
617 { }
618};
619MODULE_DEVICE_TABLE(i2c, da7210_i2c_id);
620
621/* I2C codec control layer */
622static struct i2c_driver da7210_i2c_driver = {
623 .driver = {
f0fba2ad 624 .name = "da7210-codec",
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625 .owner = THIS_MODULE,
626 },
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627 .probe = da7210_i2c_probe,
628 .remove = __devexit_p(da7210_i2c_remove),
629 .id_table = da7210_i2c_id,
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630};
631#endif
632
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633static int __init da7210_modinit(void)
634{
635 int ret = 0;
636#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
637 ret = i2c_add_driver(&da7210_i2c_driver);
638#endif
639 return ret;
640}
641module_init(da7210_modinit);
642
643static void __exit da7210_exit(void)
644{
645#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
646 i2c_del_driver(&da7210_i2c_driver);
647#endif
648}
649module_exit(da7210_exit);
650
651MODULE_DESCRIPTION("ASoC DA7210 driver");
652MODULE_AUTHOR("David Chen, Kuninori Morimoto");
653MODULE_LICENSE("GPL");