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Merge remote-tracking branch 'asoc/topic/rt5640' into asoc-dapm
[mirror_ubuntu-artful-kernel.git] / sound / soc / codecs / rt5640.c
CommitLineData
997b0520
BL		 1/*
2 * rt5640.c -- RT5640 ALSA SoC audio codec driver
3 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
dcad9f03 21#include <linux/of_gpio.h>
997b0520
BL		 22#include <linux/platform_device.h>
23#include <linux/spi/spi.h>
24#include <sound/core.h>
25#include <sound/pcm.h>
26#include <sound/pcm_params.h>
27#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/initval.h>
30#include <sound/tlv.h>
31
32#include "rt5640.h"
33
34#define RT5640_DEVICE_ID 0x6231
35
36#define RT5640_PR_RANGE_BASE (0xff + 1)
37#define RT5640_PR_SPACING 0x100
38
39#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
40
41static const struct regmap_range_cfg rt5640_ranges[] = {
42 { .name = "PR", .range_min = RT5640_PR_BASE,
43 .range_max = RT5640_PR_BASE + 0xb4,
44 .selector_reg = RT5640_PRIV_INDEX,
45 .selector_mask = 0xff,
46 .selector_shift = 0x0,
47 .window_start = RT5640_PRIV_DATA,
48 .window_len = 0x1, },
49};
50
51static struct reg_default init_list[] = {
52 {RT5640_PR_BASE + 0x3d, 0x3600},
53 {RT5640_PR_BASE + 0x1c, 0x0D21},
54 {RT5640_PR_BASE + 0x1b, 0x0000},
55 {RT5640_PR_BASE + 0x12, 0x0aa8},
56 {RT5640_PR_BASE + 0x14, 0x0aaa},
57 {RT5640_PR_BASE + 0x20, 0x6110},
58 {RT5640_PR_BASE + 0x21, 0xe0e0},
59 {RT5640_PR_BASE + 0x23, 0x1804},
60};
61#define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
62
63static const struct reg_default rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
64 { 0x00, 0x000e },
65 { 0x01, 0xc8c8 },
66 { 0x02, 0xc8c8 },
67 { 0x03, 0xc8c8 },
68 { 0x04, 0x8000 },
69 { 0x0d, 0x0000 },
70 { 0x0e, 0x0000 },
71 { 0x0f, 0x0808 },
72 { 0x19, 0xafaf },
73 { 0x1a, 0xafaf },
74 { 0x1b, 0x0000 },
75 { 0x1c, 0x2f2f },
76 { 0x1d, 0x2f2f },
77 { 0x1e, 0x0000 },
78 { 0x27, 0x7060 },
79 { 0x28, 0x7070 },
80 { 0x29, 0x8080 },
81 { 0x2a, 0x5454 },
82 { 0x2b, 0x5454 },
83 { 0x2c, 0xaa00 },
84 { 0x2d, 0x0000 },
85 { 0x2e, 0xa000 },
86 { 0x2f, 0x0000 },
87 { 0x3b, 0x0000 },
88 { 0x3c, 0x007f },
89 { 0x3d, 0x0000 },
90 { 0x3e, 0x007f },
91 { 0x45, 0xe000 },
92 { 0x46, 0x003e },
93 { 0x47, 0x003e },
94 { 0x48, 0xf800 },
95 { 0x49, 0x3800 },
96 { 0x4a, 0x0004 },
97 { 0x4c, 0xfc00 },
98 { 0x4d, 0x0000 },
99 { 0x4f, 0x01ff },
100 { 0x50, 0x0000 },
101 { 0x51, 0x0000 },
102 { 0x52, 0x01ff },
103 { 0x53, 0xf000 },
104 { 0x61, 0x0000 },
105 { 0x62, 0x0000 },
106 { 0x63, 0x00c0 },
107 { 0x64, 0x0000 },
108 { 0x65, 0x0000 },
109 { 0x66, 0x0000 },
110 { 0x6a, 0x0000 },
111 { 0x6c, 0x0000 },
112 { 0x70, 0x8000 },
113 { 0x71, 0x8000 },
114 { 0x72, 0x8000 },
115 { 0x73, 0x1114 },
116 { 0x74, 0x0c00 },
117 { 0x75, 0x1d00 },
118 { 0x80, 0x0000 },
119 { 0x81, 0x0000 },
120 { 0x82, 0x0000 },
121 { 0x83, 0x0000 },
122 { 0x84, 0x0000 },
123 { 0x85, 0x0008 },
124 { 0x89, 0x0000 },
125 { 0x8a, 0x0000 },
126 { 0x8b, 0x0600 },
127 { 0x8c, 0x0228 },
128 { 0x8d, 0xa000 },
129 { 0x8e, 0x0004 },
130 { 0x8f, 0x1100 },
131 { 0x90, 0x0646 },
132 { 0x91, 0x0c00 },
133 { 0x92, 0x0000 },
134 { 0x93, 0x3000 },
135 { 0xb0, 0x2080 },
136 { 0xb1, 0x0000 },
137 { 0xb4, 0x2206 },
138 { 0xb5, 0x1f00 },
139 { 0xb6, 0x0000 },
140 { 0xb8, 0x034b },
141 { 0xb9, 0x0066 },
142 { 0xba, 0x000b },
143 { 0xbb, 0x0000 },
144 { 0xbc, 0x0000 },
145 { 0xbd, 0x0000 },
146 { 0xbe, 0x0000 },
147 { 0xbf, 0x0000 },
148 { 0xc0, 0x0400 },
149 { 0xc2, 0x0000 },
150 { 0xc4, 0x0000 },
151 { 0xc5, 0x0000 },
152 { 0xc6, 0x2000 },
153 { 0xc8, 0x0000 },
154 { 0xc9, 0x0000 },
155 { 0xca, 0x0000 },
156 { 0xcb, 0x0000 },
157 { 0xcc, 0x0000 },
158 { 0xcf, 0x0013 },
159 { 0xd0, 0x0680 },
160 { 0xd1, 0x1c17 },
161 { 0xd2, 0x8c00 },
162 { 0xd3, 0xaa20 },
163 { 0xd6, 0x0400 },
164 { 0xd9, 0x0809 },
165 { 0xfe, 0x10ec },
166 { 0xff, 0x6231 },
167};
168
169static int rt5640_reset(struct snd_soc_codec *codec)
170{
171 return snd_soc_write(codec, RT5640_RESET, 0);
172}
173
174static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
175{
176 int i;
177
178 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
179 if ((reg >= rt5640_ranges[i].window_start &&
180 reg <= rt5640_ranges[i].window_start +
181 rt5640_ranges[i].window_len) ||
182 (reg >= rt5640_ranges[i].range_min &&
183 reg <= rt5640_ranges[i].range_max))
184 return true;
185
186 switch (reg) {
187 case RT5640_RESET:
188 case RT5640_ASRC_5:
189 case RT5640_EQ_CTRL1:
190 case RT5640_DRC_AGC_1:
191 case RT5640_ANC_CTRL1:
192 case RT5640_IRQ_CTRL2:
193 case RT5640_INT_IRQ_ST:
194 case RT5640_DSP_CTRL2:
195 case RT5640_DSP_CTRL3:
196 case RT5640_PRIV_INDEX:
197 case RT5640_PRIV_DATA:
198 case RT5640_PGM_REG_ARR1:
199 case RT5640_PGM_REG_ARR3:
200 case RT5640_VENDOR_ID:
201 case RT5640_VENDOR_ID1:
202 case RT5640_VENDOR_ID2:
203 return true;
204 default:
205 return false;
206 }
207}
208
209static bool rt5640_readable_register(struct device *dev, unsigned int reg)
210{
211 int i;
212
213 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
214 if ((reg >= rt5640_ranges[i].window_start &&
215 reg <= rt5640_ranges[i].window_start +
216 rt5640_ranges[i].window_len) ||
217 (reg >= rt5640_ranges[i].range_min &&
218 reg <= rt5640_ranges[i].range_max))
219 return true;
220
221 switch (reg) {
222 case RT5640_RESET:
223 case RT5640_SPK_VOL:
224 case RT5640_HP_VOL:
225 case RT5640_OUTPUT:
226 case RT5640_MONO_OUT:
227 case RT5640_IN1_IN2:
228 case RT5640_IN3_IN4:
229 case RT5640_INL_INR_VOL:
230 case RT5640_DAC1_DIG_VOL:
231 case RT5640_DAC2_DIG_VOL:
232 case RT5640_DAC2_CTRL:
233 case RT5640_ADC_DIG_VOL:
234 case RT5640_ADC_DATA:
235 case RT5640_ADC_BST_VOL:
236 case RT5640_STO_ADC_MIXER:
237 case RT5640_MONO_ADC_MIXER:
238 case RT5640_AD_DA_MIXER:
239 case RT5640_STO_DAC_MIXER:
240 case RT5640_MONO_DAC_MIXER:
241 case RT5640_DIG_MIXER:
242 case RT5640_DSP_PATH1:
243 case RT5640_DSP_PATH2:
244 case RT5640_DIG_INF_DATA:
245 case RT5640_REC_L1_MIXER:
246 case RT5640_REC_L2_MIXER:
247 case RT5640_REC_R1_MIXER:
248 case RT5640_REC_R2_MIXER:
249 case RT5640_HPO_MIXER:
250 case RT5640_SPK_L_MIXER:
251 case RT5640_SPK_R_MIXER:
252 case RT5640_SPO_L_MIXER:
253 case RT5640_SPO_R_MIXER:
254 case RT5640_SPO_CLSD_RATIO:
255 case RT5640_MONO_MIXER:
256 case RT5640_OUT_L1_MIXER:
257 case RT5640_OUT_L2_MIXER:
258 case RT5640_OUT_L3_MIXER:
259 case RT5640_OUT_R1_MIXER:
260 case RT5640_OUT_R2_MIXER:
261 case RT5640_OUT_R3_MIXER:
262 case RT5640_LOUT_MIXER:
263 case RT5640_PWR_DIG1:
264 case RT5640_PWR_DIG2:
265 case RT5640_PWR_ANLG1:
266 case RT5640_PWR_ANLG2:
267 case RT5640_PWR_MIXER:
268 case RT5640_PWR_VOL:
269 case RT5640_PRIV_INDEX:
270 case RT5640_PRIV_DATA:
271 case RT5640_I2S1_SDP:
272 case RT5640_I2S2_SDP:
273 case RT5640_ADDA_CLK1:
274 case RT5640_ADDA_CLK2:
275 case RT5640_DMIC:
276 case RT5640_GLB_CLK:
277 case RT5640_PLL_CTRL1:
278 case RT5640_PLL_CTRL2:
279 case RT5640_ASRC_1:
280 case RT5640_ASRC_2:
281 case RT5640_ASRC_3:
282 case RT5640_ASRC_4:
283 case RT5640_ASRC_5:
284 case RT5640_HP_OVCD:
285 case RT5640_CLS_D_OVCD:
286 case RT5640_CLS_D_OUT:
287 case RT5640_DEPOP_M1:
288 case RT5640_DEPOP_M2:
289 case RT5640_DEPOP_M3:
290 case RT5640_CHARGE_PUMP:
291 case RT5640_PV_DET_SPK_G:
292 case RT5640_MICBIAS:
293 case RT5640_EQ_CTRL1:
294 case RT5640_EQ_CTRL2:
295 case RT5640_WIND_FILTER:
296 case RT5640_DRC_AGC_1:
297 case RT5640_DRC_AGC_2:
298 case RT5640_DRC_AGC_3:
299 case RT5640_SVOL_ZC:
300 case RT5640_ANC_CTRL1:
301 case RT5640_ANC_CTRL2:
302 case RT5640_ANC_CTRL3:
303 case RT5640_JD_CTRL:
304 case RT5640_ANC_JD:
305 case RT5640_IRQ_CTRL1:
306 case RT5640_IRQ_CTRL2:
307 case RT5640_INT_IRQ_ST:
308 case RT5640_GPIO_CTRL1:
309 case RT5640_GPIO_CTRL2:
310 case RT5640_GPIO_CTRL3:
311 case RT5640_DSP_CTRL1:
312 case RT5640_DSP_CTRL2:
313 case RT5640_DSP_CTRL3:
314 case RT5640_DSP_CTRL4:
315 case RT5640_PGM_REG_ARR1:
316 case RT5640_PGM_REG_ARR2:
317 case RT5640_PGM_REG_ARR3:
318 case RT5640_PGM_REG_ARR4:
319 case RT5640_PGM_REG_ARR5:
320 case RT5640_SCB_FUNC:
321 case RT5640_SCB_CTRL:
322 case RT5640_BASE_BACK:
323 case RT5640_MP3_PLUS1:
324 case RT5640_MP3_PLUS2:
325 case RT5640_3D_HP:
326 case RT5640_ADJ_HPF:
327 case RT5640_HP_CALIB_AMP_DET:
328 case RT5640_HP_CALIB2:
329 case RT5640_SV_ZCD1:
330 case RT5640_SV_ZCD2:
331 case RT5640_DUMMY1:
332 case RT5640_DUMMY2:
333 case RT5640_DUMMY3:
334 case RT5640_VENDOR_ID:
335 case RT5640_VENDOR_ID1:
336 case RT5640_VENDOR_ID2:
337 return true;
338 default:
339 return false;
340 }
341}
342
343static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
344static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
345static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
346static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
347static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
348
349/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
350static unsigned int bst_tlv[] = {
351 TLV_DB_RANGE_HEAD(7),
352 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
353 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
354 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
355 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
356 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
357 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
358 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
359};
360
361/* Interface data select */
362static const char * const rt5640_data_select[] = {
363 "Normal", "left copy to right", "right copy to left", "Swap"};
364
365static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
366 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
367
368static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
369 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
370
371static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
372 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
373
374static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
375 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
376
377/* Class D speaker gain ratio */
378static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
379 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
380
381static const SOC_ENUM_SINGLE_DECL(
382 rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
383 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
384
385static const struct snd_kcontrol_new rt5640_snd_controls[] = {
386 /* Speaker Output Volume */
387 SOC_DOUBLE("Speaker Playback Switch", RT5640_SPK_VOL,
388 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
389 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
390 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
391 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
392 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
393 /* Headphone Output Volume */
394 SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
395 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
396 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
397 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
398 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
399 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
400 /* OUTPUT Control */
401 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
402 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
403 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
404 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
405 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
406 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
407 /* MONO Output Control */
408 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
409 RT5640_L_MUTE_SFT, 1, 1),
410 /* DAC Digital Volume */
411 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
412 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
413 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
414 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
415 175, 0, dac_vol_tlv),
416 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
417 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
418 175, 0, dac_vol_tlv),
419 /* IN1/IN2 Control */
420 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
421 RT5640_BST_SFT1, 8, 0, bst_tlv),
422 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
423 RT5640_BST_SFT2, 8, 0, bst_tlv),
424 /* INL/INR Volume Control */
425 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
426 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
427 31, 1, in_vol_tlv),
428 /* ADC Digital Volume Control */
429 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
430 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
431 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
432 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
433 127, 0, adc_vol_tlv),
434 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
435 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
436 127, 0, adc_vol_tlv),
437 /* ADC Boost Volume Control */
438 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
439 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
440 3, 0, adc_bst_tlv),
441 /* Class D speaker gain ratio */
442 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
443
444 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
445 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
446 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
447 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
448};
449
450/**
451 * set_dmic_clk - Set parameter of dmic.
452 *
453 * @w: DAPM widget.
454 * @kcontrol: The kcontrol of this widget.
455 * @event: Event id.
456 *
457 * Choose dmic clock between 1MHz and 3MHz.
458 * It is better for clock to approximate 3MHz.
459 */
460static int set_dmic_clk(struct snd_soc_dapm_widget *w,
461 struct snd_kcontrol *kcontrol, int event)
462{
463 struct snd_soc_codec *codec = w->codec;
464 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
465 int div[] = {2, 3, 4, 6, 8, 12};
466 int idx = -EINVAL, i;
467 int rate, red, bound, temp;
468
469 rate = rt5640->sysclk;
470 red = 3000000 * 12;
471 for (i = 0; i < ARRAY_SIZE(div); i++) {
472 bound = div[i] * 3000000;
473 if (rate > bound)
474 continue;
475 temp = bound - rate;
476 if (temp < red) {
477 red = temp;
478 idx = i;
479 }
480 }
481 if (idx < 0)
482 dev_err(codec->dev, "Failed to set DMIC clock\n");
483 else
484 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
485 idx << RT5640_DMIC_CLK_SFT);
486 return idx;
487}
488
489static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
490 struct snd_soc_dapm_widget *sink)
491{
492 unsigned int val;
493
494 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
495 val &= RT5640_SCLK_SRC_MASK;
496 if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
497 return 1;
498 else
499 return 0;
500}
501
502/* Digital Mixer */
503static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
504 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
505 RT5640_M_ADC_L1_SFT, 1, 1),
506 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
507 RT5640_M_ADC_L2_SFT, 1, 1),
508};
509
510static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
511 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
512 RT5640_M_ADC_R1_SFT, 1, 1),
513 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
514 RT5640_M_ADC_R2_SFT, 1, 1),
515};
516
517static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
518 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
519 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
520 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
521 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
522};
523
524static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
525 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
526 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
527 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
528 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
529};
530
531static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
532 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
533 RT5640_M_ADCMIX_L_SFT, 1, 1),
534 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
535 RT5640_M_IF1_DAC_L_SFT, 1, 1),
536};
537
538static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
539 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
540 RT5640_M_ADCMIX_R_SFT, 1, 1),
541 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
542 RT5640_M_IF1_DAC_R_SFT, 1, 1),
543};
544
545static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
546 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
547 RT5640_M_DAC_L1_SFT, 1, 1),
548 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
549 RT5640_M_DAC_L2_SFT, 1, 1),
550 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
551 RT5640_M_ANC_DAC_L_SFT, 1, 1),
552};
553
554static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
555 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
556 RT5640_M_DAC_R1_SFT, 1, 1),
557 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
558 RT5640_M_DAC_R2_SFT, 1, 1),
559 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
560 RT5640_M_ANC_DAC_R_SFT, 1, 1),
561};
562
563static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
564 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
565 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
566 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
567 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
568 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
569 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
570};
571
572static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
573 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
574 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
575 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
576 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
577 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
578 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
579};
580
581static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
582 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
583 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
584 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
585 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
586};
587
588static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
589 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
590 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
591 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
592 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
593};
594
595/* Analog Input Mixer */
596static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
597 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
598 RT5640_M_HP_L_RM_L_SFT, 1, 1),
599 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
600 RT5640_M_IN_L_RM_L_SFT, 1, 1),
601 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
602 RT5640_M_BST4_RM_L_SFT, 1, 1),
603 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
604 RT5640_M_BST1_RM_L_SFT, 1, 1),
605 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
606 RT5640_M_OM_L_RM_L_SFT, 1, 1),
607};
608
609static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
610 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
611 RT5640_M_HP_R_RM_R_SFT, 1, 1),
612 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
613 RT5640_M_IN_R_RM_R_SFT, 1, 1),
614 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
615 RT5640_M_BST4_RM_R_SFT, 1, 1),
616 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
617 RT5640_M_BST1_RM_R_SFT, 1, 1),
618 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
619 RT5640_M_OM_R_RM_R_SFT, 1, 1),
620};
621
622/* Analog Output Mixer */
623static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
624 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
625 RT5640_M_RM_L_SM_L_SFT, 1, 1),
626 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
627 RT5640_M_IN_L_SM_L_SFT, 1, 1),
628 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
629 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
630 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
631 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
632 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
633 RT5640_M_OM_L_SM_L_SFT, 1, 1),
634};
635
636static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
637 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
638 RT5640_M_RM_R_SM_R_SFT, 1, 1),
639 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
640 RT5640_M_IN_R_SM_R_SFT, 1, 1),
641 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
642 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
643 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
644 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
645 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
646 RT5640_M_OM_R_SM_R_SFT, 1, 1),
647};
648
649static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
650 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
651 RT5640_M_SM_L_OM_L_SFT, 1, 1),
652 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
653 RT5640_M_BST1_OM_L_SFT, 1, 1),
654 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
655 RT5640_M_IN_L_OM_L_SFT, 1, 1),
656 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
657 RT5640_M_RM_L_OM_L_SFT, 1, 1),
658 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
659 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
660 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
661 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
662 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
663 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
664};
665
666static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
667 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
668 RT5640_M_SM_L_OM_R_SFT, 1, 1),
669 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
670 RT5640_M_BST4_OM_R_SFT, 1, 1),
671 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
672 RT5640_M_BST1_OM_R_SFT, 1, 1),
673 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
674 RT5640_M_IN_R_OM_R_SFT, 1, 1),
675 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
676 RT5640_M_RM_R_OM_R_SFT, 1, 1),
677 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
678 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
679 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
680 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
681 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
682 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
683};
684
685static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
686 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
687 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
688 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
689 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
690 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
691 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
692 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
693 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
694 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
695 RT5640_M_BST1_SPM_L_SFT, 1, 1),
696};
697
698static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
699 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
700 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
701 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
702 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
703 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
704 RT5640_M_BST1_SPM_R_SFT, 1, 1),
705};
706
707static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
708 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
709 RT5640_M_DAC2_HM_SFT, 1, 1),
710 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
711 RT5640_M_DAC1_HM_SFT, 1, 1),
712 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
713 RT5640_M_HPVOL_HM_SFT, 1, 1),
714};
715
716static const struct snd_kcontrol_new rt5640_lout_mix[] = {
717 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
718 RT5640_M_DAC_L1_LM_SFT, 1, 1),
719 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
720 RT5640_M_DAC_R1_LM_SFT, 1, 1),
721 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
722 RT5640_M_OV_L_LM_SFT, 1, 1),
723 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
724 RT5640_M_OV_R_LM_SFT, 1, 1),
725};
726
727static const struct snd_kcontrol_new rt5640_mono_mix[] = {
728 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
729 RT5640_M_DAC_R2_MM_SFT, 1, 1),
730 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
731 RT5640_M_DAC_L2_MM_SFT, 1, 1),
732 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
733 RT5640_M_OV_R_MM_SFT, 1, 1),
734 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
735 RT5640_M_OV_L_MM_SFT, 1, 1),
736 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
737 RT5640_M_BST1_MM_SFT, 1, 1),
738};
739
997b0520
BL		 740/* Stereo ADC source */
741static const char * const rt5640_stereo_adc1_src[] = {
742 "DIG MIX", "ADC"
743};
744
745static const SOC_ENUM_SINGLE_DECL(
746 rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
747 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
748
749static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
750 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
751
752static const char * const rt5640_stereo_adc2_src[] = {
753 "DMIC1", "DMIC2", "DIG MIX"
754};
755
756static const SOC_ENUM_SINGLE_DECL(
757 rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
758 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
759
760static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
761 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
762
763/* Mono ADC source */
764static const char * const rt5640_mono_adc_l1_src[] = {
765 "Mono DAC MIXL", "ADCL"
766};
767
768static const SOC_ENUM_SINGLE_DECL(
769 rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
770 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
771
772static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
773 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
774
775static const char * const rt5640_mono_adc_l2_src[] = {
776 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
777};
778
779static const SOC_ENUM_SINGLE_DECL(
780 rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
781 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
782
783static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
784 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
785
786static const char * const rt5640_mono_adc_r1_src[] = {
787 "Mono DAC MIXR", "ADCR"
788};
789
790static const SOC_ENUM_SINGLE_DECL(
791 rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
792 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
793
794static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
795 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
796
797static const char * const rt5640_mono_adc_r2_src[] = {
798 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
799};
800
801static const SOC_ENUM_SINGLE_DECL(
802 rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
803 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
804
805static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
806 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
807
808/* DAC2 channel source */
809static const char * const rt5640_dac_l2_src[] = {
810 "IF2", "Base L/R"
811};
812
813static int rt5640_dac_l2_values[] = {
814 0,
815 3,
816};
817
818static const SOC_VALUE_ENUM_SINGLE_DECL(
819 rt5640_dac_l2_enum, RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
820 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
821
822static const struct snd_kcontrol_new rt5640_dac_l2_mux =
823 SOC_DAPM_VALUE_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
824
825static const char * const rt5640_dac_r2_src[] = {
826 "IF2",
827};
828
829static int rt5640_dac_r2_values[] = {
830 0,
831};
832
833static const SOC_VALUE_ENUM_SINGLE_DECL(
834 rt5640_dac_r2_enum, RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
835 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
836
837static const struct snd_kcontrol_new rt5640_dac_r2_mux =
838 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
839
840/* digital interface and iis interface map */
841static const char * const rt5640_dai_iis_map[] = {
842 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
843};
844
845static int rt5640_dai_iis_map_values[] = {
846 0,
847 5,
848 6,
849 7,
850};
851
852static const SOC_VALUE_ENUM_SINGLE_DECL(
853 rt5640_dai_iis_map_enum, RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
854 0x7, rt5640_dai_iis_map, rt5640_dai_iis_map_values);
855
856static const struct snd_kcontrol_new rt5640_dai_mux =
857 SOC_DAPM_VALUE_ENUM("DAI select", rt5640_dai_iis_map_enum);
858
859/* SDI select */
860static const char * const rt5640_sdi_sel[] = {
861 "IF1", "IF2"
862};
863
864static const SOC_ENUM_SINGLE_DECL(
865 rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
866 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
867
868static const struct snd_kcontrol_new rt5640_sdi_mux =
869 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
870
871static int spk_event(struct snd_soc_dapm_widget *w,
872 struct snd_kcontrol *kcontrol, int event)
873{
874 struct snd_soc_codec *codec = w->codec;
875 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
876
877 switch (event) {
878 case SND_SOC_DAPM_POST_PMU:
879 regmap_update_bits(rt5640->regmap, RT5640_PWR_DIG1,
880 0x0001, 0x0001);
881 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE + 0x1c,
882 0xf000, 0xf000);
883 break;
884
885 case SND_SOC_DAPM_PRE_PMD:
886 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE + 0x1c,
887 0xf000, 0x0000);
888 regmap_update_bits(rt5640->regmap, RT5640_PWR_DIG1,
889 0x0001, 0x0000);
890 break;
891
892 default:
893 return 0;
894 }
895 return 0;
896}
897
898static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
899 struct snd_kcontrol *kcontrol, int event)
900{
901 struct snd_soc_codec *codec = w->codec;
902
903 switch (event) {
904 case SND_SOC_DAPM_PRE_PMU:
905 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
906 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
907 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
908 snd_soc_update_bits(codec, RT5640_DMIC,
909 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
910 RT5640_DMIC_1_DP_MASK,
911 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
912 RT5640_DMIC_1_DP_IN1P);
913 break;
914
915 default:
916 return 0;
917 }
918
919 return 0;
920}
921
922static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
923 struct snd_kcontrol *kcontrol, int event)
924{
925 struct snd_soc_codec *codec = w->codec;
926
927 switch (event) {
928 case SND_SOC_DAPM_PRE_PMU:
929 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
930 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
931 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
932 snd_soc_update_bits(codec, RT5640_DMIC,
933 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
934 RT5640_DMIC_2_DP_MASK,
935 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
936 RT5640_DMIC_2_DP_IN1N);
937 break;
938
939 default:
940 return 0;
941 }
942
943 return 0;
944}
945
946static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
947 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
948 RT5640_PWR_PLL_BIT, 0, NULL, 0),
949 /* Input Side */
950 /* micbias */
951 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
952 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
953 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
9be94aea 954 RT5640_PWR_MB1_BIT, 0, NULL, 0),
997b0520
BL		 955 /* Input Lines */
956 SND_SOC_DAPM_INPUT("DMIC1"),
957 SND_SOC_DAPM_INPUT("DMIC2"),
958 SND_SOC_DAPM_INPUT("IN1P"),
959 SND_SOC_DAPM_INPUT("IN1N"),
960 SND_SOC_DAPM_INPUT("IN2P"),
961 SND_SOC_DAPM_INPUT("IN2N"),
962 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
963 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
964 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
965 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
966
967 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
968 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
969 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC,
970 RT5640_DMIC_1_EN_SFT, 0, rt5640_set_dmic1_event,
971 SND_SOC_DAPM_PRE_PMU),
972 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC,
973 RT5640_DMIC_2_EN_SFT, 0, rt5640_set_dmic2_event,
974 SND_SOC_DAPM_PRE_PMU),
975 /* Boost */
976 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
977 RT5640_PWR_BST1_BIT, 0, NULL, 0),
978 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
979 RT5640_PWR_BST4_BIT, 0, NULL, 0),
980 /* Input Volume */
981 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
982 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
983 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
984 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
997b0520
BL		 985 /* REC Mixer */
986 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
987 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
988 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
989 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
990 /* ADCs */
991 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
992 RT5640_PWR_ADC_L_BIT, 0),
993 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
994 RT5640_PWR_ADC_R_BIT, 0),
995 /* ADC Mux */
996 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
997 &rt5640_sto_adc_2_mux),
998 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
999 &rt5640_sto_adc_2_mux),
1000 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1001 &rt5640_sto_adc_1_mux),
1002 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1003 &rt5640_sto_adc_1_mux),
1004 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1005 &rt5640_mono_adc_l2_mux),
1006 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1007 &rt5640_mono_adc_l1_mux),
1008 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1009 &rt5640_mono_adc_r1_mux),
1010 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1011 &rt5640_mono_adc_r2_mux),
1012 /* ADC Mixer */
1013 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1014 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1015 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1016 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1017 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1018 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1019 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1020 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1021 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1022 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1023 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1024 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1025 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1026 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1027
1028 /* Digital Interface */
1029 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1030 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1031 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1032 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1033 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1034 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1035 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1036 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1037 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1038 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1039 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1040 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1041 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1042 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1043 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1044 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1045 /* Digital Interface Select */
1046 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1047 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1048 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1049 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1050 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1051 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1052 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1053 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1054 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1055 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1056 /* Audio Interface */
1057 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1058 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1059 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1060 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1061 /* Audio DSP */
1062 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1063 /* ANC */
1064 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1065 /* Output Side */
1066 /* DAC mixer before sound effect */
1067 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1068 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1069 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1070 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1071 /* DAC2 channel Mux */
1072 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1073 &rt5640_dac_l2_mux),
1074 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1075 &rt5640_dac_r2_mux),
1076 /* DAC Mixer */
1077 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1078 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1079 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1080 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1081 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1082 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1083 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1084 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1085 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1086 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1087 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1088 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1089 /* DACs */
1090 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1091 RT5640_PWR_DAC_L1_BIT, 0),
1092 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1093 RT5640_PWR_DAC_L2_BIT, 0),
1094 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1095 RT5640_PWR_DAC_R1_BIT, 0),
1096 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1097 RT5640_PWR_DAC_R2_BIT, 0),
1098 /* SPK/OUT Mixer */
1099 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1100 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1101 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1102 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1103 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1104 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1105 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1106 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1107 /* Ouput Volume */
1108 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1109 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1110 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1111 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1112 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1113 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1114 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1115 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1116 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1117 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1118 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1119 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1120 /* SPO/HPO/LOUT/Mono Mixer */
1121 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1122 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1123 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1124 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1125 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1126 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1127 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1128 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1129 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1130 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1131 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1132 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1133 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1134 RT5640_PWR_MA_BIT, 0, NULL, 0),
1135 SND_SOC_DAPM_SUPPLY("Improve HP Amp Drv", RT5640_PWR_ANLG1,
1136 SND_SOC_NOPM, 0, NULL, 0),
1137 SND_SOC_DAPM_PGA("HP L Amp", RT5640_PWR_ANLG1,
1138 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1139 SND_SOC_DAPM_PGA("HP R Amp", RT5640_PWR_ANLG1,
1140 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1141 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
1142 SND_SOC_NOPM, 0, spk_event,
1143 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1144 /* Output Lines */
1145 SND_SOC_DAPM_OUTPUT("SPOLP"),
1146 SND_SOC_DAPM_OUTPUT("SPOLN"),
1147 SND_SOC_DAPM_OUTPUT("SPORP"),
1148 SND_SOC_DAPM_OUTPUT("SPORN"),
1149 SND_SOC_DAPM_OUTPUT("HPOL"),
1150 SND_SOC_DAPM_OUTPUT("HPOR"),
1151 SND_SOC_DAPM_OUTPUT("LOUTL"),
1152 SND_SOC_DAPM_OUTPUT("LOUTR"),
1153 SND_SOC_DAPM_OUTPUT("MONOP"),
1154 SND_SOC_DAPM_OUTPUT("MONON"),
1155};
1156
1157static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1158 {"IN1P", NULL, "LDO2"},
1159 {"IN2P", NULL, "LDO2"},
1160
1161 {"DMIC L1", NULL, "DMIC1"},
1162 {"DMIC R1", NULL, "DMIC1"},
1163 {"DMIC L2", NULL, "DMIC2"},
1164 {"DMIC R2", NULL, "DMIC2"},
1165
1166 {"BST1", NULL, "IN1P"},
1167 {"BST1", NULL, "IN1N"},
1168 {"BST2", NULL, "IN2P"},
1169 {"BST2", NULL, "IN2N"},
1170
1171 {"INL VOL", NULL, "IN2P"},
1172 {"INR VOL", NULL, "IN2N"},
1173
1174 {"RECMIXL", "HPOL Switch", "HPOL"},
1175 {"RECMIXL", "INL Switch", "INL VOL"},
1176 {"RECMIXL", "BST2 Switch", "BST2"},
1177 {"RECMIXL", "BST1 Switch", "BST1"},
1178 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1179
1180 {"RECMIXR", "HPOR Switch", "HPOR"},
1181 {"RECMIXR", "INR Switch", "INR VOL"},
1182 {"RECMIXR", "BST2 Switch", "BST2"},
1183 {"RECMIXR", "BST1 Switch", "BST1"},
1184 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1185
1186 {"ADC L", NULL, "RECMIXL"},
1187 {"ADC R", NULL, "RECMIXR"},
1188
1189 {"DMIC L1", NULL, "DMIC CLK"},
1190 {"DMIC L1", NULL, "DMIC1 Power"},
1191 {"DMIC R1", NULL, "DMIC CLK"},
1192 {"DMIC R1", NULL, "DMIC1 Power"},
1193 {"DMIC L2", NULL, "DMIC CLK"},
1194 {"DMIC L2", NULL, "DMIC2 Power"},
1195 {"DMIC R2", NULL, "DMIC CLK"},
1196 {"DMIC R2", NULL, "DMIC2 Power"},
1197
1198 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1199 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1200 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1201 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1202 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1203
1204 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1205 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1206 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1207 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1208 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1209
1210 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1211 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1212 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1213 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1214 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1215
1216 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1217 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1218 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1219 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1220 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1221
1222 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1223 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1224 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
1225 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1226
1227 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1228 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1229 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
1230 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1231
1232 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1233 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1234 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
1235 {"Mono Left Filter", NULL, "PLL1", check_sysclk1_source},
1236
1237 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1238 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1239 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
1240 {"Mono Right Filter", NULL, "PLL1", check_sysclk1_source},
1241
1242 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1243 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1244 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1245 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1246
1247 {"IF1 ADC", NULL, "I2S1"},
1248 {"IF1 ADC", NULL, "IF1 ADC L"},
1249 {"IF1 ADC", NULL, "IF1 ADC R"},
1250 {"IF2 ADC", NULL, "I2S2"},
1251 {"IF2 ADC", NULL, "IF2 ADC L"},
1252 {"IF2 ADC", NULL, "IF2 ADC R"},
1253
1254 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1255 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1256 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1257 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1258 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1259 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1260
1261 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1262 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1263 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1264 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1265 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1266 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1267
1268 {"AIF1TX", NULL, "DAI1 TX Mux"},
1269 {"AIF1TX", NULL, "SDI1 TX Mux"},
1270 {"AIF2TX", NULL, "DAI2 TX Mux"},
1271 {"AIF2TX", NULL, "SDI2 TX Mux"},
1272
1273 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1274 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1275 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1276 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1277
1278 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1279 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1280 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1281 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1282
1283 {"IF1 DAC", NULL, "I2S1"},
1284 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1285 {"IF2 DAC", NULL, "I2S2"},
1286 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1287
1288 {"IF1 DAC L", NULL, "IF1 DAC"},
1289 {"IF1 DAC R", NULL, "IF1 DAC"},
1290 {"IF2 DAC L", NULL, "IF2 DAC"},
1291 {"IF2 DAC R", NULL, "IF2 DAC"},
1292
1293 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1294 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1295 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1296 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1297
1298 {"ANC", NULL, "Stereo ADC MIXL"},
1299 {"ANC", NULL, "Stereo ADC MIXR"},
1300
1301 {"Audio DSP", NULL, "DAC MIXL"},
1302 {"Audio DSP", NULL, "DAC MIXR"},
1303
1304 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1305 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1306
1307 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1308
1309 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1310 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1311 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1312 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1313 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1314 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1315
1316 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1317 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1318 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1319 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1320 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1321 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1322
1323 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1324 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1325 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1326 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1327
1328 {"DAC L1", NULL, "Stereo DAC MIXL"},
1329 {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1330 {"DAC R1", NULL, "Stereo DAC MIXR"},
1331 {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1332 {"DAC L2", NULL, "Mono DAC MIXL"},
1333 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1334 {"DAC R2", NULL, "Mono DAC MIXR"},
1335 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1336
1337 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1338 {"SPK MIXL", "INL Switch", "INL VOL"},
1339 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1340 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1341 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1342 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1343 {"SPK MIXR", "INR Switch", "INR VOL"},
1344 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1345 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1346 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1347
1348 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1349 {"OUT MIXL", "BST1 Switch", "BST1"},
1350 {"OUT MIXL", "INL Switch", "INL VOL"},
1351 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1352 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1353 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1354 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1355
1356 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1357 {"OUT MIXR", "BST2 Switch", "BST2"},
1358 {"OUT MIXR", "BST1 Switch", "BST1"},
1359 {"OUT MIXR", "INR Switch", "INR VOL"},
1360 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1361 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1362 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1363 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1364
1365 {"SPKVOL L", NULL, "SPK MIXL"},
1366 {"SPKVOL R", NULL, "SPK MIXR"},
1367 {"HPOVOL L", NULL, "OUT MIXL"},
1368 {"HPOVOL R", NULL, "OUT MIXR"},
1369 {"OUTVOL L", NULL, "OUT MIXL"},
1370 {"OUTVOL R", NULL, "OUT MIXR"},
1371
1372 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1373 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1374 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1375 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1376 {"SPOL MIX", "BST1 Switch", "BST1"},
1377 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1378 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1379 {"SPOR MIX", "BST1 Switch", "BST1"},
1380
1381 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1382 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1383 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
1384 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1385 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1386 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
1387
1388 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1389 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1390 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1391 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1392
1393 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1394 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1395 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1396 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1397 {"Mono MIX", "BST1 Switch", "BST1"},
1398
1399 {"HP L Amp", NULL, "HPO MIX L"},
1400 {"HP R Amp", NULL, "HPO MIX R"},
1401
1402 {"SPOLP", NULL, "SPOL MIX"},
1403 {"SPOLN", NULL, "SPOL MIX"},
1404 {"SPORP", NULL, "SPOR MIX"},
1405 {"SPORN", NULL, "SPOR MIX"},
1406
1407 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1408 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1409 {"SPORP", NULL, "Improve SPK Amp Drv"},
1410 {"SPORN", NULL, "Improve SPK Amp Drv"},
1411
1412 {"HPOL", NULL, "Improve HP Amp Drv"},
1413 {"HPOR", NULL, "Improve HP Amp Drv"},
1414
1415 {"HPOL", NULL, "HP L Amp"},
1416 {"HPOR", NULL, "HP R Amp"},
1417 {"LOUTL", NULL, "LOUT MIX"},
1418 {"LOUTR", NULL, "LOUT MIX"},
1419 {"MONOP", NULL, "Mono MIX"},
1420 {"MONON", NULL, "Mono MIX"},
1421 {"MONOP", NULL, "Improve MONO Amp Drv"},
1422};
1423
1424static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1425{
1426 int ret = 0, val;
1427
1428 if (codec == NULL)
1429 return -EINVAL;
1430
1431 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1432 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1433 switch (dai_id) {
1434 case RT5640_AIF1:
1435 switch (val) {
1436 case RT5640_IF_123:
1437 case RT5640_IF_132:
1438 ret |= RT5640_U_IF1;
1439 break;
1440 case RT5640_IF_113:
1441 ret |= RT5640_U_IF1;
1442 case RT5640_IF_312:
1443 case RT5640_IF_213:
1444 ret |= RT5640_U_IF2;
1445 break;
1446 }
1447 break;
1448
1449 case RT5640_AIF2:
1450 switch (val) {
1451 case RT5640_IF_231:
1452 case RT5640_IF_213:
1453 ret |= RT5640_U_IF1;
1454 break;
1455 case RT5640_IF_223:
1456 ret |= RT5640_U_IF1;
1457 case RT5640_IF_123:
1458 case RT5640_IF_321:
1459 ret |= RT5640_U_IF2;
1460 break;
1461 }
1462 break;
1463
1464 default:
1465 ret = -EINVAL;
1466 break;
1467 }
1468
1469 return ret;
1470}
1471
1472static int get_clk_info(int sclk, int rate)
1473{
1474 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1475
1476 if (sclk <= 0 || rate <= 0)
1477 return -EINVAL;
1478
1479 rate = rate << 8;
1480 for (i = 0; i < ARRAY_SIZE(pd); i++)
1481 if (sclk == rate * pd[i])
1482 return i;
1483
1484 return -EINVAL;
1485}
1486
1487static int rt5640_hw_params(struct snd_pcm_substream *substream,
1488 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1489{
1490 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1491 struct snd_soc_codec *codec = rtd->codec;
1492 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1493 unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1494 int pre_div, bclk_ms, frame_size;
1495
1496 rt5640->lrck[dai->id] = params_rate(params);
1497 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1498 if (pre_div < 0) {
1499 dev_err(codec->dev, "Unsupported clock setting\n");
1500 return -EINVAL;
1501 }
1502 frame_size = snd_soc_params_to_frame_size(params);
1503 if (frame_size < 0) {
1504 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1505 return frame_size;
1506 }
1507 if (frame_size > 32)
1508 bclk_ms = 1;
1509 else
1510 bclk_ms = 0;
1511 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1512
1513 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1514 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1515 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1516 bclk_ms, pre_div, dai->id);
1517
1518 switch (params_format(params)) {
1519 case SNDRV_PCM_FORMAT_S16_LE:
1520 break;
1521 case SNDRV_PCM_FORMAT_S20_3LE:
1522 val_len |= RT5640_I2S_DL_20;
1523 break;
1524 case SNDRV_PCM_FORMAT_S24_LE:
1525 val_len |= RT5640_I2S_DL_24;
1526 break;
1527 case SNDRV_PCM_FORMAT_S8:
1528 val_len |= RT5640_I2S_DL_8;
1529 break;
1530 default:
1531 return -EINVAL;
1532 }
1533
1534 dai_sel = get_sdp_info(codec, dai->id);
1535 if (dai_sel < 0) {
1536 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1537 return -EINVAL;
1538 }
1539 if (dai_sel & RT5640_U_IF1) {
1540 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1541 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1542 pre_div << RT5640_I2S_PD1_SFT;
1543 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1544 RT5640_I2S_DL_MASK, val_len);
1545 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1546 }
1547 if (dai_sel & RT5640_U_IF2) {
1548 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1549 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1550 pre_div << RT5640_I2S_PD2_SFT;
1551 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1552 RT5640_I2S_DL_MASK, val_len);
1553 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1554 }
1555
1556 return 0;
1557}
1558
1559static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1560{
1561 struct snd_soc_codec *codec = dai->codec;
1562 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1563 unsigned int reg_val = 0, dai_sel;
1564
1565 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1566 case SND_SOC_DAIFMT_CBM_CFM:
1567 rt5640->master[dai->id] = 1;
1568 break;
1569 case SND_SOC_DAIFMT_CBS_CFS:
1570 reg_val |= RT5640_I2S_MS_S;
1571 rt5640->master[dai->id] = 0;
1572 break;
1573 default:
1574 return -EINVAL;
1575 }
1576
1577 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1578 case SND_SOC_DAIFMT_NB_NF:
1579 break;
1580 case SND_SOC_DAIFMT_IB_NF:
1581 reg_val |= RT5640_I2S_BP_INV;
1582 break;
1583 default:
1584 return -EINVAL;
1585 }
1586
1587 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1588 case SND_SOC_DAIFMT_I2S:
1589 break;
1590 case SND_SOC_DAIFMT_LEFT_J:
1591 reg_val |= RT5640_I2S_DF_LEFT;
1592 break;
1593 case SND_SOC_DAIFMT_DSP_A:
1594 reg_val |= RT5640_I2S_DF_PCM_A;
1595 break;
1596 case SND_SOC_DAIFMT_DSP_B:
1597 reg_val |= RT5640_I2S_DF_PCM_B;
1598 break;
1599 default:
1600 return -EINVAL;
1601 }
1602
1603 dai_sel = get_sdp_info(codec, dai->id);
1604 if (dai_sel < 0) {
1605 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1606 return -EINVAL;
1607 }
1608 if (dai_sel & RT5640_U_IF1) {
1609 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1610 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1611 RT5640_I2S_DF_MASK, reg_val);
1612 }
1613 if (dai_sel & RT5640_U_IF2) {
1614 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1615 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1616 RT5640_I2S_DF_MASK, reg_val);
1617 }
1618
1619 return 0;
1620}
1621
1622static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1623 int clk_id, unsigned int freq, int dir)
1624{
1625 struct snd_soc_codec *codec = dai->codec;
1626 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1627 unsigned int reg_val = 0;
1628
1629 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1630 return 0;
1631
1632 switch (clk_id) {
1633 case RT5640_SCLK_S_MCLK:
1634 reg_val |= RT5640_SCLK_SRC_MCLK;
1635 break;
1636 case RT5640_SCLK_S_PLL1:
1637 reg_val |= RT5640_SCLK_SRC_PLL1;
1638 break;
1639 case RT5640_SCLK_S_PLL1_TK:
1640 reg_val |= RT5640_SCLK_SRC_PLL1T;
1641 break;
1642 case RT5640_SCLK_S_RCCLK:
1643 reg_val |= RT5640_SCLK_SRC_RCCLK;
1644 break;
1645 default:
1646 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1647 return -EINVAL;
1648 }
1649 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1650 RT5640_SCLK_SRC_MASK, reg_val);
1651 rt5640->sysclk = freq;
1652 rt5640->sysclk_src = clk_id;
1653
1654 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1655 return 0;
1656}
1657
1658/**
1659 * rt5640_pll_calc - Calculate PLL M/N/K code.
1660 * @freq_in: external clock provided to codec.
1661 * @freq_out: target clock which codec works on.
1662 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1663 *
1664 * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1665 * which make calculation more efficiently.
1666 *
1667 * Returns 0 for success or negative error code.
1668 */
1669static int rt5640_pll_calc(const unsigned int freq_in,
1670 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1671{
1672 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1673 int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1674 int red_t = abs(freq_out - freq_in);
1675 bool bypass = false;
1676
1677 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1678 return -EINVAL;
1679
1680 for (n_t = 0; n_t <= max_n; n_t++) {
1681 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1682 if (in_t < 0)
1683 continue;
1684 if (in_t == freq_out) {
1685 bypass = true;
1686 n = n_t;
1687 goto code_find;
1688 }
1689 for (m_t = 0; m_t <= max_m; m_t++) {
1690 out_t = in_t / (m_t + 2);
1691 red = abs(out_t - freq_out);
1692 if (red < red_t) {
1693 n = n_t;
1694 m = m_t;
1695 if (red == 0)
1696 goto code_find;
1697 red_t = red;
1698 }
1699 }
1700 }
1701 pr_debug("Only get approximation about PLL\n");
1702
1703code_find:
1704 pll_code->m_bp = bypass;
1705 pll_code->m_code = m;
1706 pll_code->n_code = n;
1707 pll_code->k_code = 2;
1708 return 0;
1709}
1710
1711static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1712 unsigned int freq_in, unsigned int freq_out)
1713{
1714 struct snd_soc_codec *codec = dai->codec;
1715 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1716 struct rt5640_pll_code *pll_code = &rt5640->pll_code;
1717 int ret, dai_sel;
1718
1719 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1720 freq_out == rt5640->pll_out)
1721 return 0;
1722
1723 if (!freq_in || !freq_out) {
1724 dev_dbg(codec->dev, "PLL disabled\n");
1725
1726 rt5640->pll_in = 0;
1727 rt5640->pll_out = 0;
1728 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1729 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1730 return 0;
1731 }
1732
1733 switch (source) {
1734 case RT5640_PLL1_S_MCLK:
1735 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1736 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1737 break;
1738 case RT5640_PLL1_S_BCLK1:
1739 case RT5640_PLL1_S_BCLK2:
1740 dai_sel = get_sdp_info(codec, dai->id);
1741 if (dai_sel < 0) {
1742 dev_err(codec->dev,
1743 "Failed to get sdp info: %d\n", dai_sel);
1744 return -EINVAL;
1745 }
1746 if (dai_sel & RT5640_U_IF1) {
1747 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1748 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1749 }
1750 if (dai_sel & RT5640_U_IF2) {
1751 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1752 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1753 }
1754 break;
1755 default:
1756 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1757 return -EINVAL;
1758 }
1759
1760 ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
1761 if (ret < 0) {
1762 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1763 return ret;
1764 }
1765
1766 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
1767 (pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
1768
1769 snd_soc_write(codec, RT5640_PLL_CTRL1,
1770 pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
1771 snd_soc_write(codec, RT5640_PLL_CTRL2,
1772 (pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
1773 pll_code->m_bp << RT5640_PLL_M_BP_SFT);
1774
1775 rt5640->pll_in = freq_in;
1776 rt5640->pll_out = freq_out;
1777 rt5640->pll_src = source;
1778
1779 return 0;
1780}
1781
1782static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1783 enum snd_soc_bias_level level)
1784{
1785 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1786 switch (level) {
1787 case SND_SOC_BIAS_STANDBY:
1788 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1789 regcache_cache_only(rt5640->regmap, false);
1790 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1791 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1792 RT5640_PWR_BG | RT5640_PWR_VREF2,
1793 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1794 RT5640_PWR_BG | RT5640_PWR_VREF2);
1795 mdelay(10);
1796 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1797 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1798 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1799 regcache_sync(rt5640->regmap);
1800 snd_soc_update_bits(codec, RT5640_DUMMY1,
1801 0x0301, 0x0301);
1802 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1803 0x001d, 0x0019);
1804 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1805 0x2000, 0x2000);
1806 snd_soc_update_bits(codec, RT5640_MICBIAS,
1807 0x0030, 0x0030);
1808 }
1809 break;
1810
1811 case SND_SOC_BIAS_OFF:
1812 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1813 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1814 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1815 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1816 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1817 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1818 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1819 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1820 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1821 break;
1822
1823 default:
1824 break;
1825 }
1826 codec->dapm.bias_level = level;
1827
1828 return 0;
1829}
1830
1831static int rt5640_probe(struct snd_soc_codec *codec)
1832{
1833 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1834 int ret;
1835
1836 rt5640->codec = codec;
1837 codec->control_data = rt5640->regmap;
1838
1839 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
1840 if (ret != 0) {
1841 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1842 return ret;
1843 }
1844
1845 codec->dapm.idle_bias_off = 1;
1846 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1847
1848 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
1849 snd_soc_update_bits(codec, RT5640_DEPOP_M1, 0x001d, 0x0019);
1850 snd_soc_update_bits(codec, RT5640_DEPOP_M2, 0x2000, 0x2000);
1851 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1852 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1853
1854 return 0;
1855}
1856
1857static int rt5640_remove(struct snd_soc_codec *codec)
1858{
1859 rt5640_reset(codec);
1860
1861 return 0;
1862}
1863
1864#ifdef CONFIG_PM
1865static int rt5640_suspend(struct snd_soc_codec *codec)
1866{
1867 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1868
1869 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1870 rt5640_reset(codec);
1871 regcache_cache_only(rt5640->regmap, true);
1872 regcache_mark_dirty(rt5640->regmap);
1873
1874 return 0;
1875}
1876
1877static int rt5640_resume(struct snd_soc_codec *codec)
1878{
1879 rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1880
1881 return 0;
1882}
1883#else
1884#define rt5640_suspend NULL
1885#define rt5640_resume NULL
1886#endif
1887
1888#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1889#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1890 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1891
9be94aea 1892static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
997b0520
BL		 1893 .hw_params = rt5640_hw_params,
1894 .set_fmt = rt5640_set_dai_fmt,
1895 .set_sysclk = rt5640_set_dai_sysclk,
1896 .set_pll = rt5640_set_dai_pll,
1897};
1898
9be94aea 1899static struct snd_soc_dai_driver rt5640_dai[] = {
997b0520
BL		 1900 {
1901 .name = "rt5640-aif1",
1902 .id = RT5640_AIF1,
1903 .playback = {
1904 .stream_name = "AIF1 Playback",
1905 .channels_min = 1,
1906 .channels_max = 2,
1907 .rates = RT5640_STEREO_RATES,
1908 .formats = RT5640_FORMATS,
1909 },
1910 .capture = {
1911 .stream_name = "AIF1 Capture",
1912 .channels_min = 1,
1913 .channels_max = 2,
1914 .rates = RT5640_STEREO_RATES,
1915 .formats = RT5640_FORMATS,
1916 },
1917 .ops = &rt5640_aif_dai_ops,
1918 },
1919 {
1920 .name = "rt5640-aif2",
1921 .id = RT5640_AIF2,
1922 .playback = {
1923 .stream_name = "AIF2 Playback",
1924 .channels_min = 1,
1925 .channels_max = 2,
1926 .rates = RT5640_STEREO_RATES,
1927 .formats = RT5640_FORMATS,
1928 },
1929 .capture = {
1930 .stream_name = "AIF2 Capture",
1931 .channels_min = 1,
1932 .channels_max = 2,
1933 .rates = RT5640_STEREO_RATES,
1934 .formats = RT5640_FORMATS,
1935 },
1936 .ops = &rt5640_aif_dai_ops,
1937 },
1938};
1939
1940static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
1941 .probe = rt5640_probe,
1942 .remove = rt5640_remove,
1943 .suspend = rt5640_suspend,
1944 .resume = rt5640_resume,
1945 .set_bias_level = rt5640_set_bias_level,
1946 .controls = rt5640_snd_controls,
1947 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
1948 .dapm_widgets = rt5640_dapm_widgets,
1949 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
1950 .dapm_routes = rt5640_dapm_routes,
1951 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
1952};
1953
1954static const struct regmap_config rt5640_regmap = {
1955 .reg_bits = 8,
1956 .val_bits = 16,
1957
1958 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
1959 RT5640_PR_SPACING),
1960 .volatile_reg = rt5640_volatile_register,
1961 .readable_reg = rt5640_readable_register,
1962
1963 .cache_type = REGCACHE_RBTREE,
1964 .reg_defaults = rt5640_reg,
1965 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
1966 .ranges = rt5640_ranges,
1967 .num_ranges = ARRAY_SIZE(rt5640_ranges),
1968};
1969
1970static const struct i2c_device_id rt5640_i2c_id[] = {
1971 { "rt5640", 0 },
1972 { }
1973};
1974MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
1975
dcad9f03
SW		 1976static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
1977{
1978 rt5640->pdata.in1_diff = of_property_read_bool(np,
1979 "realtek,in1-differential");
1980 rt5640->pdata.in2_diff = of_property_read_bool(np,
1981 "realtek,in2-differential");
1982
1983 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
1984 "realtek,ldo1-en-gpios", 0);
1985 /*
1986 * LDO1_EN is optional (it may be statically tied on the board).
1987 * -ENOENT means that the property doesn't exist, i.e. there is no
1988 * GPIO, so is not an error. Any other error code means the property
1989 * exists, but could not be parsed.
1990 */
1991 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
1992 (rt5640->pdata.ldo1_en != -ENOENT))
1993 return rt5640->pdata.ldo1_en;
1994
1995 return 0;
1996}
1997
997b0520
BL		 1998static int rt5640_i2c_probe(struct i2c_client *i2c,
1999 const struct i2c_device_id *id)
2000{
2001 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2002 struct rt5640_priv *rt5640;
2003 int ret;
2004 unsigned int val;
2005
2006 rt5640 = devm_kzalloc(&i2c->dev,
2007 sizeof(struct rt5640_priv),
2008 GFP_KERNEL);
2009 if (NULL == rt5640)
2010 return -ENOMEM;
dcad9f03
SW		 2011 i2c_set_clientdata(i2c, rt5640);
2012
2013 if (pdata) {
2014 rt5640->pdata = *pdata;
2015 /*
2016 * Translate zero'd out (default) pdata value to an invalid
2017 * GPIO ID. This makes the pdata and DT paths consistent in
2018 * terms of the value left in this field when no GPIO is
2019 * specified, but means we can't actually use GPIO 0.
2020 */
2021 if (!rt5640->pdata.ldo1_en)
2022 rt5640->pdata.ldo1_en = -EINVAL;
2023 } else if (i2c->dev.of_node) {
2024 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2025 if (ret)
2026 return ret;
2027 } else
2028 rt5640->pdata.ldo1_en = -EINVAL;
997b0520
BL		 2029
2030 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2031 if (IS_ERR(rt5640->regmap)) {
2032 ret = PTR_ERR(rt5640->regmap);
2033 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2034 ret);
2035 return ret;
2036 }
2037
dcad9f03 2038 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
997b0520
BL		 2039 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2040 GPIOF_OUT_INIT_HIGH,
2041 "RT5640 LDO1_EN");
2042 if (ret < 0) {
2043 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2044 rt5640->pdata.ldo1_en, ret);
2045 return ret;
2046 }
2047 msleep(400);
2048 }
2049
2050 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2051 if ((val != RT5640_DEVICE_ID)) {
2052 dev_err(&i2c->dev,
2053 "Device with ID register %x is not rt5640/39\n", val);
2054 return -ENODEV;
2055 }
2056
2057 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2058
2059 ret = regmap_register_patch(rt5640->regmap, init_list,
2060 ARRAY_SIZE(init_list));
2061 if (ret != 0)
2062 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2063
2064 if (rt5640->pdata.in1_diff)
2065 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2066 RT5640_IN_DF1, RT5640_IN_DF1);
2067
2068 if (rt5640->pdata.in2_diff)
2069 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2070 RT5640_IN_DF2, RT5640_IN_DF2);
2071
2072 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2073 rt5640_dai, ARRAY_SIZE(rt5640_dai));
2074 if (ret < 0)
2075 goto err;
2076
2077 return 0;
2078err:
2079 return ret;
2080}
2081
2082static int rt5640_i2c_remove(struct i2c_client *i2c)
2083{
2084 snd_soc_unregister_codec(&i2c->dev);
2085
2086 return 0;
2087}
2088
9be94aea 2089static struct i2c_driver rt5640_i2c_driver = {
997b0520
BL		 2090 .driver = {
2091 .name = "rt5640",
2092 .owner = THIS_MODULE,
2093 },
2094 .probe = rt5640_i2c_probe,
2095 .remove = rt5640_i2c_remove,
2096 .id_table = rt5640_i2c_id,
2097};
2098module_i2c_driver(rt5640_i2c_driver);
2099
2100MODULE_DESCRIPTION("ASoC RT5640 driver");
2101MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2102MODULE_LICENSE("GPL v2");
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