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ASoC: rt5640: Correct the digital interface data select
[mirror_ubuntu-artful-kernel.git] / sound / soc / codecs / rt5640.c
CommitLineData
997b0520 1/*
b0c27846 2 * rt5640.c -- RT5640/RT5639 ALSA SoC audio codec driver
997b0520
BL		 3 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
affb74ad 21#include <linux/of.h>
dcad9f03 22#include <linux/of_gpio.h>
997b0520
BL		 23#include <linux/platform_device.h>
24#include <linux/spi/spi.h>
02b80773 25#include <linux/acpi.h>
997b0520
BL		 26#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/soc.h>
30#include <sound/soc-dapm.h>
31#include <sound/initval.h>
32#include <sound/tlv.h>
33
49ef7925 34#include "rl6231.h"
997b0520
BL		 35#include "rt5640.h"
36
37#define RT5640_DEVICE_ID 0x6231
38
39#define RT5640_PR_RANGE_BASE (0xff + 1)
40#define RT5640_PR_SPACING 0x100
41
42#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
43
44static const struct regmap_range_cfg rt5640_ranges[] = {
45 { .name = "PR", .range_min = RT5640_PR_BASE,
46 .range_max = RT5640_PR_BASE + 0xb4,
47 .selector_reg = RT5640_PRIV_INDEX,
48 .selector_mask = 0xff,
49 .selector_shift = 0x0,
50 .window_start = RT5640_PRIV_DATA,
51 .window_len = 0x1, },
52};
53
8019ff6c 54static const struct reg_sequence init_list[] = {
997b0520 55 {RT5640_PR_BASE + 0x3d, 0x3600},
997b0520
BL		 56 {RT5640_PR_BASE + 0x12, 0x0aa8},
57 {RT5640_PR_BASE + 0x14, 0x0aaa},
58 {RT5640_PR_BASE + 0x20, 0x6110},
59 {RT5640_PR_BASE + 0x21, 0xe0e0},
60 {RT5640_PR_BASE + 0x23, 0x1804},
61};
997b0520 62
2f2a714c 63static const struct reg_default rt5640_reg[] = {
997b0520
BL		 64 { 0x00, 0x000e },
65 { 0x01, 0xc8c8 },
66 { 0x02, 0xc8c8 },
67 { 0x03, 0xc8c8 },
68 { 0x04, 0x8000 },
69 { 0x0d, 0x0000 },
70 { 0x0e, 0x0000 },
71 { 0x0f, 0x0808 },
72 { 0x19, 0xafaf },
73 { 0x1a, 0xafaf },
74 { 0x1b, 0x0000 },
75 { 0x1c, 0x2f2f },
76 { 0x1d, 0x2f2f },
77 { 0x1e, 0x0000 },
78 { 0x27, 0x7060 },
79 { 0x28, 0x7070 },
80 { 0x29, 0x8080 },
81 { 0x2a, 0x5454 },
82 { 0x2b, 0x5454 },
83 { 0x2c, 0xaa00 },
84 { 0x2d, 0x0000 },
85 { 0x2e, 0xa000 },
86 { 0x2f, 0x0000 },
87 { 0x3b, 0x0000 },
88 { 0x3c, 0x007f },
89 { 0x3d, 0x0000 },
90 { 0x3e, 0x007f },
91 { 0x45, 0xe000 },
92 { 0x46, 0x003e },
93 { 0x47, 0x003e },
94 { 0x48, 0xf800 },
95 { 0x49, 0x3800 },
96 { 0x4a, 0x0004 },
97 { 0x4c, 0xfc00 },
98 { 0x4d, 0x0000 },
99 { 0x4f, 0x01ff },
100 { 0x50, 0x0000 },
101 { 0x51, 0x0000 },
102 { 0x52, 0x01ff },
103 { 0x53, 0xf000 },
104 { 0x61, 0x0000 },
105 { 0x62, 0x0000 },
106 { 0x63, 0x00c0 },
107 { 0x64, 0x0000 },
108 { 0x65, 0x0000 },
109 { 0x66, 0x0000 },
110 { 0x6a, 0x0000 },
111 { 0x6c, 0x0000 },
112 { 0x70, 0x8000 },
113 { 0x71, 0x8000 },
114 { 0x72, 0x8000 },
115 { 0x73, 0x1114 },
116 { 0x74, 0x0c00 },
117 { 0x75, 0x1d00 },
118 { 0x80, 0x0000 },
119 { 0x81, 0x0000 },
120 { 0x82, 0x0000 },
121 { 0x83, 0x0000 },
122 { 0x84, 0x0000 },
123 { 0x85, 0x0008 },
124 { 0x89, 0x0000 },
125 { 0x8a, 0x0000 },
126 { 0x8b, 0x0600 },
127 { 0x8c, 0x0228 },
128 { 0x8d, 0xa000 },
129 { 0x8e, 0x0004 },
130 { 0x8f, 0x1100 },
131 { 0x90, 0x0646 },
132 { 0x91, 0x0c00 },
133 { 0x92, 0x0000 },
134 { 0x93, 0x3000 },
135 { 0xb0, 0x2080 },
136 { 0xb1, 0x0000 },
137 { 0xb4, 0x2206 },
138 { 0xb5, 0x1f00 },
139 { 0xb6, 0x0000 },
140 { 0xb8, 0x034b },
141 { 0xb9, 0x0066 },
142 { 0xba, 0x000b },
143 { 0xbb, 0x0000 },
144 { 0xbc, 0x0000 },
145 { 0xbd, 0x0000 },
146 { 0xbe, 0x0000 },
147 { 0xbf, 0x0000 },
148 { 0xc0, 0x0400 },
149 { 0xc2, 0x0000 },
150 { 0xc4, 0x0000 },
151 { 0xc5, 0x0000 },
152 { 0xc6, 0x2000 },
153 { 0xc8, 0x0000 },
154 { 0xc9, 0x0000 },
155 { 0xca, 0x0000 },
156 { 0xcb, 0x0000 },
157 { 0xcc, 0x0000 },
158 { 0xcf, 0x0013 },
159 { 0xd0, 0x0680 },
160 { 0xd1, 0x1c17 },
161 { 0xd2, 0x8c00 },
162 { 0xd3, 0xaa20 },
163 { 0xd6, 0x0400 },
164 { 0xd9, 0x0809 },
165 { 0xfe, 0x10ec },
166 { 0xff, 0x6231 },
167};
168
169static int rt5640_reset(struct snd_soc_codec *codec)
170{
171 return snd_soc_write(codec, RT5640_RESET, 0);
172}
173
174static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
175{
176 int i;
177
178 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
179 if ((reg >= rt5640_ranges[i].window_start &&
180 reg <= rt5640_ranges[i].window_start +
181 rt5640_ranges[i].window_len) ||
182 (reg >= rt5640_ranges[i].range_min &&
183 reg <= rt5640_ranges[i].range_max))
184 return true;
185
186 switch (reg) {
187 case RT5640_RESET:
188 case RT5640_ASRC_5:
189 case RT5640_EQ_CTRL1:
190 case RT5640_DRC_AGC_1:
191 case RT5640_ANC_CTRL1:
192 case RT5640_IRQ_CTRL2:
193 case RT5640_INT_IRQ_ST:
194 case RT5640_DSP_CTRL2:
195 case RT5640_DSP_CTRL3:
196 case RT5640_PRIV_INDEX:
197 case RT5640_PRIV_DATA:
198 case RT5640_PGM_REG_ARR1:
199 case RT5640_PGM_REG_ARR3:
200 case RT5640_VENDOR_ID:
201 case RT5640_VENDOR_ID1:
202 case RT5640_VENDOR_ID2:
203 return true;
204 default:
205 return false;
206 }
207}
208
209static bool rt5640_readable_register(struct device *dev, unsigned int reg)
210{
211 int i;
212
213 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
214 if ((reg >= rt5640_ranges[i].window_start &&
215 reg <= rt5640_ranges[i].window_start +
216 rt5640_ranges[i].window_len) ||
217 (reg >= rt5640_ranges[i].range_min &&
218 reg <= rt5640_ranges[i].range_max))
219 return true;
220
221 switch (reg) {
222 case RT5640_RESET:
223 case RT5640_SPK_VOL:
224 case RT5640_HP_VOL:
225 case RT5640_OUTPUT:
226 case RT5640_MONO_OUT:
227 case RT5640_IN1_IN2:
228 case RT5640_IN3_IN4:
229 case RT5640_INL_INR_VOL:
230 case RT5640_DAC1_DIG_VOL:
231 case RT5640_DAC2_DIG_VOL:
232 case RT5640_DAC2_CTRL:
233 case RT5640_ADC_DIG_VOL:
234 case RT5640_ADC_DATA:
235 case RT5640_ADC_BST_VOL:
236 case RT5640_STO_ADC_MIXER:
237 case RT5640_MONO_ADC_MIXER:
238 case RT5640_AD_DA_MIXER:
239 case RT5640_STO_DAC_MIXER:
240 case RT5640_MONO_DAC_MIXER:
241 case RT5640_DIG_MIXER:
242 case RT5640_DSP_PATH1:
243 case RT5640_DSP_PATH2:
244 case RT5640_DIG_INF_DATA:
245 case RT5640_REC_L1_MIXER:
246 case RT5640_REC_L2_MIXER:
247 case RT5640_REC_R1_MIXER:
248 case RT5640_REC_R2_MIXER:
249 case RT5640_HPO_MIXER:
250 case RT5640_SPK_L_MIXER:
251 case RT5640_SPK_R_MIXER:
252 case RT5640_SPO_L_MIXER:
253 case RT5640_SPO_R_MIXER:
254 case RT5640_SPO_CLSD_RATIO:
255 case RT5640_MONO_MIXER:
256 case RT5640_OUT_L1_MIXER:
257 case RT5640_OUT_L2_MIXER:
258 case RT5640_OUT_L3_MIXER:
259 case RT5640_OUT_R1_MIXER:
260 case RT5640_OUT_R2_MIXER:
261 case RT5640_OUT_R3_MIXER:
262 case RT5640_LOUT_MIXER:
263 case RT5640_PWR_DIG1:
264 case RT5640_PWR_DIG2:
265 case RT5640_PWR_ANLG1:
266 case RT5640_PWR_ANLG2:
267 case RT5640_PWR_MIXER:
268 case RT5640_PWR_VOL:
269 case RT5640_PRIV_INDEX:
270 case RT5640_PRIV_DATA:
271 case RT5640_I2S1_SDP:
272 case RT5640_I2S2_SDP:
273 case RT5640_ADDA_CLK1:
274 case RT5640_ADDA_CLK2:
275 case RT5640_DMIC:
276 case RT5640_GLB_CLK:
277 case RT5640_PLL_CTRL1:
278 case RT5640_PLL_CTRL2:
279 case RT5640_ASRC_1:
280 case RT5640_ASRC_2:
281 case RT5640_ASRC_3:
282 case RT5640_ASRC_4:
283 case RT5640_ASRC_5:
284 case RT5640_HP_OVCD:
285 case RT5640_CLS_D_OVCD:
286 case RT5640_CLS_D_OUT:
287 case RT5640_DEPOP_M1:
288 case RT5640_DEPOP_M2:
289 case RT5640_DEPOP_M3:
290 case RT5640_CHARGE_PUMP:
291 case RT5640_PV_DET_SPK_G:
292 case RT5640_MICBIAS:
293 case RT5640_EQ_CTRL1:
294 case RT5640_EQ_CTRL2:
295 case RT5640_WIND_FILTER:
296 case RT5640_DRC_AGC_1:
297 case RT5640_DRC_AGC_2:
298 case RT5640_DRC_AGC_3:
299 case RT5640_SVOL_ZC:
300 case RT5640_ANC_CTRL1:
301 case RT5640_ANC_CTRL2:
302 case RT5640_ANC_CTRL3:
303 case RT5640_JD_CTRL:
304 case RT5640_ANC_JD:
305 case RT5640_IRQ_CTRL1:
306 case RT5640_IRQ_CTRL2:
307 case RT5640_INT_IRQ_ST:
308 case RT5640_GPIO_CTRL1:
309 case RT5640_GPIO_CTRL2:
310 case RT5640_GPIO_CTRL3:
311 case RT5640_DSP_CTRL1:
312 case RT5640_DSP_CTRL2:
313 case RT5640_DSP_CTRL3:
314 case RT5640_DSP_CTRL4:
315 case RT5640_PGM_REG_ARR1:
316 case RT5640_PGM_REG_ARR2:
317 case RT5640_PGM_REG_ARR3:
318 case RT5640_PGM_REG_ARR4:
319 case RT5640_PGM_REG_ARR5:
320 case RT5640_SCB_FUNC:
321 case RT5640_SCB_CTRL:
322 case RT5640_BASE_BACK:
323 case RT5640_MP3_PLUS1:
324 case RT5640_MP3_PLUS2:
325 case RT5640_3D_HP:
326 case RT5640_ADJ_HPF:
327 case RT5640_HP_CALIB_AMP_DET:
328 case RT5640_HP_CALIB2:
329 case RT5640_SV_ZCD1:
330 case RT5640_SV_ZCD2:
331 case RT5640_DUMMY1:
332 case RT5640_DUMMY2:
333 case RT5640_DUMMY3:
334 case RT5640_VENDOR_ID:
335 case RT5640_VENDOR_ID1:
336 case RT5640_VENDOR_ID2:
337 return true;
338 default:
339 return false;
340 }
341}
342
343static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
344static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
345static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
346static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
347static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
348
349/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
8295822d 350static const DECLARE_TLV_DB_RANGE(bst_tlv,
997b0520
BL		 351 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
352 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
353 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
354 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
355 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
356 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
8295822d
LPC		 357 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
358);
997b0520
BL		 359
360/* Interface data select */
361static const char * const rt5640_data_select[] = {
86676af8 362 "Normal", "Swap", "left copy to right", "right copy to left"};
997b0520 363
4c03cb6f
TI		 364static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
365 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
997b0520 366
4c03cb6f
TI		 367static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
368 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
997b0520 369
4c03cb6f
TI		 370static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
371 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
997b0520 372
4c03cb6f
TI		 373static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
374 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
997b0520
BL		 375
376/* Class D speaker gain ratio */
377static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
378 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
379
4c03cb6f
TI		 380static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
381 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
997b0520
BL		 382
383static const struct snd_kcontrol_new rt5640_snd_controls[] = {
384 /* Speaker Output Volume */
997b0520
BL		 385 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
386 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
387 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
388 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
389 /* Headphone Output Volume */
997b0520
BL		 390 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
391 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
392 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
393 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
394 /* OUTPUT Control */
395 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
396 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
397 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
398 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
399 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
400 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
022d21f0 401
997b0520
BL		 402 /* DAC Digital Volume */
403 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
404 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
405 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
406 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
407 175, 0, dac_vol_tlv),
16566e47 408 /* IN1/IN2/IN3 Control */
997b0520
BL		 409 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
410 RT5640_BST_SFT1, 8, 0, bst_tlv),
411 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
412 RT5640_BST_SFT2, 8, 0, bst_tlv),
16566e47
OC		 413 SOC_SINGLE_TLV("IN3 Boost", RT5640_IN1_IN2,
414 RT5640_BST_SFT2, 8, 0, bst_tlv),
415
997b0520
BL		 416 /* INL/INR Volume Control */
417 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
418 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
419 31, 1, in_vol_tlv),
420 /* ADC Digital Volume Control */
421 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
422 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
423 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
424 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
425 127, 0, adc_vol_tlv),
426 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
427 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
428 127, 0, adc_vol_tlv),
429 /* ADC Boost Volume Control */
430 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
431 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
432 3, 0, adc_bst_tlv),
433 /* Class D speaker gain ratio */
434 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
435
436 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
437 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
438 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
439 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
440};
441
022d21f0
OC		 442static const struct snd_kcontrol_new rt5640_specific_snd_controls[] = {
443 /* MONO Output Control */
444 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT, RT5640_L_MUTE_SFT,
445 1, 1),
446
447 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
448 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 175, 0, dac_vol_tlv),
449};
450
997b0520
BL		 451/**
452 * set_dmic_clk - Set parameter of dmic.
453 *
454 * @w: DAPM widget.
455 * @kcontrol: The kcontrol of this widget.
456 * @event: Event id.
457 *
997b0520
BL		 458 */
459static int set_dmic_clk(struct snd_soc_dapm_widget *w,
460 struct snd_kcontrol *kcontrol, int event)
461{
bb1cd608 462 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
997b0520 463 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
00a6d6e5 464 int idx, rate;
49ef7925 465
00a6d6e5
OC		 466 rate = rt5640->sysclk / rl6231_get_pre_div(rt5640->regmap,
467 RT5640_ADDA_CLK1, RT5640_I2S_PD1_SFT);
468 idx = rl6231_calc_dmic_clk(rate);
997b0520
BL		 469 if (idx < 0)
470 dev_err(codec->dev, "Failed to set DMIC clock\n");
471 else
472 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
473 idx << RT5640_DMIC_CLK_SFT);
474 return idx;
475}
476
218a3f96 477static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
997b0520
BL		 478 struct snd_soc_dapm_widget *sink)
479{
bb1cd608 480 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
997b0520
BL		 481 unsigned int val;
482
bb1cd608 483 val = snd_soc_read(codec, RT5640_GLB_CLK);
997b0520 484 val &= RT5640_SCLK_SRC_MASK;
acf04e63 485 if (val == RT5640_SCLK_SRC_PLL1)
997b0520
BL		 486 return 1;
487 else
488 return 0;
489}
490
491/* Digital Mixer */
492static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
493 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
494 RT5640_M_ADC_L1_SFT, 1, 1),
495 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
496 RT5640_M_ADC_L2_SFT, 1, 1),
497};
498
499static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
500 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
501 RT5640_M_ADC_R1_SFT, 1, 1),
502 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
503 RT5640_M_ADC_R2_SFT, 1, 1),
504};
505
506static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
507 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
508 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
509 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
510 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
511};
512
513static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
514 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
515 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
516 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
517 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
518};
519
520static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
521 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
522 RT5640_M_ADCMIX_L_SFT, 1, 1),
523 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
524 RT5640_M_IF1_DAC_L_SFT, 1, 1),
525};
526
527static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
528 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
529 RT5640_M_ADCMIX_R_SFT, 1, 1),
530 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
531 RT5640_M_IF1_DAC_R_SFT, 1, 1),
532};
533
534static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
535 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
536 RT5640_M_DAC_L1_SFT, 1, 1),
537 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
538 RT5640_M_DAC_L2_SFT, 1, 1),
539 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
540 RT5640_M_ANC_DAC_L_SFT, 1, 1),
541};
542
543static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
544 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
545 RT5640_M_DAC_R1_SFT, 1, 1),
546 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
547 RT5640_M_DAC_R2_SFT, 1, 1),
548 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
549 RT5640_M_ANC_DAC_R_SFT, 1, 1),
550};
551
022d21f0
OC		 552static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {
553 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
554 RT5640_M_DAC_L1_SFT, 1, 1),
555 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
556 RT5640_M_DAC_L2_SFT, 1, 1),
557};
558
559static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {
560 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
561 RT5640_M_DAC_R1_SFT, 1, 1),
562 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
563 RT5640_M_DAC_R2_SFT, 1, 1),
564};
565
997b0520
BL		 566static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
567 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
568 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
569 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
570 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
571 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
572 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
573};
574
575static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
576 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
577 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
578 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
579 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
580 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
581 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
582};
583
584static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
585 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
586 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
587 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
588 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
589};
590
591static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
592 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
593 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
594 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
595 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
596};
597
598/* Analog Input Mixer */
599static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
600 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
601 RT5640_M_HP_L_RM_L_SFT, 1, 1),
602 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
603 RT5640_M_IN_L_RM_L_SFT, 1, 1),
16566e47
OC		 604 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_L2_MIXER,
605 RT5640_M_BST2_RM_L_SFT, 1, 1),
997b0520
BL		 606 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
607 RT5640_M_BST4_RM_L_SFT, 1, 1),
608 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
609 RT5640_M_BST1_RM_L_SFT, 1, 1),
610 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
611 RT5640_M_OM_L_RM_L_SFT, 1, 1),
612};
613
614static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
615 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
616 RT5640_M_HP_R_RM_R_SFT, 1, 1),
617 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
618 RT5640_M_IN_R_RM_R_SFT, 1, 1),
16566e47
OC		 619 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_R2_MIXER,
620 RT5640_M_BST2_RM_R_SFT, 1, 1),
997b0520
BL		 621 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
622 RT5640_M_BST4_RM_R_SFT, 1, 1),
623 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
624 RT5640_M_BST1_RM_R_SFT, 1, 1),
625 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
626 RT5640_M_OM_R_RM_R_SFT, 1, 1),
627};
628
629/* Analog Output Mixer */
630static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
631 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
632 RT5640_M_RM_L_SM_L_SFT, 1, 1),
633 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
634 RT5640_M_IN_L_SM_L_SFT, 1, 1),
635 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
636 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
637 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
638 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
639 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
640 RT5640_M_OM_L_SM_L_SFT, 1, 1),
641};
642
643static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
644 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
645 RT5640_M_RM_R_SM_R_SFT, 1, 1),
646 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
647 RT5640_M_IN_R_SM_R_SFT, 1, 1),
648 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
649 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
650 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
651 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
652 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
653 RT5640_M_OM_R_SM_R_SFT, 1, 1),
654};
655
656static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
657 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
658 RT5640_M_SM_L_OM_L_SFT, 1, 1),
659 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
660 RT5640_M_BST1_OM_L_SFT, 1, 1),
661 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
662 RT5640_M_IN_L_OM_L_SFT, 1, 1),
663 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
664 RT5640_M_RM_L_OM_L_SFT, 1, 1),
665 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
666 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
667 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
668 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
669 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
670 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
671};
672
673static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
674 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
675 RT5640_M_SM_L_OM_R_SFT, 1, 1),
676 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
677 RT5640_M_BST4_OM_R_SFT, 1, 1),
678 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
679 RT5640_M_BST1_OM_R_SFT, 1, 1),
680 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
681 RT5640_M_IN_R_OM_R_SFT, 1, 1),
682 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
683 RT5640_M_RM_R_OM_R_SFT, 1, 1),
684 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
685 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
686 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
687 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
688 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
689 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
690};
691
022d21f0
OC		 692static const struct snd_kcontrol_new rt5639_out_l_mix[] = {
693 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
694 RT5640_M_BST1_OM_L_SFT, 1, 1),
695 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
696 RT5640_M_IN_L_OM_L_SFT, 1, 1),
697 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
698 RT5640_M_RM_L_OM_L_SFT, 1, 1),
699 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
700 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
701};
702
703static const struct snd_kcontrol_new rt5639_out_r_mix[] = {
704 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
705 RT5640_M_BST4_OM_R_SFT, 1, 1),
706 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
707 RT5640_M_BST1_OM_R_SFT, 1, 1),
708 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
709 RT5640_M_IN_R_OM_R_SFT, 1, 1),
710 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
711 RT5640_M_RM_R_OM_R_SFT, 1, 1),
712 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
713 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
714};
715
997b0520
BL		 716static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
717 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
718 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
719 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
720 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
721 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
722 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
723 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
724 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
725 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
726 RT5640_M_BST1_SPM_L_SFT, 1, 1),
727};
728
729static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
730 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
731 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
732 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
733 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
734 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
735 RT5640_M_BST1_SPM_R_SFT, 1, 1),
736};
737
738static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
739 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
740 RT5640_M_DAC2_HM_SFT, 1, 1),
741 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
742 RT5640_M_DAC1_HM_SFT, 1, 1),
743 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
744 RT5640_M_HPVOL_HM_SFT, 1, 1),
745};
746
022d21f0
OC		 747static const struct snd_kcontrol_new rt5639_hpo_mix[] = {
748 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
749 RT5640_M_DAC1_HM_SFT, 1, 1),
750 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
751 RT5640_M_HPVOL_HM_SFT, 1, 1),
752};
753
997b0520
BL		 754static const struct snd_kcontrol_new rt5640_lout_mix[] = {
755 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
756 RT5640_M_DAC_L1_LM_SFT, 1, 1),
757 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
758 RT5640_M_DAC_R1_LM_SFT, 1, 1),
759 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
760 RT5640_M_OV_L_LM_SFT, 1, 1),
761 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
762 RT5640_M_OV_R_LM_SFT, 1, 1),
763};
764
765static const struct snd_kcontrol_new rt5640_mono_mix[] = {
766 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
767 RT5640_M_DAC_R2_MM_SFT, 1, 1),
768 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
769 RT5640_M_DAC_L2_MM_SFT, 1, 1),
770 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
771 RT5640_M_OV_R_MM_SFT, 1, 1),
772 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
773 RT5640_M_OV_L_MM_SFT, 1, 1),
774 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
775 RT5640_M_BST1_MM_SFT, 1, 1),
776};
777
246693ba
BL		 778static const struct snd_kcontrol_new spk_l_enable_control =
779 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
780 RT5640_L_MUTE_SFT, 1, 1);
781
782static const struct snd_kcontrol_new spk_r_enable_control =
783 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
784 RT5640_R_MUTE_SFT, 1, 1);
785
786static const struct snd_kcontrol_new hp_l_enable_control =
787 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
788 RT5640_L_MUTE_SFT, 1, 1);
789
790static const struct snd_kcontrol_new hp_r_enable_control =
791 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
792 RT5640_R_MUTE_SFT, 1, 1);
793
997b0520
BL		 794/* Stereo ADC source */
795static const char * const rt5640_stereo_adc1_src[] = {
796 "DIG MIX", "ADC"
797};
798
4c03cb6f
TI		 799static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
800 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
997b0520
BL		 801
802static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
803 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
804
805static const char * const rt5640_stereo_adc2_src[] = {
806 "DMIC1", "DMIC2", "DIG MIX"
807};
808
4c03cb6f
TI		 809static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
810 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
997b0520
BL		 811
812static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
813 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
814
815/* Mono ADC source */
816static const char * const rt5640_mono_adc_l1_src[] = {
817 "Mono DAC MIXL", "ADCL"
818};
819
4c03cb6f
TI		 820static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
821 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
997b0520
BL		 822
823static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
824 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
825
826static const char * const rt5640_mono_adc_l2_src[] = {
827 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
828};
829
4c03cb6f
TI		 830static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
831 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
997b0520
BL		 832
833static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
834 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
835
836static const char * const rt5640_mono_adc_r1_src[] = {
837 "Mono DAC MIXR", "ADCR"
838};
839
4c03cb6f
TI		 840static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
841 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
997b0520
BL		 842
843static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
844 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
845
846static const char * const rt5640_mono_adc_r2_src[] = {
847 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
848};
849
4c03cb6f
TI		 850static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
851 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
997b0520
BL		 852
853static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
854 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
855
856/* DAC2 channel source */
857static const char * const rt5640_dac_l2_src[] = {
858 "IF2", "Base L/R"
859};
860
861static int rt5640_dac_l2_values[] = {
862 0,
863 3,
864};
865
4c03cb6f
TI		 866static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
867 RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
868 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
997b0520
BL		 869
870static const struct snd_kcontrol_new rt5640_dac_l2_mux =
712fb1c2 871 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
997b0520
BL		 872
873static const char * const rt5640_dac_r2_src[] = {
874 "IF2",
875};
876
877static int rt5640_dac_r2_values[] = {
878 0,
879};
880
4c03cb6f
TI		 881static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,
882 RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
883 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
997b0520
BL		 884
885static const struct snd_kcontrol_new rt5640_dac_r2_mux =
886 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
887
888/* digital interface and iis interface map */
889static const char * const rt5640_dai_iis_map[] = {
890 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
891};
892
893static int rt5640_dai_iis_map_values[] = {
894 0,
895 5,
896 6,
897 7,
898};
899
4c03cb6f
TI		 900static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
901 RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
902 0x7, rt5640_dai_iis_map,
903 rt5640_dai_iis_map_values);
997b0520
BL		 904
905static const struct snd_kcontrol_new rt5640_dai_mux =
712fb1c2 906 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
997b0520
BL		 907
908/* SDI select */
909static const char * const rt5640_sdi_sel[] = {
910 "IF1", "IF2"
911};
912
4c03cb6f
TI		 913static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
914 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
997b0520
BL		 915
916static const struct snd_kcontrol_new rt5640_sdi_mux =
917 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
918
89d05130 919static void hp_amp_power_on(struct snd_soc_codec *codec)
246693ba
BL		 920{
921 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
922
923 /* depop parameters */
924 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
925 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
926 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
927 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
928 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
929 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
930 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
931 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
932 0x9f00);
933 /* headphone amp power on */
934 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
935 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
936 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
937 RT5640_PWR_HA,
938 RT5640_PWR_HA);
939 usleep_range(10000, 15000);
940 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
941 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
942 RT5640_PWR_FV1 | RT5640_PWR_FV2);
943}
944
945static void rt5640_pmu_depop(struct snd_soc_codec *codec)
946{
947 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
948
949 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
950 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
951 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
952 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
953 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
954
955 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
956 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
957 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
958 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
959 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
960
961 regmap_write(rt5640->regmap, RT5640_PR_BASE +
962 RT5640_MAMP_INT_REG2, 0x1c00);
963 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
964 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
965 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
966 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
967 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
968}
969
970static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
971 struct snd_kcontrol *kcontrol, int event)
972{
bb1cd608 973 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
246693ba
BL		 974 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
975
976 switch (event) {
977 case SND_SOC_DAPM_POST_PMU:
978 rt5640_pmu_depop(codec);
979 rt5640->hp_mute = 0;
980 break;
981
982 case SND_SOC_DAPM_PRE_PMD:
983 rt5640->hp_mute = 1;
984 usleep_range(70000, 75000);
985 break;
986
987 default:
988 return 0;
989 }
990
991 return 0;
992}
993
9b850ca4
JL		 994static int rt5640_lout_event(struct snd_soc_dapm_widget *w,
995 struct snd_kcontrol *kcontrol, int event)
996{
997 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
998
999 switch (event) {
1000 case SND_SOC_DAPM_POST_PMU:
1001 hp_amp_power_on(codec);
1002 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1003 RT5640_PWR_LM, RT5640_PWR_LM);
1004 snd_soc_update_bits(codec, RT5640_OUTPUT,
1005 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1006 break;
1007
1008 case SND_SOC_DAPM_PRE_PMD:
1009 snd_soc_update_bits(codec, RT5640_OUTPUT,
1010 RT5640_L_MUTE | RT5640_R_MUTE,
1011 RT5640_L_MUTE | RT5640_R_MUTE);
1012 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1013 RT5640_PWR_LM, 0);
1014 break;
1015
1016 default:
1017 return 0;
1018 }
1019
1020 return 0;
1021}
1022
246693ba
BL		 1023static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
1024 struct snd_kcontrol *kcontrol, int event)
1025{
bb1cd608 1026 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
246693ba
BL		 1027
1028 switch (event) {
1029 case SND_SOC_DAPM_POST_PMU:
1030 hp_amp_power_on(codec);
1031 break;
1032 default:
1033 return 0;
1034 }
1035
1036 return 0;
1037}
1038
1039static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1040 struct snd_kcontrol *kcontrol, int event)
1041{
bb1cd608 1042 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
246693ba
BL		 1043 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1044
1045 switch (event) {
1046 case SND_SOC_DAPM_POST_PMU:
1047 if (!rt5640->hp_mute)
1048 usleep_range(80000, 85000);
1049
1050 break;
1051
1052 default:
1053 return 0;
1054 }
1055
1056 return 0;
1057}
1058
997b0520
BL		 1059static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1060 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1061 RT5640_PWR_PLL_BIT, 0, NULL, 0),
1062 /* Input Side */
1063 /* micbias */
1064 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1065 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1066 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
9be94aea 1067 RT5640_PWR_MB1_BIT, 0, NULL, 0),
997b0520
BL		 1068 /* Input Lines */
1069 SND_SOC_DAPM_INPUT("DMIC1"),
1070 SND_SOC_DAPM_INPUT("DMIC2"),
1071 SND_SOC_DAPM_INPUT("IN1P"),
1072 SND_SOC_DAPM_INPUT("IN1N"),
1073 SND_SOC_DAPM_INPUT("IN2P"),
1074 SND_SOC_DAPM_INPUT("IN2N"),
16566e47
OC		 1075 SND_SOC_DAPM_INPUT("IN3P"),
1076 SND_SOC_DAPM_INPUT("IN3N"),
997b0520
BL		 1077 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1078 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1079 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1080 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1081
1082 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1083 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
71d97a79
OC		 1084 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, RT5640_DMIC_1_EN_SFT, 0,
1085 NULL, 0),
1086 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, RT5640_DMIC_2_EN_SFT, 0,
1087 NULL, 0),
997b0520
BL		 1088 /* Boost */
1089 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1090 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1091 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1092 RT5640_PWR_BST4_BIT, 0, NULL, 0),
16566e47
OC		 1093 SND_SOC_DAPM_PGA("BST3", RT5640_PWR_ANLG2,
1094 RT5640_PWR_BST2_BIT, 0, NULL, 0),
997b0520
BL		 1095 /* Input Volume */
1096 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1097 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1098 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1099 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
997b0520
BL		 1100 /* REC Mixer */
1101 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1102 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1103 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1104 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1105 /* ADCs */
1106 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1107 RT5640_PWR_ADC_L_BIT, 0),
1108 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1109 RT5640_PWR_ADC_R_BIT, 0),
1110 /* ADC Mux */
1111 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1112 &rt5640_sto_adc_2_mux),
1113 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1114 &rt5640_sto_adc_2_mux),
1115 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1116 &rt5640_sto_adc_1_mux),
1117 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1118 &rt5640_sto_adc_1_mux),
1119 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1120 &rt5640_mono_adc_l2_mux),
1121 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1122 &rt5640_mono_adc_l1_mux),
1123 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1124 &rt5640_mono_adc_r1_mux),
1125 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1126 &rt5640_mono_adc_r2_mux),
1127 /* ADC Mixer */
1128 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1129 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1130 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1131 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1132 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1133 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1134 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1135 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1136 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1137 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1138 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1139 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1140 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1141 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1142
1143 /* Digital Interface */
1144 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1145 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1146 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1147 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1148 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1149 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1150 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1151 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1152 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1153 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1154 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1155 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1156 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1157 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1158 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1159 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1160 /* Digital Interface Select */
1161 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1162 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1163 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1164 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1165 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1166 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1167 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1168 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1169 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1170 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1171 /* Audio Interface */
1172 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1173 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1174 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1175 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
022d21f0 1176
997b0520
BL		 1177 /* Output Side */
1178 /* DAC mixer before sound effect */
1179 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1180 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1181 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1182 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
022d21f0 1183
997b0520 1184 /* DAC Mixer */
997b0520
BL		 1185 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1186 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1187 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1188 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1189 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1190 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1191 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1192 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1193 /* DACs */
1194 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1195 RT5640_PWR_DAC_L1_BIT, 0),
997b0520
BL		 1196 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1197 RT5640_PWR_DAC_R1_BIT, 0),
022d21f0 1198
997b0520
BL		 1199 /* SPK/OUT Mixer */
1200 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1201 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1202 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1203 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
997b0520
BL		 1204 /* Ouput Volume */
1205 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1206 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1207 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1208 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1209 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1210 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1211 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1212 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1213 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1214 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1215 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1216 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1217 /* SPO/HPO/LOUT/Mono Mixer */
1218 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1219 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1220 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1221 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
9b850ca4 1222 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
997b0520 1223 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
246693ba
BL		 1224 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1225 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1226 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1227 rt5640_hp_event,
1228 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
9b850ca4
JL		 1229 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
1230 rt5640_lout_event,
1231 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
246693ba 1232 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
997b0520 1233 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
246693ba 1234 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
997b0520
BL		 1235 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1236 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
246693ba
BL		 1237 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1238
1239 /* Output Switch */
1240 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1241 &spk_l_enable_control),
1242 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1243 &spk_r_enable_control),
1244 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1245 &hp_l_enable_control),
1246 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1247 &hp_r_enable_control),
1248 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
997b0520
BL		 1249 /* Output Lines */
1250 SND_SOC_DAPM_OUTPUT("SPOLP"),
1251 SND_SOC_DAPM_OUTPUT("SPOLN"),
1252 SND_SOC_DAPM_OUTPUT("SPORP"),
1253 SND_SOC_DAPM_OUTPUT("SPORN"),
1254 SND_SOC_DAPM_OUTPUT("HPOL"),
1255 SND_SOC_DAPM_OUTPUT("HPOR"),
1256 SND_SOC_DAPM_OUTPUT("LOUTL"),
1257 SND_SOC_DAPM_OUTPUT("LOUTR"),
022d21f0
OC		 1258};
1259
1260static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = {
1261 /* Audio DSP */
1262 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1263 /* ANC */
1264 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1265
1266 /* DAC2 channel Mux */
1267 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_l2_mux),
1268 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_r2_mux),
1269
1270 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1271 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1272 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1273 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1274
1275 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_R2_BIT,
1276 0),
1277 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_L2_BIT,
1278 0),
1279
1280 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1281 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1282 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1283 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1284
1285 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1286 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1287 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1288 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1289
1290 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1291 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1292 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1293 RT5640_PWR_MA_BIT, 0, NULL, 0),
1294
997b0520
BL		 1295 SND_SOC_DAPM_OUTPUT("MONOP"),
1296 SND_SOC_DAPM_OUTPUT("MONON"),
1297};
1298
022d21f0
OC		 1299static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = {
1300 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1301 rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),
1302 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1303 rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),
1304
1305 SND_SOC_DAPM_SUPPLY("DAC L2 Filter", RT5640_PWR_DIG1,
1306 RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),
1307 SND_SOC_DAPM_SUPPLY("DAC R2 Filter", RT5640_PWR_DIG1,
1308 RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),
1309
1310 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1311 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),
1312 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1313 0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),
1314
1315 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1316 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1317 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1318 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1319};
1320
997b0520
BL		 1321static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1322 {"IN1P", NULL, "LDO2"},
1323 {"IN2P", NULL, "LDO2"},
16566e47 1324 {"IN3P", NULL, "LDO2"},
997b0520
BL		 1325
1326 {"DMIC L1", NULL, "DMIC1"},
1327 {"DMIC R1", NULL, "DMIC1"},
1328 {"DMIC L2", NULL, "DMIC2"},
1329 {"DMIC R2", NULL, "DMIC2"},
1330
1331 {"BST1", NULL, "IN1P"},
1332 {"BST1", NULL, "IN1N"},
1333 {"BST2", NULL, "IN2P"},
1334 {"BST2", NULL, "IN2N"},
16566e47
OC		 1335 {"BST3", NULL, "IN3P"},
1336 {"BST3", NULL, "IN3N"},
997b0520
BL		 1337
1338 {"INL VOL", NULL, "IN2P"},
1339 {"INR VOL", NULL, "IN2N"},
1340
1341 {"RECMIXL", "HPOL Switch", "HPOL"},
1342 {"RECMIXL", "INL Switch", "INL VOL"},
16566e47 1343 {"RECMIXL", "BST3 Switch", "BST3"},
997b0520
BL		 1344 {"RECMIXL", "BST2 Switch", "BST2"},
1345 {"RECMIXL", "BST1 Switch", "BST1"},
1346 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1347
1348 {"RECMIXR", "HPOR Switch", "HPOR"},
1349 {"RECMIXR", "INR Switch", "INR VOL"},
16566e47 1350 {"RECMIXR", "BST3 Switch", "BST3"},
997b0520
BL		 1351 {"RECMIXR", "BST2 Switch", "BST2"},
1352 {"RECMIXR", "BST1 Switch", "BST1"},
1353 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1354
1355 {"ADC L", NULL, "RECMIXL"},
1356 {"ADC R", NULL, "RECMIXR"},
1357
1358 {"DMIC L1", NULL, "DMIC CLK"},
1359 {"DMIC L1", NULL, "DMIC1 Power"},
1360 {"DMIC R1", NULL, "DMIC CLK"},
1361 {"DMIC R1", NULL, "DMIC1 Power"},
1362 {"DMIC L2", NULL, "DMIC CLK"},
1363 {"DMIC L2", NULL, "DMIC2 Power"},
1364 {"DMIC R2", NULL, "DMIC CLK"},
1365 {"DMIC R2", NULL, "DMIC2 Power"},
1366
1367 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1368 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1369 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1370 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1371 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1372
1373 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1374 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1375 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1376 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1377 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1378
1379 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1380 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1381 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1382 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1383 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1384
1385 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1386 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1387 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1388 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1389 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1390
1391 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1392 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1393 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
218a3f96 1394 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1395
1396 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1397 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1398 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
218a3f96 1399 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1400
1401 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1402 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1403 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
218a3f96 1404 {"Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1405
1406 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1407 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1408 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
218a3f96 1409 {"Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1410
1411 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1412 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1413 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1414 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1415
1416 {"IF1 ADC", NULL, "I2S1"},
1417 {"IF1 ADC", NULL, "IF1 ADC L"},
1418 {"IF1 ADC", NULL, "IF1 ADC R"},
1419 {"IF2 ADC", NULL, "I2S2"},
1420 {"IF2 ADC", NULL, "IF2 ADC L"},
1421 {"IF2 ADC", NULL, "IF2 ADC R"},
1422
1423 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1424 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1425 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1426 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1427 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1428 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1429
1430 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1431 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1432 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1433 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1434 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1435 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1436
1437 {"AIF1TX", NULL, "DAI1 TX Mux"},
1438 {"AIF1TX", NULL, "SDI1 TX Mux"},
1439 {"AIF2TX", NULL, "DAI2 TX Mux"},
1440 {"AIF2TX", NULL, "SDI2 TX Mux"},
1441
1442 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1443 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1444 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1445 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1446
1447 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1448 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1449 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1450 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1451
1452 {"IF1 DAC", NULL, "I2S1"},
1453 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1454 {"IF2 DAC", NULL, "I2S2"},
1455 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1456
1457 {"IF1 DAC L", NULL, "IF1 DAC"},
1458 {"IF1 DAC R", NULL, "IF1 DAC"},
1459 {"IF2 DAC L", NULL, "IF2 DAC"},
1460 {"IF2 DAC R", NULL, "IF2 DAC"},
1461
1462 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1463 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1464 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1465 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1466
997b0520 1467 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
997b0520 1468 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
997b0520
BL		 1469
1470 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
997b0520 1471 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
997b0520
BL		 1472
1473 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
997b0520 1474 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
997b0520
BL		 1475
1476 {"DAC L1", NULL, "Stereo DAC MIXL"},
218a3f96 1477 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
997b0520 1478 {"DAC R1", NULL, "Stereo DAC MIXR"},
218a3f96 1479 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1480
1481 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1482 {"SPK MIXL", "INL Switch", "INL VOL"},
1483 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
997b0520
BL		 1484 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1485 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1486 {"SPK MIXR", "INR Switch", "INR VOL"},
1487 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
997b0520
BL		 1488 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1489
997b0520
BL		 1490 {"OUT MIXL", "BST1 Switch", "BST1"},
1491 {"OUT MIXL", "INL Switch", "INL VOL"},
1492 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
997b0520
BL		 1493 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1494
997b0520
BL		 1495 {"OUT MIXR", "BST2 Switch", "BST2"},
1496 {"OUT MIXR", "BST1 Switch", "BST1"},
1497 {"OUT MIXR", "INR Switch", "INR VOL"},
1498 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
997b0520
BL		 1499 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1500
1501 {"SPKVOL L", NULL, "SPK MIXL"},
1502 {"SPKVOL R", NULL, "SPK MIXR"},
1503 {"HPOVOL L", NULL, "OUT MIXL"},
1504 {"HPOVOL R", NULL, "OUT MIXR"},
1505 {"OUTVOL L", NULL, "OUT MIXL"},
1506 {"OUTVOL R", NULL, "OUT MIXR"},
1507
1508 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1509 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1510 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1511 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1512 {"SPOL MIX", "BST1 Switch", "BST1"},
1513 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1514 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1515 {"SPOR MIX", "BST1 Switch", "BST1"},
1516
997b0520
BL		 1517 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1518 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
246693ba 1519 {"HPO MIX L", NULL, "HP L Amp"},
997b0520
BL		 1520 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1521 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
246693ba 1522 {"HPO MIX R", NULL, "HP R Amp"},
997b0520
BL		 1523
1524 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1525 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1526 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1527 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1528
246693ba
BL		 1529 {"HP Amp", NULL, "HPO MIX L"},
1530 {"HP Amp", NULL, "HPO MIX R"},
997b0520 1531
246693ba
BL		 1532 {"Speaker L Playback", "Switch", "SPOL MIX"},
1533 {"Speaker R Playback", "Switch", "SPOR MIX"},
1534 {"SPOLP", NULL, "Speaker L Playback"},
1535 {"SPOLN", NULL, "Speaker L Playback"},
1536 {"SPORP", NULL, "Speaker R Playback"},
1537 {"SPORN", NULL, "Speaker R Playback"},
997b0520
BL		 1538
1539 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1540 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1541 {"SPORP", NULL, "Improve SPK Amp Drv"},
1542 {"SPORN", NULL, "Improve SPK Amp Drv"},
1543
1544 {"HPOL", NULL, "Improve HP Amp Drv"},
1545 {"HPOR", NULL, "Improve HP Amp Drv"},
1546
246693ba
BL		 1547 {"HP L Playback", "Switch", "HP Amp"},
1548 {"HP R Playback", "Switch", "HP Amp"},
1549 {"HPOL", NULL, "HP L Playback"},
1550 {"HPOR", NULL, "HP R Playback"},
9b850ca4
JL		 1551
1552 {"LOUT amp", NULL, "LOUT MIX"},
1553 {"LOUTL", NULL, "LOUT amp"},
1554 {"LOUTR", NULL, "LOUT amp"},
022d21f0
OC		 1555};
1556
1557static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = {
1558 {"ANC", NULL, "Stereo ADC MIXL"},
1559 {"ANC", NULL, "Stereo ADC MIXR"},
1560
1561 {"Audio DSP", NULL, "DAC MIXL"},
1562 {"Audio DSP", NULL, "DAC MIXR"},
1563
1564 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1565 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1566
1567 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1568
1569 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1570 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1571 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1572 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1573
1574 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1575 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1576
1577 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1578 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1579
1580 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1581 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1582
1583 {"DAC L2", NULL, "Mono DAC MIXL"},
1584 {"DAC L2", NULL, "PLL1", is_sys_clk_from_pll},
1585 {"DAC R2", NULL, "Mono DAC MIXR"},
1586 {"DAC R2", NULL, "PLL1", is_sys_clk_from_pll},
1587
1588 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1589 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1590
1591 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1592 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1593
1594 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1595 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1596
1597 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1598 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1599
1600 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1601 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1602
1603 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1604 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1605 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1606 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1607 {"Mono MIX", "BST1 Switch", "BST1"},
1608
997b0520
BL		 1609 {"MONOP", NULL, "Mono MIX"},
1610 {"MONON", NULL, "Mono MIX"},
1611 {"MONOP", NULL, "Improve MONO Amp Drv"},
1612};
1613
022d21f0
OC		 1614static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = {
1615 {"Stereo DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1616 {"Stereo DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1617
1618 {"Mono DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1619 {"Mono DAC MIXL", "DAC R2 Switch", "IF2 DAC R"},
1620
1621 {"Mono DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1622 {"Mono DAC MIXR", "DAC L2 Switch", "IF2 DAC L"},
1623
1624 {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"},
1625 {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"},
1626
1627 {"IF2 DAC L", NULL, "DAC L2 Filter"},
1628 {"IF2 DAC R", NULL, "DAC R2 Filter"},
1629};
1630
997b0520
BL		 1631static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1632{
1633 int ret = 0, val;
1634
1635 if (codec == NULL)
1636 return -EINVAL;
1637
1638 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1639 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1640 switch (dai_id) {
1641 case RT5640_AIF1:
1642 switch (val) {
1643 case RT5640_IF_123:
1644 case RT5640_IF_132:
1645 ret |= RT5640_U_IF1;
1646 break;
1647 case RT5640_IF_113:
1648 ret |= RT5640_U_IF1;
1649 case RT5640_IF_312:
1650 case RT5640_IF_213:
1651 ret |= RT5640_U_IF2;
1652 break;
1653 }
1654 break;
1655
1656 case RT5640_AIF2:
1657 switch (val) {
1658 case RT5640_IF_231:
1659 case RT5640_IF_213:
1660 ret |= RT5640_U_IF1;
1661 break;
1662 case RT5640_IF_223:
1663 ret |= RT5640_U_IF1;
1664 case RT5640_IF_123:
1665 case RT5640_IF_321:
1666 ret |= RT5640_U_IF2;
1667 break;
1668 }
1669 break;
1670
1671 default:
1672 ret = -EINVAL;
1673 break;
1674 }
1675
1676 return ret;
1677}
1678
997b0520
BL		 1679static int rt5640_hw_params(struct snd_pcm_substream *substream,
1680 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1681{
ab64246c 1682 struct snd_soc_codec *codec = dai->codec;
997b0520 1683 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
5a7615cf
TI		 1684 unsigned int val_len = 0, val_clk, mask_clk;
1685 int dai_sel, pre_div, bclk_ms, frame_size;
997b0520
BL		 1686
1687 rt5640->lrck[dai->id] = params_rate(params);
d92950e7 1688 pre_div = rl6231_get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
997b0520 1689 if (pre_div < 0) {
9e9cb9b9
LG		 1690 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1691 rt5640->lrck[dai->id], dai->id);
997b0520
BL		 1692 return -EINVAL;
1693 }
1694 frame_size = snd_soc_params_to_frame_size(params);
1695 if (frame_size < 0) {
1696 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1697 return frame_size;
1698 }
1699 if (frame_size > 32)
1700 bclk_ms = 1;
1701 else
1702 bclk_ms = 0;
1703 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1704
1705 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1706 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1707 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1708 bclk_ms, pre_div, dai->id);
1709
9bccae73
OC		 1710 switch (params_width(params)) {
1711 case 16:
997b0520 1712 break;
9bccae73 1713 case 20:
997b0520
BL		 1714 val_len |= RT5640_I2S_DL_20;
1715 break;
9bccae73 1716 case 24:
997b0520
BL		 1717 val_len |= RT5640_I2S_DL_24;
1718 break;
9bccae73 1719 case 8:
997b0520
BL		 1720 val_len |= RT5640_I2S_DL_8;
1721 break;
1722 default:
1723 return -EINVAL;
1724 }
1725
1726 dai_sel = get_sdp_info(codec, dai->id);
1727 if (dai_sel < 0) {
1728 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1729 return -EINVAL;
1730 }
1731 if (dai_sel & RT5640_U_IF1) {
1732 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1733 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1734 pre_div << RT5640_I2S_PD1_SFT;
1735 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1736 RT5640_I2S_DL_MASK, val_len);
1737 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1738 }
1739 if (dai_sel & RT5640_U_IF2) {
1740 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1741 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1742 pre_div << RT5640_I2S_PD2_SFT;
1743 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1744 RT5640_I2S_DL_MASK, val_len);
1745 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1746 }
1747
1748 return 0;
1749}
1750
1751static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1752{
1753 struct snd_soc_codec *codec = dai->codec;
1754 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
5a7615cf
TI		 1755 unsigned int reg_val = 0;
1756 int dai_sel;
997b0520
BL		 1757
1758 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1759 case SND_SOC_DAIFMT_CBM_CFM:
1760 rt5640->master[dai->id] = 1;
1761 break;
1762 case SND_SOC_DAIFMT_CBS_CFS:
1763 reg_val |= RT5640_I2S_MS_S;
1764 rt5640->master[dai->id] = 0;
1765 break;
1766 default:
1767 return -EINVAL;
1768 }
1769
1770 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1771 case SND_SOC_DAIFMT_NB_NF:
1772 break;
1773 case SND_SOC_DAIFMT_IB_NF:
1774 reg_val |= RT5640_I2S_BP_INV;
1775 break;
1776 default:
1777 return -EINVAL;
1778 }
1779
1780 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1781 case SND_SOC_DAIFMT_I2S:
1782 break;
1783 case SND_SOC_DAIFMT_LEFT_J:
1784 reg_val |= RT5640_I2S_DF_LEFT;
1785 break;
1786 case SND_SOC_DAIFMT_DSP_A:
1787 reg_val |= RT5640_I2S_DF_PCM_A;
1788 break;
1789 case SND_SOC_DAIFMT_DSP_B:
1790 reg_val |= RT5640_I2S_DF_PCM_B;
1791 break;
1792 default:
1793 return -EINVAL;
1794 }
1795
1796 dai_sel = get_sdp_info(codec, dai->id);
1797 if (dai_sel < 0) {
1798 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1799 return -EINVAL;
1800 }
1801 if (dai_sel & RT5640_U_IF1) {
1802 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1803 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1804 RT5640_I2S_DF_MASK, reg_val);
1805 }
1806 if (dai_sel & RT5640_U_IF2) {
1807 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1808 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1809 RT5640_I2S_DF_MASK, reg_val);
1810 }
1811
1812 return 0;
1813}
1814
1815static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1816 int clk_id, unsigned int freq, int dir)
1817{
1818 struct snd_soc_codec *codec = dai->codec;
1819 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1820 unsigned int reg_val = 0;
1821
1822 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1823 return 0;
1824
1825 switch (clk_id) {
1826 case RT5640_SCLK_S_MCLK:
1827 reg_val |= RT5640_SCLK_SRC_MCLK;
1828 break;
1829 case RT5640_SCLK_S_PLL1:
1830 reg_val |= RT5640_SCLK_SRC_PLL1;
1831 break;
997b0520
BL		 1832 default:
1833 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1834 return -EINVAL;
1835 }
1836 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1837 RT5640_SCLK_SRC_MASK, reg_val);
1838 rt5640->sysclk = freq;
1839 rt5640->sysclk_src = clk_id;
1840
1841 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1842 return 0;
1843}
1844
997b0520
BL		 1845static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1846 unsigned int freq_in, unsigned int freq_out)
1847{
1848 struct snd_soc_codec *codec = dai->codec;
1849 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
71c7a2d6 1850 struct rl6231_pll_code pll_code;
997b0520
BL		 1851 int ret, dai_sel;
1852
1853 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1854 freq_out == rt5640->pll_out)
1855 return 0;
1856
1857 if (!freq_in || !freq_out) {
1858 dev_dbg(codec->dev, "PLL disabled\n");
1859
1860 rt5640->pll_in = 0;
1861 rt5640->pll_out = 0;
1862 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1863 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1864 return 0;
1865 }
1866
1867 switch (source) {
1868 case RT5640_PLL1_S_MCLK:
1869 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1870 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1871 break;
1872 case RT5640_PLL1_S_BCLK1:
1873 case RT5640_PLL1_S_BCLK2:
1874 dai_sel = get_sdp_info(codec, dai->id);
1875 if (dai_sel < 0) {
1876 dev_err(codec->dev,
1877 "Failed to get sdp info: %d\n", dai_sel);
1878 return -EINVAL;
1879 }
1880 if (dai_sel & RT5640_U_IF1) {
1881 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1882 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1883 }
1884 if (dai_sel & RT5640_U_IF2) {
1885 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1886 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1887 }
1888 break;
1889 default:
1890 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1891 return -EINVAL;
1892 }
1893
71c7a2d6 1894 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
997b0520
BL		 1895 if (ret < 0) {
1896 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1897 return ret;
1898 }
1899
71c7a2d6
OC		 1900 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1901 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1902 pll_code.n_code, pll_code.k_code);
997b0520
BL		 1903
1904 snd_soc_write(codec, RT5640_PLL_CTRL1,
71c7a2d6 1905 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
997b0520 1906 snd_soc_write(codec, RT5640_PLL_CTRL2,
71c7a2d6
OC		 1907 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
1908 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
997b0520
BL		 1909
1910 rt5640->pll_in = freq_in;
1911 rt5640->pll_out = freq_out;
1912 rt5640->pll_src = source;
1913
1914 return 0;
1915}
1916
1917static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1918 enum snd_soc_bias_level level)
1919{
997b0520
BL		 1920 switch (level) {
1921 case SND_SOC_BIAS_STANDBY:
76aad74b 1922 if (SND_SOC_BIAS_OFF == snd_soc_codec_get_bias_level(codec)) {
997b0520
BL		 1923 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1924 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1925 RT5640_PWR_BG | RT5640_PWR_VREF2,
1926 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1927 RT5640_PWR_BG | RT5640_PWR_VREF2);
246693ba 1928 usleep_range(10000, 15000);
997b0520
BL		 1929 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1930 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1931 RT5640_PWR_FV1 | RT5640_PWR_FV2);
997b0520
BL		 1932 snd_soc_update_bits(codec, RT5640_DUMMY1,
1933 0x0301, 0x0301);
997b0520
BL		 1934 snd_soc_update_bits(codec, RT5640_MICBIAS,
1935 0x0030, 0x0030);
1936 }
1937 break;
1938
1939 case SND_SOC_BIAS_OFF:
1940 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1941 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1942 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1943 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1944 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1945 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1946 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1947 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1948 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1949 break;
1950
1951 default:
1952 break;
1953 }
997b0520
BL		 1954
1955 return 0;
1956}
1957
cd69dc88
JN		 1958int rt5640_dmic_enable(struct snd_soc_codec *codec,
1959 bool dmic1_data_pin, bool dmic2_data_pin)
1960{
1961 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1962
1963 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
1964 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
1965
1966 if (dmic1_data_pin) {
1967 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
1968 RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
1969 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
1970 RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
1971 }
1972
1973 if (dmic2_data_pin) {
1974 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
1975 RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
1976 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
1977 RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
1978 }
1979
1980 return 0;
1981}
1982EXPORT_SYMBOL_GPL(rt5640_dmic_enable);
1983
997b0520
BL		 1984static int rt5640_probe(struct snd_soc_codec *codec)
1985{
76aad74b 1986 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
997b0520 1987 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
997b0520
BL		 1988
1989 rt5640->codec = codec;
997b0520 1990
bd1204cb 1991 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
997b0520
BL		 1992
1993 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
997b0520
BL		 1994 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1995 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1996
8bfc6d2d
BL		 1997 switch (snd_soc_read(codec, RT5640_RESET) & RT5640_ID_MASK) {
1998 case RT5640_ID_5640:
1999 case RT5640_ID_5642:
022d21f0
OC		 2000 snd_soc_add_codec_controls(codec,
2001 rt5640_specific_snd_controls,
2002 ARRAY_SIZE(rt5640_specific_snd_controls));
76aad74b 2003 snd_soc_dapm_new_controls(dapm,
022d21f0
OC		 2004 rt5640_specific_dapm_widgets,
2005 ARRAY_SIZE(rt5640_specific_dapm_widgets));
76aad74b 2006 snd_soc_dapm_add_routes(dapm,
022d21f0
OC		 2007 rt5640_specific_dapm_routes,
2008 ARRAY_SIZE(rt5640_specific_dapm_routes));
2009 break;
8bfc6d2d 2010 case RT5640_ID_5639:
76aad74b 2011 snd_soc_dapm_new_controls(dapm,
022d21f0
OC		 2012 rt5639_specific_dapm_widgets,
2013 ARRAY_SIZE(rt5639_specific_dapm_widgets));
76aad74b 2014 snd_soc_dapm_add_routes(dapm,
022d21f0
OC		 2015 rt5639_specific_dapm_routes,
2016 ARRAY_SIZE(rt5639_specific_dapm_routes));
2017 break;
57f174f4
BL		 2018 default:
2019 dev_err(codec->dev,
2020 "The driver is for RT5639 RT5640 or RT5642 only\n");
2021 return -ENODEV;
022d21f0
OC		 2022 }
2023
cd69dc88
JN		 2024 if (rt5640->pdata.dmic_en)
2025 rt5640_dmic_enable(codec, rt5640->pdata.dmic1_data_pin,
2026 rt5640->pdata.dmic2_data_pin);
2027
997b0520
BL		 2028 return 0;
2029}
2030
2031static int rt5640_remove(struct snd_soc_codec *codec)
2032{
2033 rt5640_reset(codec);
2034
2035 return 0;
2036}
2037
2038#ifdef CONFIG_PM
2039static int rt5640_suspend(struct snd_soc_codec *codec)
2040{
2041 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2042
bd1204cb 2043 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
997b0520
BL		 2044 rt5640_reset(codec);
2045 regcache_cache_only(rt5640->regmap, true);
2046 regcache_mark_dirty(rt5640->regmap);
e58f301e
MB		 2047 if (gpio_is_valid(rt5640->pdata.ldo1_en))
2048 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0);
997b0520
BL		 2049
2050 return 0;
2051}
2052
2053static int rt5640_resume(struct snd_soc_codec *codec)
2054{
e58f301e
MB		 2055 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2056
2057 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
2058 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1);
2059 msleep(400);
2060 }
997b0520 2061
4c9185be
OC		 2062 regcache_cache_only(rt5640->regmap, false);
2063 regcache_sync(rt5640->regmap);
2064
997b0520
BL		 2065 return 0;
2066}
2067#else
2068#define rt5640_suspend NULL
2069#define rt5640_resume NULL
2070#endif
2071
2072#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2073#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2074 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2075
9be94aea 2076static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
997b0520
BL		 2077 .hw_params = rt5640_hw_params,
2078 .set_fmt = rt5640_set_dai_fmt,
2079 .set_sysclk = rt5640_set_dai_sysclk,
2080 .set_pll = rt5640_set_dai_pll,
2081};
2082
9be94aea 2083static struct snd_soc_dai_driver rt5640_dai[] = {
997b0520
BL		 2084 {
2085 .name = "rt5640-aif1",
2086 .id = RT5640_AIF1,
2087 .playback = {
2088 .stream_name = "AIF1 Playback",
2089 .channels_min = 1,
2090 .channels_max = 2,
2091 .rates = RT5640_STEREO_RATES,
2092 .formats = RT5640_FORMATS,
2093 },
2094 .capture = {
2095 .stream_name = "AIF1 Capture",
2096 .channels_min = 1,
2097 .channels_max = 2,
2098 .rates = RT5640_STEREO_RATES,
2099 .formats = RT5640_FORMATS,
2100 },
2101 .ops = &rt5640_aif_dai_ops,
2102 },
2103 {
2104 .name = "rt5640-aif2",
2105 .id = RT5640_AIF2,
2106 .playback = {
2107 .stream_name = "AIF2 Playback",
2108 .channels_min = 1,
2109 .channels_max = 2,
2110 .rates = RT5640_STEREO_RATES,
2111 .formats = RT5640_FORMATS,
2112 },
2113 .capture = {
2114 .stream_name = "AIF2 Capture",
2115 .channels_min = 1,
2116 .channels_max = 2,
2117 .rates = RT5640_STEREO_RATES,
2118 .formats = RT5640_FORMATS,
2119 },
2120 .ops = &rt5640_aif_dai_ops,
2121 },
2122};
2123
2124static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2125 .probe = rt5640_probe,
2126 .remove = rt5640_remove,
2127 .suspend = rt5640_suspend,
2128 .resume = rt5640_resume,
2129 .set_bias_level = rt5640_set_bias_level,
09caf300 2130 .idle_bias_off = true,
997b0520
BL		 2131 .controls = rt5640_snd_controls,
2132 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2133 .dapm_widgets = rt5640_dapm_widgets,
2134 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2135 .dapm_routes = rt5640_dapm_routes,
2136 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2137};
2138
2139static const struct regmap_config rt5640_regmap = {
2140 .reg_bits = 8,
2141 .val_bits = 16,
f4821e8e 2142 .use_single_rw = true,
997b0520
BL		 2143
2144 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2145 RT5640_PR_SPACING),
2146 .volatile_reg = rt5640_volatile_register,
2147 .readable_reg = rt5640_readable_register,
2148
2149 .cache_type = REGCACHE_RBTREE,
2150 .reg_defaults = rt5640_reg,
2151 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2152 .ranges = rt5640_ranges,
2153 .num_ranges = ARRAY_SIZE(rt5640_ranges),
2154};
2155
2156static const struct i2c_device_id rt5640_i2c_id[] = {
2157 { "rt5640", 0 },
b0c27846 2158 { "rt5639", 0 },
8bfc6d2d 2159 { "rt5642", 0 },
997b0520
BL		 2160 { }
2161};
2162MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2163
03a620d8
SW		 2164#if defined(CONFIG_OF)
2165static const struct of_device_id rt5640_of_match[] = {
33fcec29 2166 { .compatible = "realtek,rt5639", },
03a620d8
SW		 2167 { .compatible = "realtek,rt5640", },
2168 {},
2169};
2170MODULE_DEVICE_TABLE(of, rt5640_of_match);
2171#endif
2172
32fcb97b 2173#ifdef CONFIG_ACPI
b895dc2c 2174static const struct acpi_device_id rt5640_acpi_match[] = {
02b80773 2175 { "INT33CA", 0 },
b31b2b6d 2176 { "10EC5640", 0 },
3463667a 2177 { "10EC5642", 0 },
02b80773
LG		 2178 { },
2179};
2180MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
32fcb97b 2181#endif
02b80773 2182
dcad9f03
SW		 2183static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2184{
2185 rt5640->pdata.in1_diff = of_property_read_bool(np,
2186 "realtek,in1-differential");
2187 rt5640->pdata.in2_diff = of_property_read_bool(np,
2188 "realtek,in2-differential");
2189
2190 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2191 "realtek,ldo1-en-gpios", 0);
2192 /*
2193 * LDO1_EN is optional (it may be statically tied on the board).
2194 * -ENOENT means that the property doesn't exist, i.e. there is no
2195 * GPIO, so is not an error. Any other error code means the property
2196 * exists, but could not be parsed.
2197 */
2198 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2199 (rt5640->pdata.ldo1_en != -ENOENT))
2200 return rt5640->pdata.ldo1_en;
2201
2202 return 0;
2203}
2204
997b0520
BL		 2205static int rt5640_i2c_probe(struct i2c_client *i2c,
2206 const struct i2c_device_id *id)
2207{
2208 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2209 struct rt5640_priv *rt5640;
2210 int ret;
2211 unsigned int val;
2212
2213 rt5640 = devm_kzalloc(&i2c->dev,
2214 sizeof(struct rt5640_priv),
2215 GFP_KERNEL);
2216 if (NULL == rt5640)
2217 return -ENOMEM;
dcad9f03
SW		 2218 i2c_set_clientdata(i2c, rt5640);
2219
2220 if (pdata) {
2221 rt5640->pdata = *pdata;
2222 /*
2223 * Translate zero'd out (default) pdata value to an invalid
2224 * GPIO ID. This makes the pdata and DT paths consistent in
2225 * terms of the value left in this field when no GPIO is
2226 * specified, but means we can't actually use GPIO 0.
2227 */
2228 if (!rt5640->pdata.ldo1_en)
2229 rt5640->pdata.ldo1_en = -EINVAL;
2230 } else if (i2c->dev.of_node) {
2231 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2232 if (ret)
2233 return ret;
2234 } else
2235 rt5640->pdata.ldo1_en = -EINVAL;
997b0520
BL		 2236
2237 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2238 if (IS_ERR(rt5640->regmap)) {
2239 ret = PTR_ERR(rt5640->regmap);
2240 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2241 ret);
2242 return ret;
2243 }
2244
dcad9f03 2245 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
997b0520
BL		 2246 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2247 GPIOF_OUT_INIT_HIGH,
2248 "RT5640 LDO1_EN");
2249 if (ret < 0) {
2250 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2251 rt5640->pdata.ldo1_en, ret);
2252 return ret;
2253 }
2254 msleep(400);
2255 }
2256
2257 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
3441e524 2258 if (val != RT5640_DEVICE_ID) {
997b0520 2259 dev_err(&i2c->dev,
818454d1 2260 "Device with ID register %#x is not rt5640/39\n", val);
997b0520
BL		 2261 return -ENODEV;
2262 }
2263
2264 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2265
2266 ret = regmap_register_patch(rt5640->regmap, init_list,
2267 ARRAY_SIZE(init_list));
2268 if (ret != 0)
2269 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2270
2271 if (rt5640->pdata.in1_diff)
2272 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2273 RT5640_IN_DF1, RT5640_IN_DF1);
2274
2275 if (rt5640->pdata.in2_diff)
2276 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2277 RT5640_IN_DF2, RT5640_IN_DF2);
2278
16566e47
OC		 2279 if (rt5640->pdata.in3_diff)
2280 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2281 RT5640_IN_DF2, RT5640_IN_DF2);
2282
246693ba
BL		 2283 rt5640->hp_mute = 1;
2284
1657caf5
AL		 2285 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2286 rt5640_dai, ARRAY_SIZE(rt5640_dai));
997b0520
BL		 2287}
2288
2289static int rt5640_i2c_remove(struct i2c_client *i2c)
2290{
2291 snd_soc_unregister_codec(&i2c->dev);
2292
2293 return 0;
2294}
2295
9be94aea 2296static struct i2c_driver rt5640_i2c_driver = {
997b0520
BL		 2297 .driver = {
2298 .name = "rt5640",
02b80773 2299 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),
03a620d8 2300 .of_match_table = of_match_ptr(rt5640_of_match),
997b0520
BL		 2301 },
2302 .probe = rt5640_i2c_probe,
2303 .remove = rt5640_i2c_remove,
2304 .id_table = rt5640_i2c_id,
2305};
2306module_i2c_driver(rt5640_i2c_driver);
2307
b0c27846 2308MODULE_DESCRIPTION("ASoC RT5640/RT5639 driver");
997b0520
BL		 2309MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2310MODULE_LICENSE("GPL v2");
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