projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 4dc69be2 VK |
1 | /* |
| 2 | * sn95031.h - TI sn95031 Codec driver | |
| 3 | * | |
| 4 | * Copyright (C) 2010 Intel Corp | |
| 5 | * Author: Vinod Koul <vinod.koul@intel.com> | |
| 6 | * Author: Harsha Priya <priya.harsha@intel.com> | |
| 7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 8 | * | |
| 9 | * This program is free software; you can redistribute it and/or modify | |
| 10 | * it under the terms of the GNU General Public License as published by | |
| 11 | * the Free Software Foundation; version 2 of the License. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, but | |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 16 | * General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License along | |
| 19 | * with this program; if not, write to the Free Software Foundation, Inc., | |
| 20 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
| 21 | * | |
| 22 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 23 | * | |
| 24 | * | |
| 25 | */ | |
| 26 | #ifndef _SN95031_H | |
| 27 | #define _SN95031_H | |
| 28 | ||
| 29 | /*register map*/ | |
| 30 | #define SN95031_VAUD 0xDB | |
| 31 | #define SN95031_VHSP 0xDC | |
| 32 | #define SN95031_VHSN 0xDD | |
| 33 | #define SN95031_VIHF 0xC9 | |
| 34 | ||
| 35 | #define SN95031_AUDPLLCTRL 0x240 | |
| 36 | #define SN95031_DMICBUF0123 0x241 | |
| 37 | #define SN95031_DMICBUF45 0x242 | |
| b22dab88 VK |
38 | #define SN95031_DMICGPO 0x244 |
| 39 | #define SN95031_DMICMUX 0x245 | |
| 4dc69be2 | 40 | #define SN95031_DMICLK 0x246 |
| b22dab88 | 41 | #define SN95031_MICBIAS 0x247 |
| 4dc69be2 | 42 | #define SN95031_ADCCONFIG 0x248 |
| b22dab88 VK |
43 | #define SN95031_MICAMP1 0x249 |
| 44 | #define SN95031_MICAMP2 0x24A | |
| 4dc69be2 VK |
45 | #define SN95031_NOISEMUX 0x24B |
| 46 | #define SN95031_AUDIOMUX12 0x24C | |
| 47 | #define SN95031_AUDIOMUX34 0x24D | |
| 48 | #define SN95031_AUDIOSINC 0x24E | |
| 49 | #define SN95031_AUDIOTXEN 0x24F | |
| 50 | #define SN95031_HSEPRXCTRL 0x250 | |
| 51 | #define SN95031_IHFRXCTRL 0x251 | |
| b22dab88 | 52 | #define SN95031_HSMIXER 0x256 |
| 4dc69be2 VK |
53 | #define SN95031_DACCONFIG 0x257 |
| 54 | #define SN95031_SOFTMUTE 0x258 | |
| 55 | #define SN95031_HSLVOLCTRL 0x259 | |
| 56 | #define SN95031_HSRVOLCTRL 0x25A | |
| 57 | #define SN95031_IHFLVOLCTRL 0x25B | |
| 58 | #define SN95031_IHFRVOLCTRL 0x25C | |
| 59 | #define SN95031_DRIVEREN 0x25D | |
| 60 | #define SN95031_LOCTL 0x25E | |
| 61 | #define SN95031_VIB1C1 0x25F | |
| 62 | #define SN95031_VIB1C2 0x260 | |
| 63 | #define SN95031_VIB1C3 0x261 | |
| 64 | #define SN95031_VIB1SPIPCM1 0x262 | |
| 65 | #define SN95031_VIB1SPIPCM2 0x263 | |
| 66 | #define SN95031_VIB1C5 0x264 | |
| 67 | #define SN95031_VIB2C1 0x265 | |
| 68 | #define SN95031_VIB2C2 0x266 | |
| 69 | #define SN95031_VIB2C3 0x267 | |
| 70 | #define SN95031_VIB2SPIPCM1 0x268 | |
| 71 | #define SN95031_VIB2SPIPCM2 0x269 | |
| 72 | #define SN95031_VIB2C5 0x26A | |
| 73 | #define SN95031_BTNCTRL1 0x26B | |
| 74 | #define SN95031_BTNCTRL2 0x26C | |
| 75 | #define SN95031_PCM1TXSLOT01 0x26D | |
| 76 | #define SN95031_PCM1TXSLOT23 0x26E | |
| 77 | #define SN95031_PCM1TXSLOT45 0x26F | |
| 78 | #define SN95031_PCM1RXSLOT0_3 0x270 | |
| 79 | #define SN95031_PCM1RXSLOT45 0x271 | |
| 80 | #define SN95031_PCM2TXSLOT01 0x272 | |
| 81 | #define SN95031_PCM2TXSLOT23 0x273 | |
| 82 | #define SN95031_PCM2TXSLOT45 0x274 | |
| 83 | #define SN95031_PCM2RXSLOT01 0x275 | |
| 84 | #define SN95031_PCM2RXSLOT23 0x276 | |
| 85 | #define SN95031_PCM2RXSLOT45 0x277 | |
| 86 | #define SN95031_PCM1C1 0x278 | |
| 87 | #define SN95031_PCM1C2 0x279 | |
| 88 | #define SN95031_PCM1C3 0x27A | |
| 89 | #define SN95031_PCM2C1 0x27B | |
| 90 | #define SN95031_PCM2C2 0x27C | |
| 91 | /*end codec register defn*/ | |
| 92 | ||
| 93 | /*vendor defn these are not part of avp*/ | |
| 94 | #define SN95031_SSR2 0x381 | |
| 95 | #define SN95031_SSR3 0x382 | |
| 96 | #define SN95031_SSR5 0x384 | |
| 97 | #define SN95031_SSR6 0x385 | |
| 98 | ||
| 36633237 VK |
99 | /* ADC registers */ |
| 100 | ||
| 101 | #define SN95031_ADC1CNTL1 0x1C0 | |
| 102 | #define SN95031_ADC_ENBL 0x10 | |
| 103 | #define SN95031_ADC_START 0x08 | |
| 104 | #define SN95031_ADC1CNTL3 0x1C2 | |
| 105 | #define SN95031_ADCTHERM_ENBL 0x04 | |
| 106 | #define SN95031_ADCRRDATA_ENBL 0x05 | |
| 107 | #define SN95031_STOPBIT_MASK 16 | |
| 108 | #define SN95031_ADCTHERM_MASK 4 | |
| 109 | #define SN95031_ADC_CHANLS_MAX 15 /* Number of ADC channels */ | |
| 110 | #define SN95031_ADC_LOOP_MAX (SN95031_ADC_CHANLS_MAX - 1) | |
| 111 | #define SN95031_ADC_NO_LOOP 0x07 | |
| 1e2f5932 | 112 | #define SN95031_AUDIO_GPIO_CTRL 0x070 |
| 36633237 VK |
113 | |
| 114 | /* ADC channel code values */ | |
| 115 | #define SN95031_AUDIO_DETECT_CODE 0x06 | |
| 116 | ||
| 117 | /* ADC base addresses */ | |
| 118 | #define SN95031_ADC_CHNL_START_ADDR 0x1C5 /* increments by 1 */ | |
| 119 | #define SN95031_ADC_DATA_START_ADDR 0x1D4 /* increments by 2 */ | |
| 120 | /* multipier to convert to mV */ | |
| 121 | #define SN95031_ADC_ONE_LSB_MULTIPLIER 2346 | |
| 122 | ||
| 123 | ||
| 1e2f5932 VK |
124 | struct mfld_jack_data { |
| 125 | int intr_id; | |
| 126 | int micbias_vol; | |
| 127 | struct snd_soc_jack *mfld_jack; | |
| 128 | }; | |
| 129 | ||
| c472b939 LPC |
130 | extern void sn95031_jack_detection(struct snd_soc_codec *codec, |
| 131 | struct mfld_jack_data *jack_data); | |
| 1e2f5932 | 132 | |
| 4dc69be2 | 133 | #endif |