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3d5fa527 PR |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // tfa9879.c -- driver for NXP Semiconductors TFA9879 | |
4 | // | |
5 | // Copyright (C) 2014 Axentia Technologies AB | |
6 | // Author: Peter Rosin <peda@axentia.se> | |
fbace43e PR |
7 | |
8 | #include <linux/module.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/i2c.h> | |
11 | #include <linux/regmap.h> | |
12 | #include <sound/soc.h> | |
13 | #include <sound/tlv.h> | |
14 | #include <sound/pcm_params.h> | |
15 | ||
16 | #include "tfa9879.h" | |
17 | ||
18 | struct tfa9879_priv { | |
19 | struct regmap *regmap; | |
20 | int lsb_justified; | |
21 | }; | |
22 | ||
23 | static int tfa9879_hw_params(struct snd_pcm_substream *substream, | |
24 | struct snd_pcm_hw_params *params, | |
25 | struct snd_soc_dai *dai) | |
26 | { | |
064f6682 KM |
27 | struct snd_soc_component *component = dai->component; |
28 | struct tfa9879_priv *tfa9879 = snd_soc_component_get_drvdata(component); | |
fbace43e PR |
29 | int fs; |
30 | int i2s_set = 0; | |
31 | ||
32 | switch (params_rate(params)) { | |
33 | case 8000: | |
34 | fs = TFA9879_I2S_FS_8000; | |
35 | break; | |
36 | case 11025: | |
37 | fs = TFA9879_I2S_FS_11025; | |
38 | break; | |
39 | case 12000: | |
40 | fs = TFA9879_I2S_FS_12000; | |
41 | break; | |
42 | case 16000: | |
43 | fs = TFA9879_I2S_FS_16000; | |
44 | break; | |
45 | case 22050: | |
46 | fs = TFA9879_I2S_FS_22050; | |
47 | break; | |
48 | case 24000: | |
49 | fs = TFA9879_I2S_FS_24000; | |
50 | break; | |
51 | case 32000: | |
52 | fs = TFA9879_I2S_FS_32000; | |
53 | break; | |
54 | case 44100: | |
55 | fs = TFA9879_I2S_FS_44100; | |
56 | break; | |
57 | case 48000: | |
58 | fs = TFA9879_I2S_FS_48000; | |
59 | break; | |
60 | case 64000: | |
61 | fs = TFA9879_I2S_FS_64000; | |
62 | break; | |
63 | case 88200: | |
64 | fs = TFA9879_I2S_FS_88200; | |
65 | break; | |
66 | case 96000: | |
67 | fs = TFA9879_I2S_FS_96000; | |
68 | break; | |
69 | default: | |
70 | return -EINVAL; | |
71 | } | |
72 | ||
73 | switch (params_width(params)) { | |
74 | case 16: | |
75 | i2s_set = TFA9879_I2S_SET_LSB_J_16; | |
76 | break; | |
77 | case 24: | |
78 | i2s_set = TFA9879_I2S_SET_LSB_J_24; | |
79 | break; | |
80 | default: | |
81 | return -EINVAL; | |
82 | } | |
83 | ||
84 | if (tfa9879->lsb_justified) | |
42a2b674 PR |
85 | snd_soc_component_update_bits(component, |
86 | TFA9879_SERIAL_INTERFACE_1, | |
87 | TFA9879_I2S_SET_MASK, | |
88 | i2s_set << TFA9879_I2S_SET_SHIFT); | |
fbace43e | 89 | |
064f6682 | 90 | snd_soc_component_update_bits(component, TFA9879_SERIAL_INTERFACE_1, |
42a2b674 PR |
91 | TFA9879_I2S_FS_MASK, |
92 | fs << TFA9879_I2S_FS_SHIFT); | |
fbace43e PR |
93 | return 0; |
94 | } | |
95 | ||
54b59270 | 96 | static int tfa9879_mute_stream(struct snd_soc_dai *dai, int mute, int direction) |
fbace43e | 97 | { |
064f6682 | 98 | struct snd_soc_component *component = dai->component; |
fbace43e | 99 | |
064f6682 | 100 | snd_soc_component_update_bits(component, TFA9879_MISC_CONTROL, |
42a2b674 PR |
101 | TFA9879_S_MUTE_MASK, |
102 | !!mute << TFA9879_S_MUTE_SHIFT); | |
fbace43e PR |
103 | |
104 | return 0; | |
105 | } | |
106 | ||
107 | static int tfa9879_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |
108 | { | |
064f6682 KM |
109 | struct snd_soc_component *component = dai->component; |
110 | struct tfa9879_priv *tfa9879 = snd_soc_component_get_drvdata(component); | |
fbace43e PR |
111 | int i2s_set; |
112 | int sck_pol; | |
113 | ||
114 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
115 | case SND_SOC_DAIFMT_CBS_CFS: | |
116 | break; | |
117 | default: | |
118 | return -EINVAL; | |
119 | } | |
120 | ||
121 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
122 | case SND_SOC_DAIFMT_NB_NF: | |
123 | sck_pol = TFA9879_SCK_POL_NORMAL; | |
124 | break; | |
125 | case SND_SOC_DAIFMT_IB_NF: | |
126 | sck_pol = TFA9879_SCK_POL_INVERSE; | |
127 | break; | |
128 | default: | |
129 | return -EINVAL; | |
130 | } | |
131 | ||
132 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
133 | case SND_SOC_DAIFMT_I2S: | |
134 | tfa9879->lsb_justified = 0; | |
135 | i2s_set = TFA9879_I2S_SET_I2S_24; | |
136 | break; | |
137 | case SND_SOC_DAIFMT_LEFT_J: | |
138 | tfa9879->lsb_justified = 0; | |
139 | i2s_set = TFA9879_I2S_SET_MSB_J_24; | |
140 | break; | |
141 | case SND_SOC_DAIFMT_RIGHT_J: | |
142 | tfa9879->lsb_justified = 1; | |
143 | i2s_set = TFA9879_I2S_SET_LSB_J_24; | |
144 | break; | |
145 | default: | |
146 | return -EINVAL; | |
147 | } | |
148 | ||
064f6682 | 149 | snd_soc_component_update_bits(component, TFA9879_SERIAL_INTERFACE_1, |
42a2b674 PR |
150 | TFA9879_SCK_POL_MASK, |
151 | sck_pol << TFA9879_SCK_POL_SHIFT); | |
064f6682 | 152 | snd_soc_component_update_bits(component, TFA9879_SERIAL_INTERFACE_1, |
42a2b674 PR |
153 | TFA9879_I2S_SET_MASK, |
154 | i2s_set << TFA9879_I2S_SET_SHIFT); | |
fbace43e PR |
155 | return 0; |
156 | } | |
157 | ||
c418a84a | 158 | static const struct reg_default tfa9879_regs[] = { |
fbace43e PR |
159 | { TFA9879_DEVICE_CONTROL, 0x0000 }, /* 0x00 */ |
160 | { TFA9879_SERIAL_INTERFACE_1, 0x0a18 }, /* 0x01 */ | |
161 | { TFA9879_PCM_IOM2_FORMAT_1, 0x0007 }, /* 0x02 */ | |
162 | { TFA9879_SERIAL_INTERFACE_2, 0x0a18 }, /* 0x03 */ | |
163 | { TFA9879_PCM_IOM2_FORMAT_2, 0x0007 }, /* 0x04 */ | |
164 | { TFA9879_EQUALIZER_A1, 0x59dd }, /* 0x05 */ | |
165 | { TFA9879_EQUALIZER_A2, 0xc63e }, /* 0x06 */ | |
166 | { TFA9879_EQUALIZER_B1, 0x651a }, /* 0x07 */ | |
167 | { TFA9879_EQUALIZER_B2, 0xe53e }, /* 0x08 */ | |
168 | { TFA9879_EQUALIZER_C1, 0x4616 }, /* 0x09 */ | |
169 | { TFA9879_EQUALIZER_C2, 0xd33e }, /* 0x0a */ | |
170 | { TFA9879_EQUALIZER_D1, 0x4df3 }, /* 0x0b */ | |
171 | { TFA9879_EQUALIZER_D2, 0xea3e }, /* 0x0c */ | |
172 | { TFA9879_EQUALIZER_E1, 0x5ee0 }, /* 0x0d */ | |
173 | { TFA9879_EQUALIZER_E2, 0xf93e }, /* 0x0e */ | |
174 | { TFA9879_BYPASS_CONTROL, 0x0093 }, /* 0x0f */ | |
175 | { TFA9879_DYNAMIC_RANGE_COMPR, 0x92ba }, /* 0x10 */ | |
176 | { TFA9879_BASS_TREBLE, 0x12a5 }, /* 0x11 */ | |
177 | { TFA9879_HIGH_PASS_FILTER, 0x0004 }, /* 0x12 */ | |
178 | { TFA9879_VOLUME_CONTROL, 0x10bd }, /* 0x13 */ | |
179 | { TFA9879_MISC_CONTROL, 0x0000 }, /* 0x14 */ | |
180 | }; | |
181 | ||
182 | static bool tfa9879_volatile_reg(struct device *dev, unsigned int reg) | |
183 | { | |
184 | return reg == TFA9879_MISC_STATUS; | |
185 | } | |
186 | ||
187 | static const DECLARE_TLV_DB_SCALE(volume_tlv, -7050, 50, 1); | |
188 | static const DECLARE_TLV_DB_SCALE(tb_gain_tlv, -1800, 200, 0); | |
189 | static const char * const tb_freq_text[] = { | |
190 | "Low", "Mid", "High" | |
191 | }; | |
192 | static const struct soc_enum treble_freq_enum = | |
193 | SOC_ENUM_SINGLE(TFA9879_BASS_TREBLE, TFA9879_F_TRBLE_SHIFT, | |
194 | ARRAY_SIZE(tb_freq_text), tb_freq_text); | |
195 | static const struct soc_enum bass_freq_enum = | |
196 | SOC_ENUM_SINGLE(TFA9879_BASS_TREBLE, TFA9879_F_BASS_SHIFT, | |
197 | ARRAY_SIZE(tb_freq_text), tb_freq_text); | |
198 | ||
199 | static const struct snd_kcontrol_new tfa9879_controls[] = { | |
200 | SOC_SINGLE_TLV("PCM Playback Volume", TFA9879_VOLUME_CONTROL, | |
201 | TFA9879_VOL_SHIFT, 0xbd, 1, volume_tlv), | |
202 | SOC_SINGLE_TLV("Treble Volume", TFA9879_BASS_TREBLE, | |
203 | TFA9879_G_TRBLE_SHIFT, 18, 0, tb_gain_tlv), | |
204 | SOC_SINGLE_TLV("Bass Volume", TFA9879_BASS_TREBLE, | |
205 | TFA9879_G_BASS_SHIFT, 18, 0, tb_gain_tlv), | |
206 | SOC_ENUM("Treble Corner Freq", treble_freq_enum), | |
207 | SOC_ENUM("Bass Corner Freq", bass_freq_enum), | |
208 | }; | |
209 | ||
210 | static const struct snd_soc_dapm_widget tfa9879_dapm_widgets[] = { | |
211 | SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0), | |
212 | SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0), | |
213 | SND_SOC_DAPM_DAC("DAC", NULL, TFA9879_DEVICE_CONTROL, TFA9879_OPMODE_SHIFT, 0), | |
214 | SND_SOC_DAPM_OUTPUT("LINEOUT"), | |
215 | SND_SOC_DAPM_SUPPLY("POWER", TFA9879_DEVICE_CONTROL, TFA9879_POWERUP_SHIFT, 0, | |
216 | NULL, 0), | |
217 | }; | |
218 | ||
219 | static const struct snd_soc_dapm_route tfa9879_dapm_routes[] = { | |
220 | { "DAC", NULL, "AIFINL" }, | |
221 | { "DAC", NULL, "AIFINR" }, | |
222 | ||
223 | { "LINEOUT", NULL, "DAC" }, | |
224 | ||
225 | { "DAC", NULL, "POWER" }, | |
226 | }; | |
227 | ||
064f6682 KM |
228 | static const struct snd_soc_component_driver tfa9879_component = { |
229 | .controls = tfa9879_controls, | |
230 | .num_controls = ARRAY_SIZE(tfa9879_controls), | |
231 | .dapm_widgets = tfa9879_dapm_widgets, | |
232 | .num_dapm_widgets = ARRAY_SIZE(tfa9879_dapm_widgets), | |
233 | .dapm_routes = tfa9879_dapm_routes, | |
234 | .num_dapm_routes = ARRAY_SIZE(tfa9879_dapm_routes), | |
235 | .idle_bias_on = 1, | |
236 | .use_pmdown_time = 1, | |
237 | .endianness = 1, | |
238 | .non_legacy_dai_naming = 1, | |
fbace43e PR |
239 | }; |
240 | ||
241 | static const struct regmap_config tfa9879_regmap = { | |
242 | .reg_bits = 8, | |
243 | .val_bits = 16, | |
244 | ||
245 | .volatile_reg = tfa9879_volatile_reg, | |
246 | .max_register = TFA9879_MISC_STATUS, | |
247 | .reg_defaults = tfa9879_regs, | |
248 | .num_reg_defaults = ARRAY_SIZE(tfa9879_regs), | |
249 | .cache_type = REGCACHE_RBTREE, | |
250 | }; | |
251 | ||
252 | static const struct snd_soc_dai_ops tfa9879_dai_ops = { | |
253 | .hw_params = tfa9879_hw_params, | |
54b59270 | 254 | .mute_stream = tfa9879_mute_stream, |
fbace43e | 255 | .set_fmt = tfa9879_set_fmt, |
54b59270 | 256 | .no_capture_mute = 1, |
fbace43e PR |
257 | }; |
258 | ||
259 | #define TFA9879_RATES SNDRV_PCM_RATE_8000_96000 | |
260 | ||
261 | #define TFA9879_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ | |
262 | SNDRV_PCM_FMTBIT_S24_LE) | |
263 | ||
264 | static struct snd_soc_dai_driver tfa9879_dai = { | |
265 | .name = "tfa9879-hifi", | |
266 | .playback = { | |
267 | .stream_name = "Playback", | |
268 | .channels_min = 2, | |
269 | .channels_max = 2, | |
270 | .rates = TFA9879_RATES, | |
271 | .formats = TFA9879_FORMATS, }, | |
272 | .ops = &tfa9879_dai_ops, | |
273 | }; | |
274 | ||
e3225939 | 275 | static int tfa9879_i2c_probe(struct i2c_client *i2c) |
fbace43e PR |
276 | { |
277 | struct tfa9879_priv *tfa9879; | |
278 | int i; | |
279 | ||
280 | tfa9879 = devm_kzalloc(&i2c->dev, sizeof(*tfa9879), GFP_KERNEL); | |
427ced4b WY |
281 | if (!tfa9879) |
282 | return -ENOMEM; | |
fbace43e PR |
283 | |
284 | i2c_set_clientdata(i2c, tfa9879); | |
285 | ||
286 | tfa9879->regmap = devm_regmap_init_i2c(i2c, &tfa9879_regmap); | |
287 | if (IS_ERR(tfa9879->regmap)) | |
288 | return PTR_ERR(tfa9879->regmap); | |
289 | ||
290 | /* Ensure the device is in reset state */ | |
291 | for (i = 0; i < ARRAY_SIZE(tfa9879_regs); i++) | |
292 | regmap_write(tfa9879->regmap, | |
293 | tfa9879_regs[i].reg, tfa9879_regs[i].def); | |
294 | ||
064f6682 | 295 | return devm_snd_soc_register_component(&i2c->dev, &tfa9879_component, |
42a2b674 | 296 | &tfa9879_dai, 1); |
fbace43e PR |
297 | } |
298 | ||
fbace43e PR |
299 | static const struct i2c_device_id tfa9879_i2c_id[] = { |
300 | { "tfa9879", 0 }, | |
301 | { } | |
302 | }; | |
303 | MODULE_DEVICE_TABLE(i2c, tfa9879_i2c_id); | |
304 | ||
3d345b5f FE |
305 | static const struct of_device_id tfa9879_of_match[] = { |
306 | { .compatible = "nxp,tfa9879", }, | |
307 | { } | |
308 | }; | |
56ae83f1 | 309 | MODULE_DEVICE_TABLE(of, tfa9879_of_match); |
3d345b5f | 310 | |
fbace43e PR |
311 | static struct i2c_driver tfa9879_i2c_driver = { |
312 | .driver = { | |
313 | .name = "tfa9879", | |
3d345b5f | 314 | .of_match_table = tfa9879_of_match, |
fbace43e | 315 | }, |
e3225939 | 316 | .probe_new = tfa9879_i2c_probe, |
fbace43e PR |
317 | .id_table = tfa9879_i2c_id, |
318 | }; | |
319 | ||
320 | module_i2c_driver(tfa9879_i2c_driver); | |
321 | ||
322 | MODULE_DESCRIPTION("ASoC NXP Semiconductors TFA9879 driver"); | |
323 | MODULE_AUTHOR("Peter Rosin <peda@axentia.se>"); | |
324 | MODULE_LICENSE("GPL"); |