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ASoC: TWL4030: Add CGAIN volume control
[mirror_ubuntu-bionic-kernel.git] / sound / soc / codecs / twl4030.c
CommitLineData
cc17557e
SS		 1/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
29#include <linux/i2c/twl4030.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/initval.h>
c10b82cf 36#include <sound/tlv.h>
cc17557e
SS		 37
38#include "twl4030.h"
39
40/*
41 * twl4030 register cache & default register settings
42 */
43static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
44 0x00, /* this register not used */
45 0x93, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x24, /* REG_ANAMICL (0x5) */
50 0x04, /* REG_ANAMICR (0x6) */
51 0x0a, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
f8d05bdb 91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
cc17557e
SS		 92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
118};
119
120/*
121 * read twl4030 register cache
122 */
123static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
124 unsigned int reg)
125{
126 u8 *cache = codec->reg_cache;
127
128 return cache[reg];
129}
130
131/*
132 * write twl4030 register cache
133 */
134static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
135 u8 reg, u8 value)
136{
137 u8 *cache = codec->reg_cache;
138
139 if (reg >= TWL4030_CACHEREGNUM)
140 return;
141 cache[reg] = value;
142}
143
144/*
145 * write to the twl4030 register space
146 */
147static int twl4030_write(struct snd_soc_codec *codec,
148 unsigned int reg, unsigned int value)
149{
150 twl4030_write_reg_cache(codec, reg, value);
151 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
152}
153
154static void twl4030_clear_codecpdz(struct snd_soc_codec *codec)
155{
156 u8 mode;
157
158 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
159 twl4030_write(codec, TWL4030_REG_CODEC_MODE,
160 mode & ~TWL4030_CODECPDZ);
161
162 /* REVISIT: this delay is present in TI sample drivers */
163 /* but there seems to be no TRM requirement for it */
164 udelay(10);
165}
166
167static void twl4030_set_codecpdz(struct snd_soc_codec *codec)
168{
169 u8 mode;
170
171 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
172 twl4030_write(codec, TWL4030_REG_CODEC_MODE,
173 mode | TWL4030_CODECPDZ);
174
175 /* REVISIT: this delay is present in TI sample drivers */
176 /* but there seems to be no TRM requirement for it */
177 udelay(10);
178}
179
180static void twl4030_init_chip(struct snd_soc_codec *codec)
181{
182 int i;
183
184 /* clear CODECPDZ prior to setting register defaults */
185 twl4030_clear_codecpdz(codec);
186
187 /* set all audio section registers to reasonable defaults */
188 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
189 twl4030_write(codec, i, twl4030_reg[i]);
190
191}
192
c10b82cf
PU		 193/*
194 * FGAIN volume control:
195 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
196 */
197static DECLARE_TLV_DB_SCALE(master_tlv, -6300, 100, 1);
198
0d33ea0b
PU		 199/*
200 * CGAIN volume control:
201 * 0 dB to 12 dB in 6 dB steps
202 * value 2 and 3 means 12 dB
203 */
204static DECLARE_TLV_DB_SCALE(master_coarse_tlv, 0, 600, 0);
205
cc17557e 206static const struct snd_kcontrol_new twl4030_snd_controls[] = {
c10b82cf 207 SOC_DOUBLE_R_TLV("Master Playback Volume",
cc17557e 208 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
c10b82cf 209 0, 0x3f, 0, master_tlv),
0d33ea0b
PU		 210 SOC_DOUBLE_R_TLV("Master PCM Playback Volume",
211 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
212 6, 0x2, 0, master_coarse_tlv),
cc17557e
SS		 213 SOC_DOUBLE_R("Capture Volume",
214 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
6e5d9db2 215 0, 0x1f, 0),
cc17557e
SS		 216};
217
218/* add non dapm controls */
219static int twl4030_add_controls(struct snd_soc_codec *codec)
220{
221 int err, i;
222
223 for (i = 0; i < ARRAY_SIZE(twl4030_snd_controls); i++) {
224 err = snd_ctl_add(codec->card,
225 snd_soc_cnew(&twl4030_snd_controls[i],
226 codec, NULL));
227 if (err < 0)
228 return err;
229 }
230
231 return 0;
232}
233
234static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
235 SND_SOC_DAPM_INPUT("INL"),
236 SND_SOC_DAPM_INPUT("INR"),
237
238 SND_SOC_DAPM_OUTPUT("OUTL"),
239 SND_SOC_DAPM_OUTPUT("OUTR"),
240
241 SND_SOC_DAPM_DAC("DACL", "Left Playback", SND_SOC_NOPM, 0, 0),
242 SND_SOC_DAPM_DAC("DACR", "Right Playback", SND_SOC_NOPM, 0, 0),
243
244 SND_SOC_DAPM_ADC("ADCL", "Left Capture", SND_SOC_NOPM, 0, 0),
245 SND_SOC_DAPM_ADC("ADCR", "Right Capture", SND_SOC_NOPM, 0, 0),
246};
247
248static const struct snd_soc_dapm_route intercon[] = {
249 /* outputs */
250 {"OUTL", NULL, "DACL"},
251 {"OUTR", NULL, "DACR"},
252
253 /* inputs */
254 {"ADCL", NULL, "INL"},
255 {"ADCR", NULL, "INR"},
256};
257
258static int twl4030_add_widgets(struct snd_soc_codec *codec)
259{
260 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
261 ARRAY_SIZE(twl4030_dapm_widgets));
262
263 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
264
265 snd_soc_dapm_new_widgets(codec);
266 return 0;
267}
268
269static void twl4030_power_up(struct snd_soc_codec *codec)
270{
271 u8 anamicl, regmisc1, byte, popn, hsgain;
272 int i = 0;
273
274 /* set CODECPDZ to turn on codec */
275 twl4030_set_codecpdz(codec);
276
277 /* initiate offset cancellation */
278 anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
279 twl4030_write(codec, TWL4030_REG_ANAMICL,
280 anamicl | TWL4030_CNCL_OFFSET_START);
281
282 /* wait for offset cancellation to complete */
283 do {
284 /* this takes a little while, so don't slam i2c */
285 udelay(2000);
286 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
287 TWL4030_REG_ANAMICL);
288 } while ((i++ < 100) &&
289 ((byte & TWL4030_CNCL_OFFSET_START) ==
290 TWL4030_CNCL_OFFSET_START));
291
292 /* anti-pop when changing analog gain */
293 regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
294 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
295 regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
296
297 /* toggle CODECPDZ as per TRM */
298 twl4030_clear_codecpdz(codec);
299 twl4030_set_codecpdz(codec);
300
301 /* program anti-pop with bias ramp delay */
302 popn = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
303 popn &= TWL4030_RAMP_DELAY;
304 popn |= TWL4030_RAMP_DELAY_645MS;
305 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
306 popn |= TWL4030_VMID_EN;
307 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
308
309 /* enable output stage and gain setting */
310 hsgain = TWL4030_HSR_GAIN_0DB | TWL4030_HSL_GAIN_0DB;
311 twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hsgain);
312
313 /* enable anti-pop ramp */
314 popn |= TWL4030_RAMP_EN;
315 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
316}
317
318static void twl4030_power_down(struct snd_soc_codec *codec)
319{
320 u8 popn, hsgain;
321
322 /* disable anti-pop ramp */
323 popn = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
324 popn &= ~TWL4030_RAMP_EN;
325 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
326
327 /* disable output stage and gain setting */
328 hsgain = TWL4030_HSR_GAIN_PWR_DOWN | TWL4030_HSL_GAIN_PWR_DOWN;
329 twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hsgain);
330
331 /* disable bias out */
332 popn &= ~TWL4030_VMID_EN;
333 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
334
335 /* power down */
336 twl4030_clear_codecpdz(codec);
337}
338
339static int twl4030_set_bias_level(struct snd_soc_codec *codec,
340 enum snd_soc_bias_level level)
341{
342 switch (level) {
343 case SND_SOC_BIAS_ON:
344 twl4030_power_up(codec);
345 break;
346 case SND_SOC_BIAS_PREPARE:
347 /* TODO: develop a twl4030_prepare function */
348 break;
349 case SND_SOC_BIAS_STANDBY:
350 /* TODO: develop a twl4030_standby function */
351 twl4030_power_down(codec);
352 break;
353 case SND_SOC_BIAS_OFF:
354 twl4030_power_down(codec);
355 break;
356 }
357 codec->bias_level = level;
358
359 return 0;
360}
361
362static int twl4030_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 363 struct snd_pcm_hw_params *params,
364 struct snd_soc_dai *dai)
cc17557e
SS		 365{
366 struct snd_soc_pcm_runtime *rtd = substream->private_data;
367 struct snd_soc_device *socdev = rtd->socdev;
368 struct snd_soc_codec *codec = socdev->codec;
369 u8 mode, old_mode, format, old_format;
370
371
372 /* bit rate */
373 old_mode = twl4030_read_reg_cache(codec,
374 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
375 mode = old_mode & ~TWL4030_APLL_RATE;
376
377 switch (params_rate(params)) {
378 case 8000:
379 mode |= TWL4030_APLL_RATE_8000;
380 break;
381 case 11025:
382 mode |= TWL4030_APLL_RATE_11025;
383 break;
384 case 12000:
385 mode |= TWL4030_APLL_RATE_12000;
386 break;
387 case 16000:
388 mode |= TWL4030_APLL_RATE_16000;
389 break;
390 case 22050:
391 mode |= TWL4030_APLL_RATE_22050;
392 break;
393 case 24000:
394 mode |= TWL4030_APLL_RATE_24000;
395 break;
396 case 32000:
397 mode |= TWL4030_APLL_RATE_32000;
398 break;
399 case 44100:
400 mode |= TWL4030_APLL_RATE_44100;
401 break;
402 case 48000:
403 mode |= TWL4030_APLL_RATE_48000;
404 break;
405 default:
406 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
407 params_rate(params));
408 return -EINVAL;
409 }
410
411 if (mode != old_mode) {
412 /* change rate and set CODECPDZ */
413 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
414 twl4030_set_codecpdz(codec);
415 }
416
417 /* sample size */
418 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
419 format = old_format;
420 format &= ~TWL4030_DATA_WIDTH;
421 switch (params_format(params)) {
422 case SNDRV_PCM_FORMAT_S16_LE:
423 format |= TWL4030_DATA_WIDTH_16S_16W;
424 break;
425 case SNDRV_PCM_FORMAT_S24_LE:
426 format |= TWL4030_DATA_WIDTH_32S_24W;
427 break;
428 default:
429 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
430 params_format(params));
431 return -EINVAL;
432 }
433
434 if (format != old_format) {
435
436 /* clear CODECPDZ before changing format (codec requirement) */
437 twl4030_clear_codecpdz(codec);
438
439 /* change format */
440 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
441
442 /* set CODECPDZ afterwards */
443 twl4030_set_codecpdz(codec);
444 }
445 return 0;
446}
447
448static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
449 int clk_id, unsigned int freq, int dir)
450{
451 struct snd_soc_codec *codec = codec_dai->codec;
452 u8 infreq;
453
454 switch (freq) {
455 case 19200000:
456 infreq = TWL4030_APLL_INFREQ_19200KHZ;
457 break;
458 case 26000000:
459 infreq = TWL4030_APLL_INFREQ_26000KHZ;
460 break;
461 case 38400000:
462 infreq = TWL4030_APLL_INFREQ_38400KHZ;
463 break;
464 default:
465 printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n",
466 freq);
467 return -EINVAL;
468 }
469
470 infreq |= TWL4030_APLL_EN;
471 twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq);
472
473 return 0;
474}
475
476static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
477 unsigned int fmt)
478{
479 struct snd_soc_codec *codec = codec_dai->codec;
480 u8 old_format, format;
481
482 /* get format */
483 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
484 format = old_format;
485
486 /* set master/slave audio interface */
487 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
488 case SND_SOC_DAIFMT_CBM_CFM:
489 format &= ~(TWL4030_AIF_SLAVE_EN);
e18c94d2 490 format &= ~(TWL4030_CLK256FS_EN);
cc17557e
SS		 491 break;
492 case SND_SOC_DAIFMT_CBS_CFS:
cc17557e 493 format |= TWL4030_AIF_SLAVE_EN;
e18c94d2 494 format |= TWL4030_CLK256FS_EN;
cc17557e
SS		 495 break;
496 default:
497 return -EINVAL;
498 }
499
500 /* interface format */
501 format &= ~TWL4030_AIF_FORMAT;
502 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
503 case SND_SOC_DAIFMT_I2S:
504 format |= TWL4030_AIF_FORMAT_CODEC;
505 break;
506 default:
507 return -EINVAL;
508 }
509
510 if (format != old_format) {
511
512 /* clear CODECPDZ before changing format (codec requirement) */
513 twl4030_clear_codecpdz(codec);
514
515 /* change format */
516 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
517
518 /* set CODECPDZ afterwards */
519 twl4030_set_codecpdz(codec);
520 }
521
522 return 0;
523}
524
bbba9444 525#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
cc17557e
SS		 526#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
527
528struct snd_soc_dai twl4030_dai = {
529 .name = "twl4030",
530 .playback = {
531 .stream_name = "Playback",
532 .channels_min = 2,
533 .channels_max = 2,
534 .rates = TWL4030_RATES,
535 .formats = TWL4030_FORMATS,},
536 .capture = {
537 .stream_name = "Capture",
538 .channels_min = 2,
539 .channels_max = 2,
540 .rates = TWL4030_RATES,
541 .formats = TWL4030_FORMATS,},
542 .ops = {
543 .hw_params = twl4030_hw_params,
cc17557e
SS		 544 .set_sysclk = twl4030_set_dai_sysclk,
545 .set_fmt = twl4030_set_dai_fmt,
546 }
547};
548EXPORT_SYMBOL_GPL(twl4030_dai);
549
550static int twl4030_suspend(struct platform_device *pdev, pm_message_t state)
551{
552 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
553 struct snd_soc_codec *codec = socdev->codec;
554
555 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
556
557 return 0;
558}
559
560static int twl4030_resume(struct platform_device *pdev)
561{
562 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
563 struct snd_soc_codec *codec = socdev->codec;
564
565 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
566 twl4030_set_bias_level(codec, codec->suspend_bias_level);
567 return 0;
568}
569
570/*
571 * initialize the driver
572 * register the mixer and dsp interfaces with the kernel
573 */
574
575static int twl4030_init(struct snd_soc_device *socdev)
576{
577 struct snd_soc_codec *codec = socdev->codec;
578 int ret = 0;
579
580 printk(KERN_INFO "TWL4030 Audio Codec init \n");
581
582 codec->name = "twl4030";
583 codec->owner = THIS_MODULE;
584 codec->read = twl4030_read_reg_cache;
585 codec->write = twl4030_write;
586 codec->set_bias_level = twl4030_set_bias_level;
587 codec->dai = &twl4030_dai;
588 codec->num_dai = 1;
589 codec->reg_cache_size = sizeof(twl4030_reg);
590 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
591 GFP_KERNEL);
592 if (codec->reg_cache == NULL)
593 return -ENOMEM;
594
595 /* register pcms */
596 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
597 if (ret < 0) {
598 printk(KERN_ERR "twl4030: failed to create pcms\n");
599 goto pcm_err;
600 }
601
602 twl4030_init_chip(codec);
603
604 /* power on device */
605 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
606
607 twl4030_add_controls(codec);
608 twl4030_add_widgets(codec);
609
610 ret = snd_soc_register_card(socdev);
611 if (ret < 0) {
612 printk(KERN_ERR "twl4030: failed to register card\n");
613 goto card_err;
614 }
615
616 return ret;
617
618card_err:
619 snd_soc_free_pcms(socdev);
620 snd_soc_dapm_free(socdev);
621pcm_err:
622 kfree(codec->reg_cache);
623 return ret;
624}
625
626static struct snd_soc_device *twl4030_socdev;
627
628static int twl4030_probe(struct platform_device *pdev)
629{
630 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
631 struct snd_soc_codec *codec;
632
633 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
634 if (codec == NULL)
635 return -ENOMEM;
636
637 socdev->codec = codec;
638 mutex_init(&codec->mutex);
639 INIT_LIST_HEAD(&codec->dapm_widgets);
640 INIT_LIST_HEAD(&codec->dapm_paths);
641
642 twl4030_socdev = socdev;
643 twl4030_init(socdev);
644
645 return 0;
646}
647
648static int twl4030_remove(struct platform_device *pdev)
649{
650 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
651 struct snd_soc_codec *codec = socdev->codec;
652
653 printk(KERN_INFO "TWL4030 Audio Codec remove\n");
654 kfree(codec);
655
656 return 0;
657}
658
659struct snd_soc_codec_device soc_codec_dev_twl4030 = {
660 .probe = twl4030_probe,
661 .remove = twl4030_remove,
662 .suspend = twl4030_suspend,
663 .resume = twl4030_resume,
664};
665EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
666
667MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
668MODULE_AUTHOR("Steve Sakoman");
669MODULE_LICENSE("GPL");
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