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71cfc902 MB |
1 | /* |
2 | * wm8728.c -- WM8728 ALSA SoC Audio driver | |
3 | * | |
4 | * Copyright 2008 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/moduleparam.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/pm.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/spi/spi.h> | |
5a0e3ad6 | 21 | #include <linux/slab.h> |
45b4d043 | 22 | #include <linux/of_device.h> |
71cfc902 MB |
23 | #include <sound/core.h> |
24 | #include <sound/pcm.h> | |
25 | #include <sound/pcm_params.h> | |
26 | #include <sound/soc.h> | |
71cfc902 MB |
27 | #include <sound/initval.h> |
28 | #include <sound/tlv.h> | |
29 | ||
30 | #include "wm8728.h" | |
31 | ||
71cfc902 MB |
32 | /* |
33 | * We can't read the WM8728 register space so we cache them instead. | |
34 | * Note that the defaults here aren't the physical defaults, we latch | |
35 | * the volume update bits, mute the output and enable infinite zero | |
36 | * detect. | |
37 | */ | |
38 | static const u16 wm8728_reg_defaults[] = { | |
39 | 0x1ff, | |
40 | 0x1ff, | |
41 | 0x001, | |
42 | 0x100, | |
43 | }; | |
44 | ||
f0fba2ad LG |
45 | /* codec private data */ |
46 | struct wm8728_priv { | |
47 | enum snd_soc_control_type control_type; | |
f0fba2ad LG |
48 | }; |
49 | ||
71cfc902 MB |
50 | static const DECLARE_TLV_DB_SCALE(wm8728_tlv, -12750, 50, 1); |
51 | ||
52 | static const struct snd_kcontrol_new wm8728_snd_controls[] = { | |
53 | ||
54 | SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8728_DACLVOL, WM8728_DACRVOL, | |
55 | 0, 255, 0, wm8728_tlv), | |
56 | ||
57 | SOC_SINGLE("Deemphasis", WM8728_DACCTL, 1, 1, 0), | |
58 | }; | |
59 | ||
71cfc902 MB |
60 | /* |
61 | * DAPM controls. | |
62 | */ | |
63 | static const struct snd_soc_dapm_widget wm8728_dapm_widgets[] = { | |
64 | SND_SOC_DAPM_DAC("DAC", "HiFi Playback", SND_SOC_NOPM, 0, 0), | |
65 | SND_SOC_DAPM_OUTPUT("VOUTL"), | |
66 | SND_SOC_DAPM_OUTPUT("VOUTR"), | |
67 | }; | |
68 | ||
8428edf9 | 69 | static const struct snd_soc_dapm_route wm8728_intercon[] = { |
71cfc902 MB |
70 | {"VOUTL", NULL, "DAC"}, |
71 | {"VOUTR", NULL, "DAC"}, | |
72 | }; | |
73 | ||
71cfc902 MB |
74 | static int wm8728_mute(struct snd_soc_dai *dai, int mute) |
75 | { | |
76 | struct snd_soc_codec *codec = dai->codec; | |
17a52fd6 | 77 | u16 mute_reg = snd_soc_read(codec, WM8728_DACCTL); |
71cfc902 MB |
78 | |
79 | if (mute) | |
17a52fd6 | 80 | snd_soc_write(codec, WM8728_DACCTL, mute_reg | 1); |
71cfc902 | 81 | else |
17a52fd6 | 82 | snd_soc_write(codec, WM8728_DACCTL, mute_reg & ~1); |
71cfc902 MB |
83 | |
84 | return 0; | |
85 | } | |
86 | ||
87 | static int wm8728_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
88 | struct snd_pcm_hw_params *params, |
89 | struct snd_soc_dai *dai) | |
71cfc902 MB |
90 | { |
91 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 92 | struct snd_soc_codec *codec = rtd->codec; |
17a52fd6 | 93 | u16 dac = snd_soc_read(codec, WM8728_DACCTL); |
71cfc902 MB |
94 | |
95 | dac &= ~0x18; | |
96 | ||
97 | switch (params_format(params)) { | |
98 | case SNDRV_PCM_FORMAT_S16_LE: | |
99 | break; | |
100 | case SNDRV_PCM_FORMAT_S20_3LE: | |
101 | dac |= 0x10; | |
102 | break; | |
103 | case SNDRV_PCM_FORMAT_S24_LE: | |
104 | dac |= 0x08; | |
105 | break; | |
106 | default: | |
107 | return -EINVAL; | |
108 | } | |
109 | ||
17a52fd6 | 110 | snd_soc_write(codec, WM8728_DACCTL, dac); |
71cfc902 MB |
111 | |
112 | return 0; | |
113 | } | |
114 | ||
115 | static int wm8728_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
116 | unsigned int fmt) | |
117 | { | |
118 | struct snd_soc_codec *codec = codec_dai->codec; | |
17a52fd6 | 119 | u16 iface = snd_soc_read(codec, WM8728_IFCTL); |
71cfc902 MB |
120 | |
121 | /* Currently only I2S is supported by the driver, though the | |
122 | * hardware is more flexible. | |
123 | */ | |
124 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
125 | case SND_SOC_DAIFMT_I2S: | |
126 | iface |= 1; | |
127 | break; | |
128 | default: | |
129 | return -EINVAL; | |
130 | } | |
131 | ||
132 | /* The hardware only support full slave mode */ | |
133 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
134 | case SND_SOC_DAIFMT_CBS_CFS: | |
135 | break; | |
136 | default: | |
137 | return -EINVAL; | |
138 | } | |
139 | ||
140 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
141 | case SND_SOC_DAIFMT_NB_NF: | |
142 | iface &= ~0x22; | |
143 | break; | |
144 | case SND_SOC_DAIFMT_IB_NF: | |
145 | iface |= 0x20; | |
146 | iface &= ~0x02; | |
147 | break; | |
148 | case SND_SOC_DAIFMT_NB_IF: | |
149 | iface |= 0x02; | |
150 | iface &= ~0x20; | |
151 | break; | |
152 | case SND_SOC_DAIFMT_IB_IF: | |
153 | iface |= 0x22; | |
154 | break; | |
155 | default: | |
156 | return -EINVAL; | |
157 | } | |
158 | ||
17a52fd6 | 159 | snd_soc_write(codec, WM8728_IFCTL, iface); |
71cfc902 MB |
160 | return 0; |
161 | } | |
162 | ||
163 | static int wm8728_set_bias_level(struct snd_soc_codec *codec, | |
164 | enum snd_soc_bias_level level) | |
165 | { | |
166 | u16 reg; | |
167 | int i; | |
168 | ||
169 | switch (level) { | |
170 | case SND_SOC_BIAS_ON: | |
171 | case SND_SOC_BIAS_PREPARE: | |
172 | case SND_SOC_BIAS_STANDBY: | |
ce6120cc | 173 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
71cfc902 | 174 | /* Power everything up... */ |
17a52fd6 MB |
175 | reg = snd_soc_read(codec, WM8728_DACCTL); |
176 | snd_soc_write(codec, WM8728_DACCTL, reg & ~0x4); | |
71cfc902 MB |
177 | |
178 | /* ..then sync in the register cache. */ | |
179 | for (i = 0; i < ARRAY_SIZE(wm8728_reg_defaults); i++) | |
17a52fd6 MB |
180 | snd_soc_write(codec, i, |
181 | snd_soc_read(codec, i)); | |
71cfc902 MB |
182 | } |
183 | break; | |
184 | ||
185 | case SND_SOC_BIAS_OFF: | |
17a52fd6 MB |
186 | reg = snd_soc_read(codec, WM8728_DACCTL); |
187 | snd_soc_write(codec, WM8728_DACCTL, reg | 0x4); | |
71cfc902 MB |
188 | break; |
189 | } | |
ce6120cc | 190 | codec->dapm.bias_level = level; |
71cfc902 MB |
191 | return 0; |
192 | } | |
193 | ||
194 | #define WM8728_RATES (SNDRV_PCM_RATE_8000_192000) | |
195 | ||
196 | #define WM8728_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
197 | SNDRV_PCM_FMTBIT_S24_LE) | |
198 | ||
6335d055 EM |
199 | static struct snd_soc_dai_ops wm8728_dai_ops = { |
200 | .hw_params = wm8728_hw_params, | |
201 | .digital_mute = wm8728_mute, | |
202 | .set_fmt = wm8728_set_dai_fmt, | |
203 | }; | |
204 | ||
f0fba2ad LG |
205 | static struct snd_soc_dai_driver wm8728_dai = { |
206 | .name = "wm8728-hifi", | |
71cfc902 MB |
207 | .playback = { |
208 | .stream_name = "Playback", | |
209 | .channels_min = 2, | |
210 | .channels_max = 2, | |
211 | .rates = WM8728_RATES, | |
212 | .formats = WM8728_FORMATS, | |
213 | }, | |
6335d055 | 214 | .ops = &wm8728_dai_ops, |
71cfc902 | 215 | }; |
71cfc902 | 216 | |
f0fba2ad | 217 | static int wm8728_suspend(struct snd_soc_codec *codec, pm_message_t state) |
71cfc902 | 218 | { |
71cfc902 MB |
219 | wm8728_set_bias_level(codec, SND_SOC_BIAS_OFF); |
220 | ||
221 | return 0; | |
222 | } | |
223 | ||
f0fba2ad | 224 | static int wm8728_resume(struct snd_soc_codec *codec) |
71cfc902 | 225 | { |
29e189c2 | 226 | wm8728_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
71cfc902 MB |
227 | |
228 | return 0; | |
229 | } | |
230 | ||
f0fba2ad | 231 | static int wm8728_probe(struct snd_soc_codec *codec) |
71cfc902 | 232 | { |
f0fba2ad LG |
233 | struct wm8728_priv *wm8728 = snd_soc_codec_get_drvdata(codec); |
234 | int ret; | |
71cfc902 | 235 | |
f0fba2ad | 236 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8728->control_type); |
17a52fd6 MB |
237 | if (ret < 0) { |
238 | printk(KERN_ERR "wm8728: failed to configure cache I/O: %d\n", | |
239 | ret); | |
f0fba2ad | 240 | return ret; |
71cfc902 MB |
241 | } |
242 | ||
243 | /* power on device */ | |
244 | wm8728_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
245 | ||
3e8e1952 IM |
246 | snd_soc_add_controls(codec, wm8728_snd_controls, |
247 | ARRAY_SIZE(wm8728_snd_controls)); | |
71cfc902 MB |
248 | |
249 | return ret; | |
71cfc902 MB |
250 | } |
251 | ||
f0fba2ad | 252 | static int wm8728_remove(struct snd_soc_codec *codec) |
71cfc902 | 253 | { |
f0fba2ad | 254 | wm8728_set_bias_level(codec, SND_SOC_BIAS_OFF); |
71cfc902 MB |
255 | return 0; |
256 | } | |
257 | ||
f0fba2ad LG |
258 | static struct snd_soc_codec_driver soc_codec_dev_wm8728 = { |
259 | .probe = wm8728_probe, | |
260 | .remove = wm8728_remove, | |
261 | .suspend = wm8728_suspend, | |
262 | .resume = wm8728_resume, | |
263 | .set_bias_level = wm8728_set_bias_level, | |
e5eec34c | 264 | .reg_cache_size = ARRAY_SIZE(wm8728_reg_defaults), |
f0fba2ad LG |
265 | .reg_word_size = sizeof(u16), |
266 | .reg_cache_default = wm8728_reg_defaults, | |
8428edf9 LG |
267 | .dapm_widgets = wm8728_dapm_widgets, |
268 | .num_dapm_widgets = ARRAY_SIZE(wm8728_dapm_widgets), | |
269 | .dapm_routes = wm8728_intercon, | |
270 | .num_dapm_routes = ARRAY_SIZE(wm8728_intercon), | |
71cfc902 MB |
271 | }; |
272 | ||
45b4d043 MB |
273 | static const struct of_device_id wm8728_of_match[] = { |
274 | { .compatible = "wlf,wm8728", }, | |
275 | { } | |
276 | }; | |
277 | MODULE_DEVICE_TABLE(of, wm8728_of_match); | |
278 | ||
71cfc902 MB |
279 | #if defined(CONFIG_SPI_MASTER) |
280 | static int __devinit wm8728_spi_probe(struct spi_device *spi) | |
281 | { | |
f0fba2ad | 282 | struct wm8728_priv *wm8728; |
71cfc902 MB |
283 | int ret; |
284 | ||
f0fba2ad LG |
285 | wm8728 = kzalloc(sizeof(struct wm8728_priv), GFP_KERNEL); |
286 | if (wm8728 == NULL) | |
287 | return -ENOMEM; | |
71cfc902 | 288 | |
f0fba2ad LG |
289 | wm8728->control_type = SND_SOC_SPI; |
290 | spi_set_drvdata(spi, wm8728); | |
71cfc902 | 291 | |
f0fba2ad LG |
292 | ret = snd_soc_register_codec(&spi->dev, |
293 | &soc_codec_dev_wm8728, &wm8728_dai, 1); | |
294 | if (ret < 0) | |
295 | kfree(wm8728); | |
71cfc902 MB |
296 | return ret; |
297 | } | |
298 | ||
299 | static int __devexit wm8728_spi_remove(struct spi_device *spi) | |
300 | { | |
f0fba2ad LG |
301 | snd_soc_unregister_codec(&spi->dev); |
302 | kfree(spi_get_drvdata(spi)); | |
71cfc902 MB |
303 | return 0; |
304 | } | |
305 | ||
306 | static struct spi_driver wm8728_spi_driver = { | |
307 | .driver = { | |
0473e61b | 308 | .name = "wm8728", |
71cfc902 | 309 | .owner = THIS_MODULE, |
45b4d043 | 310 | .of_match_table = wm8728_of_match, |
71cfc902 MB |
311 | }, |
312 | .probe = wm8728_spi_probe, | |
313 | .remove = __devexit_p(wm8728_spi_remove), | |
314 | }; | |
71cfc902 MB |
315 | #endif /* CONFIG_SPI_MASTER */ |
316 | ||
f0fba2ad LG |
317 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
318 | static __devinit int wm8728_i2c_probe(struct i2c_client *i2c, | |
319 | const struct i2c_device_id *id) | |
71cfc902 | 320 | { |
f0fba2ad LG |
321 | struct wm8728_priv *wm8728; |
322 | int ret; | |
71cfc902 | 323 | |
f0fba2ad LG |
324 | wm8728 = kzalloc(sizeof(struct wm8728_priv), GFP_KERNEL); |
325 | if (wm8728 == NULL) | |
71cfc902 MB |
326 | return -ENOMEM; |
327 | ||
f0fba2ad | 328 | i2c_set_clientdata(i2c, wm8728); |
f0fba2ad LG |
329 | wm8728->control_type = SND_SOC_I2C; |
330 | ||
331 | ret = snd_soc_register_codec(&i2c->dev, | |
332 | &soc_codec_dev_wm8728, &wm8728_dai, 1); | |
333 | if (ret < 0) | |
334 | kfree(wm8728); | |
335 | return ret; | |
336 | } | |
337 | ||
338 | static __devexit int wm8728_i2c_remove(struct i2c_client *client) | |
339 | { | |
340 | snd_soc_unregister_codec(&client->dev); | |
341 | kfree(i2c_get_clientdata(client)); | |
342 | return 0; | |
343 | } | |
71cfc902 | 344 | |
f0fba2ad LG |
345 | static const struct i2c_device_id wm8728_i2c_id[] = { |
346 | { "wm8728", 0 }, | |
347 | { } | |
348 | }; | |
349 | MODULE_DEVICE_TABLE(i2c, wm8728_i2c_id); | |
350 | ||
351 | static struct i2c_driver wm8728_i2c_driver = { | |
352 | .driver = { | |
0473e61b | 353 | .name = "wm8728", |
f0fba2ad | 354 | .owner = THIS_MODULE, |
45b4d043 | 355 | .of_match_table = wm8728_of_match, |
f0fba2ad LG |
356 | }, |
357 | .probe = wm8728_i2c_probe, | |
358 | .remove = __devexit_p(wm8728_i2c_remove), | |
359 | .id_table = wm8728_i2c_id, | |
360 | }; | |
361 | #endif | |
71cfc902 | 362 | |
f0fba2ad LG |
363 | static int __init wm8728_modinit(void) |
364 | { | |
365 | int ret = 0; | |
71cfc902 | 366 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
f0fba2ad LG |
367 | ret = i2c_add_driver(&wm8728_i2c_driver); |
368 | if (ret != 0) { | |
369 | printk(KERN_ERR "Failed to register wm8728 I2C driver: %d\n", | |
370 | ret); | |
71cfc902 MB |
371 | } |
372 | #endif | |
373 | #if defined(CONFIG_SPI_MASTER) | |
f0fba2ad LG |
374 | ret = spi_register_driver(&wm8728_spi_driver); |
375 | if (ret != 0) { | |
376 | printk(KERN_ERR "Failed to register wm8728 SPI driver: %d\n", | |
377 | ret); | |
71cfc902 MB |
378 | } |
379 | #endif | |
71cfc902 MB |
380 | return ret; |
381 | } | |
f0fba2ad | 382 | module_init(wm8728_modinit); |
71cfc902 | 383 | |
f0fba2ad | 384 | static void __exit wm8728_exit(void) |
71cfc902 | 385 | { |
71cfc902 | 386 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
71cfc902 MB |
387 | i2c_del_driver(&wm8728_i2c_driver); |
388 | #endif | |
389 | #if defined(CONFIG_SPI_MASTER) | |
390 | spi_unregister_driver(&wm8728_spi_driver); | |
391 | #endif | |
64089b84 MB |
392 | } |
393 | module_exit(wm8728_exit); | |
394 | ||
71cfc902 MB |
395 | MODULE_DESCRIPTION("ASoC WM8728 driver"); |
396 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | |
397 | MODULE_LICENSE("GPL"); |