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[mirror_ubuntu-bionic-kernel.git] / sound / soc / codecs / wm8731.c
CommitLineData
40e0aa64
RP		 1/*
2 * wm8731.c -- WM8731 ALSA SoC Audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
656baaeb 5 * Copyright 2006-12 Wolfson Microelectronics, plc
40e0aa64
RP		 6 *
7 * Author: Richard Purdie <richard@openedhand.com>
8 *
9 * Based on wm8753.c by Liam Girdwood
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/init.h>
19#include <linux/delay.h>
20#include <linux/pm.h>
21#include <linux/i2c.h>
5a0e3ad6 22#include <linux/slab.h>
05d448e2 23#include <linux/regmap.h>
7dea7c01 24#include <linux/regulator/consumer.h>
d2a40355 25#include <linux/spi/spi.h>
a7f96e4d 26#include <linux/of_device.h>
a51ff30f 27#include <linux/mutex.h>
99d42234 28#include <linux/clk.h>
40e0aa64
RP		 29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/pcm_params.h>
32#include <sound/soc.h>
40e0aa64 33#include <sound/initval.h>
d00efa64 34#include <sound/tlv.h>
40e0aa64
RP		 35
36#include "wm8731.h"
37
7dea7c01
MB		 38#define WM8731_NUM_SUPPLIES 4
39static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
40 "AVDD",
41 "HPVDD",
42 "DCVDD",
43 "DBVDD",
44};
45
b36d61d4
FM		 46/* codec private data */
47struct wm8731_priv {
05d448e2 48 struct regmap *regmap;
99d42234 49 struct clk *mclk;
7dea7c01 50 struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
0890c2b7 51 const struct snd_pcm_hw_constraint_list *constraints;
b36d61d4 52 unsigned int sysclk;
9745e824 53 int sysclk_type;
dd31b310
MB		 54 int playback_fs;
55 bool deemph;
a51ff30f
LPC		 56
57 struct mutex lock;
b36d61d4
FM		 58};
59
a8035c8f 60
40e0aa64
RP		 61/*
62 * wm8731 register cache
40e0aa64 63 */
05d448e2
MB		 64static const struct reg_default wm8731_reg_defaults[] = {
65 { 0, 0x0097 },
66 { 1, 0x0097 },
67 { 2, 0x0079 },
68 { 3, 0x0079 },
69 { 4, 0x000a },
70 { 5, 0x0008 },
71 { 6, 0x009f },
72 { 7, 0x000a },
73 { 8, 0x0000 },
74 { 9, 0x0000 },
40e0aa64
RP		 75};
76
05d448e2
MB		 77static bool wm8731_volatile(struct device *dev, unsigned int reg)
78{
79 return reg == WM8731_RESET;
80}
81
6702dfcc 82#define wm8731_reset(m) regmap_write(m, WM8731_RESET, 0)
40e0aa64
RP		 83
84static const char *wm8731_input_select[] = {"Line In", "Mic"};
59f72970 85
9e74b14a
TI		 86static SOC_ENUM_SINGLE_DECL(wm8731_insel_enum,
87 WM8731_APANA, 2, wm8731_input_select);
59f72970 88
dd31b310
MB		 89static int wm8731_deemph[] = { 0, 32000, 44100, 48000 };
90
91static int wm8731_set_deemph(struct snd_soc_codec *codec)
92{
93 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
94 int val, i, best;
95
96 /* If we're using deemphasis select the nearest available sample
97 * rate.
98 */
99 if (wm8731->deemph) {
100 best = 1;
101 for (i = 2; i < ARRAY_SIZE(wm8731_deemph); i++) {
102 if (abs(wm8731_deemph[i] - wm8731->playback_fs) <
103 abs(wm8731_deemph[best] - wm8731->playback_fs))
104 best = i;
105 }
106
107 val = best << 1;
108 } else {
109 best = 0;
110 val = 0;
111 }
112
113 dev_dbg(codec->dev, "Set deemphasis %d (%dHz)\n",
114 best, wm8731_deemph[best]);
115
116 return snd_soc_update_bits(codec, WM8731_APDIGI, 0x6, val);
117}
118
119static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
120 struct snd_ctl_elem_value *ucontrol)
121{
ea53bf77 122 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
dd31b310
MB		 123 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
124
bd14016f 125 ucontrol->value.integer.value[0] = wm8731->deemph;
dd31b310
MB		 126
127 return 0;
128}
129
130static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
131 struct snd_ctl_elem_value *ucontrol)
132{
ea53bf77 133 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
dd31b310 134 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
523bade2 135 unsigned int deemph = ucontrol->value.integer.value[0];
dd31b310
MB		 136 int ret = 0;
137
138 if (deemph > 1)
139 return -EINVAL;
140
a51ff30f 141 mutex_lock(&wm8731->lock);
dd31b310
MB		 142 if (wm8731->deemph != deemph) {
143 wm8731->deemph = deemph;
59f72970 144
dd31b310
MB		 145 wm8731_set_deemph(codec);
146
147 ret = 1;
148 }
a51ff30f 149 mutex_unlock(&wm8731->lock);
dd31b310
MB		 150
151 return ret;
152}
40e0aa64 153
d00efa64
MB		 154static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
155static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
156static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
d921184e 157static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 2000, 0);
d00efa64 158
40e0aa64
RP		 159static const struct snd_kcontrol_new wm8731_snd_controls[] = {
160
d00efa64
MB		 161SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
162 0, 127, 0, out_tlv),
bd903b6e
LG		 163SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
164 7, 1, 0),
40e0aa64 165
d00efa64
MB		 166SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
167 in_tlv),
40e0aa64
RP		 168SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
169
d921184e 170SOC_SINGLE_TLV("Mic Boost Volume", WM8731_APANA, 0, 1, 0, mic_tlv),
ef38ed88 171SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
40e0aa64 172
d00efa64
MB		 173SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
174 sidetone_tlv),
40e0aa64
RP		 175
176SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
177SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
178
dd31b310
MB		 179SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
180 wm8731_get_deemph, wm8731_put_deemph),
40e0aa64
RP		 181};
182
40e0aa64
RP		 183/* Output Mixer */
184static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
185SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
186SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
187SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
188};
189
190/* Input mux */
191static const struct snd_kcontrol_new wm8731_input_mux_controls =
59f72970 192SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
40e0aa64
RP		 193
194static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
8a27bd9a 195SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
9745e824 196SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
40e0aa64
RP		 197SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
198 &wm8731_output_mixer_controls[0],
199 ARRAY_SIZE(wm8731_output_mixer_controls)),
200SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
201SND_SOC_DAPM_OUTPUT("LOUT"),
202SND_SOC_DAPM_OUTPUT("LHPOUT"),
203SND_SOC_DAPM_OUTPUT("ROUT"),
204SND_SOC_DAPM_OUTPUT("RHPOUT"),
205SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
206SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
207SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
208SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
209SND_SOC_DAPM_INPUT("MICIN"),
210SND_SOC_DAPM_INPUT("RLINEIN"),
211SND_SOC_DAPM_INPUT("LLINEIN"),
212};
213
9745e824
MB		 214static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
215 struct snd_soc_dapm_widget *sink)
216{
d286b805
LPC		 217 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
218 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
9745e824 219
5a195b44 220 return wm8731->sysclk_type == WM8731_SYSCLK_XTAL;
9745e824
MB		 221}
222
5e251aec 223static const struct snd_soc_dapm_route wm8731_intercon[] = {
9745e824
MB		 224 {"DAC", NULL, "OSC", wm8731_check_osc},
225 {"ADC", NULL, "OSC", wm8731_check_osc},
8a27bd9a
MB		 226 {"DAC", NULL, "ACTIVE"},
227 {"ADC", NULL, "ACTIVE"},
9745e824 228
40e0aa64
RP		 229 /* output mixer */
230 {"Output Mixer", "Line Bypass Switch", "Line Input"},
231 {"Output Mixer", "HiFi Playback Switch", "DAC"},
232 {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
233
234 /* outputs */
235 {"RHPOUT", NULL, "Output Mixer"},
236 {"ROUT", NULL, "Output Mixer"},
237 {"LHPOUT", NULL, "Output Mixer"},
238 {"LOUT", NULL, "Output Mixer"},
239
240 /* input mux */
241 {"Input Mux", "Line In", "Line Input"},
242 {"Input Mux", "Mic", "Mic Bias"},
243 {"ADC", NULL, "Input Mux"},
244
245 /* inputs */
246 {"Line Input", NULL, "LLINEIN"},
247 {"Line Input", NULL, "RLINEIN"},
248 {"Mic Bias", NULL, "MICIN"},
40e0aa64
RP		 249};
250
40e0aa64
RP		 251struct _coeff_div {
252 u32 mclk;
253 u32 rate;
254 u16 fs;
255 u8 sr:4;
256 u8 bosr:1;
257 u8 usb:1;
258};
259
260/* codec mclk clock divider coefficients */
261static const struct _coeff_div coeff_div[] = {
262 /* 48k */
263 {12288000, 48000, 256, 0x0, 0x0, 0x0},
264 {18432000, 48000, 384, 0x0, 0x1, 0x0},
265 {12000000, 48000, 250, 0x0, 0x0, 0x1},
266
267 /* 32k */
268 {12288000, 32000, 384, 0x6, 0x0, 0x0},
269 {18432000, 32000, 576, 0x6, 0x1, 0x0},
298a2c75 270 {12000000, 32000, 375, 0x6, 0x0, 0x1},
40e0aa64
RP		 271
272 /* 8k */
273 {12288000, 8000, 1536, 0x3, 0x0, 0x0},
274 {18432000, 8000, 2304, 0x3, 0x1, 0x0},
275 {11289600, 8000, 1408, 0xb, 0x0, 0x0},
276 {16934400, 8000, 2112, 0xb, 0x1, 0x0},
277 {12000000, 8000, 1500, 0x3, 0x0, 0x1},
278
279 /* 96k */
280 {12288000, 96000, 128, 0x7, 0x0, 0x0},
281 {18432000, 96000, 192, 0x7, 0x1, 0x0},
282 {12000000, 96000, 125, 0x7, 0x0, 0x1},
283
284 /* 44.1k */
285 {11289600, 44100, 256, 0x8, 0x0, 0x0},
286 {16934400, 44100, 384, 0x8, 0x1, 0x0},
287 {12000000, 44100, 272, 0x8, 0x1, 0x1},
288
289 /* 88.2k */
290 {11289600, 88200, 128, 0xf, 0x0, 0x0},
291 {16934400, 88200, 192, 0xf, 0x1, 0x0},
292 {12000000, 88200, 136, 0xf, 0x1, 0x1},
293};
294
0890c2b7
RG		 295/* rates constraints */
296static const unsigned int wm8731_rates_12000000[] = {
297 8000, 32000, 44100, 48000, 96000, 88200,
298};
299
300static const unsigned int wm8731_rates_12288000_18432000[] = {
301 8000, 32000, 48000, 96000,
302};
303
304static const unsigned int wm8731_rates_11289600_16934400[] = {
305 8000, 44100, 88200,
306};
307
308static const struct snd_pcm_hw_constraint_list wm8731_constraints_12000000 = {
309 .list = wm8731_rates_12000000,
310 .count = ARRAY_SIZE(wm8731_rates_12000000),
311};
312
313static const
314struct snd_pcm_hw_constraint_list wm8731_constraints_12288000_18432000 = {
315 .list = wm8731_rates_12288000_18432000,
316 .count = ARRAY_SIZE(wm8731_rates_12288000_18432000),
317};
318
319static const
320struct snd_pcm_hw_constraint_list wm8731_constraints_11289600_16934400 = {
321 .list = wm8731_rates_11289600_16934400,
322 .count = ARRAY_SIZE(wm8731_rates_11289600_16934400),
323};
324
40e0aa64
RP		 325static inline int get_coeff(int mclk, int rate)
326{
327 int i;
328
329 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
330 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
331 return i;
332 }
333 return 0;
334}
335
b36d61d4 336static int wm8731_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 337 struct snd_pcm_hw_params *params,
338 struct snd_soc_dai *dai)
40e0aa64 339{
f0fba2ad 340 struct snd_soc_codec *codec = dai->codec;
b2c812e2 341 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
17a52fd6 342 u16 iface = snd_soc_read(codec, WM8731_IFACE) & 0xfff3;
b36d61d4
FM		 343 int i = get_coeff(wm8731->sysclk, params_rate(params));
344 u16 srate = (coeff_div[i].sr << 2) |
345 (coeff_div[i].bosr << 1) | coeff_div[i].usb;
40e0aa64 346
dd31b310
MB		 347 wm8731->playback_fs = params_rate(params);
348
17a52fd6 349 snd_soc_write(codec, WM8731_SRATE, srate);
b36d61d4
FM		 350
351 /* bit size */
dfb6778e
MB		 352 switch (params_width(params)) {
353 case 16:
b36d61d4 354 break;
dfb6778e 355 case 20:
b36d61d4
FM		 356 iface |= 0x0004;
357 break;
dfb6778e 358 case 24:
b36d61d4
FM		 359 iface |= 0x0008;
360 break;
cf5ef3a2
MF		 361 case 32:
362 iface |= 0x000c;
363 break;
b36d61d4 364 }
40e0aa64 365
dd31b310
MB		 366 wm8731_set_deemph(codec);
367
17a52fd6 368 snd_soc_write(codec, WM8731_IFACE, iface);
b36d61d4 369 return 0;
40e0aa64
RP		 370}
371
e550e17f 372static int wm8731_mute(struct snd_soc_dai *dai, int mute)
b36d61d4
FM		 373{
374 struct snd_soc_codec *codec = dai->codec;
17a52fd6 375 u16 mute_reg = snd_soc_read(codec, WM8731_APDIGI) & 0xfff7;
b36d61d4
FM		 376
377 if (mute)
17a52fd6 378 snd_soc_write(codec, WM8731_APDIGI, mute_reg | 0x8);
b36d61d4 379 else
17a52fd6 380 snd_soc_write(codec, WM8731_APDIGI, mute_reg);
b36d61d4
FM		 381 return 0;
382}
383
e550e17f 384static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
b36d61d4
FM		 385 int clk_id, unsigned int freq, int dir)
386{
387 struct snd_soc_codec *codec = codec_dai->codec;
fc31fda6 388 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
b2c812e2 389 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
b36d61d4 390
9745e824
MB		 391 switch (clk_id) {
392 case WM8731_SYSCLK_XTAL:
393 case WM8731_SYSCLK_MCLK:
99d42234
SW		 394 if (wm8731->mclk && clk_set_rate(wm8731->mclk, freq))
395 return -EINVAL;
9745e824
MB		 396 wm8731->sysclk_type = clk_id;
397 break;
398 default:
399 return -EINVAL;
400 }
401
b36d61d4 402 switch (freq) {
0890c2b7
RG		 403 case 0:
404 wm8731->constraints = NULL;
405 break;
b36d61d4 406 case 12000000:
0890c2b7
RG		 407 wm8731->constraints = &wm8731_constraints_12000000;
408 break;
b36d61d4 409 case 12288000:
b36d61d4 410 case 18432000:
0890c2b7
RG		 411 wm8731->constraints = &wm8731_constraints_12288000_18432000;
412 break;
413 case 16934400:
414 case 11289600:
415 wm8731->constraints = &wm8731_constraints_11289600_16934400;
9745e824
MB		 416 break;
417 default:
418 return -EINVAL;
b36d61d4 419 }
9745e824 420
0890c2b7
RG		 421 wm8731->sysclk = freq;
422
fc31fda6 423 snd_soc_dapm_sync(dapm);
9745e824
MB		 424
425 return 0;
b36d61d4
FM		 426}
427
428
e550e17f 429static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
b36d61d4
FM		 430 unsigned int fmt)
431{
432 struct snd_soc_codec *codec = codec_dai->codec;
433 u16 iface = 0;
40e0aa64
RP		 434
435 /* set master/slave audio interface */
b36d61d4 436 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
40e0aa64
RP		 437 case SND_SOC_DAIFMT_CBM_CFM:
438 iface |= 0x0040;
439 break;
440 case SND_SOC_DAIFMT_CBS_CFS:
441 break;
b36d61d4
FM		 442 default:
443 return -EINVAL;
40e0aa64 444 }
40e0aa64
RP		 445
446 /* interface format */
b36d61d4 447 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
40e0aa64
RP		 448 case SND_SOC_DAIFMT_I2S:
449 iface |= 0x0002;
450 break;
451 case SND_SOC_DAIFMT_RIGHT_J:
452 break;
453 case SND_SOC_DAIFMT_LEFT_J:
454 iface |= 0x0001;
455 break;
456 case SND_SOC_DAIFMT_DSP_A:
b4af6ef9 457 iface |= 0x0013;
40e0aa64
RP		 458 break;
459 case SND_SOC_DAIFMT_DSP_B:
b4af6ef9 460 iface |= 0x0003;
40e0aa64 461 break;
b36d61d4
FM		 462 default:
463 return -EINVAL;
40e0aa64
RP		 464 }
465
466 /* clock inversion */
b36d61d4 467 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
40e0aa64
RP		 468 case SND_SOC_DAIFMT_NB_NF:
469 break;
470 case SND_SOC_DAIFMT_IB_IF:
471 iface |= 0x0090;
472 break;
473 case SND_SOC_DAIFMT_IB_NF:
474 iface |= 0x0080;
475 break;
476 case SND_SOC_DAIFMT_NB_IF:
477 iface |= 0x0010;
478 break;
b36d61d4
FM		 479 default:
480 return -EINVAL;
40e0aa64
RP		 481 }
482
483 /* set iface */
17a52fd6 484 snd_soc_write(codec, WM8731_IFACE, iface);
40e0aa64
RP		 485 return 0;
486}
487
0be9898a
MB		 488static int wm8731_set_bias_level(struct snd_soc_codec *codec,
489 enum snd_soc_bias_level level)
40e0aa64 490{
06ae9988 491 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
9bf311fe 492 int ret;
22d22ee5 493 u16 reg;
40e0aa64 494
0be9898a
MB		 495 switch (level) {
496 case SND_SOC_BIAS_ON:
cef6daa9
FE		 497 if (wm8731->mclk) {
498 ret = clk_prepare_enable(wm8731->mclk);
499 if (ret)
500 return ret;
501 }
40e0aa64 502 break;
0be9898a 503 case SND_SOC_BIAS_PREPARE:
40e0aa64 504 break;
0be9898a 505 case SND_SOC_BIAS_STANDBY:
fc31fda6 506 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
06ae9988
MB		 507 ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
508 wm8731->supplies);
509 if (ret != 0)
510 return ret;
511
05d448e2 512 regcache_sync(wm8731->regmap);
06ae9988
MB		 513 }
514
22d22ee5 515 /* Clear PWROFF, gate CLKOUT, everything else as-is */
17a52fd6
MB		 516 reg = snd_soc_read(codec, WM8731_PWR) & 0xff7f;
517 snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
40e0aa64 518 break;
0be9898a 519 case SND_SOC_BIAS_OFF:
99d42234
SW		 520 if (wm8731->mclk)
521 clk_disable_unprepare(wm8731->mclk);
17a52fd6 522 snd_soc_write(codec, WM8731_PWR, 0xffff);
06ae9988
MB		 523 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
524 wm8731->supplies);
05d448e2 525 regcache_mark_dirty(wm8731->regmap);
40e0aa64
RP		 526 break;
527 }
40e0aa64
RP		 528 return 0;
529}
530
0890c2b7
RG		 531static int wm8731_startup(struct snd_pcm_substream *substream,
532 struct snd_soc_dai *dai)
533{
534 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(dai->codec);
535
536 if (wm8731->constraints)
537 snd_pcm_hw_constraint_list(substream->runtime, 0,
538 SNDRV_PCM_HW_PARAM_RATE,
539 wm8731->constraints);
540
541 return 0;
542}
543
e135443e 544#define WM8731_RATES SNDRV_PCM_RATE_8000_96000
b36d61d4
FM		 545
546#define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
cf5ef3a2 547 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
b36d61d4 548
85e7652d 549static const struct snd_soc_dai_ops wm8731_dai_ops = {
0890c2b7 550 .startup = wm8731_startup,
6335d055 551 .hw_params = wm8731_hw_params,
6335d055
EM		 552 .digital_mute = wm8731_mute,
553 .set_sysclk = wm8731_set_dai_sysclk,
554 .set_fmt = wm8731_set_dai_fmt,
555};
556
f0fba2ad
LG		 557static struct snd_soc_dai_driver wm8731_dai = {
558 .name = "wm8731-hifi",
40e0aa64
RP		 559 .playback = {
560 .stream_name = "Playback",
561 .channels_min = 1,
562 .channels_max = 2,
b36d61d4
FM		 563 .rates = WM8731_RATES,
564 .formats = WM8731_FORMATS,},
40e0aa64
RP		 565 .capture = {
566 .stream_name = "Capture",
567 .channels_min = 1,
568 .channels_max = 2,
b36d61d4
FM		 569 .rates = WM8731_RATES,
570 .formats = WM8731_FORMATS,},
6335d055 571 .ops = &wm8731_dai_ops,
4934482d 572 .symmetric_rates = 1,
40e0aa64 573};
40e0aa64 574
6702dfcc
SK		 575static int wm8731_request_supplies(struct device *dev,
576 struct wm8731_priv *wm8731)
40e0aa64 577{
f0fba2ad 578 int ret = 0, i;
5998102b 579
7dea7c01
MB		 580 for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
581 wm8731->supplies[i].supply = wm8731_supply_names[i];
582
6702dfcc 583 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8731->supplies),
7dea7c01
MB		 584 wm8731->supplies);
585 if (ret != 0) {
6702dfcc 586 dev_err(dev, "Failed to request supplies: %d\n", ret);
f0fba2ad 587 return ret;
7dea7c01
MB		 588 }
589
590 ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
591 wm8731->supplies);
592 if (ret != 0) {
6702dfcc 593 dev_err(dev, "Failed to enable supplies: %d\n", ret);
3598aad5 594 return ret;
7dea7c01
MB		 595 }
596
6702dfcc
SK		 597 return 0;
598}
599
600static int wm8731_hw_init(struct device *dev, struct wm8731_priv *wm8731)
601{
602 int ret = 0;
603
604 ret = wm8731_reset(wm8731->regmap);
519cf2df 605 if (ret < 0) {
6702dfcc 606 dev_err(dev, "Failed to issue reset: %d\n", ret);
7dea7c01 607 goto err_regulator_enable;
519cf2df
MB		 608 }
609
6702dfcc
SK		 610 /* Clear POWEROFF, keep everything else disabled */
611 regmap_write(wm8731->regmap, WM8731_PWR, 0x7f);
5998102b
MB		 612
613 /* Latch the update bits */
6702dfcc
SK		 614 regmap_update_bits(wm8731->regmap, WM8731_LOUT1V, 0x100, 0);
615 regmap_update_bits(wm8731->regmap, WM8731_ROUT1V, 0x100, 0);
616 regmap_update_bits(wm8731->regmap, WM8731_LINVOL, 0x100, 0);
617 regmap_update_bits(wm8731->regmap, WM8731_RINVOL, 0x100, 0);
5998102b 618
ce3bdaa8 619 /* Disable bypass path by default */
6702dfcc 620 regmap_update_bits(wm8731->regmap, WM8731_APANA, 0x8, 0);
ce3bdaa8 621
6702dfcc 622 regcache_mark_dirty(wm8731->regmap);
fe5422fc 623
7dea7c01 624err_regulator_enable:
6702dfcc 625 /* Regulators will be enabled by bias management */
7dea7c01 626 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
f0fba2ad 627
fe5422fc 628 return ret;
a8035c8f
MB		 629}
630
f802d6c0 631static const struct snd_soc_codec_driver soc_codec_dev_wm8731 = {
f0fba2ad 632 .set_bias_level = wm8731_set_bias_level,
2081b2cf
LPC		 633 .suspend_bias_off = true,
634
2cb7474b
KM		 635 .component_driver = {
636 .controls = wm8731_snd_controls,
637 .num_controls = ARRAY_SIZE(wm8731_snd_controls),
638 .dapm_widgets = wm8731_dapm_widgets,
639 .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
640 .dapm_routes = wm8731_intercon,
641 .num_dapm_routes = ARRAY_SIZE(wm8731_intercon),
642 },
f0fba2ad
LG		 643};
644
a7f96e4d
MB		 645static const struct of_device_id wm8731_of_match[] = {
646 { .compatible = "wlf,wm8731", },
647 { }
648};
649
650MODULE_DEVICE_TABLE(of, wm8731_of_match);
651
05d448e2
MB		 652static const struct regmap_config wm8731_regmap = {
653 .reg_bits = 7,
654 .val_bits = 9,
655
656 .max_register = WM8731_RESET,
657 .volatile_reg = wm8731_volatile,
05d448e2
MB		 658
659 .cache_type = REGCACHE_RBTREE,
660 .reg_defaults = wm8731_reg_defaults,
661 .num_reg_defaults = ARRAY_SIZE(wm8731_reg_defaults),
662};
663
5998102b 664#if defined(CONFIG_SPI_MASTER)
7a79e94e 665static int wm8731_spi_probe(struct spi_device *spi)
5998102b 666{
5998102b 667 struct wm8731_priv *wm8731;
f0fba2ad 668 int ret;
5998102b 669
cea82d8a 670 wm8731 = devm_kzalloc(&spi->dev, sizeof(*wm8731), GFP_KERNEL);
5998102b
MB		 671 if (wm8731 == NULL)
672 return -ENOMEM;
673
99d42234
SW		 674 wm8731->mclk = devm_clk_get(&spi->dev, "mclk");
675 if (IS_ERR(wm8731->mclk)) {
676 ret = PTR_ERR(wm8731->mclk);
677 if (ret == -ENOENT) {
678 wm8731->mclk = NULL;
679 dev_warn(&spi->dev, "Assuming static MCLK\n");
680 } else {
681 dev_err(&spi->dev, "Failed to get MCLK: %d\n",
682 ret);
683 return ret;
684 }
685 }
686
a51ff30f
LPC		 687 mutex_init(&wm8731->lock);
688
6702dfcc
SK		 689 spi_set_drvdata(spi, wm8731);
690
691 ret = wm8731_request_supplies(&spi->dev, wm8731);
692 if (ret != 0)
693 return ret;
694
f1992dde 695 wm8731->regmap = devm_regmap_init_spi(spi, &wm8731_regmap);
05d448e2
MB		 696 if (IS_ERR(wm8731->regmap)) {
697 ret = PTR_ERR(wm8731->regmap);
698 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
699 ret);
f1992dde 700 return ret;
05d448e2
MB		 701 }
702
6702dfcc
SK		 703 ret = wm8731_hw_init(&spi->dev, wm8731);
704 if (ret != 0)
705 return ret;
93b760b7 706
f0fba2ad
LG		 707 ret = snd_soc_register_codec(&spi->dev,
708 &soc_codec_dev_wm8731, &wm8731_dai, 1);
05d448e2
MB		 709 if (ret != 0) {
710 dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
f1992dde 711 return ret;
05d448e2
MB		 712 }
713
714 return 0;
5998102b
MB		 715}
716
7a79e94e 717static int wm8731_spi_remove(struct spi_device *spi)
5998102b 718{
f0fba2ad 719 snd_soc_unregister_codec(&spi->dev);
5998102b
MB		 720 return 0;
721}
722
723static struct spi_driver wm8731_spi_driver = {
724 .driver = {
99b59f3c 725 .name = "wm8731",
a7f96e4d 726 .of_match_table = wm8731_of_match,
5998102b
MB		 727 },
728 .probe = wm8731_spi_probe,
7a79e94e 729 .remove = wm8731_spi_remove,
5998102b 730};
a8035c8f
MB		 731#endif /* CONFIG_SPI_MASTER */
732
b65ab73e 733#if IS_ENABLED(CONFIG_I2C)
7a79e94e
BP		 734static int wm8731_i2c_probe(struct i2c_client *i2c,
735 const struct i2c_device_id *id)
a8035c8f 736{
5998102b 737 struct wm8731_priv *wm8731;
f0fba2ad 738 int ret;
a8035c8f 739
f1992dde
MB		 740 wm8731 = devm_kzalloc(&i2c->dev, sizeof(struct wm8731_priv),
741 GFP_KERNEL);
5998102b
MB		 742 if (wm8731 == NULL)
743 return -ENOMEM;
744
99d42234
SW		 745 wm8731->mclk = devm_clk_get(&i2c->dev, "mclk");
746 if (IS_ERR(wm8731->mclk)) {
747 ret = PTR_ERR(wm8731->mclk);
748 if (ret == -ENOENT) {
749 wm8731->mclk = NULL;
750 dev_warn(&i2c->dev, "Assuming static MCLK\n");
751 } else {
752 dev_err(&i2c->dev, "Failed to get MCLK: %d\n",
753 ret);
754 return ret;
755 }
756 }
757
8a6cf30b
ML		 758 mutex_init(&wm8731->lock);
759
6702dfcc
SK		 760 i2c_set_clientdata(i2c, wm8731);
761
762 ret = wm8731_request_supplies(&i2c->dev, wm8731);
763 if (ret != 0)
764 return ret;
765
f1992dde 766 wm8731->regmap = devm_regmap_init_i2c(i2c, &wm8731_regmap);
05d448e2
MB		 767 if (IS_ERR(wm8731->regmap)) {
768 ret = PTR_ERR(wm8731->regmap);
769 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
770 ret);
f1992dde 771 return ret;
05d448e2
MB		 772 }
773
6702dfcc
SK		 774 ret = wm8731_hw_init(&i2c->dev, wm8731);
775 if (ret != 0)
776 return ret;
a8035c8f 777
05d448e2 778 ret = snd_soc_register_codec(&i2c->dev,
f0fba2ad 779 &soc_codec_dev_wm8731, &wm8731_dai, 1);
05d448e2
MB		 780 if (ret != 0) {
781 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
f1992dde 782 return ret;
05d448e2
MB		 783 }
784
785 return 0;
a8035c8f
MB		 786}
787
7a79e94e 788static int wm8731_i2c_remove(struct i2c_client *client)
a8035c8f 789{
f0fba2ad 790 snd_soc_unregister_codec(&client->dev);
a8035c8f
MB		 791 return 0;
792}
793
794static const struct i2c_device_id wm8731_i2c_id[] = {
795 { "wm8731", 0 },
796 { }
797};
798MODULE_DEVICE_TABLE(i2c, wm8731_i2c_id);
799
800static struct i2c_driver wm8731_i2c_driver = {
801 .driver = {
99b59f3c 802 .name = "wm8731",
a7f96e4d 803 .of_match_table = wm8731_of_match,
a8035c8f
MB		 804 },
805 .probe = wm8731_i2c_probe,
7a79e94e 806 .remove = wm8731_i2c_remove,
a8035c8f
MB		 807 .id_table = wm8731_i2c_id,
808};
809#endif
810
c9b3a40f 811static int __init wm8731_modinit(void)
64089b84 812{
f0fba2ad 813 int ret = 0;
b65ab73e 814#if IS_ENABLED(CONFIG_I2C)
5998102b
MB		 815 ret = i2c_add_driver(&wm8731_i2c_driver);
816 if (ret != 0) {
817 printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n",
818 ret);
819 }
820#endif
821#if defined(CONFIG_SPI_MASTER)
822 ret = spi_register_driver(&wm8731_spi_driver);
823 if (ret != 0) {
824 printk(KERN_ERR "Failed to register WM8731 SPI driver: %d\n",
825 ret);
826 }
827#endif
f0fba2ad 828 return ret;
64089b84
MB		 829}
830module_init(wm8731_modinit);
831
832static void __exit wm8731_exit(void)
833{
b65ab73e 834#if IS_ENABLED(CONFIG_I2C)
5998102b
MB		 835 i2c_del_driver(&wm8731_i2c_driver);
836#endif
837#if defined(CONFIG_SPI_MASTER)
838 spi_unregister_driver(&wm8731_spi_driver);
839#endif
64089b84
MB		 840}
841module_exit(wm8731_exit);
842
40e0aa64
RP		 843MODULE_DESCRIPTION("ASoC WM8731 driver");
844MODULE_AUTHOR("Richard Purdie");
845MODULE_LICENSE("GPL");
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