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d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
40e0aa64
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2/*
3 * wm8731.c -- WM8731 ALSA SoC Audio driver
4 *
5 * Copyright 2005 Openedhand Ltd.
656baaeb 6 * Copyright 2006-12 Wolfson Microelectronics, plc
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7 *
8 * Author: Richard Purdie <richard@openedhand.com>
9 *
10 * Based on wm8753.c by Liam Girdwood
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RP
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
5a0e3ad6 19#include <linux/slab.h>
05d448e2 20#include <linux/regmap.h>
7dea7c01 21#include <linux/regulator/consumer.h>
d2a40355 22#include <linux/spi/spi.h>
a7f96e4d 23#include <linux/of_device.h>
a51ff30f 24#include <linux/mutex.h>
99d42234 25#include <linux/clk.h>
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RP
26#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/soc.h>
40e0aa64 30#include <sound/initval.h>
d00efa64 31#include <sound/tlv.h>
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RP
32
33#include "wm8731.h"
34
7dea7c01
MB
35#define WM8731_NUM_SUPPLIES 4
36static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
37 "AVDD",
38 "HPVDD",
39 "DCVDD",
40 "DBVDD",
41};
42
b36d61d4
FM
43/* codec private data */
44struct wm8731_priv {
05d448e2 45 struct regmap *regmap;
99d42234 46 struct clk *mclk;
7dea7c01 47 struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
0890c2b7 48 const struct snd_pcm_hw_constraint_list *constraints;
b36d61d4 49 unsigned int sysclk;
9745e824 50 int sysclk_type;
dd31b310
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51 int playback_fs;
52 bool deemph;
a51ff30f
LPC
53
54 struct mutex lock;
b36d61d4
FM
55};
56
a8035c8f 57
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58/*
59 * wm8731 register cache
40e0aa64 60 */
05d448e2
MB
61static const struct reg_default wm8731_reg_defaults[] = {
62 { 0, 0x0097 },
63 { 1, 0x0097 },
64 { 2, 0x0079 },
65 { 3, 0x0079 },
66 { 4, 0x000a },
67 { 5, 0x0008 },
68 { 6, 0x009f },
69 { 7, 0x000a },
70 { 8, 0x0000 },
71 { 9, 0x0000 },
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RP
72};
73
05d448e2
MB
74static bool wm8731_volatile(struct device *dev, unsigned int reg)
75{
76 return reg == WM8731_RESET;
77}
78
6702dfcc 79#define wm8731_reset(m) regmap_write(m, WM8731_RESET, 0)
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80
81static const char *wm8731_input_select[] = {"Line In", "Mic"};
59f72970 82
9e74b14a
TI
83static SOC_ENUM_SINGLE_DECL(wm8731_insel_enum,
84 WM8731_APANA, 2, wm8731_input_select);
59f72970 85
dd31b310
MB
86static int wm8731_deemph[] = { 0, 32000, 44100, 48000 };
87
cde596c7 88static int wm8731_set_deemph(struct snd_soc_component *component)
dd31b310 89{
cde596c7 90 struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
dd31b310
MB
91 int val, i, best;
92
93 /* If we're using deemphasis select the nearest available sample
94 * rate.
95 */
96 if (wm8731->deemph) {
97 best = 1;
98 for (i = 2; i < ARRAY_SIZE(wm8731_deemph); i++) {
99 if (abs(wm8731_deemph[i] - wm8731->playback_fs) <
100 abs(wm8731_deemph[best] - wm8731->playback_fs))
101 best = i;
102 }
103
104 val = best << 1;
105 } else {
106 best = 0;
107 val = 0;
108 }
109
cde596c7 110 dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n",
dd31b310
MB
111 best, wm8731_deemph[best]);
112
cde596c7 113 return snd_soc_component_update_bits(component, WM8731_APDIGI, 0x6, val);
dd31b310
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114}
115
116static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
117 struct snd_ctl_elem_value *ucontrol)
118{
cde596c7
KM
119 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
120 struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
dd31b310 121
bd14016f 122 ucontrol->value.integer.value[0] = wm8731->deemph;
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123
124 return 0;
125}
126
127static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
128 struct snd_ctl_elem_value *ucontrol)
129{
cde596c7
KM
130 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
131 struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
523bade2 132 unsigned int deemph = ucontrol->value.integer.value[0];
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133 int ret = 0;
134
135 if (deemph > 1)
136 return -EINVAL;
137
a51ff30f 138 mutex_lock(&wm8731->lock);
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139 if (wm8731->deemph != deemph) {
140 wm8731->deemph = deemph;
59f72970 141
cde596c7 142 wm8731_set_deemph(component);
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143
144 ret = 1;
145 }
a51ff30f 146 mutex_unlock(&wm8731->lock);
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147
148 return ret;
149}
40e0aa64 150
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151static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
152static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
153static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
d921184e 154static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 2000, 0);
d00efa64 155
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156static const struct snd_kcontrol_new wm8731_snd_controls[] = {
157
d00efa64
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158SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
159 0, 127, 0, out_tlv),
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LG
160SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
161 7, 1, 0),
40e0aa64 162
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163SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
164 in_tlv),
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165SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
166
d921184e 167SOC_SINGLE_TLV("Mic Boost Volume", WM8731_APANA, 0, 1, 0, mic_tlv),
ef38ed88 168SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
40e0aa64 169
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170SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
171 sidetone_tlv),
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172
173SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
174SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
175
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176SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
177 wm8731_get_deemph, wm8731_put_deemph),
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178};
179
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180/* Output Mixer */
181static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
182SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
183SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
184SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
185};
186
187/* Input mux */
188static const struct snd_kcontrol_new wm8731_input_mux_controls =
59f72970 189SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
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190
191static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
8a27bd9a 192SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
9745e824 193SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
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RP
194SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
195 &wm8731_output_mixer_controls[0],
196 ARRAY_SIZE(wm8731_output_mixer_controls)),
197SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
198SND_SOC_DAPM_OUTPUT("LOUT"),
199SND_SOC_DAPM_OUTPUT("LHPOUT"),
200SND_SOC_DAPM_OUTPUT("ROUT"),
201SND_SOC_DAPM_OUTPUT("RHPOUT"),
202SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
203SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
204SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
205SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
206SND_SOC_DAPM_INPUT("MICIN"),
207SND_SOC_DAPM_INPUT("RLINEIN"),
208SND_SOC_DAPM_INPUT("LLINEIN"),
209};
210
9745e824
MB
211static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
212 struct snd_soc_dapm_widget *sink)
213{
cde596c7
KM
214 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
215 struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
9745e824 216
5a195b44 217 return wm8731->sysclk_type == WM8731_SYSCLK_XTAL;
9745e824
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218}
219
5e251aec 220static const struct snd_soc_dapm_route wm8731_intercon[] = {
9745e824
MB
221 {"DAC", NULL, "OSC", wm8731_check_osc},
222 {"ADC", NULL, "OSC", wm8731_check_osc},
8a27bd9a
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223 {"DAC", NULL, "ACTIVE"},
224 {"ADC", NULL, "ACTIVE"},
9745e824 225
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RP
226 /* output mixer */
227 {"Output Mixer", "Line Bypass Switch", "Line Input"},
228 {"Output Mixer", "HiFi Playback Switch", "DAC"},
229 {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
230
231 /* outputs */
232 {"RHPOUT", NULL, "Output Mixer"},
233 {"ROUT", NULL, "Output Mixer"},
234 {"LHPOUT", NULL, "Output Mixer"},
235 {"LOUT", NULL, "Output Mixer"},
236
237 /* input mux */
238 {"Input Mux", "Line In", "Line Input"},
239 {"Input Mux", "Mic", "Mic Bias"},
240 {"ADC", NULL, "Input Mux"},
241
242 /* inputs */
243 {"Line Input", NULL, "LLINEIN"},
244 {"Line Input", NULL, "RLINEIN"},
245 {"Mic Bias", NULL, "MICIN"},
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RP
246};
247
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248struct _coeff_div {
249 u32 mclk;
250 u32 rate;
251 u16 fs;
252 u8 sr:4;
253 u8 bosr:1;
254 u8 usb:1;
255};
256
257/* codec mclk clock divider coefficients */
258static const struct _coeff_div coeff_div[] = {
259 /* 48k */
260 {12288000, 48000, 256, 0x0, 0x0, 0x0},
261 {18432000, 48000, 384, 0x0, 0x1, 0x0},
262 {12000000, 48000, 250, 0x0, 0x0, 0x1},
263
264 /* 32k */
265 {12288000, 32000, 384, 0x6, 0x0, 0x0},
266 {18432000, 32000, 576, 0x6, 0x1, 0x0},
298a2c75 267 {12000000, 32000, 375, 0x6, 0x0, 0x1},
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RP
268
269 /* 8k */
270 {12288000, 8000, 1536, 0x3, 0x0, 0x0},
271 {18432000, 8000, 2304, 0x3, 0x1, 0x0},
272 {11289600, 8000, 1408, 0xb, 0x0, 0x0},
273 {16934400, 8000, 2112, 0xb, 0x1, 0x0},
274 {12000000, 8000, 1500, 0x3, 0x0, 0x1},
275
276 /* 96k */
277 {12288000, 96000, 128, 0x7, 0x0, 0x0},
278 {18432000, 96000, 192, 0x7, 0x1, 0x0},
279 {12000000, 96000, 125, 0x7, 0x0, 0x1},
280
281 /* 44.1k */
282 {11289600, 44100, 256, 0x8, 0x0, 0x0},
283 {16934400, 44100, 384, 0x8, 0x1, 0x0},
284 {12000000, 44100, 272, 0x8, 0x1, 0x1},
285
286 /* 88.2k */
287 {11289600, 88200, 128, 0xf, 0x0, 0x0},
288 {16934400, 88200, 192, 0xf, 0x1, 0x0},
289 {12000000, 88200, 136, 0xf, 0x1, 0x1},
290};
291
0890c2b7
RG
292/* rates constraints */
293static const unsigned int wm8731_rates_12000000[] = {
294 8000, 32000, 44100, 48000, 96000, 88200,
295};
296
297static const unsigned int wm8731_rates_12288000_18432000[] = {
298 8000, 32000, 48000, 96000,
299};
300
301static const unsigned int wm8731_rates_11289600_16934400[] = {
302 8000, 44100, 88200,
303};
304
305static const struct snd_pcm_hw_constraint_list wm8731_constraints_12000000 = {
306 .list = wm8731_rates_12000000,
307 .count = ARRAY_SIZE(wm8731_rates_12000000),
308};
309
310static const
311struct snd_pcm_hw_constraint_list wm8731_constraints_12288000_18432000 = {
312 .list = wm8731_rates_12288000_18432000,
313 .count = ARRAY_SIZE(wm8731_rates_12288000_18432000),
314};
315
316static const
317struct snd_pcm_hw_constraint_list wm8731_constraints_11289600_16934400 = {
318 .list = wm8731_rates_11289600_16934400,
319 .count = ARRAY_SIZE(wm8731_rates_11289600_16934400),
320};
321
40e0aa64
RP
322static inline int get_coeff(int mclk, int rate)
323{
324 int i;
325
326 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
327 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
328 return i;
329 }
330 return 0;
331}
332
b36d61d4 333static int wm8731_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB
334 struct snd_pcm_hw_params *params,
335 struct snd_soc_dai *dai)
40e0aa64 336{
cde596c7
KM
337 struct snd_soc_component *component = dai->component;
338 struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
339 u16 iface = snd_soc_component_read32(component, WM8731_IFACE) & 0xfff3;
b36d61d4
FM
340 int i = get_coeff(wm8731->sysclk, params_rate(params));
341 u16 srate = (coeff_div[i].sr << 2) |
342 (coeff_div[i].bosr << 1) | coeff_div[i].usb;
40e0aa64 343
dd31b310
MB
344 wm8731->playback_fs = params_rate(params);
345
cde596c7 346 snd_soc_component_write(component, WM8731_SRATE, srate);
b36d61d4
FM
347
348 /* bit size */
dfb6778e
MB
349 switch (params_width(params)) {
350 case 16:
b36d61d4 351 break;
dfb6778e 352 case 20:
b36d61d4
FM
353 iface |= 0x0004;
354 break;
dfb6778e 355 case 24:
b36d61d4
FM
356 iface |= 0x0008;
357 break;
cf5ef3a2
MF
358 case 32:
359 iface |= 0x000c;
360 break;
b36d61d4 361 }
40e0aa64 362
cde596c7 363 wm8731_set_deemph(component);
dd31b310 364
cde596c7 365 snd_soc_component_write(component, WM8731_IFACE, iface);
b36d61d4 366 return 0;
40e0aa64
RP
367}
368
e550e17f 369static int wm8731_mute(struct snd_soc_dai *dai, int mute)
b36d61d4 370{
cde596c7
KM
371 struct snd_soc_component *component = dai->component;
372 u16 mute_reg = snd_soc_component_read32(component, WM8731_APDIGI) & 0xfff7;
b36d61d4
FM
373
374 if (mute)
cde596c7 375 snd_soc_component_write(component, WM8731_APDIGI, mute_reg | 0x8);
b36d61d4 376 else
cde596c7 377 snd_soc_component_write(component, WM8731_APDIGI, mute_reg);
b36d61d4
FM
378 return 0;
379}
380
e550e17f 381static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
b36d61d4
FM
382 int clk_id, unsigned int freq, int dir)
383{
cde596c7
KM
384 struct snd_soc_component *component = codec_dai->component;
385 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
386 struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
b36d61d4 387
9745e824
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388 switch (clk_id) {
389 case WM8731_SYSCLK_XTAL:
390 case WM8731_SYSCLK_MCLK:
99d42234
SW
391 if (wm8731->mclk && clk_set_rate(wm8731->mclk, freq))
392 return -EINVAL;
9745e824
MB
393 wm8731->sysclk_type = clk_id;
394 break;
395 default:
396 return -EINVAL;
397 }
398
b36d61d4 399 switch (freq) {
0890c2b7
RG
400 case 0:
401 wm8731->constraints = NULL;
402 break;
b36d61d4 403 case 12000000:
0890c2b7
RG
404 wm8731->constraints = &wm8731_constraints_12000000;
405 break;
b36d61d4 406 case 12288000:
b36d61d4 407 case 18432000:
0890c2b7
RG
408 wm8731->constraints = &wm8731_constraints_12288000_18432000;
409 break;
410 case 16934400:
411 case 11289600:
412 wm8731->constraints = &wm8731_constraints_11289600_16934400;
9745e824
MB
413 break;
414 default:
415 return -EINVAL;
b36d61d4 416 }
9745e824 417
0890c2b7
RG
418 wm8731->sysclk = freq;
419
fc31fda6 420 snd_soc_dapm_sync(dapm);
9745e824
MB
421
422 return 0;
b36d61d4
FM
423}
424
425
e550e17f 426static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
b36d61d4
FM
427 unsigned int fmt)
428{
cde596c7 429 struct snd_soc_component *component = codec_dai->component;
b36d61d4 430 u16 iface = 0;
40e0aa64
RP
431
432 /* set master/slave audio interface */
b36d61d4 433 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
40e0aa64
RP
434 case SND_SOC_DAIFMT_CBM_CFM:
435 iface |= 0x0040;
436 break;
437 case SND_SOC_DAIFMT_CBS_CFS:
438 break;
b36d61d4
FM
439 default:
440 return -EINVAL;
40e0aa64 441 }
40e0aa64
RP
442
443 /* interface format */
b36d61d4 444 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
40e0aa64
RP
445 case SND_SOC_DAIFMT_I2S:
446 iface |= 0x0002;
447 break;
448 case SND_SOC_DAIFMT_RIGHT_J:
449 break;
450 case SND_SOC_DAIFMT_LEFT_J:
451 iface |= 0x0001;
452 break;
453 case SND_SOC_DAIFMT_DSP_A:
b4af6ef9 454 iface |= 0x0013;
40e0aa64
RP
455 break;
456 case SND_SOC_DAIFMT_DSP_B:
b4af6ef9 457 iface |= 0x0003;
40e0aa64 458 break;
b36d61d4
FM
459 default:
460 return -EINVAL;
40e0aa64
RP
461 }
462
463 /* clock inversion */
b36d61d4 464 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
40e0aa64
RP
465 case SND_SOC_DAIFMT_NB_NF:
466 break;
467 case SND_SOC_DAIFMT_IB_IF:
468 iface |= 0x0090;
469 break;
470 case SND_SOC_DAIFMT_IB_NF:
471 iface |= 0x0080;
472 break;
473 case SND_SOC_DAIFMT_NB_IF:
474 iface |= 0x0010;
475 break;
b36d61d4
FM
476 default:
477 return -EINVAL;
40e0aa64
RP
478 }
479
480 /* set iface */
cde596c7 481 snd_soc_component_write(component, WM8731_IFACE, iface);
40e0aa64
RP
482 return 0;
483}
484
cde596c7 485static int wm8731_set_bias_level(struct snd_soc_component *component,
0be9898a 486 enum snd_soc_bias_level level)
40e0aa64 487{
cde596c7 488 struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
9bf311fe 489 int ret;
22d22ee5 490 u16 reg;
40e0aa64 491
0be9898a
MB
492 switch (level) {
493 case SND_SOC_BIAS_ON:
cef6daa9
FE
494 if (wm8731->mclk) {
495 ret = clk_prepare_enable(wm8731->mclk);
496 if (ret)
497 return ret;
498 }
40e0aa64 499 break;
0be9898a 500 case SND_SOC_BIAS_PREPARE:
40e0aa64 501 break;
0be9898a 502 case SND_SOC_BIAS_STANDBY:
cde596c7 503 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
06ae9988
MB
504 ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
505 wm8731->supplies);
506 if (ret != 0)
507 return ret;
508
05d448e2 509 regcache_sync(wm8731->regmap);
06ae9988
MB
510 }
511
22d22ee5 512 /* Clear PWROFF, gate CLKOUT, everything else as-is */
cde596c7
KM
513 reg = snd_soc_component_read32(component, WM8731_PWR) & 0xff7f;
514 snd_soc_component_write(component, WM8731_PWR, reg | 0x0040);
40e0aa64 515 break;
0be9898a 516 case SND_SOC_BIAS_OFF:
99d42234
SW
517 if (wm8731->mclk)
518 clk_disable_unprepare(wm8731->mclk);
cde596c7 519 snd_soc_component_write(component, WM8731_PWR, 0xffff);
06ae9988
MB
520 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
521 wm8731->supplies);
05d448e2 522 regcache_mark_dirty(wm8731->regmap);
40e0aa64
RP
523 break;
524 }
40e0aa64
RP
525 return 0;
526}
527
0890c2b7
RG
528static int wm8731_startup(struct snd_pcm_substream *substream,
529 struct snd_soc_dai *dai)
530{
cde596c7 531 struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(dai->component);
0890c2b7
RG
532
533 if (wm8731->constraints)
534 snd_pcm_hw_constraint_list(substream->runtime, 0,
535 SNDRV_PCM_HW_PARAM_RATE,
536 wm8731->constraints);
537
538 return 0;
539}
540
e135443e 541#define WM8731_RATES SNDRV_PCM_RATE_8000_96000
b36d61d4
FM
542
543#define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
cf5ef3a2 544 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
b36d61d4 545
85e7652d 546static const struct snd_soc_dai_ops wm8731_dai_ops = {
0890c2b7 547 .startup = wm8731_startup,
6335d055 548 .hw_params = wm8731_hw_params,
6335d055
EM
549 .digital_mute = wm8731_mute,
550 .set_sysclk = wm8731_set_dai_sysclk,
551 .set_fmt = wm8731_set_dai_fmt,
552};
553
f0fba2ad
LG
554static struct snd_soc_dai_driver wm8731_dai = {
555 .name = "wm8731-hifi",
40e0aa64
RP
556 .playback = {
557 .stream_name = "Playback",
558 .channels_min = 1,
559 .channels_max = 2,
b36d61d4
FM
560 .rates = WM8731_RATES,
561 .formats = WM8731_FORMATS,},
40e0aa64
RP
562 .capture = {
563 .stream_name = "Capture",
564 .channels_min = 1,
565 .channels_max = 2,
b36d61d4
FM
566 .rates = WM8731_RATES,
567 .formats = WM8731_FORMATS,},
6335d055 568 .ops = &wm8731_dai_ops,
4934482d 569 .symmetric_rates = 1,
40e0aa64 570};
40e0aa64 571
6702dfcc
SK
572static int wm8731_request_supplies(struct device *dev,
573 struct wm8731_priv *wm8731)
40e0aa64 574{
f0fba2ad 575 int ret = 0, i;
5998102b 576
7dea7c01
MB
577 for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
578 wm8731->supplies[i].supply = wm8731_supply_names[i];
579
6702dfcc 580 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8731->supplies),
7dea7c01
MB
581 wm8731->supplies);
582 if (ret != 0) {
6702dfcc 583 dev_err(dev, "Failed to request supplies: %d\n", ret);
f0fba2ad 584 return ret;
7dea7c01
MB
585 }
586
587 ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
588 wm8731->supplies);
589 if (ret != 0) {
6702dfcc 590 dev_err(dev, "Failed to enable supplies: %d\n", ret);
3598aad5 591 return ret;
7dea7c01
MB
592 }
593
6702dfcc
SK
594 return 0;
595}
596
597static int wm8731_hw_init(struct device *dev, struct wm8731_priv *wm8731)
598{
599 int ret = 0;
600
601 ret = wm8731_reset(wm8731->regmap);
519cf2df 602 if (ret < 0) {
6702dfcc 603 dev_err(dev, "Failed to issue reset: %d\n", ret);
7dea7c01 604 goto err_regulator_enable;
519cf2df
MB
605 }
606
6702dfcc
SK
607 /* Clear POWEROFF, keep everything else disabled */
608 regmap_write(wm8731->regmap, WM8731_PWR, 0x7f);
5998102b
MB
609
610 /* Latch the update bits */
6702dfcc
SK
611 regmap_update_bits(wm8731->regmap, WM8731_LOUT1V, 0x100, 0);
612 regmap_update_bits(wm8731->regmap, WM8731_ROUT1V, 0x100, 0);
613 regmap_update_bits(wm8731->regmap, WM8731_LINVOL, 0x100, 0);
614 regmap_update_bits(wm8731->regmap, WM8731_RINVOL, 0x100, 0);
5998102b 615
ce3bdaa8 616 /* Disable bypass path by default */
6702dfcc 617 regmap_update_bits(wm8731->regmap, WM8731_APANA, 0x8, 0);
ce3bdaa8 618
6702dfcc 619 regcache_mark_dirty(wm8731->regmap);
fe5422fc 620
7dea7c01 621err_regulator_enable:
6702dfcc 622 /* Regulators will be enabled by bias management */
7dea7c01 623 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
f0fba2ad 624
fe5422fc 625 return ret;
a8035c8f
MB
626}
627
cde596c7
KM
628static const struct snd_soc_component_driver soc_component_dev_wm8731 = {
629 .set_bias_level = wm8731_set_bias_level,
630 .controls = wm8731_snd_controls,
631 .num_controls = ARRAY_SIZE(wm8731_snd_controls),
632 .dapm_widgets = wm8731_dapm_widgets,
633 .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
634 .dapm_routes = wm8731_intercon,
635 .num_dapm_routes = ARRAY_SIZE(wm8731_intercon),
636 .suspend_bias_off = 1,
637 .idle_bias_on = 1,
638 .use_pmdown_time = 1,
639 .endianness = 1,
640 .non_legacy_dai_naming = 1,
f0fba2ad
LG
641};
642
a7f96e4d
MB
643static const struct of_device_id wm8731_of_match[] = {
644 { .compatible = "wlf,wm8731", },
645 { }
646};
647
648MODULE_DEVICE_TABLE(of, wm8731_of_match);
649
05d448e2
MB
650static const struct regmap_config wm8731_regmap = {
651 .reg_bits = 7,
652 .val_bits = 9,
653
654 .max_register = WM8731_RESET,
655 .volatile_reg = wm8731_volatile,
05d448e2
MB
656
657 .cache_type = REGCACHE_RBTREE,
658 .reg_defaults = wm8731_reg_defaults,
659 .num_reg_defaults = ARRAY_SIZE(wm8731_reg_defaults),
660};
661
5998102b 662#if defined(CONFIG_SPI_MASTER)
7a79e94e 663static int wm8731_spi_probe(struct spi_device *spi)
5998102b 664{
5998102b 665 struct wm8731_priv *wm8731;
f0fba2ad 666 int ret;
5998102b 667
cea82d8a 668 wm8731 = devm_kzalloc(&spi->dev, sizeof(*wm8731), GFP_KERNEL);
5998102b
MB
669 if (wm8731 == NULL)
670 return -ENOMEM;
671
99d42234
SW
672 wm8731->mclk = devm_clk_get(&spi->dev, "mclk");
673 if (IS_ERR(wm8731->mclk)) {
674 ret = PTR_ERR(wm8731->mclk);
675 if (ret == -ENOENT) {
676 wm8731->mclk = NULL;
677 dev_warn(&spi->dev, "Assuming static MCLK\n");
678 } else {
679 dev_err(&spi->dev, "Failed to get MCLK: %d\n",
680 ret);
681 return ret;
682 }
683 }
684
a51ff30f
LPC
685 mutex_init(&wm8731->lock);
686
6702dfcc
SK
687 spi_set_drvdata(spi, wm8731);
688
689 ret = wm8731_request_supplies(&spi->dev, wm8731);
690 if (ret != 0)
691 return ret;
692
f1992dde 693 wm8731->regmap = devm_regmap_init_spi(spi, &wm8731_regmap);
05d448e2
MB
694 if (IS_ERR(wm8731->regmap)) {
695 ret = PTR_ERR(wm8731->regmap);
696 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
697 ret);
f1992dde 698 return ret;
05d448e2
MB
699 }
700
6702dfcc
SK
701 ret = wm8731_hw_init(&spi->dev, wm8731);
702 if (ret != 0)
703 return ret;
93b760b7 704
cde596c7
KM
705 ret = devm_snd_soc_register_component(&spi->dev,
706 &soc_component_dev_wm8731, &wm8731_dai, 1);
05d448e2
MB
707 if (ret != 0) {
708 dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
f1992dde 709 return ret;
05d448e2
MB
710 }
711
712 return 0;
5998102b
MB
713}
714
7a79e94e 715static int wm8731_spi_remove(struct spi_device *spi)
5998102b 716{
5998102b
MB
717 return 0;
718}
719
720static struct spi_driver wm8731_spi_driver = {
721 .driver = {
99b59f3c 722 .name = "wm8731",
a7f96e4d 723 .of_match_table = wm8731_of_match,
5998102b
MB
724 },
725 .probe = wm8731_spi_probe,
7a79e94e 726 .remove = wm8731_spi_remove,
5998102b 727};
a8035c8f
MB
728#endif /* CONFIG_SPI_MASTER */
729
b65ab73e 730#if IS_ENABLED(CONFIG_I2C)
7a79e94e
BP
731static int wm8731_i2c_probe(struct i2c_client *i2c,
732 const struct i2c_device_id *id)
a8035c8f 733{
5998102b 734 struct wm8731_priv *wm8731;
f0fba2ad 735 int ret;
a8035c8f 736
f1992dde
MB
737 wm8731 = devm_kzalloc(&i2c->dev, sizeof(struct wm8731_priv),
738 GFP_KERNEL);
5998102b
MB
739 if (wm8731 == NULL)
740 return -ENOMEM;
741
99d42234
SW
742 wm8731->mclk = devm_clk_get(&i2c->dev, "mclk");
743 if (IS_ERR(wm8731->mclk)) {
744 ret = PTR_ERR(wm8731->mclk);
745 if (ret == -ENOENT) {
746 wm8731->mclk = NULL;
747 dev_warn(&i2c->dev, "Assuming static MCLK\n");
748 } else {
749 dev_err(&i2c->dev, "Failed to get MCLK: %d\n",
750 ret);
751 return ret;
752 }
753 }
754
8a6cf30b
ML
755 mutex_init(&wm8731->lock);
756
6702dfcc
SK
757 i2c_set_clientdata(i2c, wm8731);
758
759 ret = wm8731_request_supplies(&i2c->dev, wm8731);
760 if (ret != 0)
761 return ret;
762
f1992dde 763 wm8731->regmap = devm_regmap_init_i2c(i2c, &wm8731_regmap);
05d448e2
MB
764 if (IS_ERR(wm8731->regmap)) {
765 ret = PTR_ERR(wm8731->regmap);
766 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
767 ret);
f1992dde 768 return ret;
05d448e2
MB
769 }
770
6702dfcc
SK
771 ret = wm8731_hw_init(&i2c->dev, wm8731);
772 if (ret != 0)
773 return ret;
a8035c8f 774
cde596c7
KM
775 ret = devm_snd_soc_register_component(&i2c->dev,
776 &soc_component_dev_wm8731, &wm8731_dai, 1);
05d448e2
MB
777 if (ret != 0) {
778 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
f1992dde 779 return ret;
05d448e2
MB
780 }
781
782 return 0;
a8035c8f
MB
783}
784
7a79e94e 785static int wm8731_i2c_remove(struct i2c_client *client)
a8035c8f 786{
a8035c8f
MB
787 return 0;
788}
789
790static const struct i2c_device_id wm8731_i2c_id[] = {
791 { "wm8731", 0 },
792 { }
793};
794MODULE_DEVICE_TABLE(i2c, wm8731_i2c_id);
795
796static struct i2c_driver wm8731_i2c_driver = {
797 .driver = {
99b59f3c 798 .name = "wm8731",
a7f96e4d 799 .of_match_table = wm8731_of_match,
a8035c8f
MB
800 },
801 .probe = wm8731_i2c_probe,
7a79e94e 802 .remove = wm8731_i2c_remove,
a8035c8f
MB
803 .id_table = wm8731_i2c_id,
804};
805#endif
806
c9b3a40f 807static int __init wm8731_modinit(void)
64089b84 808{
f0fba2ad 809 int ret = 0;
b65ab73e 810#if IS_ENABLED(CONFIG_I2C)
5998102b
MB
811 ret = i2c_add_driver(&wm8731_i2c_driver);
812 if (ret != 0) {
813 printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n",
814 ret);
815 }
816#endif
817#if defined(CONFIG_SPI_MASTER)
818 ret = spi_register_driver(&wm8731_spi_driver);
819 if (ret != 0) {
820 printk(KERN_ERR "Failed to register WM8731 SPI driver: %d\n",
821 ret);
822 }
823#endif
f0fba2ad 824 return ret;
64089b84
MB
825}
826module_init(wm8731_modinit);
827
828static void __exit wm8731_exit(void)
829{
b65ab73e 830#if IS_ENABLED(CONFIG_I2C)
5998102b
MB
831 i2c_del_driver(&wm8731_i2c_driver);
832#endif
833#if defined(CONFIG_SPI_MASTER)
834 spi_unregister_driver(&wm8731_spi_driver);
835#endif
64089b84
MB
836}
837module_exit(wm8731_exit);
838
40e0aa64
RP
839MODULE_DESCRIPTION("ASoC WM8731 driver");
840MODULE_AUTHOR("Richard Purdie");
841MODULE_LICENSE("GPL");