]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - sound/soc/codecs/wm8770.c
projects / mirror_ubuntu-hirsute-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'for-next' into for-linus
[mirror_ubuntu-hirsute-kernel.git] / sound / soc / codecs / wm8770.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
c046fd4d
DP		 2/*
3 * wm8770.c -- WM8770 ALSA SoC Audio driver
4 *
5 * Copyright 2010 Wolfson Microelectronics plc
6 *
7 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
c046fd4d
DP		 8 */
9
10#include <linux/module.h>
11#include <linux/moduleparam.h>
12#include <linux/init.h>
13#include <linux/delay.h>
13c7d08f 14#include <linux/of_device.h>
c046fd4d 15#include <linux/pm.h>
c046fd4d 16#include <linux/spi/spi.h>
dc43b046 17#include <linux/regmap.h>
c046fd4d
DP		 18#include <linux/regulator/consumer.h>
19#include <linux/slab.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
c046fd4d
DP		 24#include <sound/initval.h>
25#include <sound/tlv.h>
26
27#include "wm8770.h"
28
29#define WM8770_NUM_SUPPLIES 3
30static const char *wm8770_supply_names[WM8770_NUM_SUPPLIES] = {
31 "AVDD1",
32 "AVDD2",
33 "DVDD"
34};
35
dc43b046
MB		 36static const struct reg_default wm8770_reg_defaults[] = {
37 { 0, 0x7f },
38 { 1, 0x7f },
39 { 2, 0x7f },
40 { 3, 0x7f },
41 { 4, 0x7f },
42 { 5, 0x7f },
43 { 6, 0x7f },
44 { 7, 0x7f },
45 { 8, 0x7f },
46 { 9, 0xff },
47 { 10, 0xff },
48 { 11, 0xff },
49 { 12, 0xff },
50 { 13, 0xff },
51 { 14, 0xff },
52 { 15, 0xff },
53 { 16, 0xff },
54 { 17, 0xff },
55 { 18, 0 },
56 { 19, 0x90 },
57 { 20, 0 },
58 { 21, 0 },
59 { 22, 0x22 },
60 { 23, 0x22 },
61 { 24, 0x3e },
62 { 25, 0xc },
63 { 26, 0xc },
64 { 27, 0x100 },
65 { 28, 0x189 },
66 { 29, 0x189 },
67 { 30, 0x8770 },
c046fd4d
DP		 68};
69
dc43b046
MB		 70static bool wm8770_volatile_reg(struct device *dev, unsigned int reg)
71{
72 switch (reg) {
73 case WM8770_RESET:
74 return true;
75 default:
76 return false;
77 }
78}
79
c046fd4d 80struct wm8770_priv {
dc43b046 81 struct regmap *regmap;
c046fd4d
DP		 82 struct regulator_bulk_data supplies[WM8770_NUM_SUPPLIES];
83 struct notifier_block disable_nb[WM8770_NUM_SUPPLIES];
502cb3a2 84 struct snd_soc_component *component;
c046fd4d
DP		 85 int sysclk;
86};
87
88static int vout12supply_event(struct snd_soc_dapm_widget *w,
89 struct snd_kcontrol *kcontrol, int event);
90static int vout34supply_event(struct snd_soc_dapm_widget *w,
91 struct snd_kcontrol *kcontrol, int event);
92
93/*
94 * We can't use the same notifier block for more than one supply and
95 * there's no way I can see to get from a callback to the caller
96 * except container_of().
97 */
98#define WM8770_REGULATOR_EVENT(n) \
99static int wm8770_regulator_event_##n(struct notifier_block *nb, \
100 unsigned long event, void *data) \
101{ \
102 struct wm8770_priv *wm8770 = container_of(nb, struct wm8770_priv, \
103 disable_nb[n]); \
104 if (event & REGULATOR_EVENT_DISABLE) { \
dc43b046 105 regcache_mark_dirty(wm8770->regmap); \
c046fd4d
DP		 106 } \
107 return 0; \
108}
109
110WM8770_REGULATOR_EVENT(0)
111WM8770_REGULATOR_EVENT(1)
112WM8770_REGULATOR_EVENT(2)
113
114static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0);
115static const DECLARE_TLV_DB_SCALE(dac_dig_tlv, -12750, 50, 1);
116static const DECLARE_TLV_DB_SCALE(dac_alg_tlv, -12700, 100, 1);
117
118static const char *dac_phase_text[][2] = {
119 { "DAC1 Normal", "DAC1 Inverted" },
120 { "DAC2 Normal", "DAC2 Inverted" },
121 { "DAC3 Normal", "DAC3 Inverted" },
122 { "DAC4 Normal", "DAC4 Inverted" },
123};
124
125static const struct soc_enum dac_phase[] = {
126 SOC_ENUM_DOUBLE(WM8770_DACPHASE, 0, 1, 2, dac_phase_text[0]),
127 SOC_ENUM_DOUBLE(WM8770_DACPHASE, 2, 3, 2, dac_phase_text[1]),
128 SOC_ENUM_DOUBLE(WM8770_DACPHASE, 4, 5, 2, dac_phase_text[2]),
129 SOC_ENUM_DOUBLE(WM8770_DACPHASE, 6, 7, 2, dac_phase_text[3]),
130};
131
132static const struct snd_kcontrol_new wm8770_snd_controls[] = {
133 /* global DAC playback controls */
134 SOC_SINGLE_TLV("DAC Playback Volume", WM8770_MSDIGVOL, 0, 255, 0,
135 dac_dig_tlv),
136 SOC_SINGLE("DAC Playback Switch", WM8770_DACMUTE, 4, 1, 1),
137 SOC_SINGLE("DAC Playback ZC Switch", WM8770_DACCTRL1, 0, 1, 0),
138
139 /* global VOUT playback controls */
140 SOC_SINGLE_TLV("VOUT Playback Volume", WM8770_MSALGVOL, 0, 127, 0,
141 dac_alg_tlv),
142 SOC_SINGLE("VOUT Playback ZC Switch", WM8770_MSALGVOL, 7, 1, 0),
143
144 /* VOUT1/2/3/4 specific controls */
145 SOC_DOUBLE_R_TLV("VOUT1 Playback Volume", WM8770_VOUT1LVOL,
146 WM8770_VOUT1RVOL, 0, 127, 0, dac_alg_tlv),
147 SOC_DOUBLE_R("VOUT1 Playback ZC Switch", WM8770_VOUT1LVOL,
148 WM8770_VOUT1RVOL, 7, 1, 0),
149 SOC_DOUBLE_R_TLV("VOUT2 Playback Volume", WM8770_VOUT2LVOL,
150 WM8770_VOUT2RVOL, 0, 127, 0, dac_alg_tlv),
151 SOC_DOUBLE_R("VOUT2 Playback ZC Switch", WM8770_VOUT2LVOL,
152 WM8770_VOUT2RVOL, 7, 1, 0),
153 SOC_DOUBLE_R_TLV("VOUT3 Playback Volume", WM8770_VOUT3LVOL,
154 WM8770_VOUT3RVOL, 0, 127, 0, dac_alg_tlv),
155 SOC_DOUBLE_R("VOUT3 Playback ZC Switch", WM8770_VOUT3LVOL,
156 WM8770_VOUT3RVOL, 7, 1, 0),
157 SOC_DOUBLE_R_TLV("VOUT4 Playback Volume", WM8770_VOUT4LVOL,
158 WM8770_VOUT4RVOL, 0, 127, 0, dac_alg_tlv),
159 SOC_DOUBLE_R("VOUT4 Playback ZC Switch", WM8770_VOUT4LVOL,
160 WM8770_VOUT4RVOL, 7, 1, 0),
161
162 /* DAC1/2/3/4 specific controls */
163 SOC_DOUBLE_R_TLV("DAC1 Playback Volume", WM8770_DAC1LVOL,
164 WM8770_DAC1RVOL, 0, 255, 0, dac_dig_tlv),
165 SOC_SINGLE("DAC1 Deemphasis Switch", WM8770_DACCTRL2, 0, 1, 0),
166 SOC_ENUM("DAC1 Phase", dac_phase[0]),
167 SOC_DOUBLE_R_TLV("DAC2 Playback Volume", WM8770_DAC2LVOL,
168 WM8770_DAC2RVOL, 0, 255, 0, dac_dig_tlv),
169 SOC_SINGLE("DAC2 Deemphasis Switch", WM8770_DACCTRL2, 1, 1, 0),
170 SOC_ENUM("DAC2 Phase", dac_phase[1]),
171 SOC_DOUBLE_R_TLV("DAC3 Playback Volume", WM8770_DAC3LVOL,
172 WM8770_DAC3RVOL, 0, 255, 0, dac_dig_tlv),
173 SOC_SINGLE("DAC3 Deemphasis Switch", WM8770_DACCTRL2, 2, 1, 0),
174 SOC_ENUM("DAC3 Phase", dac_phase[2]),
175 SOC_DOUBLE_R_TLV("DAC4 Playback Volume", WM8770_DAC4LVOL,
176 WM8770_DAC4RVOL, 0, 255, 0, dac_dig_tlv),
177 SOC_SINGLE("DAC4 Deemphasis Switch", WM8770_DACCTRL2, 3, 1, 0),
178 SOC_ENUM("DAC4 Phase", dac_phase[3]),
179
180 /* ADC specific controls */
181 SOC_DOUBLE_R_TLV("Capture Volume", WM8770_ADCLCTRL, WM8770_ADCRCTRL,
182 0, 31, 0, adc_tlv),
183 SOC_DOUBLE_R("Capture Switch", WM8770_ADCLCTRL, WM8770_ADCRCTRL,
184 5, 1, 1),
185
186 /* other controls */
187 SOC_SINGLE("ADC 128x Oversampling Switch", WM8770_MSTRCTRL, 3, 1, 0),
188 SOC_SINGLE("ADC Highpass Filter Switch", WM8770_IFACECTRL, 8, 1, 1)
189};
190
191static const char *ain_text[] = {
192 "AIN1", "AIN2", "AIN3", "AIN4",
193 "AIN5", "AIN6", "AIN7", "AIN8"
194};
195
7a6c0a58
TI		 196static SOC_ENUM_DOUBLE_DECL(ain_enum,
197 WM8770_ADCMUX, 0, 4, ain_text);
c046fd4d
DP		 198
199static const struct snd_kcontrol_new ain_mux =
200 SOC_DAPM_ENUM("Capture Mux", ain_enum);
201
202static const struct snd_kcontrol_new vout1_mix_controls[] = {
203 SOC_DAPM_SINGLE("DAC1 Switch", WM8770_OUTMUX1, 0, 1, 0),
204 SOC_DAPM_SINGLE("AUX1 Switch", WM8770_OUTMUX1, 1, 1, 0),
205 SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX1, 2, 1, 0)
206};
207
208static const struct snd_kcontrol_new vout2_mix_controls[] = {
209 SOC_DAPM_SINGLE("DAC2 Switch", WM8770_OUTMUX1, 3, 1, 0),
210 SOC_DAPM_SINGLE("AUX2 Switch", WM8770_OUTMUX1, 4, 1, 0),
211 SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX1, 5, 1, 0)
212};
213
214static const struct snd_kcontrol_new vout3_mix_controls[] = {
215 SOC_DAPM_SINGLE("DAC3 Switch", WM8770_OUTMUX2, 0, 1, 0),
216 SOC_DAPM_SINGLE("AUX3 Switch", WM8770_OUTMUX2, 1, 1, 0),
217 SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX2, 2, 1, 0)
218};
219
220static const struct snd_kcontrol_new vout4_mix_controls[] = {
221 SOC_DAPM_SINGLE("DAC4 Switch", WM8770_OUTMUX2, 3, 1, 0),
222 SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX2, 4, 1, 0)
223};
224
225static const struct snd_soc_dapm_widget wm8770_dapm_widgets[] = {
226 SND_SOC_DAPM_INPUT("AUX1"),
227 SND_SOC_DAPM_INPUT("AUX2"),
228 SND_SOC_DAPM_INPUT("AUX3"),
229
230 SND_SOC_DAPM_INPUT("AIN1"),
231 SND_SOC_DAPM_INPUT("AIN2"),
232 SND_SOC_DAPM_INPUT("AIN3"),
233 SND_SOC_DAPM_INPUT("AIN4"),
234 SND_SOC_DAPM_INPUT("AIN5"),
235 SND_SOC_DAPM_INPUT("AIN6"),
236 SND_SOC_DAPM_INPUT("AIN7"),
237 SND_SOC_DAPM_INPUT("AIN8"),
238
239 SND_SOC_DAPM_MUX("Capture Mux", WM8770_ADCMUX, 8, 1, &ain_mux),
240
241 SND_SOC_DAPM_ADC("ADC", "Capture", WM8770_PWDNCTRL, 1, 1),
242
243 SND_SOC_DAPM_DAC("DAC1", "Playback", WM8770_PWDNCTRL, 2, 1),
244 SND_SOC_DAPM_DAC("DAC2", "Playback", WM8770_PWDNCTRL, 3, 1),
245 SND_SOC_DAPM_DAC("DAC3", "Playback", WM8770_PWDNCTRL, 4, 1),
246 SND_SOC_DAPM_DAC("DAC4", "Playback", WM8770_PWDNCTRL, 5, 1),
247
248 SND_SOC_DAPM_SUPPLY("VOUT12 Supply", SND_SOC_NOPM, 0, 0,
249 vout12supply_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
250 SND_SOC_DAPM_SUPPLY("VOUT34 Supply", SND_SOC_NOPM, 0, 0,
251 vout34supply_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
252
253 SND_SOC_DAPM_MIXER("VOUT1 Mixer", SND_SOC_NOPM, 0, 0,
254 vout1_mix_controls, ARRAY_SIZE(vout1_mix_controls)),
255 SND_SOC_DAPM_MIXER("VOUT2 Mixer", SND_SOC_NOPM, 0, 0,
256 vout2_mix_controls, ARRAY_SIZE(vout2_mix_controls)),
257 SND_SOC_DAPM_MIXER("VOUT3 Mixer", SND_SOC_NOPM, 0, 0,
258 vout3_mix_controls, ARRAY_SIZE(vout3_mix_controls)),
259 SND_SOC_DAPM_MIXER("VOUT4 Mixer", SND_SOC_NOPM, 0, 0,
260 vout4_mix_controls, ARRAY_SIZE(vout4_mix_controls)),
261
262 SND_SOC_DAPM_OUTPUT("VOUT1"),
263 SND_SOC_DAPM_OUTPUT("VOUT2"),
264 SND_SOC_DAPM_OUTPUT("VOUT3"),
265 SND_SOC_DAPM_OUTPUT("VOUT4")
266};
267
268static const struct snd_soc_dapm_route wm8770_intercon[] = {
269 { "Capture Mux", "AIN1", "AIN1" },
270 { "Capture Mux", "AIN2", "AIN2" },
271 { "Capture Mux", "AIN3", "AIN3" },
272 { "Capture Mux", "AIN4", "AIN4" },
273 { "Capture Mux", "AIN5", "AIN5" },
274 { "Capture Mux", "AIN6", "AIN6" },
275 { "Capture Mux", "AIN7", "AIN7" },
276 { "Capture Mux", "AIN8", "AIN8" },
277
278 { "ADC", NULL, "Capture Mux" },
279
280 { "VOUT1 Mixer", NULL, "VOUT12 Supply" },
281 { "VOUT1 Mixer", "DAC1 Switch", "DAC1" },
282 { "VOUT1 Mixer", "AUX1 Switch", "AUX1" },
283 { "VOUT1 Mixer", "Bypass Switch", "Capture Mux" },
284
285 { "VOUT2 Mixer", NULL, "VOUT12 Supply" },
286 { "VOUT2 Mixer", "DAC2 Switch", "DAC2" },
287 { "VOUT2 Mixer", "AUX2 Switch", "AUX2" },
288 { "VOUT2 Mixer", "Bypass Switch", "Capture Mux" },
289
290 { "VOUT3 Mixer", NULL, "VOUT34 Supply" },
291 { "VOUT3 Mixer", "DAC3 Switch", "DAC3" },
292 { "VOUT3 Mixer", "AUX3 Switch", "AUX3" },
293 { "VOUT3 Mixer", "Bypass Switch", "Capture Mux" },
294
295 { "VOUT4 Mixer", NULL, "VOUT34 Supply" },
296 { "VOUT4 Mixer", "DAC4 Switch", "DAC4" },
297 { "VOUT4 Mixer", "Bypass Switch", "Capture Mux" },
298
299 { "VOUT1", NULL, "VOUT1 Mixer" },
300 { "VOUT2", NULL, "VOUT2 Mixer" },
301 { "VOUT3", NULL, "VOUT3 Mixer" },
302 { "VOUT4", NULL, "VOUT4 Mixer" }
303};
304
305static int vout12supply_event(struct snd_soc_dapm_widget *w,
306 struct snd_kcontrol *kcontrol, int event)
307{
502cb3a2 308 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
c046fd4d
DP		 309
310 switch (event) {
311 case SND_SOC_DAPM_PRE_PMU:
502cb3a2 312 snd_soc_component_update_bits(component, WM8770_OUTMUX1, 0x180, 0);
c046fd4d
DP		 313 break;
314 case SND_SOC_DAPM_POST_PMD:
502cb3a2 315 snd_soc_component_update_bits(component, WM8770_OUTMUX1, 0x180, 0x180);
c046fd4d
DP		 316 break;
317 }
318
319 return 0;
320}
321
322static int vout34supply_event(struct snd_soc_dapm_widget *w,
323 struct snd_kcontrol *kcontrol, int event)
324{
502cb3a2 325 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
c046fd4d
DP		 326
327 switch (event) {
328 case SND_SOC_DAPM_PRE_PMU:
502cb3a2 329 snd_soc_component_update_bits(component, WM8770_OUTMUX2, 0x180, 0);
c046fd4d
DP		 330 break;
331 case SND_SOC_DAPM_POST_PMD:
502cb3a2 332 snd_soc_component_update_bits(component, WM8770_OUTMUX2, 0x180, 0x180);
c046fd4d
DP		 333 break;
334 }
335
336 return 0;
337}
338
502cb3a2 339static int wm8770_reset(struct snd_soc_component *component)
c046fd4d 340{
502cb3a2 341 return snd_soc_component_write(component, WM8770_RESET, 0);
c046fd4d
DP		 342}
343
344static int wm8770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
345{
502cb3a2 346 struct snd_soc_component *component;
c046fd4d
DP		 347 int iface, master;
348
502cb3a2 349 component = dai->component;
c046fd4d
DP		 350
351 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
352 case SND_SOC_DAIFMT_CBM_CFM:
353 master = 0x100;
354 break;
355 case SND_SOC_DAIFMT_CBS_CFS:
356 master = 0;
357 break;
358 default:
359 return -EINVAL;
360 }
361
362 iface = 0;
363 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
364 case SND_SOC_DAIFMT_I2S:
365 iface |= 0x2;
366 break;
367 case SND_SOC_DAIFMT_RIGHT_J:
368 break;
369 case SND_SOC_DAIFMT_LEFT_J:
370 iface |= 0x1;
371 break;
372 default:
373 return -EINVAL;
374 }
375
376 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
377 case SND_SOC_DAIFMT_NB_NF:
378 break;
379 case SND_SOC_DAIFMT_IB_IF:
380 iface |= 0xc;
381 break;
382 case SND_SOC_DAIFMT_IB_NF:
383 iface |= 0x8;
384 break;
385 case SND_SOC_DAIFMT_NB_IF:
386 iface |= 0x4;
387 break;
388 default:
389 return -EINVAL;
390 }
391
502cb3a2
KM		 392 snd_soc_component_update_bits(component, WM8770_IFACECTRL, 0xf, iface);
393 snd_soc_component_update_bits(component, WM8770_MSTRCTRL, 0x100, master);
c046fd4d
DP		 394
395 return 0;
396}
397
398static const int mclk_ratios[] = {
399 128,
400 192,
401 256,
402 384,
403 512,
404 768
405};
406
407static int wm8770_hw_params(struct snd_pcm_substream *substream,
408 struct snd_pcm_hw_params *params,
409 struct snd_soc_dai *dai)
410{
502cb3a2 411 struct snd_soc_component *component;
c046fd4d
DP		 412 struct wm8770_priv *wm8770;
413 int i;
414 int iface;
415 int shift;
416 int ratio;
417
502cb3a2
KM		 418 component = dai->component;
419 wm8770 = snd_soc_component_get_drvdata(component);
c046fd4d
DP		 420
421 iface = 0;
18ce1da9
MB		 422 switch (params_width(params)) {
423 case 16:
c046fd4d 424 break;
18ce1da9 425 case 20:
c046fd4d
DP		 426 iface |= 0x10;
427 break;
18ce1da9 428 case 24:
c046fd4d
DP		 429 iface |= 0x20;
430 break;
18ce1da9 431 case 32:
c046fd4d
DP		 432 iface |= 0x30;
433 break;
434 }
435
436 switch (substream->stream) {
437 case SNDRV_PCM_STREAM_PLAYBACK:
438 i = 0;
439 shift = 4;
440 break;
441 case SNDRV_PCM_STREAM_CAPTURE:
442 i = 2;
443 shift = 0;
444 break;
445 default:
446 return -EINVAL;
447 }
448
449 /* Only need to set MCLK/LRCLK ratio if we're master */
502cb3a2 450 if (snd_soc_component_read32(component, WM8770_MSTRCTRL) & 0x100) {
c046fd4d
DP		 451 for (; i < ARRAY_SIZE(mclk_ratios); ++i) {
452 ratio = wm8770->sysclk / params_rate(params);
453 if (ratio == mclk_ratios[i])
454 break;
455 }
456
457 if (i == ARRAY_SIZE(mclk_ratios)) {
502cb3a2 458 dev_err(component->dev,
c046fd4d
DP		 459 "Unable to configure MCLK ratio %d/%d\n",
460 wm8770->sysclk, params_rate(params));
461 return -EINVAL;
462 }
463
502cb3a2 464 dev_dbg(component->dev, "MCLK is %dfs\n", mclk_ratios[i]);
c046fd4d 465
502cb3a2 466 snd_soc_component_update_bits(component, WM8770_MSTRCTRL, 0x7 << shift,
c046fd4d
DP		 467 i << shift);
468 }
469
502cb3a2 470 snd_soc_component_update_bits(component, WM8770_IFACECTRL, 0x30, iface);
c046fd4d
DP		 471
472 return 0;
473}
474
475static int wm8770_mute(struct snd_soc_dai *dai, int mute)
476{
502cb3a2 477 struct snd_soc_component *component;
c046fd4d 478
502cb3a2
KM		 479 component = dai->component;
480 return snd_soc_component_update_bits(component, WM8770_DACMUTE, 0x10,
c046fd4d
DP		 481 !!mute << 4);
482}
483
484static int wm8770_set_sysclk(struct snd_soc_dai *dai,
485 int clk_id, unsigned int freq, int dir)
486{
502cb3a2 487 struct snd_soc_component *component;
c046fd4d
DP		 488 struct wm8770_priv *wm8770;
489
502cb3a2
KM		 490 component = dai->component;
491 wm8770 = snd_soc_component_get_drvdata(component);
c046fd4d
DP		 492 wm8770->sysclk = freq;
493 return 0;
494}
495
502cb3a2 496static int wm8770_set_bias_level(struct snd_soc_component *component,
c046fd4d
DP		 497 enum snd_soc_bias_level level)
498{
499 int ret;
500 struct wm8770_priv *wm8770;
501
502cb3a2 502 wm8770 = snd_soc_component_get_drvdata(component);
c046fd4d
DP		 503
504 switch (level) {
505 case SND_SOC_BIAS_ON:
506 break;
507 case SND_SOC_BIAS_PREPARE:
508 break;
509 case SND_SOC_BIAS_STANDBY:
502cb3a2 510 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
c046fd4d
DP		 511 ret = regulator_bulk_enable(ARRAY_SIZE(wm8770->supplies),
512 wm8770->supplies);
513 if (ret) {
502cb3a2 514 dev_err(component->dev,
c046fd4d
DP		 515 "Failed to enable supplies: %d\n",
516 ret);
517 return ret;
518 }
dc43b046
MB		 519
520 regcache_sync(wm8770->regmap);
521
c046fd4d 522 /* global powerup */
502cb3a2 523 snd_soc_component_write(component, WM8770_PWDNCTRL, 0);
c046fd4d
DP		 524 }
525 break;
526 case SND_SOC_BIAS_OFF:
527 /* global powerdown */
502cb3a2 528 snd_soc_component_write(component, WM8770_PWDNCTRL, 1);
c046fd4d
DP		 529 regulator_bulk_disable(ARRAY_SIZE(wm8770->supplies),
530 wm8770->supplies);
531 break;
532 }
533
c046fd4d
DP		 534 return 0;
535}
536
537#define WM8770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
538 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
539
85e7652d 540static const struct snd_soc_dai_ops wm8770_dai_ops = {
c046fd4d
DP		 541 .digital_mute = wm8770_mute,
542 .hw_params = wm8770_hw_params,
543 .set_fmt = wm8770_set_fmt,
544 .set_sysclk = wm8770_set_sysclk,
545};
546
547static struct snd_soc_dai_driver wm8770_dai = {
548 .name = "wm8770-hifi",
549 .playback = {
550 .stream_name = "Playback",
551 .channels_min = 2,
552 .channels_max = 2,
553 .rates = SNDRV_PCM_RATE_8000_192000,
554 .formats = WM8770_FORMATS
555 },
556 .capture = {
557 .stream_name = "Capture",
558 .channels_min = 2,
559 .channels_max = 2,
560 .rates = SNDRV_PCM_RATE_8000_96000,
561 .formats = WM8770_FORMATS
562 },
563 .ops = &wm8770_dai_ops,
564 .symmetric_rates = 1
565};
566
502cb3a2 567static int wm8770_probe(struct snd_soc_component *component)
c046fd4d
DP		 568{
569 struct wm8770_priv *wm8770;
570 int ret;
c046fd4d 571
502cb3a2
KM		 572 wm8770 = snd_soc_component_get_drvdata(component);
573 wm8770->component = component;
c046fd4d 574
c046fd4d
DP		 575 ret = regulator_bulk_enable(ARRAY_SIZE(wm8770->supplies),
576 wm8770->supplies);
577 if (ret) {
502cb3a2 578 dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
f81ad942 579 return ret;
c046fd4d
DP		 580 }
581
502cb3a2 582 ret = wm8770_reset(component);
c046fd4d 583 if (ret < 0) {
502cb3a2 584 dev_err(component->dev, "Failed to issue reset: %d\n", ret);
c046fd4d
DP		 585 goto err_reg_enable;
586 }
587
c046fd4d 588 /* latch the volume update bits */
502cb3a2
KM		 589 snd_soc_component_update_bits(component, WM8770_MSDIGVOL, 0x100, 0x100);
590 snd_soc_component_update_bits(component, WM8770_MSALGVOL, 0x100, 0x100);
591 snd_soc_component_update_bits(component, WM8770_VOUT1RVOL, 0x100, 0x100);
592 snd_soc_component_update_bits(component, WM8770_VOUT2RVOL, 0x100, 0x100);
593 snd_soc_component_update_bits(component, WM8770_VOUT3RVOL, 0x100, 0x100);
594 snd_soc_component_update_bits(component, WM8770_VOUT4RVOL, 0x100, 0x100);
595 snd_soc_component_update_bits(component, WM8770_DAC1RVOL, 0x100, 0x100);
596 snd_soc_component_update_bits(component, WM8770_DAC2RVOL, 0x100, 0x100);
597 snd_soc_component_update_bits(component, WM8770_DAC3RVOL, 0x100, 0x100);
598 snd_soc_component_update_bits(component, WM8770_DAC4RVOL, 0x100, 0x100);
c046fd4d
DP		 599
600 /* mute all DACs */
502cb3a2 601 snd_soc_component_update_bits(component, WM8770_DACMUTE, 0x10, 0x10);
c046fd4d 602
c046fd4d
DP		 603err_reg_enable:
604 regulator_bulk_disable(ARRAY_SIZE(wm8770->supplies), wm8770->supplies);
c046fd4d
DP		 605 return ret;
606}
607
502cb3a2
KM		 608static const struct snd_soc_component_driver soc_component_dev_wm8770 = {
609 .probe = wm8770_probe,
610 .set_bias_level = wm8770_set_bias_level,
611 .controls = wm8770_snd_controls,
612 .num_controls = ARRAY_SIZE(wm8770_snd_controls),
613 .dapm_widgets = wm8770_dapm_widgets,
614 .num_dapm_widgets = ARRAY_SIZE(wm8770_dapm_widgets),
615 .dapm_routes = wm8770_intercon,
616 .num_dapm_routes = ARRAY_SIZE(wm8770_intercon),
617 .use_pmdown_time = 1,
618 .endianness = 1,
619 .non_legacy_dai_naming = 1,
c046fd4d
DP		 620};
621
13c7d08f
MB		 622static const struct of_device_id wm8770_of_match[] = {
623 { .compatible = "wlf,wm8770", },
624 { }
625};
626MODULE_DEVICE_TABLE(of, wm8770_of_match);
627
dc43b046
MB		 628static const struct regmap_config wm8770_regmap = {
629 .reg_bits = 7,
630 .val_bits = 9,
631 .max_register = WM8770_RESET,
632
633 .reg_defaults = wm8770_reg_defaults,
634 .num_reg_defaults = ARRAY_SIZE(wm8770_reg_defaults),
635 .cache_type = REGCACHE_RBTREE,
636
637 .volatile_reg = wm8770_volatile_reg,
638};
639
7a79e94e 640static int wm8770_spi_probe(struct spi_device *spi)
c046fd4d
DP		 641{
642 struct wm8770_priv *wm8770;
f81ad942 643 int ret, i;
c046fd4d 644
3025ae45
MB		 645 wm8770 = devm_kzalloc(&spi->dev, sizeof(struct wm8770_priv),
646 GFP_KERNEL);
c046fd4d
DP		 647 if (!wm8770)
648 return -ENOMEM;
649
f81ad942
MB		 650 for (i = 0; i < ARRAY_SIZE(wm8770->supplies); i++)
651 wm8770->supplies[i].supply = wm8770_supply_names[i];
652
653 ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8770->supplies),
654 wm8770->supplies);
655 if (ret) {
656 dev_err(&spi->dev, "Failed to request supplies: %d\n", ret);
657 return ret;
658 }
659
660 wm8770->disable_nb[0].notifier_call = wm8770_regulator_event_0;
661 wm8770->disable_nb[1].notifier_call = wm8770_regulator_event_1;
662 wm8770->disable_nb[2].notifier_call = wm8770_regulator_event_2;
663
664 /* This should really be moved into the regulator core */
665 for (i = 0; i < ARRAY_SIZE(wm8770->supplies); i++) {
0bb423f2
GL		 666 ret = devm_regulator_register_notifier(
667 wm8770->supplies[i].consumer,
668 &wm8770->disable_nb[i]);
f81ad942
MB		 669 if (ret) {
670 dev_err(&spi->dev,
671 "Failed to register regulator notifier: %d\n",
672 ret);
673 }
674 }
675
dc43b046
MB		 676 wm8770->regmap = devm_regmap_init_spi(spi, &wm8770_regmap);
677 if (IS_ERR(wm8770->regmap))
678 return PTR_ERR(wm8770->regmap);
679
c046fd4d
DP		 680 spi_set_drvdata(spi, wm8770);
681
502cb3a2
KM		 682 ret = devm_snd_soc_register_component(&spi->dev,
683 &soc_component_dev_wm8770, &wm8770_dai, 1);
3025ae45 684
c046fd4d
DP		 685 return ret;
686}
687
c046fd4d
DP		 688static struct spi_driver wm8770_spi_driver = {
689 .driver = {
690 .name = "wm8770",
13c7d08f 691 .of_match_table = wm8770_of_match,
c046fd4d
DP		 692 },
693 .probe = wm8770_spi_probe,
c046fd4d 694};
c046fd4d 695
a5c88780 696module_spi_driver(wm8770_spi_driver);
c046fd4d
DP		 697
698MODULE_DESCRIPTION("ASoC WM8770 driver");
699MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>");
700MODULE_LICENSE("GPL");
Ubuntu Hirsute Linux kernel mirror