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ASoC: wm8940: Convert to table based control and DAPM init
[mirror_ubuntu-bionic-kernel.git] / sound / soc / codecs / wm8940.c
CommitLineData
0b5e92c5
JC		 1/*
2 * wm8940.c -- WM8940 ALSA Soc Audio driver
3 *
4 * Author: Jonathan Cameron <jic23@cam.ac.uk>
5 *
6 * Based on wm8510.c
7 * Copyright 2006 Wolfson Microelectronics PLC.
8 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Not currently handled:
15 * Notch filter control
16 * AUXMode (inverting vs mixer)
17 * No means to obtain current gain if alc enabled.
18 * No use made of gpio
19 * Fast VMID discharge for power down
20 * Soft Start
21 * DLR and ALR Swaps not enabled
22 * Digital Sidetone not supported
23 */
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/kernel.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/pm.h>
30#include <linux/i2c.h>
0b5e92c5 31#include <linux/spi/spi.h>
5a0e3ad6 32#include <linux/slab.h>
0b5e92c5
JC		 33#include <sound/core.h>
34#include <sound/pcm.h>
35#include <sound/pcm_params.h>
36#include <sound/soc.h>
0b5e92c5
JC		 37#include <sound/initval.h>
38#include <sound/tlv.h>
39
40#include "wm8940.h"
41
42struct wm8940_priv {
43 unsigned int sysclk;
f0fba2ad 44 enum snd_soc_control_type control_type;
0b5e92c5
JC		 45};
46
788b6e8e
AL		 47static int wm8940_volatile_register(struct snd_soc_codec *codec,
48 unsigned int reg)
49{
50 switch (reg) {
51 case WM8940_SOFTRESET:
52 return 1;
53 default:
54 return 0;
55 }
56}
57
0b5e92c5
JC		 58static u16 wm8940_reg_defaults[] = {
59 0x8940, /* Soft Reset */
60 0x0000, /* Power 1 */
61 0x0000, /* Power 2 */
62 0x0000, /* Power 3 */
63 0x0010, /* Interface Control */
64 0x0000, /* Companding Control */
65 0x0140, /* Clock Control */
66 0x0000, /* Additional Controls */
67 0x0000, /* GPIO Control */
68 0x0002, /* Auto Increment Control */
69 0x0000, /* DAC Control */
70 0x00FF, /* DAC Volume */
71 0,
72 0,
73 0x0100, /* ADC Control */
74 0x00FF, /* ADC Volume */
75 0x0000, /* Notch Filter 1 Control 1 */
76 0x0000, /* Notch Filter 1 Control 2 */
77 0x0000, /* Notch Filter 2 Control 1 */
78 0x0000, /* Notch Filter 2 Control 2 */
79 0x0000, /* Notch Filter 3 Control 1 */
80 0x0000, /* Notch Filter 3 Control 2 */
81 0x0000, /* Notch Filter 4 Control 1 */
82 0x0000, /* Notch Filter 4 Control 2 */
83 0x0032, /* DAC Limit Control 1 */
84 0x0000, /* DAC Limit Control 2 */
85 0,
86 0,
87 0,
88 0,
89 0,
90 0,
91 0x0038, /* ALC Control 1 */
92 0x000B, /* ALC Control 2 */
93 0x0032, /* ALC Control 3 */
94 0x0000, /* Noise Gate */
95 0x0041, /* PLLN */
96 0x000C, /* PLLK1 */
97 0x0093, /* PLLK2 */
98 0x00E9, /* PLLK3 */
99 0,
100 0,
101 0x0030, /* ALC Control 4 */
102 0,
103 0x0002, /* Input Control */
104 0x0050, /* PGA Gain */
105 0,
106 0x0002, /* ADC Boost Control */
107 0,
108 0x0002, /* Output Control */
109 0x0000, /* Speaker Mixer Control */
110 0,
111 0,
112 0,
113 0x0079, /* Speaker Volume */
114 0,
115 0x0000, /* Mono Mixer Control */
116};
117
0b5e92c5
JC		 118static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
119static const struct soc_enum wm8940_adc_companding_enum
120= SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 1, 4, wm8940_companding);
121static const struct soc_enum wm8940_dac_companding_enum
122= SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 3, 4, wm8940_companding);
123
124static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"};
125static const struct soc_enum wm8940_alc_mode_enum
126= SOC_ENUM_SINGLE(WM8940_ALC3, 8, 2, wm8940_alc_mode_text);
127
128static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"};
129static const struct soc_enum wm8940_mic_bias_level_enum
130= SOC_ENUM_SINGLE(WM8940_INPUTCTL, 8, 2, wm8940_mic_bias_level_text);
131
132static const char *wm8940_filter_mode_text[] = {"Audio", "Application"};
133static const struct soc_enum wm8940_filter_mode_enum
134= SOC_ENUM_SINGLE(WM8940_ADC, 7, 2, wm8940_filter_mode_text);
135
6be01cfb
MB		 136static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
137static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
138static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
139static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
140static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0);
141static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
142static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0);
143static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0);
144static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1);
145static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0);
0b5e92c5
JC		 146
147static const struct snd_kcontrol_new wm8940_snd_controls[] = {
148 SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL,
149 6, 1, 0),
150 SOC_ENUM("DAC Companding", wm8940_dac_companding_enum),
151 SOC_ENUM("ADC Companding", wm8940_adc_companding_enum),
152
153 SOC_ENUM("ALC Mode", wm8940_alc_mode_enum),
154 SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0),
155 SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1,
156 3, 7, 1, wm8940_alc_max_tlv),
157 SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1,
158 0, 7, 0, wm8940_alc_min_tlv),
159 SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2,
160 0, 14, 0, wm8940_alc_tar_tlv),
161 SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0),
162 SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0),
163 SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0),
164 SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0),
165 SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE,
166 3, 1, 0),
167 SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE,
168 0, 7, 0),
169
170 SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0),
171 SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0),
172 SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0),
173 SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2,
174 4, 9, 1, wm8940_lim_thresh_tlv),
175 SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2,
176 0, 12, 0, wm8940_lim_boost_tlv),
177
178 SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0),
179 SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN,
180 0, 63, 0, wm8940_pga_vol_tlv),
181 SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL,
182 0, 255, 0, wm8940_adc_tlv),
183 SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
184 0, 255, 0, wm8940_adc_tlv),
185 SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
186 SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
187 8, 1, 0, wm8940_capture_boost_vol_tlv),
188 SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
189 0, 63, 0, wm8940_spk_vol_tlv),
190 SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1),
191
192 SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL,
193 8, 1, 1, wm8940_att_tlv),
194 SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0),
195
196 SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1),
197 SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX,
198 7, 1, 1, wm8940_att_tlv),
199
200 SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0),
201 SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum),
202 SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0),
203 SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0),
204 SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0),
205 SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0),
206 SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0),
207};
208
209static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = {
210 SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0),
211 SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0),
212 SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0),
213};
214
215static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = {
216 SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0),
217 SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0),
218 SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0),
219};
220
6be01cfb 221static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1);
0b5e92c5
JC		 222static const struct snd_kcontrol_new wm8940_input_boost_controls[] = {
223 SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1),
224 SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST,
225 0, 7, 0, wm8940_boost_vol_tlv),
226 SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST,
227 4, 7, 0, wm8940_boost_vol_tlv),
228};
229
230static const struct snd_kcontrol_new wm8940_micpga_controls[] = {
231 SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0),
232 SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0),
233 SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0),
234};
235
236static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = {
237 SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0,
238 &wm8940_speaker_mixer_controls[0],
239 ARRAY_SIZE(wm8940_speaker_mixer_controls)),
240 SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0,
241 &wm8940_mono_mixer_controls[0],
242 ARRAY_SIZE(wm8940_mono_mixer_controls)),
243 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0),
244
245 SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0),
246 SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0),
247 SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0),
248 SND_SOC_DAPM_OUTPUT("MONOOUT"),
249 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
250 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
251
252 SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0),
253 SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0),
254 SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0,
255 &wm8940_micpga_controls[0],
256 ARRAY_SIZE(wm8940_micpga_controls)),
257 SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0,
258 &wm8940_input_boost_controls[0],
259 ARRAY_SIZE(wm8940_input_boost_controls)),
260 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0),
261
262 SND_SOC_DAPM_INPUT("MICN"),
263 SND_SOC_DAPM_INPUT("MICP"),
264 SND_SOC_DAPM_INPUT("AUX"),
265};
266
6435e5be 267static const struct snd_soc_dapm_route wm8940_dapm_routes[] = {
0b5e92c5
JC		 268 /* Mono output mixer */
269 {"Mono Mixer", "PCM Playback Switch", "DAC"},
270 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
271 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
272
273 /* Speaker output mixer */
274 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
275 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
276 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
277
278 /* Outputs */
279 {"Mono Out", NULL, "Mono Mixer"},
280 {"MONOOUT", NULL, "Mono Out"},
281 {"SpkN Out", NULL, "Speaker Mixer"},
282 {"SpkP Out", NULL, "Speaker Mixer"},
283 {"SPKOUTN", NULL, "SpkN Out"},
284 {"SPKOUTP", NULL, "SpkP Out"},
285
286 /* Microphone PGA */
287 {"Mic PGA", "MICN Switch", "MICN"},
288 {"Mic PGA", "MICP Switch", "MICP"},
289 {"Mic PGA", "AUX Switch", "AUX"},
290
291 /* Boost Mixer */
292 {"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
293 {"Boost Mixer", "Mic Volume", "MICP"},
294 {"Boost Mixer", "Aux Volume", "Aux Input"},
295
296 {"ADC", NULL, "Boost Mixer"},
297};
298
8d50e447 299#define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0);
0b5e92c5
JC		 300
301static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
302 unsigned int fmt)
303{
304 struct snd_soc_codec *codec = codec_dai->codec;
8d50e447
MB		 305 u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFE67;
306 u16 clk = snd_soc_read(codec, WM8940_CLOCK) & 0x1fe;
0b5e92c5
JC		 307
308 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
309 case SND_SOC_DAIFMT_CBM_CFM:
310 clk |= 1;
311 break;
312 case SND_SOC_DAIFMT_CBS_CFS:
313 break;
314 default:
315 return -EINVAL;
316 }
8d50e447 317 snd_soc_write(codec, WM8940_CLOCK, clk);
0b5e92c5
JC		 318
319 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
320 case SND_SOC_DAIFMT_I2S:
321 iface |= (2 << 3);
322 break;
323 case SND_SOC_DAIFMT_LEFT_J:
324 iface |= (1 << 3);
325 break;
326 case SND_SOC_DAIFMT_RIGHT_J:
327 break;
328 case SND_SOC_DAIFMT_DSP_A:
329 iface |= (3 << 3);
330 break;
331 case SND_SOC_DAIFMT_DSP_B:
332 iface |= (3 << 3) | (1 << 7);
333 break;
334 }
335
336 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
337 case SND_SOC_DAIFMT_NB_NF:
338 break;
339 case SND_SOC_DAIFMT_NB_IF:
340 iface |= (1 << 7);
341 break;
342 case SND_SOC_DAIFMT_IB_NF:
343 iface |= (1 << 8);
344 break;
345 case SND_SOC_DAIFMT_IB_IF:
346 iface |= (1 << 8) | (1 << 7);
347 break;
348 }
349
8d50e447 350 snd_soc_write(codec, WM8940_IFACE, iface);
0b5e92c5
JC		 351
352 return 0;
353}
354
355static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
356 struct snd_pcm_hw_params *params,
357 struct snd_soc_dai *dai)
358{
e6968a17 359 struct snd_soc_codec *codec = dai->codec;
8d50e447
MB		 360 u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFD9F;
361 u16 addcntrl = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFF1;
362 u16 companding = snd_soc_read(codec,
0b5e92c5
JC		 363 WM8940_COMPANDINGCTL) & 0xFFDF;
364 int ret;
365
366 /* LoutR control */
367 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE
368 && params_channels(params) == 2)
369 iface |= (1 << 9);
370
371 switch (params_rate(params)) {
b3172f22 372 case 8000:
0b5e92c5
JC		 373 addcntrl |= (0x5 << 1);
374 break;
b3172f22 375 case 11025:
0b5e92c5
JC		 376 addcntrl |= (0x4 << 1);
377 break;
b3172f22 378 case 16000:
0b5e92c5
JC		 379 addcntrl |= (0x3 << 1);
380 break;
b3172f22 381 case 22050:
0b5e92c5
JC		 382 addcntrl |= (0x2 << 1);
383 break;
b3172f22 384 case 32000:
0b5e92c5
JC		 385 addcntrl |= (0x1 << 1);
386 break;
b3172f22
GL		 387 case 44100:
388 case 48000:
0b5e92c5
JC		 389 break;
390 }
8d50e447 391 ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl);
0b5e92c5
JC		 392 if (ret)
393 goto error_ret;
394
395 switch (params_format(params)) {
396 case SNDRV_PCM_FORMAT_S8:
397 companding = companding | (1 << 5);
398 break;
399 case SNDRV_PCM_FORMAT_S16_LE:
400 break;
401 case SNDRV_PCM_FORMAT_S20_3LE:
402 iface |= (1 << 5);
403 break;
404 case SNDRV_PCM_FORMAT_S24_LE:
405 iface |= (2 << 5);
406 break;
407 case SNDRV_PCM_FORMAT_S32_LE:
408 iface |= (3 << 5);
409 break;
410 }
8d50e447 411 ret = snd_soc_write(codec, WM8940_COMPANDINGCTL, companding);
0b5e92c5
JC		 412 if (ret)
413 goto error_ret;
8d50e447 414 ret = snd_soc_write(codec, WM8940_IFACE, iface);
0b5e92c5
JC		 415
416error_ret:
417 return ret;
418}
419
420static int wm8940_mute(struct snd_soc_dai *dai, int mute)
421{
422 struct snd_soc_codec *codec = dai->codec;
8d50e447 423 u16 mute_reg = snd_soc_read(codec, WM8940_DAC) & 0xffbf;
0b5e92c5
JC		 424
425 if (mute)
426 mute_reg |= 0x40;
427
8d50e447 428 return snd_soc_write(codec, WM8940_DAC, mute_reg);
0b5e92c5
JC		 429}
430
431static int wm8940_set_bias_level(struct snd_soc_codec *codec,
432 enum snd_soc_bias_level level)
433{
434 u16 val;
8d50e447 435 u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0;
0b5e92c5
JC		 436 int ret = 0;
437
438 switch (level) {
439 case SND_SOC_BIAS_ON:
440 /* ensure bufioen and biasen */
441 pwr_reg |= (1 << 2) | (1 << 3);
442 /* Enable thermal shutdown */
8d50e447
MB		 443 val = snd_soc_read(codec, WM8940_OUTPUTCTL);
444 ret = snd_soc_write(codec, WM8940_OUTPUTCTL, val | 0x2);
0b5e92c5
JC		 445 if (ret)
446 break;
447 /* set vmid to 75k */
8d50e447 448 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
0b5e92c5
JC		 449 break;
450 case SND_SOC_BIAS_PREPARE:
451 /* ensure bufioen and biasen */
452 pwr_reg |= (1 << 2) | (1 << 3);
8d50e447 453 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
0b5e92c5
JC		 454 break;
455 case SND_SOC_BIAS_STANDBY:
788b6e8e
AL		 456 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
457 ret = snd_soc_cache_sync(codec);
458 if (ret < 0) {
459 dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
460 return ret;
461 }
462 }
463
0b5e92c5
JC		 464 /* ensure bufioen and biasen */
465 pwr_reg |= (1 << 2) | (1 << 3);
466 /* set vmid to 300k for standby */
8d50e447 467 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x2);
0b5e92c5
JC		 468 break;
469 case SND_SOC_BIAS_OFF:
8d50e447 470 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg);
0b5e92c5
JC		 471 break;
472 }
473
5927f947
AL		 474 codec->dapm.bias_level = level;
475
0b5e92c5
JC		 476 return ret;
477}
478
479struct pll_ {
480 unsigned int pre_scale:2;
481 unsigned int n:4;
482 unsigned int k;
483};
484
485static struct pll_ pll_div;
486
487/* The size in bits of the pll divide multiplied by 10
488 * to allow rounding later */
489#define FIXED_PLL_SIZE ((1 << 24) * 10)
490static void pll_factors(unsigned int target, unsigned int source)
491{
492 unsigned long long Kpart;
493 unsigned int K, Ndiv, Nmod;
494 /* The left shift ist to avoid accuracy loss when right shifting */
495 Ndiv = target / source;
496
497 if (Ndiv > 12) {
498 source <<= 1;
499 /* Multiply by 2 */
500 pll_div.pre_scale = 0;
501 Ndiv = target / source;
502 } else if (Ndiv < 3) {
503 source >>= 2;
504 /* Divide by 4 */
505 pll_div.pre_scale = 3;
506 Ndiv = target / source;
507 } else if (Ndiv < 6) {
508 source >>= 1;
509 /* divide by 2 */
510 pll_div.pre_scale = 2;
511 Ndiv = target / source;
512 } else
513 pll_div.pre_scale = 1;
514
515 if ((Ndiv < 6) || (Ndiv > 12))
516 printk(KERN_WARNING
517 "WM8940 N value %d outwith recommended range!d\n",
518 Ndiv);
519
520 pll_div.n = Ndiv;
521 Nmod = target % source;
522 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
523
524 do_div(Kpart, source);
525
526 K = Kpart & 0xFFFFFFFF;
527
528 /* Check if we need to round */
529 if ((K % 10) >= 5)
530 K += 5;
531
532 /* Move down to proper range now rounding is done */
533 K /= 10;
534
535 pll_div.k = K;
536}
537
538/* Untested at the moment */
85488037
MB		 539static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
540 int source, unsigned int freq_in, unsigned int freq_out)
0b5e92c5
JC		 541{
542 struct snd_soc_codec *codec = codec_dai->codec;
543 u16 reg;
544
545 /* Turn off PLL */
8d50e447
MB		 546 reg = snd_soc_read(codec, WM8940_POWER1);
547 snd_soc_write(codec, WM8940_POWER1, reg & 0x1df);
0b5e92c5
JC		 548
549 if (freq_in == 0 || freq_out == 0) {
550 /* Clock CODEC directly from MCLK */
8d50e447
MB		 551 reg = snd_soc_read(codec, WM8940_CLOCK);
552 snd_soc_write(codec, WM8940_CLOCK, reg & 0x0ff);
0b5e92c5 553 /* Pll power down */
8d50e447 554 snd_soc_write(codec, WM8940_PLLN, (1 << 7));
0b5e92c5
JC		 555 return 0;
556 }
557
558 /* Pll is followed by a frequency divide by 4 */
559 pll_factors(freq_out*4, freq_in);
560 if (pll_div.k)
8d50e447 561 snd_soc_write(codec, WM8940_PLLN,
0b5e92c5
JC		 562 (pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
563 else /* No factional component */
8d50e447 564 snd_soc_write(codec, WM8940_PLLN,
0b5e92c5 565 (pll_div.pre_scale << 4) | pll_div.n);
8d50e447
MB		 566 snd_soc_write(codec, WM8940_PLLK1, pll_div.k >> 18);
567 snd_soc_write(codec, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
568 snd_soc_write(codec, WM8940_PLLK3, pll_div.k & 0x1ff);
0b5e92c5 569 /* Enable the PLL */
8d50e447
MB		 570 reg = snd_soc_read(codec, WM8940_POWER1);
571 snd_soc_write(codec, WM8940_POWER1, reg | 0x020);
0b5e92c5
JC		 572
573 /* Run CODEC from PLL instead of MCLK */
8d50e447
MB		 574 reg = snd_soc_read(codec, WM8940_CLOCK);
575 snd_soc_write(codec, WM8940_CLOCK, reg | 0x100);
0b5e92c5
JC		 576
577 return 0;
578}
579
580static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
581 int clk_id, unsigned int freq, int dir)
582{
583 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 584 struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
0b5e92c5
JC		 585
586 switch (freq) {
587 case 11289600:
588 case 12000000:
589 case 12288000:
590 case 16934400:
591 case 18432000:
592 wm8940->sysclk = freq;
593 return 0;
594 }
595 return -EINVAL;
596}
597
598static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
599 int div_id, int div)
600{
601 struct snd_soc_codec *codec = codec_dai->codec;
602 u16 reg;
603 int ret = 0;
604
605 switch (div_id) {
606 case WM8940_BCLKDIV:
b272cc76 607 reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3;
8d50e447 608 ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
0b5e92c5
JC		 609 break;
610 case WM8940_MCLKDIV:
8d50e447
MB		 611 reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFF1F;
612 ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5));
0b5e92c5
JC		 613 break;
614 case WM8940_OPCLKDIV:
49fa4d9b
AL		 615 reg = snd_soc_read(codec, WM8940_GPIO) & 0xFFCF;
616 ret = snd_soc_write(codec, WM8940_GPIO, reg | (div << 4));
0b5e92c5
JC		 617 break;
618 }
619 return ret;
620}
621
622#define WM8940_RATES SNDRV_PCM_RATE_8000_48000
623
624#define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
625 SNDRV_PCM_FMTBIT_S16_LE | \
626 SNDRV_PCM_FMTBIT_S20_3LE | \
627 SNDRV_PCM_FMTBIT_S24_LE | \
628 SNDRV_PCM_FMTBIT_S32_LE)
629
85e7652d 630static const struct snd_soc_dai_ops wm8940_dai_ops = {
0b5e92c5
JC		 631 .hw_params = wm8940_i2s_hw_params,
632 .set_sysclk = wm8940_set_dai_sysclk,
633 .digital_mute = wm8940_mute,
634 .set_fmt = wm8940_set_dai_fmt,
635 .set_clkdiv = wm8940_set_dai_clkdiv,
636 .set_pll = wm8940_set_dai_pll,
637};
638
f0fba2ad
LG		 639static struct snd_soc_dai_driver wm8940_dai = {
640 .name = "wm8940-hifi",
0b5e92c5
JC		 641 .playback = {
642 .stream_name = "Playback",
643 .channels_min = 1,
644 .channels_max = 2,
645 .rates = WM8940_RATES,
646 .formats = WM8940_FORMATS,
647 },
648 .capture = {
649 .stream_name = "Capture",
650 .channels_min = 1,
651 .channels_max = 2,
652 .rates = WM8940_RATES,
653 .formats = WM8940_FORMATS,
654 },
655 .ops = &wm8940_dai_ops,
656 .symmetric_rates = 1,
657};
0b5e92c5 658
84b315ee 659static int wm8940_suspend(struct snd_soc_codec *codec)
0b5e92c5 660{
0b5e92c5
JC		 661 return wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF);
662}
663
f0fba2ad 664static int wm8940_resume(struct snd_soc_codec *codec)
0b5e92c5 665{
788b6e8e
AL		 666 wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
667 return 0;
0b5e92c5
JC		 668}
669
f0fba2ad 670static int wm8940_probe(struct snd_soc_codec *codec)
0b5e92c5 671{
f0fba2ad
LG		 672 struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
673 struct wm8940_setup_data *pdata = codec->dev->platform_data;
0b5e92c5
JC		 674 int ret;
675 u16 reg;
0b5e92c5 676
f0fba2ad 677 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8940->control_type);
e655a435 678 if (ret < 0) {
8d50e447
MB		 679 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
680 return ret;
681 }
682
0b5e92c5
JC		 683 ret = wm8940_reset(codec);
684 if (ret < 0) {
685 dev_err(codec->dev, "Failed to issue reset\n");
686 return ret;
687 }
688
0b5e92c5
JC		 689 wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
690
8d50e447 691 ret = snd_soc_write(codec, WM8940_POWER1, 0x180);
0b5e92c5
JC		 692 if (ret < 0)
693 return ret;
694
695 if (!pdata)
696 dev_warn(codec->dev, "No platform data supplied\n");
697 else {
8d50e447
MB		 698 reg = snd_soc_read(codec, WM8940_OUTPUTCTL);
699 ret = snd_soc_write(codec, WM8940_OUTPUTCTL, reg | pdata->vroi);
0b5e92c5
JC		 700 if (ret < 0)
701 return ret;
702 }
703
f0fba2ad 704 return ret;
0b5e92c5
JC		 705}
706
f0fba2ad 707static int wm8940_remove(struct snd_soc_codec *codec)
0b5e92c5 708{
f0fba2ad
LG		 709 wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF);
710 return 0;
0b5e92c5
JC		 711}
712
f0fba2ad
LG		 713static struct snd_soc_codec_driver soc_codec_dev_wm8940 = {
714 .probe = wm8940_probe,
715 .remove = wm8940_remove,
716 .suspend = wm8940_suspend,
717 .resume = wm8940_resume,
718 .set_bias_level = wm8940_set_bias_level,
6435e5be
MB		 719 .controls = wm8940_snd_controls,
720 .num_controls = ARRAY_SIZE(wm8940_snd_controls),
721 .dapm_widgets = wm8940_dapm_widgets,
722 .num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets),
723 .dapm_routes = wm8940_dapm_routes,
724 .num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes),
e5eec34c 725 .reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults),
f0fba2ad
LG		 726 .reg_word_size = sizeof(u16),
727 .reg_cache_default = wm8940_reg_defaults,
788b6e8e 728 .volatile_register = wm8940_volatile_register,
f0fba2ad
LG		 729};
730
7a79e94e
BP		 731static int wm8940_i2c_probe(struct i2c_client *i2c,
732 const struct i2c_device_id *id)
0b5e92c5
JC		 733{
734 struct wm8940_priv *wm8940;
f0fba2ad 735 int ret;
0b5e92c5 736
42dad0d8
MB		 737 wm8940 = devm_kzalloc(&i2c->dev, sizeof(struct wm8940_priv),
738 GFP_KERNEL);
0b5e92c5
JC		 739 if (wm8940 == NULL)
740 return -ENOMEM;
741
0b5e92c5 742 i2c_set_clientdata(i2c, wm8940);
7f984b55 743 wm8940->control_type = SND_SOC_I2C;
0b5e92c5 744
f0fba2ad
LG		 745 ret = snd_soc_register_codec(&i2c->dev,
746 &soc_codec_dev_wm8940, &wm8940_dai, 1);
42dad0d8 747
db1e18de 748 return ret;
0b5e92c5
JC		 749}
750
7a79e94e 751static int wm8940_i2c_remove(struct i2c_client *client)
0b5e92c5 752{
f0fba2ad 753 snd_soc_unregister_codec(&client->dev);
42dad0d8 754
0b5e92c5
JC		 755 return 0;
756}
757
758static const struct i2c_device_id wm8940_i2c_id[] = {
759 { "wm8940", 0 },
760 { }
761};
762MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id);
763
764static struct i2c_driver wm8940_i2c_driver = {
765 .driver = {
091edccf 766 .name = "wm8940",
0b5e92c5
JC		 767 .owner = THIS_MODULE,
768 },
f0fba2ad 769 .probe = wm8940_i2c_probe,
7a79e94e 770 .remove = wm8940_i2c_remove,
0b5e92c5
JC		 771 .id_table = wm8940_i2c_id,
772};
773
794836b9 774module_i2c_driver(wm8940_i2c_driver);
0b5e92c5
JC		 775
776MODULE_DESCRIPTION("ASoC WM8940 driver");
777MODULE_AUTHOR("Jonathan Cameron");
778MODULE_LICENSE("GPL");
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