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Linux 3.9-rc1
[mirror_ubuntu-jammy-kernel.git] / sound / soc / codecs / wm8960.c
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f2644a2c
MB		 1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
656baaeb
MB		 4 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
f2644a2c
MB		 6 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
5a0e3ad6 19#include <linux/slab.h>
f2644a2c
MB		 20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
f2644a2c
MB		 24#include <sound/initval.h>
25#include <sound/tlv.h>
b6877a47 26#include <sound/wm8960.h>
f2644a2c
MB		 27
28#include "wm8960.h"
29
f2644a2c 30/* R25 - Power 1 */
913d7b4c 31#define WM8960_VMID_MASK 0x180
f2644a2c
MB		 32#define WM8960_VREF 0x40
33
913d7b4c
MB		 34/* R26 - Power 2 */
35#define WM8960_PWR2_LOUT1 0x40
36#define WM8960_PWR2_ROUT1 0x20
37#define WM8960_PWR2_OUT3 0x02
38
f2644a2c
MB		 39/* R28 - Anti-pop 1 */
40#define WM8960_POBCTRL 0x80
41#define WM8960_BUFDCOPEN 0x10
42#define WM8960_BUFIOEN 0x08
43#define WM8960_SOFT_ST 0x04
44#define WM8960_HPSTBY 0x01
45
46/* R29 - Anti-pop 2 */
47#define WM8960_DISOP 0x40
913d7b4c 48#define WM8960_DRES_MASK 0x30
f2644a2c
MB		 49
50/*
51 * wm8960 register cache
52 * We can't read the WM8960 register space when we are
53 * using 2 wire for device control, so we cache them instead.
54 */
0ebe36c6
MB		 55static const struct reg_default wm8960_reg_defaults[] = {
56 { 0x0, 0x0097 },
57 { 0x1, 0x0097 },
58 { 0x2, 0x0000 },
59 { 0x3, 0x0000 },
60 { 0x4, 0x0000 },
61 { 0x5, 0x0008 },
62 { 0x6, 0x0000 },
63 { 0x7, 0x000a },
64 { 0x8, 0x01c0 },
65 { 0x9, 0x0000 },
66 { 0xa, 0x00ff },
67 { 0xb, 0x00ff },
68
69 { 0x10, 0x0000 },
70 { 0x11, 0x007b },
71 { 0x12, 0x0100 },
72 { 0x13, 0x0032 },
73 { 0x14, 0x0000 },
74 { 0x15, 0x00c3 },
75 { 0x16, 0x00c3 },
76 { 0x17, 0x01c0 },
77 { 0x18, 0x0000 },
78 { 0x19, 0x0000 },
79 { 0x1a, 0x0000 },
80 { 0x1b, 0x0000 },
81 { 0x1c, 0x0000 },
82 { 0x1d, 0x0000 },
83
84 { 0x20, 0x0100 },
85 { 0x21, 0x0100 },
86 { 0x22, 0x0050 },
87
88 { 0x25, 0x0050 },
89 { 0x26, 0x0000 },
90 { 0x27, 0x0000 },
91 { 0x28, 0x0000 },
92 { 0x29, 0x0000 },
93 { 0x2a, 0x0040 },
94 { 0x2b, 0x0000 },
95 { 0x2c, 0x0000 },
96 { 0x2d, 0x0050 },
97 { 0x2e, 0x0050 },
98 { 0x2f, 0x0000 },
99 { 0x30, 0x0002 },
100 { 0x31, 0x0037 },
101
102 { 0x33, 0x0080 },
103 { 0x34, 0x0008 },
104 { 0x35, 0x0031 },
105 { 0x36, 0x0026 },
106 { 0x37, 0x00e9 },
f2644a2c
MB		 107};
108
0ebe36c6
MB		 109static bool wm8960_volatile(struct device *dev, unsigned int reg)
110{
111 switch (reg) {
112 case WM8960_RESET:
113 return true;
114 default:
115 return false;
116 }
117}
118
f2644a2c 119struct wm8960_priv {
0ebe36c6 120 struct regmap *regmap;
f0fba2ad
LG		 121 int (*set_bias_level)(struct snd_soc_codec *,
122 enum snd_soc_bias_level level);
913d7b4c
MB		 123 struct snd_soc_dapm_widget *lout1;
124 struct snd_soc_dapm_widget *rout1;
125 struct snd_soc_dapm_widget *out3;
afd6d36a
MB		 126 bool deemph;
127 int playback_fs;
f2644a2c
MB		 128};
129
17a52fd6 130#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
f2644a2c
MB		 131
132/* enumerated controls */
f2644a2c
MB		 133static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
134 "Right Inverted", "Stereo Inversion"};
135static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
136static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
137static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
138static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
139
140static const struct soc_enum wm8960_enum[] = {
f2644a2c
MB		 141 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
142 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
143 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
144 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
145 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
146 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
147};
148
afd6d36a
MB		 149static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
150
151static int wm8960_set_deemph(struct snd_soc_codec *codec)
152{
153 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
154 int val, i, best;
155
156 /* If we're using deemphasis select the nearest available sample
157 * rate.
158 */
159 if (wm8960->deemph) {
160 best = 1;
161 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
162 if (abs(deemph_settings[i] - wm8960->playback_fs) <
163 abs(deemph_settings[best] - wm8960->playback_fs))
164 best = i;
165 }
166
167 val = best << 1;
168 } else {
169 val = 0;
170 }
171
172 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
173
174 return snd_soc_update_bits(codec, WM8960_DACCTL1,
175 0x6, val);
176}
177
178static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
179 struct snd_ctl_elem_value *ucontrol)
180{
181 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
182 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
183
3f343f85
DA		 184 ucontrol->value.enumerated.item[0] = wm8960->deemph;
185 return 0;
afd6d36a
MB		 186}
187
188static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol)
190{
191 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
192 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
193 int deemph = ucontrol->value.enumerated.item[0];
194
195 if (deemph > 1)
196 return -EINVAL;
197
198 wm8960->deemph = deemph;
199
200 return wm8960_set_deemph(codec);
201}
202
f2644a2c
MB		 203static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
204static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
205static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
206static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
207
208static const struct snd_kcontrol_new wm8960_snd_controls[] = {
209SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
210 0, 63, 0, adc_tlv),
211SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
212 6, 1, 0),
213SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
214 7, 1, 0),
215
216SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
217 0, 255, 0, dac_tlv),
218
219SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
220 0, 127, 0, out_tlv),
221SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
222 7, 1, 0),
223
224SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
225 0, 127, 0, out_tlv),
226SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
227 7, 1, 0),
228SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
229SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
230
231SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
4faaa8d9 232SOC_ENUM("ADC Polarity", wm8960_enum[0]),
f2644a2c
MB		 233SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
234
235SOC_ENUM("DAC Polarity", wm8960_enum[2]),
afd6d36a
MB		 236SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
237 wm8960_get_deemph, wm8960_put_deemph),
f2644a2c 238
4faaa8d9
MB		 239SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
240SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
f2644a2c
MB		 241SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
242SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
243
4faaa8d9 244SOC_ENUM("ALC Function", wm8960_enum[4]),
f2644a2c
MB		 245SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
246SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
247SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
248SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
4faaa8d9 249SOC_ENUM("ALC Mode", wm8960_enum[5]),
f2644a2c
MB		 250SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
251SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
252
253SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
254SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
255
256SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
257 0, 127, 0),
258
259SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
260 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
261SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
262 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
263SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
264 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
265SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
266 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
267};
268
269static const struct snd_kcontrol_new wm8960_lin_boost[] = {
270SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
271SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
272SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
273};
274
275static const struct snd_kcontrol_new wm8960_lin[] = {
276SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
277};
278
279static const struct snd_kcontrol_new wm8960_rin_boost[] = {
280SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
281SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
282SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
283};
284
285static const struct snd_kcontrol_new wm8960_rin[] = {
286SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
287};
288
289static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
290SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
291SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
292SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
293};
294
295static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
296SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
297SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
298SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
299};
300
301static const struct snd_kcontrol_new wm8960_mono_out[] = {
302SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
303SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
304};
305
306static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
307SND_SOC_DAPM_INPUT("LINPUT1"),
308SND_SOC_DAPM_INPUT("RINPUT1"),
309SND_SOC_DAPM_INPUT("LINPUT2"),
310SND_SOC_DAPM_INPUT("RINPUT2"),
311SND_SOC_DAPM_INPUT("LINPUT3"),
312SND_SOC_DAPM_INPUT("RINPUT3"),
313
187774cb 314SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
f2644a2c
MB		 315
316SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
317 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
318SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
319 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
320
321SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
322 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
323SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
324 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
325
326SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
327SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
328
329SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
330SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
331
332SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
333 &wm8960_loutput_mixer[0],
334 ARRAY_SIZE(wm8960_loutput_mixer)),
335SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
336 &wm8960_routput_mixer[0],
337 ARRAY_SIZE(wm8960_routput_mixer)),
338
f2644a2c
MB		 339SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
340SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
341
342SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
343SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
344
345SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
346SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
347
348SND_SOC_DAPM_OUTPUT("SPK_LP"),
349SND_SOC_DAPM_OUTPUT("SPK_LN"),
350SND_SOC_DAPM_OUTPUT("HP_L"),
351SND_SOC_DAPM_OUTPUT("HP_R"),
352SND_SOC_DAPM_OUTPUT("SPK_RP"),
353SND_SOC_DAPM_OUTPUT("SPK_RN"),
354SND_SOC_DAPM_OUTPUT("OUT3"),
355};
356
913d7b4c
MB		 357static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
358SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
359 &wm8960_mono_out[0],
360 ARRAY_SIZE(wm8960_mono_out)),
361};
362
363/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
364static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
365SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
366};
367
f2644a2c
MB		 368static const struct snd_soc_dapm_route audio_paths[] = {
369 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
370 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
371 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
372
373 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
374 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
375 { "Left Input Mixer", NULL, "LINPUT2" },
376 { "Left Input Mixer", NULL, "LINPUT3" },
377
378 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
379 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
380 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
381
382 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
383 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
384 { "Right Input Mixer", NULL, "RINPUT2" },
385 { "Right Input Mixer", NULL, "LINPUT3" },
386
387 { "Left ADC", NULL, "Left Input Mixer" },
388 { "Right ADC", NULL, "Right Input Mixer" },
389
390 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
391 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
392 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
393
394 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
395 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
396 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
397
f2644a2c
MB		 398 { "LOUT1 PGA", NULL, "Left Output Mixer" },
399 { "ROUT1 PGA", NULL, "Right Output Mixer" },
400
401 { "HP_L", NULL, "LOUT1 PGA" },
402 { "HP_R", NULL, "ROUT1 PGA" },
403
404 { "Left Speaker PGA", NULL, "Left Output Mixer" },
405 { "Right Speaker PGA", NULL, "Right Output Mixer" },
406
407 { "Left Speaker Output", NULL, "Left Speaker PGA" },
408 { "Right Speaker Output", NULL, "Right Speaker PGA" },
409
410 { "SPK_LN", NULL, "Left Speaker Output" },
411 { "SPK_LP", NULL, "Left Speaker Output" },
412 { "SPK_RN", NULL, "Right Speaker Output" },
413 { "SPK_RP", NULL, "Right Speaker Output" },
913d7b4c
MB		 414};
415
416static const struct snd_soc_dapm_route audio_paths_out3[] = {
417 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
418 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
f2644a2c
MB		 419
420 { "OUT3", NULL, "Mono Output Mixer", }
421};
422
913d7b4c
MB		 423static const struct snd_soc_dapm_route audio_paths_capless[] = {
424 { "HP_L", NULL, "OUT3 VMID" },
425 { "HP_R", NULL, "OUT3 VMID" },
426
427 { "OUT3 VMID", NULL, "Left Output Mixer" },
428 { "OUT3 VMID", NULL, "Right Output Mixer" },
429};
430
f2644a2c
MB		 431static int wm8960_add_widgets(struct snd_soc_codec *codec)
432{
913d7b4c 433 struct wm8960_data *pdata = codec->dev->platform_data;
b2c812e2 434 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
ce6120cc 435 struct snd_soc_dapm_context *dapm = &codec->dapm;
913d7b4c
MB		 436 struct snd_soc_dapm_widget *w;
437
ce6120cc 438 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
f2644a2c
MB		 439 ARRAY_SIZE(wm8960_dapm_widgets));
440
ce6120cc 441 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
f2644a2c 442
913d7b4c
MB		 443 /* In capless mode OUT3 is used to provide VMID for the
444 * headphone outputs, otherwise it is used as a mono mixer.
445 */
446 if (pdata && pdata->capless) {
ce6120cc 447 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
913d7b4c
MB		 448 ARRAY_SIZE(wm8960_dapm_widgets_capless));
449
ce6120cc 450 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
913d7b4c
MB		 451 ARRAY_SIZE(audio_paths_capless));
452 } else {
ce6120cc 453 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
913d7b4c
MB		 454 ARRAY_SIZE(wm8960_dapm_widgets_out3));
455
ce6120cc 456 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
913d7b4c
MB		 457 ARRAY_SIZE(audio_paths_out3));
458 }
459
460 /* We need to power up the headphone output stage out of
461 * sequence for capless mode. To save scanning the widget
462 * list each time to find the desired power state do so now
463 * and save the result.
464 */
97c866de
JN		 465 list_for_each_entry(w, &codec->card->widgets, list) {
466 if (w->dapm != &codec->dapm)
467 continue;
913d7b4c
MB		 468 if (strcmp(w->name, "LOUT1 PGA") == 0)
469 wm8960->lout1 = w;
470 if (strcmp(w->name, "ROUT1 PGA") == 0)
471 wm8960->rout1 = w;
472 if (strcmp(w->name, "OUT3 VMID") == 0)
473 wm8960->out3 = w;
474 }
475
f2644a2c
MB		 476 return 0;
477}
478
479static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
480 unsigned int fmt)
481{
482 struct snd_soc_codec *codec = codec_dai->codec;
483 u16 iface = 0;
484
485 /* set master/slave audio interface */
486 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
487 case SND_SOC_DAIFMT_CBM_CFM:
488 iface |= 0x0040;
489 break;
490 case SND_SOC_DAIFMT_CBS_CFS:
491 break;
492 default:
493 return -EINVAL;
494 }
495
496 /* interface format */
497 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
498 case SND_SOC_DAIFMT_I2S:
499 iface |= 0x0002;
500 break;
501 case SND_SOC_DAIFMT_RIGHT_J:
502 break;
503 case SND_SOC_DAIFMT_LEFT_J:
504 iface |= 0x0001;
505 break;
506 case SND_SOC_DAIFMT_DSP_A:
507 iface |= 0x0003;
508 break;
509 case SND_SOC_DAIFMT_DSP_B:
510 iface |= 0x0013;
511 break;
512 default:
513 return -EINVAL;
514 }
515
516 /* clock inversion */
517 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
518 case SND_SOC_DAIFMT_NB_NF:
519 break;
520 case SND_SOC_DAIFMT_IB_IF:
521 iface |= 0x0090;
522 break;
523 case SND_SOC_DAIFMT_IB_NF:
524 iface |= 0x0080;
525 break;
526 case SND_SOC_DAIFMT_NB_IF:
527 iface |= 0x0010;
528 break;
529 default:
530 return -EINVAL;
531 }
532
533 /* set iface */
17a52fd6 534 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 535 return 0;
536}
537
db059c0f
MB		 538static struct {
539 int rate;
540 unsigned int val;
541} alc_rates[] = {
542 { 48000, 0 },
543 { 44100, 0 },
544 { 32000, 1 },
545 { 22050, 2 },
546 { 24000, 2 },
547 { 16000, 3 },
548 { 11250, 4 },
549 { 12000, 4 },
550 { 8000, 5 },
551};
552
f2644a2c
MB		 553static int wm8960_hw_params(struct snd_pcm_substream *substream,
554 struct snd_pcm_hw_params *params,
555 struct snd_soc_dai *dai)
556{
e6968a17 557 struct snd_soc_codec *codec = dai->codec;
afd6d36a 558 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
17a52fd6 559 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
4c2474c0 560 snd_pcm_format_t format = params_format(params);
db059c0f 561 int i;
f2644a2c
MB		 562
563 /* bit size */
4c2474c0 564 switch (format) {
f2644a2c 565 case SNDRV_PCM_FORMAT_S16_LE:
4c2474c0 566 case SNDRV_PCM_FORMAT_S16_BE:
f2644a2c
MB		 567 break;
568 case SNDRV_PCM_FORMAT_S20_3LE:
4c2474c0 569 case SNDRV_PCM_FORMAT_S20_3BE:
f2644a2c
MB		 570 iface |= 0x0004;
571 break;
572 case SNDRV_PCM_FORMAT_S24_LE:
4c2474c0 573 case SNDRV_PCM_FORMAT_S24_BE:
f2644a2c
MB		 574 iface |= 0x0008;
575 break;
4c2474c0
TT		 576 default:
577 dev_err(codec->dev, "unsupported format %i\n", format);
578 return -EINVAL;
f2644a2c
MB		 579 }
580
afd6d36a
MB		 581 /* Update filters for the new rate */
582 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
583 wm8960->playback_fs = params_rate(params);
584 wm8960_set_deemph(codec);
db059c0f
MB		 585 } else {
586 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
587 if (alc_rates[i].rate == params_rate(params))
588 snd_soc_update_bits(codec,
589 WM8960_ADDCTL3, 0x7,
590 alc_rates[i].val);
afd6d36a
MB		 591 }
592
f2644a2c 593 /* set iface */
17a52fd6 594 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 595 return 0;
596}
597
598static int wm8960_mute(struct snd_soc_dai *dai, int mute)
599{
600 struct snd_soc_codec *codec = dai->codec;
f2644a2c
MB		 601
602 if (mute)
16b24881 603 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
f2644a2c 604 else
16b24881 605 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
f2644a2c
MB		 606 return 0;
607}
608
913d7b4c
MB		 609static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
610 enum snd_soc_bias_level level)
f2644a2c 611{
0ebe36c6
MB		 612 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
613
f2644a2c
MB		 614 switch (level) {
615 case SND_SOC_BIAS_ON:
616 break;
617
618 case SND_SOC_BIAS_PREPARE:
619 /* Set VMID to 2x50k */
16b24881 620 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
f2644a2c
MB		 621 break;
622
623 case SND_SOC_BIAS_STANDBY:
ce6120cc 624 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
0ebe36c6 625 regcache_sync(wm8960->regmap);
bc45df2d 626
f2644a2c 627 /* Enable anti-pop features */
17a52fd6 628 snd_soc_write(codec, WM8960_APOP1,
913d7b4c
MB		 629 WM8960_POBCTRL | WM8960_SOFT_ST |
630 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
f2644a2c
MB		 631
632 /* Enable & ramp VMID at 2x50k */
16b24881 633 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
f2644a2c
MB		 634 msleep(100);
635
636 /* Enable VREF */
16b24881
AL		 637 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
638 WM8960_VREF);
f2644a2c
MB		 639
640 /* Disable anti-pop features */
17a52fd6 641 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
f2644a2c
MB		 642 }
643
644 /* Set VMID to 2x250k */
16b24881 645 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
f2644a2c
MB		 646 break;
647
648 case SND_SOC_BIAS_OFF:
649 /* Enable anti-pop features */
17a52fd6 650 snd_soc_write(codec, WM8960_APOP1,
f2644a2c
MB		 651 WM8960_POBCTRL | WM8960_SOFT_ST |
652 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
653
654 /* Disable VMID and VREF, let them discharge */
17a52fd6 655 snd_soc_write(codec, WM8960_POWER1, 0);
f2644a2c 656 msleep(600);
913d7b4c
MB		 657 break;
658 }
659
ce6120cc 660 codec->dapm.bias_level = level;
913d7b4c
MB		 661
662 return 0;
663}
664
665static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
666 enum snd_soc_bias_level level)
667{
b2c812e2 668 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB		 669 int reg;
670
671 switch (level) {
672 case SND_SOC_BIAS_ON:
673 break;
674
675 case SND_SOC_BIAS_PREPARE:
ce6120cc 676 switch (codec->dapm.bias_level) {
913d7b4c
MB		 677 case SND_SOC_BIAS_STANDBY:
678 /* Enable anti pop mode */
679 snd_soc_update_bits(codec, WM8960_APOP1,
680 WM8960_POBCTRL | WM8960_SOFT_ST |
681 WM8960_BUFDCOPEN,
682 WM8960_POBCTRL | WM8960_SOFT_ST |
683 WM8960_BUFDCOPEN);
684
685 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
686 reg = 0;
687 if (wm8960->lout1 && wm8960->lout1->power)
688 reg |= WM8960_PWR2_LOUT1;
689 if (wm8960->rout1 && wm8960->rout1->power)
690 reg |= WM8960_PWR2_ROUT1;
691 if (wm8960->out3 && wm8960->out3->power)
692 reg |= WM8960_PWR2_OUT3;
693 snd_soc_update_bits(codec, WM8960_POWER2,
694 WM8960_PWR2_LOUT1 |
695 WM8960_PWR2_ROUT1 |
696 WM8960_PWR2_OUT3, reg);
697
698 /* Enable VMID at 2*50k */
699 snd_soc_update_bits(codec, WM8960_POWER1,
700 WM8960_VMID_MASK, 0x80);
701
702 /* Ramp */
703 msleep(100);
704
705 /* Enable VREF */
706 snd_soc_update_bits(codec, WM8960_POWER1,
707 WM8960_VREF, WM8960_VREF);
708
709 msleep(100);
710 break;
711
712 case SND_SOC_BIAS_ON:
713 /* Enable anti-pop mode */
714 snd_soc_update_bits(codec, WM8960_APOP1,
715 WM8960_POBCTRL | WM8960_SOFT_ST |
716 WM8960_BUFDCOPEN,
717 WM8960_POBCTRL | WM8960_SOFT_ST |
718 WM8960_BUFDCOPEN);
719
720 /* Disable VMID and VREF */
721 snd_soc_update_bits(codec, WM8960_POWER1,
722 WM8960_VREF | WM8960_VMID_MASK, 0);
723 break;
724
bc45df2d 725 case SND_SOC_BIAS_OFF:
0ebe36c6 726 regcache_sync(wm8960->regmap);
bc45df2d 727 break;
913d7b4c
MB		 728 default:
729 break;
730 }
731 break;
f2644a2c 732
913d7b4c 733 case SND_SOC_BIAS_STANDBY:
ce6120cc 734 switch (codec->dapm.bias_level) {
913d7b4c
MB		 735 case SND_SOC_BIAS_PREPARE:
736 /* Disable HP discharge */
737 snd_soc_update_bits(codec, WM8960_APOP2,
738 WM8960_DISOP | WM8960_DRES_MASK,
739 0);
740
741 /* Disable anti-pop features */
742 snd_soc_update_bits(codec, WM8960_APOP1,
743 WM8960_POBCTRL | WM8960_SOFT_ST |
744 WM8960_BUFDCOPEN,
745 WM8960_POBCTRL | WM8960_SOFT_ST |
746 WM8960_BUFDCOPEN);
747 break;
748
749 default:
750 break;
751 }
752 break;
f2644a2c 753
913d7b4c 754 case SND_SOC_BIAS_OFF:
f2644a2c
MB		 755 break;
756 }
757
ce6120cc 758 codec->dapm.bias_level = level;
f2644a2c
MB		 759
760 return 0;
761}
762
763/* PLL divisors */
764struct _pll_div {
765 u32 pre_div:1;
766 u32 n:4;
767 u32 k:24;
768};
769
770/* The size in bits of the pll divide multiplied by 10
771 * to allow rounding later */
772#define FIXED_PLL_SIZE ((1 << 24) * 10)
773
774static int pll_factors(unsigned int source, unsigned int target,
775 struct _pll_div *pll_div)
776{
777 unsigned long long Kpart;
778 unsigned int K, Ndiv, Nmod;
779
780 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
781
782 /* Scale up target to PLL operating frequency */
783 target *= 4;
784
785 Ndiv = target / source;
786 if (Ndiv < 6) {
787 source >>= 1;
788 pll_div->pre_div = 1;
789 Ndiv = target / source;
790 } else
791 pll_div->pre_div = 0;
792
793 if ((Ndiv < 6) || (Ndiv > 12)) {
794 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
795 return -EINVAL;
796 }
797
798 pll_div->n = Ndiv;
799 Nmod = target % source;
800 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
801
802 do_div(Kpart, source);
803
804 K = Kpart & 0xFFFFFFFF;
805
806 /* Check if we need to round */
807 if ((K % 10) >= 5)
808 K += 5;
809
810 /* Move down to proper range now rounding is done */
811 K /= 10;
812
813 pll_div->k = K;
814
815 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
816 pll_div->n, pll_div->k, pll_div->pre_div);
817
818 return 0;
819}
820
85488037
MB		 821static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
822 int source, unsigned int freq_in, unsigned int freq_out)
f2644a2c
MB		 823{
824 struct snd_soc_codec *codec = codec_dai->codec;
825 u16 reg;
826 static struct _pll_div pll_div;
827 int ret;
828
829 if (freq_in && freq_out) {
830 ret = pll_factors(freq_in, freq_out, &pll_div);
831 if (ret != 0)
832 return ret;
833 }
834
835 /* Disable the PLL: even if we are changing the frequency the
836 * PLL needs to be disabled while we do so. */
16b24881
AL		 837 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
838 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
f2644a2c
MB		 839
840 if (!freq_in || !freq_out)
841 return 0;
842
17a52fd6 843 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
f2644a2c
MB		 844 reg |= pll_div.pre_div << 4;
845 reg |= pll_div.n;
846
847 if (pll_div.k) {
848 reg |= 0x20;
849
17a52fd6
MB		 850 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
851 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
852 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
f2644a2c 853 }
17a52fd6 854 snd_soc_write(codec, WM8960_PLL1, reg);
f2644a2c
MB		 855
856 /* Turn it on */
16b24881 857 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
f2644a2c 858 msleep(250);
16b24881 859 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
f2644a2c
MB		 860
861 return 0;
862}
863
864static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
865 int div_id, int div)
866{
867 struct snd_soc_codec *codec = codec_dai->codec;
868 u16 reg;
869
870 switch (div_id) {
f2644a2c 871 case WM8960_SYSCLKDIV:
17a52fd6
MB		 872 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
873 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 874 break;
875 case WM8960_DACDIV:
17a52fd6
MB		 876 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
877 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 878 break;
879 case WM8960_OPCLKDIV:
17a52fd6
MB		 880 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
881 snd_soc_write(codec, WM8960_PLL1, reg | div);
f2644a2c
MB		 882 break;
883 case WM8960_DCLKDIV:
17a52fd6
MB		 884 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
885 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
f2644a2c
MB		 886 break;
887 case WM8960_TOCLKSEL:
17a52fd6
MB		 888 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
889 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
f2644a2c
MB		 890 break;
891 default:
892 return -EINVAL;
893 }
894
895 return 0;
896}
897
f0fba2ad
LG		 898static int wm8960_set_bias_level(struct snd_soc_codec *codec,
899 enum snd_soc_bias_level level)
900{
901 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
902
903 return wm8960->set_bias_level(codec, level);
904}
905
f2644a2c
MB		 906#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
907
908#define WM8960_FORMATS \
909 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
910 SNDRV_PCM_FMTBIT_S24_LE)
911
85e7652d 912static const struct snd_soc_dai_ops wm8960_dai_ops = {
f2644a2c
MB		 913 .hw_params = wm8960_hw_params,
914 .digital_mute = wm8960_mute,
915 .set_fmt = wm8960_set_dai_fmt,
916 .set_clkdiv = wm8960_set_dai_clkdiv,
917 .set_pll = wm8960_set_dai_pll,
918};
919
f0fba2ad
LG		 920static struct snd_soc_dai_driver wm8960_dai = {
921 .name = "wm8960-hifi",
f2644a2c
MB		 922 .playback = {
923 .stream_name = "Playback",
924 .channels_min = 1,
925 .channels_max = 2,
926 .rates = WM8960_RATES,
927 .formats = WM8960_FORMATS,},
928 .capture = {
929 .stream_name = "Capture",
930 .channels_min = 1,
931 .channels_max = 2,
932 .rates = WM8960_RATES,
933 .formats = WM8960_FORMATS,},
934 .ops = &wm8960_dai_ops,
935 .symmetric_rates = 1,
936};
f2644a2c 937
84b315ee 938static int wm8960_suspend(struct snd_soc_codec *codec)
f2644a2c 939{
f0fba2ad 940 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 941
f0fba2ad 942 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
f2644a2c
MB		 943 return 0;
944}
945
f0fba2ad 946static int wm8960_resume(struct snd_soc_codec *codec)
f2644a2c 947{
f0fba2ad 948 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 949
f0fba2ad 950 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 951 return 0;
952}
953
f0fba2ad 954static int wm8960_probe(struct snd_soc_codec *codec)
f2644a2c 955{
f0fba2ad
LG		 956 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
957 struct wm8960_data *pdata = dev_get_platdata(codec->dev);
f2644a2c 958 int ret;
f2644a2c 959
f0fba2ad 960 wm8960->set_bias_level = wm8960_set_bias_level_out3;
913d7b4c 961
f2644a2c
MB		 962 if (!pdata) {
963 dev_warn(codec->dev, "No platform data supplied\n");
964 } else {
913d7b4c 965 if (pdata->capless)
f0fba2ad 966 wm8960->set_bias_level = wm8960_set_bias_level_capless;
f2644a2c
MB		 967 }
968
0ebe36c6 969 ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
17a52fd6
MB		 970 if (ret < 0) {
971 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad 972 return ret;
17a52fd6
MB		 973 }
974
f2644a2c
MB		 975 ret = wm8960_reset(codec);
976 if (ret < 0) {
977 dev_err(codec->dev, "Failed to issue reset\n");
f0fba2ad 978 return ret;
f2644a2c
MB		 979 }
980
f0fba2ad 981 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 982
983 /* Latch the update bits */
16b24881
AL		 984 snd_soc_update_bits(codec, WM8960_LINVOL, 0x100, 0x100);
985 snd_soc_update_bits(codec, WM8960_RINVOL, 0x100, 0x100);
986 snd_soc_update_bits(codec, WM8960_LADC, 0x100, 0x100);
987 snd_soc_update_bits(codec, WM8960_RADC, 0x100, 0x100);
988 snd_soc_update_bits(codec, WM8960_LDAC, 0x100, 0x100);
989 snd_soc_update_bits(codec, WM8960_RDAC, 0x100, 0x100);
990 snd_soc_update_bits(codec, WM8960_LOUT1, 0x100, 0x100);
991 snd_soc_update_bits(codec, WM8960_ROUT1, 0x100, 0x100);
992 snd_soc_update_bits(codec, WM8960_LOUT2, 0x100, 0x100);
993 snd_soc_update_bits(codec, WM8960_ROUT2, 0x100, 0x100);
f2644a2c 994
022658be 995 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
f0fba2ad
LG		 996 ARRAY_SIZE(wm8960_snd_controls));
997 wm8960_add_widgets(codec);
f2644a2c
MB		 998
999 return 0;
1000}
1001
f0fba2ad
LG		 1002/* power down chip */
1003static int wm8960_remove(struct snd_soc_codec *codec)
f2644a2c 1004{
f0fba2ad
LG		 1005 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1006
1007 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
1008 return 0;
f2644a2c
MB		 1009}
1010
f0fba2ad
LG		 1011static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
1012 .probe = wm8960_probe,
1013 .remove = wm8960_remove,
1014 .suspend = wm8960_suspend,
1015 .resume = wm8960_resume,
1016 .set_bias_level = wm8960_set_bias_level,
0ebe36c6
MB		 1017};
1018
1019static const struct regmap_config wm8960_regmap = {
1020 .reg_bits = 7,
1021 .val_bits = 9,
1022 .max_register = WM8960_PLL4,
1023
1024 .reg_defaults = wm8960_reg_defaults,
1025 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1026 .cache_type = REGCACHE_RBTREE,
1027
1028 .volatile_reg = wm8960_volatile,
f0fba2ad
LG		 1029};
1030
7a79e94e
BP		 1031static int wm8960_i2c_probe(struct i2c_client *i2c,
1032 const struct i2c_device_id *id)
f2644a2c 1033{
37061631 1034 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
f2644a2c 1035 struct wm8960_priv *wm8960;
f0fba2ad 1036 int ret;
f2644a2c 1037
b9791c01
MB		 1038 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1039 GFP_KERNEL);
f2644a2c
MB		 1040 if (wm8960 == NULL)
1041 return -ENOMEM;
1042
c5e6f5fa 1043 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
0ebe36c6
MB		 1044 if (IS_ERR(wm8960->regmap))
1045 return PTR_ERR(wm8960->regmap);
1046
37061631
MB		 1047 if (pdata && pdata->shared_lrclk) {
1048 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1049 0x4, 0x4);
1050 if (ret != 0) {
1051 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1052 ret);
1053 return ret;
1054 }
1055 }
1056
f2644a2c 1057 i2c_set_clientdata(i2c, wm8960);
f2644a2c 1058
f0fba2ad
LG		 1059 ret = snd_soc_register_codec(&i2c->dev,
1060 &soc_codec_dev_wm8960, &wm8960_dai, 1);
b9791c01 1061
f0fba2ad 1062 return ret;
f2644a2c
MB		 1063}
1064
7a79e94e 1065static int wm8960_i2c_remove(struct i2c_client *client)
f2644a2c 1066{
f0fba2ad 1067 snd_soc_unregister_codec(&client->dev);
f2644a2c
MB		 1068 return 0;
1069}
1070
1071static const struct i2c_device_id wm8960_i2c_id[] = {
1072 { "wm8960", 0 },
1073 { }
1074};
1075MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1076
1077static struct i2c_driver wm8960_i2c_driver = {
1078 .driver = {
091edccf 1079 .name = "wm8960",
f2644a2c
MB		 1080 .owner = THIS_MODULE,
1081 },
1082 .probe = wm8960_i2c_probe,
7a79e94e 1083 .remove = wm8960_i2c_remove,
f2644a2c
MB		 1084 .id_table = wm8960_i2c_id,
1085};
1086
3c010e60 1087module_i2c_driver(wm8960_i2c_driver);
f2644a2c 1088
f2644a2c
MB		 1089MODULE_DESCRIPTION("ASoC WM8960 driver");
1090MODULE_AUTHOR("Liam Girdwood");
1091MODULE_LICENSE("GPL");
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