]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - sound/soc/codecs/wm8960.c
projects / mirror_ubuntu-jammy-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ASoC: multi-component - ASoC Multi-Component Support
[mirror_ubuntu-jammy-kernel.git] / sound / soc / codecs / wm8960.c
CommitLineData
f2644a2c
MB		 1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
4 * Author: Liam Girdwood
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/pm.h>
16#include <linux/i2c.h>
17#include <linux/platform_device.h>
5a0e3ad6 18#include <linux/slab.h>
f2644a2c
MB		 19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/soc.h>
23#include <sound/soc-dapm.h>
24#include <sound/initval.h>
25#include <sound/tlv.h>
b6877a47 26#include <sound/wm8960.h>
f2644a2c
MB		 27
28#include "wm8960.h"
29
30#define AUDIO_NAME "wm8960"
31
f2644a2c 32/* R25 - Power 1 */
913d7b4c 33#define WM8960_VMID_MASK 0x180
f2644a2c
MB		 34#define WM8960_VREF 0x40
35
913d7b4c
MB		 36/* R26 - Power 2 */
37#define WM8960_PWR2_LOUT1 0x40
38#define WM8960_PWR2_ROUT1 0x20
39#define WM8960_PWR2_OUT3 0x02
40
f2644a2c
MB		 41/* R28 - Anti-pop 1 */
42#define WM8960_POBCTRL 0x80
43#define WM8960_BUFDCOPEN 0x10
44#define WM8960_BUFIOEN 0x08
45#define WM8960_SOFT_ST 0x04
46#define WM8960_HPSTBY 0x01
47
48/* R29 - Anti-pop 2 */
49#define WM8960_DISOP 0x40
913d7b4c 50#define WM8960_DRES_MASK 0x30
f2644a2c
MB		 51
52/*
53 * wm8960 register cache
54 * We can't read the WM8960 register space when we are
55 * using 2 wire for device control, so we cache them instead.
56 */
57static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
58 0x0097, 0x0097, 0x0000, 0x0000,
59 0x0000, 0x0008, 0x0000, 0x000a,
60 0x01c0, 0x0000, 0x00ff, 0x00ff,
61 0x0000, 0x0000, 0x0000, 0x0000,
62 0x0000, 0x007b, 0x0100, 0x0032,
63 0x0000, 0x00c3, 0x00c3, 0x01c0,
64 0x0000, 0x0000, 0x0000, 0x0000,
65 0x0000, 0x0000, 0x0000, 0x0000,
66 0x0100, 0x0100, 0x0050, 0x0050,
67 0x0050, 0x0050, 0x0000, 0x0000,
68 0x0000, 0x0000, 0x0040, 0x0000,
69 0x0000, 0x0050, 0x0050, 0x0000,
70 0x0002, 0x0037, 0x004d, 0x0080,
71 0x0008, 0x0031, 0x0026, 0x00e9,
72};
73
74struct wm8960_priv {
75 u16 reg_cache[WM8960_CACHEREGNUM];
f0fba2ad
LG		 76 enum snd_soc_control_type control_type;
77 void *control_data;
78 int (*set_bias_level)(struct snd_soc_codec *,
79 enum snd_soc_bias_level level);
913d7b4c
MB		 80 struct snd_soc_dapm_widget *lout1;
81 struct snd_soc_dapm_widget *rout1;
82 struct snd_soc_dapm_widget *out3;
afd6d36a
MB		 83 bool deemph;
84 int playback_fs;
f2644a2c
MB		 85};
86
17a52fd6 87#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
f2644a2c
MB		 88
89/* enumerated controls */
f2644a2c
MB		 90static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
91 "Right Inverted", "Stereo Inversion"};
92static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
93static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
94static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
95static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
96
97static const struct soc_enum wm8960_enum[] = {
f2644a2c
MB		 98 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
99 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
100 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
101 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
102 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
103 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
104};
105
afd6d36a
MB		 106static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
107
108static int wm8960_set_deemph(struct snd_soc_codec *codec)
109{
110 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
111 int val, i, best;
112
113 /* If we're using deemphasis select the nearest available sample
114 * rate.
115 */
116 if (wm8960->deemph) {
117 best = 1;
118 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
119 if (abs(deemph_settings[i] - wm8960->playback_fs) <
120 abs(deemph_settings[best] - wm8960->playback_fs))
121 best = i;
122 }
123
124 val = best << 1;
125 } else {
126 val = 0;
127 }
128
129 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
130
131 return snd_soc_update_bits(codec, WM8960_DACCTL1,
132 0x6, val);
133}
134
135static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
136 struct snd_ctl_elem_value *ucontrol)
137{
138 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
139 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
140
141 return wm8960->deemph;
142}
143
144static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
145 struct snd_ctl_elem_value *ucontrol)
146{
147 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
148 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
149 int deemph = ucontrol->value.enumerated.item[0];
150
151 if (deemph > 1)
152 return -EINVAL;
153
154 wm8960->deemph = deemph;
155
156 return wm8960_set_deemph(codec);
157}
158
f2644a2c
MB		 159static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
160static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
161static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
162static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
163
164static const struct snd_kcontrol_new wm8960_snd_controls[] = {
165SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
166 0, 63, 0, adc_tlv),
167SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
168 6, 1, 0),
169SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
170 7, 1, 0),
171
172SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
173 0, 255, 0, dac_tlv),
174
175SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
176 0, 127, 0, out_tlv),
177SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
178 7, 1, 0),
179
180SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
181 0, 127, 0, out_tlv),
182SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
183 7, 1, 0),
184SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
185SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
186
187SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
4faaa8d9 188SOC_ENUM("ADC Polarity", wm8960_enum[0]),
f2644a2c
MB		 189SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
190
191SOC_ENUM("DAC Polarity", wm8960_enum[2]),
afd6d36a
MB		 192SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
193 wm8960_get_deemph, wm8960_put_deemph),
f2644a2c 194
4faaa8d9
MB		 195SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
196SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
f2644a2c
MB		 197SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
198SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
199
4faaa8d9 200SOC_ENUM("ALC Function", wm8960_enum[4]),
f2644a2c
MB		 201SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
202SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
203SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
204SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
4faaa8d9 205SOC_ENUM("ALC Mode", wm8960_enum[5]),
f2644a2c
MB		 206SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
207SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
208
209SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
210SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
211
212SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
213 0, 127, 0),
214
215SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
216 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
217SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
218 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
219SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
220 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
221SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
222 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
223};
224
225static const struct snd_kcontrol_new wm8960_lin_boost[] = {
226SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
227SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
228SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
229};
230
231static const struct snd_kcontrol_new wm8960_lin[] = {
232SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
233};
234
235static const struct snd_kcontrol_new wm8960_rin_boost[] = {
236SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
237SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
238SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
239};
240
241static const struct snd_kcontrol_new wm8960_rin[] = {
242SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
243};
244
245static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
246SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
247SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
248SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
249};
250
251static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
252SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
253SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
254SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
255};
256
257static const struct snd_kcontrol_new wm8960_mono_out[] = {
258SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
259SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
260};
261
262static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
263SND_SOC_DAPM_INPUT("LINPUT1"),
264SND_SOC_DAPM_INPUT("RINPUT1"),
265SND_SOC_DAPM_INPUT("LINPUT2"),
266SND_SOC_DAPM_INPUT("RINPUT2"),
267SND_SOC_DAPM_INPUT("LINPUT3"),
268SND_SOC_DAPM_INPUT("RINPUT3"),
269
270SND_SOC_DAPM_MICBIAS("MICB", WM8960_POWER1, 1, 0),
271
272SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
273 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
274SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
275 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
276
277SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
278 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
279SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
280 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
281
282SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
283SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
284
285SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
286SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
287
288SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
289 &wm8960_loutput_mixer[0],
290 ARRAY_SIZE(wm8960_loutput_mixer)),
291SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
292 &wm8960_routput_mixer[0],
293 ARRAY_SIZE(wm8960_routput_mixer)),
294
f2644a2c
MB		 295SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
296SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
297
298SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
299SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
300
301SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
302SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
303
304SND_SOC_DAPM_OUTPUT("SPK_LP"),
305SND_SOC_DAPM_OUTPUT("SPK_LN"),
306SND_SOC_DAPM_OUTPUT("HP_L"),
307SND_SOC_DAPM_OUTPUT("HP_R"),
308SND_SOC_DAPM_OUTPUT("SPK_RP"),
309SND_SOC_DAPM_OUTPUT("SPK_RN"),
310SND_SOC_DAPM_OUTPUT("OUT3"),
311};
312
913d7b4c
MB		 313static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
314SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
315 &wm8960_mono_out[0],
316 ARRAY_SIZE(wm8960_mono_out)),
317};
318
319/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
320static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
321SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
322};
323
f2644a2c
MB		 324static const struct snd_soc_dapm_route audio_paths[] = {
325 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
326 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
327 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
328
329 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
330 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
331 { "Left Input Mixer", NULL, "LINPUT2" },
332 { "Left Input Mixer", NULL, "LINPUT3" },
333
334 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
335 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
336 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
337
338 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
339 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
340 { "Right Input Mixer", NULL, "RINPUT2" },
341 { "Right Input Mixer", NULL, "LINPUT3" },
342
343 { "Left ADC", NULL, "Left Input Mixer" },
344 { "Right ADC", NULL, "Right Input Mixer" },
345
346 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
347 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
348 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
349
350 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
351 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
352 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
353
f2644a2c
MB		 354 { "LOUT1 PGA", NULL, "Left Output Mixer" },
355 { "ROUT1 PGA", NULL, "Right Output Mixer" },
356
357 { "HP_L", NULL, "LOUT1 PGA" },
358 { "HP_R", NULL, "ROUT1 PGA" },
359
360 { "Left Speaker PGA", NULL, "Left Output Mixer" },
361 { "Right Speaker PGA", NULL, "Right Output Mixer" },
362
363 { "Left Speaker Output", NULL, "Left Speaker PGA" },
364 { "Right Speaker Output", NULL, "Right Speaker PGA" },
365
366 { "SPK_LN", NULL, "Left Speaker Output" },
367 { "SPK_LP", NULL, "Left Speaker Output" },
368 { "SPK_RN", NULL, "Right Speaker Output" },
369 { "SPK_RP", NULL, "Right Speaker Output" },
913d7b4c
MB		 370};
371
372static const struct snd_soc_dapm_route audio_paths_out3[] = {
373 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
374 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
f2644a2c
MB		 375
376 { "OUT3", NULL, "Mono Output Mixer", }
377};
378
913d7b4c
MB		 379static const struct snd_soc_dapm_route audio_paths_capless[] = {
380 { "HP_L", NULL, "OUT3 VMID" },
381 { "HP_R", NULL, "OUT3 VMID" },
382
383 { "OUT3 VMID", NULL, "Left Output Mixer" },
384 { "OUT3 VMID", NULL, "Right Output Mixer" },
385};
386
f2644a2c
MB		 387static int wm8960_add_widgets(struct snd_soc_codec *codec)
388{
913d7b4c 389 struct wm8960_data *pdata = codec->dev->platform_data;
b2c812e2 390 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB		 391 struct snd_soc_dapm_widget *w;
392
f2644a2c
MB		 393 snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets,
394 ARRAY_SIZE(wm8960_dapm_widgets));
395
396 snd_soc_dapm_add_routes(codec, audio_paths, ARRAY_SIZE(audio_paths));
397
913d7b4c
MB		 398 /* In capless mode OUT3 is used to provide VMID for the
399 * headphone outputs, otherwise it is used as a mono mixer.
400 */
401 if (pdata && pdata->capless) {
402 snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets_capless,
403 ARRAY_SIZE(wm8960_dapm_widgets_capless));
404
405 snd_soc_dapm_add_routes(codec, audio_paths_capless,
406 ARRAY_SIZE(audio_paths_capless));
407 } else {
408 snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets_out3,
409 ARRAY_SIZE(wm8960_dapm_widgets_out3));
410
411 snd_soc_dapm_add_routes(codec, audio_paths_out3,
412 ARRAY_SIZE(audio_paths_out3));
413 }
414
415 /* We need to power up the headphone output stage out of
416 * sequence for capless mode. To save scanning the widget
417 * list each time to find the desired power state do so now
418 * and save the result.
419 */
420 list_for_each_entry(w, &codec->dapm_widgets, list) {
421 if (strcmp(w->name, "LOUT1 PGA") == 0)
422 wm8960->lout1 = w;
423 if (strcmp(w->name, "ROUT1 PGA") == 0)
424 wm8960->rout1 = w;
425 if (strcmp(w->name, "OUT3 VMID") == 0)
426 wm8960->out3 = w;
427 }
428
f2644a2c
MB		 429 return 0;
430}
431
432static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
433 unsigned int fmt)
434{
435 struct snd_soc_codec *codec = codec_dai->codec;
436 u16 iface = 0;
437
438 /* set master/slave audio interface */
439 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
440 case SND_SOC_DAIFMT_CBM_CFM:
441 iface |= 0x0040;
442 break;
443 case SND_SOC_DAIFMT_CBS_CFS:
444 break;
445 default:
446 return -EINVAL;
447 }
448
449 /* interface format */
450 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
451 case SND_SOC_DAIFMT_I2S:
452 iface |= 0x0002;
453 break;
454 case SND_SOC_DAIFMT_RIGHT_J:
455 break;
456 case SND_SOC_DAIFMT_LEFT_J:
457 iface |= 0x0001;
458 break;
459 case SND_SOC_DAIFMT_DSP_A:
460 iface |= 0x0003;
461 break;
462 case SND_SOC_DAIFMT_DSP_B:
463 iface |= 0x0013;
464 break;
465 default:
466 return -EINVAL;
467 }
468
469 /* clock inversion */
470 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
471 case SND_SOC_DAIFMT_NB_NF:
472 break;
473 case SND_SOC_DAIFMT_IB_IF:
474 iface |= 0x0090;
475 break;
476 case SND_SOC_DAIFMT_IB_NF:
477 iface |= 0x0080;
478 break;
479 case SND_SOC_DAIFMT_NB_IF:
480 iface |= 0x0010;
481 break;
482 default:
483 return -EINVAL;
484 }
485
486 /* set iface */
17a52fd6 487 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 488 return 0;
489}
490
db059c0f
MB		 491static struct {
492 int rate;
493 unsigned int val;
494} alc_rates[] = {
495 { 48000, 0 },
496 { 44100, 0 },
497 { 32000, 1 },
498 { 22050, 2 },
499 { 24000, 2 },
500 { 16000, 3 },
501 { 11250, 4 },
502 { 12000, 4 },
503 { 8000, 5 },
504};
505
f2644a2c
MB		 506static int wm8960_hw_params(struct snd_pcm_substream *substream,
507 struct snd_pcm_hw_params *params,
508 struct snd_soc_dai *dai)
509{
510 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 511 struct snd_soc_codec *codec = rtd->codec;
afd6d36a 512 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
17a52fd6 513 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
db059c0f 514 int i;
f2644a2c
MB		 515
516 /* bit size */
517 switch (params_format(params)) {
518 case SNDRV_PCM_FORMAT_S16_LE:
519 break;
520 case SNDRV_PCM_FORMAT_S20_3LE:
521 iface |= 0x0004;
522 break;
523 case SNDRV_PCM_FORMAT_S24_LE:
524 iface |= 0x0008;
525 break;
526 }
527
afd6d36a
MB		 528 /* Update filters for the new rate */
529 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
530 wm8960->playback_fs = params_rate(params);
531 wm8960_set_deemph(codec);
db059c0f
MB		 532 } else {
533 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
534 if (alc_rates[i].rate == params_rate(params))
535 snd_soc_update_bits(codec,
536 WM8960_ADDCTL3, 0x7,
537 alc_rates[i].val);
afd6d36a
MB		 538 }
539
f2644a2c 540 /* set iface */
17a52fd6 541 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 542 return 0;
543}
544
545static int wm8960_mute(struct snd_soc_dai *dai, int mute)
546{
547 struct snd_soc_codec *codec = dai->codec;
17a52fd6 548 u16 mute_reg = snd_soc_read(codec, WM8960_DACCTL1) & 0xfff7;
f2644a2c
MB		 549
550 if (mute)
17a52fd6 551 snd_soc_write(codec, WM8960_DACCTL1, mute_reg | 0x8);
f2644a2c 552 else
17a52fd6 553 snd_soc_write(codec, WM8960_DACCTL1, mute_reg);
f2644a2c
MB		 554 return 0;
555}
556
913d7b4c
MB		 557static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
558 enum snd_soc_bias_level level)
f2644a2c 559{
f2644a2c
MB		 560 u16 reg;
561
562 switch (level) {
563 case SND_SOC_BIAS_ON:
564 break;
565
566 case SND_SOC_BIAS_PREPARE:
567 /* Set VMID to 2x50k */
17a52fd6 568 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c
MB		 569 reg &= ~0x180;
570 reg |= 0x80;
17a52fd6 571 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 572 break;
573
574 case SND_SOC_BIAS_STANDBY:
575 if (codec->bias_level == SND_SOC_BIAS_OFF) {
576 /* Enable anti-pop features */
17a52fd6 577 snd_soc_write(codec, WM8960_APOP1,
913d7b4c
MB		 578 WM8960_POBCTRL | WM8960_SOFT_ST |
579 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
f2644a2c
MB		 580
581 /* Enable & ramp VMID at 2x50k */
17a52fd6 582 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c 583 reg |= 0x80;
17a52fd6 584 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 585 msleep(100);
586
587 /* Enable VREF */
17a52fd6 588 snd_soc_write(codec, WM8960_POWER1, reg | WM8960_VREF);
f2644a2c
MB		 589
590 /* Disable anti-pop features */
17a52fd6 591 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
f2644a2c
MB		 592 }
593
594 /* Set VMID to 2x250k */
17a52fd6 595 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c
MB		 596 reg &= ~0x180;
597 reg |= 0x100;
17a52fd6 598 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 599 break;
600
601 case SND_SOC_BIAS_OFF:
602 /* Enable anti-pop features */
17a52fd6 603 snd_soc_write(codec, WM8960_APOP1,
f2644a2c
MB		 604 WM8960_POBCTRL | WM8960_SOFT_ST |
605 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
606
607 /* Disable VMID and VREF, let them discharge */
17a52fd6 608 snd_soc_write(codec, WM8960_POWER1, 0);
f2644a2c 609 msleep(600);
913d7b4c
MB		 610 break;
611 }
612
613 codec->bias_level = level;
614
615 return 0;
616}
617
618static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
619 enum snd_soc_bias_level level)
620{
b2c812e2 621 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB		 622 int reg;
623
624 switch (level) {
625 case SND_SOC_BIAS_ON:
626 break;
627
628 case SND_SOC_BIAS_PREPARE:
629 switch (codec->bias_level) {
630 case SND_SOC_BIAS_STANDBY:
631 /* Enable anti pop mode */
632 snd_soc_update_bits(codec, WM8960_APOP1,
633 WM8960_POBCTRL | WM8960_SOFT_ST |
634 WM8960_BUFDCOPEN,
635 WM8960_POBCTRL | WM8960_SOFT_ST |
636 WM8960_BUFDCOPEN);
637
638 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
639 reg = 0;
640 if (wm8960->lout1 && wm8960->lout1->power)
641 reg |= WM8960_PWR2_LOUT1;
642 if (wm8960->rout1 && wm8960->rout1->power)
643 reg |= WM8960_PWR2_ROUT1;
644 if (wm8960->out3 && wm8960->out3->power)
645 reg |= WM8960_PWR2_OUT3;
646 snd_soc_update_bits(codec, WM8960_POWER2,
647 WM8960_PWR2_LOUT1 |
648 WM8960_PWR2_ROUT1 |
649 WM8960_PWR2_OUT3, reg);
650
651 /* Enable VMID at 2*50k */
652 snd_soc_update_bits(codec, WM8960_POWER1,
653 WM8960_VMID_MASK, 0x80);
654
655 /* Ramp */
656 msleep(100);
657
658 /* Enable VREF */
659 snd_soc_update_bits(codec, WM8960_POWER1,
660 WM8960_VREF, WM8960_VREF);
661
662 msleep(100);
663 break;
664
665 case SND_SOC_BIAS_ON:
666 /* Enable anti-pop mode */
667 snd_soc_update_bits(codec, WM8960_APOP1,
668 WM8960_POBCTRL | WM8960_SOFT_ST |
669 WM8960_BUFDCOPEN,
670 WM8960_POBCTRL | WM8960_SOFT_ST |
671 WM8960_BUFDCOPEN);
672
673 /* Disable VMID and VREF */
674 snd_soc_update_bits(codec, WM8960_POWER1,
675 WM8960_VREF | WM8960_VMID_MASK, 0);
676 break;
677
678 default:
679 break;
680 }
681 break;
f2644a2c 682
913d7b4c
MB		 683 case SND_SOC_BIAS_STANDBY:
684 switch (codec->bias_level) {
685 case SND_SOC_BIAS_PREPARE:
686 /* Disable HP discharge */
687 snd_soc_update_bits(codec, WM8960_APOP2,
688 WM8960_DISOP | WM8960_DRES_MASK,
689 0);
690
691 /* Disable anti-pop features */
692 snd_soc_update_bits(codec, WM8960_APOP1,
693 WM8960_POBCTRL | WM8960_SOFT_ST |
694 WM8960_BUFDCOPEN,
695 WM8960_POBCTRL | WM8960_SOFT_ST |
696 WM8960_BUFDCOPEN);
697 break;
698
699 default:
700 break;
701 }
702 break;
f2644a2c 703
913d7b4c 704 case SND_SOC_BIAS_OFF:
f2644a2c
MB		 705 break;
706 }
707
708 codec->bias_level = level;
709
710 return 0;
711}
712
713/* PLL divisors */
714struct _pll_div {
715 u32 pre_div:1;
716 u32 n:4;
717 u32 k:24;
718};
719
720/* The size in bits of the pll divide multiplied by 10
721 * to allow rounding later */
722#define FIXED_PLL_SIZE ((1 << 24) * 10)
723
724static int pll_factors(unsigned int source, unsigned int target,
725 struct _pll_div *pll_div)
726{
727 unsigned long long Kpart;
728 unsigned int K, Ndiv, Nmod;
729
730 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
731
732 /* Scale up target to PLL operating frequency */
733 target *= 4;
734
735 Ndiv = target / source;
736 if (Ndiv < 6) {
737 source >>= 1;
738 pll_div->pre_div = 1;
739 Ndiv = target / source;
740 } else
741 pll_div->pre_div = 0;
742
743 if ((Ndiv < 6) || (Ndiv > 12)) {
744 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
745 return -EINVAL;
746 }
747
748 pll_div->n = Ndiv;
749 Nmod = target % source;
750 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
751
752 do_div(Kpart, source);
753
754 K = Kpart & 0xFFFFFFFF;
755
756 /* Check if we need to round */
757 if ((K % 10) >= 5)
758 K += 5;
759
760 /* Move down to proper range now rounding is done */
761 K /= 10;
762
763 pll_div->k = K;
764
765 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
766 pll_div->n, pll_div->k, pll_div->pre_div);
767
768 return 0;
769}
770
85488037
MB		 771static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
772 int source, unsigned int freq_in, unsigned int freq_out)
f2644a2c
MB		 773{
774 struct snd_soc_codec *codec = codec_dai->codec;
775 u16 reg;
776 static struct _pll_div pll_div;
777 int ret;
778
779 if (freq_in && freq_out) {
780 ret = pll_factors(freq_in, freq_out, &pll_div);
781 if (ret != 0)
782 return ret;
783 }
784
785 /* Disable the PLL: even if we are changing the frequency the
786 * PLL needs to be disabled while we do so. */
17a52fd6
MB		 787 snd_soc_write(codec, WM8960_CLOCK1,
788 snd_soc_read(codec, WM8960_CLOCK1) & ~1);
789 snd_soc_write(codec, WM8960_POWER2,
790 snd_soc_read(codec, WM8960_POWER2) & ~1);
f2644a2c
MB		 791
792 if (!freq_in || !freq_out)
793 return 0;
794
17a52fd6 795 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
f2644a2c
MB		 796 reg |= pll_div.pre_div << 4;
797 reg |= pll_div.n;
798
799 if (pll_div.k) {
800 reg |= 0x20;
801
17a52fd6
MB		 802 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
803 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
804 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
f2644a2c 805 }
17a52fd6 806 snd_soc_write(codec, WM8960_PLL1, reg);
f2644a2c
MB		 807
808 /* Turn it on */
17a52fd6
MB		 809 snd_soc_write(codec, WM8960_POWER2,
810 snd_soc_read(codec, WM8960_POWER2) | 1);
f2644a2c 811 msleep(250);
17a52fd6
MB		 812 snd_soc_write(codec, WM8960_CLOCK1,
813 snd_soc_read(codec, WM8960_CLOCK1) | 1);
f2644a2c
MB		 814
815 return 0;
816}
817
818static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
819 int div_id, int div)
820{
821 struct snd_soc_codec *codec = codec_dai->codec;
822 u16 reg;
823
824 switch (div_id) {
f2644a2c 825 case WM8960_SYSCLKDIV:
17a52fd6
MB		 826 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
827 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 828 break;
829 case WM8960_DACDIV:
17a52fd6
MB		 830 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
831 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 832 break;
833 case WM8960_OPCLKDIV:
17a52fd6
MB		 834 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
835 snd_soc_write(codec, WM8960_PLL1, reg | div);
f2644a2c
MB		 836 break;
837 case WM8960_DCLKDIV:
17a52fd6
MB		 838 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
839 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
f2644a2c
MB		 840 break;
841 case WM8960_TOCLKSEL:
17a52fd6
MB		 842 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
843 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
f2644a2c
MB		 844 break;
845 default:
846 return -EINVAL;
847 }
848
849 return 0;
850}
851
f0fba2ad
LG		 852static int wm8960_set_bias_level(struct snd_soc_codec *codec,
853 enum snd_soc_bias_level level)
854{
855 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
856
857 return wm8960->set_bias_level(codec, level);
858}
859
f2644a2c
MB		 860#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
861
862#define WM8960_FORMATS \
863 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
864 SNDRV_PCM_FMTBIT_S24_LE)
865
866static struct snd_soc_dai_ops wm8960_dai_ops = {
867 .hw_params = wm8960_hw_params,
868 .digital_mute = wm8960_mute,
869 .set_fmt = wm8960_set_dai_fmt,
870 .set_clkdiv = wm8960_set_dai_clkdiv,
871 .set_pll = wm8960_set_dai_pll,
872};
873
f0fba2ad
LG		 874static struct snd_soc_dai_driver wm8960_dai = {
875 .name = "wm8960-hifi",
f2644a2c
MB		 876 .playback = {
877 .stream_name = "Playback",
878 .channels_min = 1,
879 .channels_max = 2,
880 .rates = WM8960_RATES,
881 .formats = WM8960_FORMATS,},
882 .capture = {
883 .stream_name = "Capture",
884 .channels_min = 1,
885 .channels_max = 2,
886 .rates = WM8960_RATES,
887 .formats = WM8960_FORMATS,},
888 .ops = &wm8960_dai_ops,
889 .symmetric_rates = 1,
890};
f2644a2c 891
f0fba2ad 892static int wm8960_suspend(struct snd_soc_codec *codec, pm_message_t state)
f2644a2c 893{
f0fba2ad 894 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 895
f0fba2ad 896 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
f2644a2c
MB		 897 return 0;
898}
899
f0fba2ad 900static int wm8960_resume(struct snd_soc_codec *codec)
f2644a2c 901{
f0fba2ad 902 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c
MB		 903 int i;
904 u8 data[2];
905 u16 *cache = codec->reg_cache;
906
907 /* Sync reg_cache with the hardware */
908 for (i = 0; i < ARRAY_SIZE(wm8960_reg); i++) {
909 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
910 data[1] = cache[i] & 0x00ff;
911 codec->hw_write(codec->control_data, data, 2);
912 }
913
f0fba2ad 914 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 915 return 0;
916}
917
f0fba2ad 918static int wm8960_probe(struct snd_soc_codec *codec)
f2644a2c 919{
f0fba2ad
LG		 920 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
921 struct wm8960_data *pdata = dev_get_platdata(codec->dev);
f2644a2c
MB		 922 int ret;
923 u16 reg;
924
f0fba2ad
LG		 925 wm8960->set_bias_level = wm8960_set_bias_level_out3;
926 codec->control_data = wm8960->control_data;
913d7b4c 927
f2644a2c
MB		 928 if (!pdata) {
929 dev_warn(codec->dev, "No platform data supplied\n");
930 } else {
931 if (pdata->dres > WM8960_DRES_MAX) {
932 dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
933 pdata->dres = 0;
934 }
913d7b4c
MB		 935
936 if (pdata->capless)
f0fba2ad 937 wm8960->set_bias_level = wm8960_set_bias_level_capless;
f2644a2c
MB		 938 }
939
f0fba2ad 940 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
17a52fd6
MB		 941 if (ret < 0) {
942 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad 943 return ret;
17a52fd6
MB		 944 }
945
f2644a2c
MB		 946 ret = wm8960_reset(codec);
947 if (ret < 0) {
948 dev_err(codec->dev, "Failed to issue reset\n");
f0fba2ad 949 return ret;
f2644a2c
MB		 950 }
951
f0fba2ad 952 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 953
954 /* Latch the update bits */
17a52fd6
MB		 955 reg = snd_soc_read(codec, WM8960_LINVOL);
956 snd_soc_write(codec, WM8960_LINVOL, reg | 0x100);
957 reg = snd_soc_read(codec, WM8960_RINVOL);
958 snd_soc_write(codec, WM8960_RINVOL, reg | 0x100);
959 reg = snd_soc_read(codec, WM8960_LADC);
960 snd_soc_write(codec, WM8960_LADC, reg | 0x100);
961 reg = snd_soc_read(codec, WM8960_RADC);
962 snd_soc_write(codec, WM8960_RADC, reg | 0x100);
963 reg = snd_soc_read(codec, WM8960_LDAC);
964 snd_soc_write(codec, WM8960_LDAC, reg | 0x100);
965 reg = snd_soc_read(codec, WM8960_RDAC);
966 snd_soc_write(codec, WM8960_RDAC, reg | 0x100);
967 reg = snd_soc_read(codec, WM8960_LOUT1);
968 snd_soc_write(codec, WM8960_LOUT1, reg | 0x100);
969 reg = snd_soc_read(codec, WM8960_ROUT1);
970 snd_soc_write(codec, WM8960_ROUT1, reg | 0x100);
971 reg = snd_soc_read(codec, WM8960_LOUT2);
972 snd_soc_write(codec, WM8960_LOUT2, reg | 0x100);
973 reg = snd_soc_read(codec, WM8960_ROUT2);
974 snd_soc_write(codec, WM8960_ROUT2, reg | 0x100);
f2644a2c 975
f0fba2ad
LG		 976 snd_soc_add_controls(codec, wm8960_snd_controls,
977 ARRAY_SIZE(wm8960_snd_controls));
978 wm8960_add_widgets(codec);
f2644a2c
MB		 979
980 return 0;
981}
982
f0fba2ad
LG		 983/* power down chip */
984static int wm8960_remove(struct snd_soc_codec *codec)
f2644a2c 985{
f0fba2ad
LG		 986 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
987
988 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
989 return 0;
f2644a2c
MB		 990}
991
f0fba2ad
LG		 992static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
993 .probe = wm8960_probe,
994 .remove = wm8960_remove,
995 .suspend = wm8960_suspend,
996 .resume = wm8960_resume,
997 .set_bias_level = wm8960_set_bias_level,
998 .reg_cache_size = ARRAY_SIZE(wm8960_reg),
999 .reg_word_size = sizeof(u16),
1000 .reg_cache_default = wm8960_reg,
1001};
1002
1003#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c
MB		 1004static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
1005 const struct i2c_device_id *id)
1006{
1007 struct wm8960_priv *wm8960;
f0fba2ad 1008 int ret;
f2644a2c
MB		 1009
1010 wm8960 = kzalloc(sizeof(struct wm8960_priv), GFP_KERNEL);
1011 if (wm8960 == NULL)
1012 return -ENOMEM;
1013
f2644a2c 1014 i2c_set_clientdata(i2c, wm8960);
f0fba2ad 1015 wm8960->control_data = i2c;
f2644a2c 1016
f0fba2ad
LG		 1017 ret = snd_soc_register_codec(&i2c->dev,
1018 &soc_codec_dev_wm8960, &wm8960_dai, 1);
1019 if (ret < 0)
1020 kfree(wm8960);
1021 return ret;
f2644a2c
MB		 1022}
1023
1024static __devexit int wm8960_i2c_remove(struct i2c_client *client)
1025{
f0fba2ad
LG		 1026 snd_soc_unregister_codec(&client->dev);
1027 kfree(i2c_get_clientdata(client));
f2644a2c
MB		 1028 return 0;
1029}
1030
1031static const struct i2c_device_id wm8960_i2c_id[] = {
1032 { "wm8960", 0 },
1033 { }
1034};
1035MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1036
1037static struct i2c_driver wm8960_i2c_driver = {
1038 .driver = {
f0fba2ad 1039 .name = "wm8960-codec",
f2644a2c
MB		 1040 .owner = THIS_MODULE,
1041 },
1042 .probe = wm8960_i2c_probe,
1043 .remove = __devexit_p(wm8960_i2c_remove),
1044 .id_table = wm8960_i2c_id,
1045};
f0fba2ad 1046#endif
f2644a2c
MB		 1047
1048static int __init wm8960_modinit(void)
1049{
f0fba2ad
LG		 1050 int ret = 0;
1051#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c
MB		 1052 ret = i2c_add_driver(&wm8960_i2c_driver);
1053 if (ret != 0) {
1054 printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
1055 ret);
1056 }
f0fba2ad 1057#endif
f2644a2c
MB		 1058 return ret;
1059}
1060module_init(wm8960_modinit);
1061
1062static void __exit wm8960_exit(void)
1063{
f0fba2ad 1064#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c 1065 i2c_del_driver(&wm8960_i2c_driver);
f0fba2ad 1066#endif
f2644a2c
MB		 1067}
1068module_exit(wm8960_exit);
1069
f2644a2c
MB		 1070MODULE_DESCRIPTION("ASoC WM8960 driver");
1071MODULE_AUTHOR("Liam Girdwood");
1072MODULE_LICENSE("GPL");
Ubuntu Jammy Linux kernel mirror