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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
0a1bf553 MB |
2 | /* |
3 | * wm8974.c -- WM8974 ALSA Soc Audio driver | |
4 | * | |
8b83a193 | 5 | * Copyright 2006-2009 Wolfson Microelectronics PLC. |
0a1bf553 | 6 | * |
9a185b9a | 7 | * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com> |
0a1bf553 MB |
8 | */ |
9 | ||
10 | #include <linux/module.h> | |
0a1bf553 MB |
11 | #include <linux/kernel.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/delay.h> | |
14 | #include <linux/pm.h> | |
15 | #include <linux/i2c.h> | |
e40e0b5d | 16 | #include <linux/regmap.h> |
5a0e3ad6 | 17 | #include <linux/slab.h> |
0a1bf553 MB |
18 | #include <sound/core.h> |
19 | #include <sound/pcm.h> | |
20 | #include <sound/pcm_params.h> | |
21 | #include <sound/soc.h> | |
0a1bf553 | 22 | #include <sound/initval.h> |
a5f8d2f1 | 23 | #include <sound/tlv.h> |
0a1bf553 MB |
24 | |
25 | #include "wm8974.h" | |
26 | ||
51b2bb3f MR |
27 | struct wm8974_priv { |
28 | unsigned int mclk; | |
29 | unsigned int fs; | |
30 | }; | |
31 | ||
e40e0b5d MB |
32 | static const struct reg_default wm8974_reg_defaults[] = { |
33 | { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 }, | |
34 | { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 }, | |
35 | { 8, 0x0000 }, { 9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff }, | |
36 | { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff }, | |
37 | { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c }, | |
38 | { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 }, | |
39 | { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 }, | |
40 | { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 }, | |
41 | { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 }, | |
42 | { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 }, | |
43 | { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 }, | |
44 | { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 }, | |
45 | { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 }, | |
46 | { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 }, | |
47 | { 56, 0x0000 }, | |
0a1bf553 MB |
48 | }; |
49 | ||
df1ef7a3 | 50 | #define WM8974_POWER1_BIASEN 0x08 |
48c03ce7 | 51 | #define WM8974_POWER1_BUFIOEN 0x04 |
df1ef7a3 | 52 | |
3e32a3ff | 53 | #define wm8974_reset(c) snd_soc_component_write(c, WM8974_RESET, 0) |
0a1bf553 MB |
54 | |
55 | static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" }; | |
56 | static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" }; | |
57 | static const char *wm8974_eqmode[] = {"Capture", "Playback" }; | |
58 | static const char *wm8974_bw[] = {"Narrow", "Wide" }; | |
59 | static const char *wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" }; | |
60 | static const char *wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" }; | |
61 | static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" }; | |
62 | static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" }; | |
63 | static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" }; | |
64 | static const char *wm8974_alc[] = {"ALC", "Limiter" }; | |
65 | ||
66 | static const struct soc_enum wm8974_enum[] = { | |
67 | SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */ | |
68 | SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */ | |
69 | SOC_ENUM_SINGLE(WM8974_DAC, 4, 4, wm8974_deemp), | |
70 | SOC_ENUM_SINGLE(WM8974_EQ1, 8, 2, wm8974_eqmode), | |
71 | ||
72 | SOC_ENUM_SINGLE(WM8974_EQ1, 5, 4, wm8974_eq1), | |
73 | SOC_ENUM_SINGLE(WM8974_EQ2, 8, 2, wm8974_bw), | |
74 | SOC_ENUM_SINGLE(WM8974_EQ2, 5, 4, wm8974_eq2), | |
75 | SOC_ENUM_SINGLE(WM8974_EQ3, 8, 2, wm8974_bw), | |
76 | ||
77 | SOC_ENUM_SINGLE(WM8974_EQ3, 5, 4, wm8974_eq3), | |
78 | SOC_ENUM_SINGLE(WM8974_EQ4, 8, 2, wm8974_bw), | |
79 | SOC_ENUM_SINGLE(WM8974_EQ4, 5, 4, wm8974_eq4), | |
80 | SOC_ENUM_SINGLE(WM8974_EQ5, 8, 2, wm8974_bw), | |
81 | ||
82 | SOC_ENUM_SINGLE(WM8974_EQ5, 5, 4, wm8974_eq5), | |
83 | SOC_ENUM_SINGLE(WM8974_ALC3, 8, 2, wm8974_alc), | |
84 | }; | |
85 | ||
8a123ee2 MB |
86 | static const char *wm8974_auxmode_text[] = { "Buffer", "Mixer" }; |
87 | ||
de461bd2 TI |
88 | static SOC_ENUM_SINGLE_DECL(wm8974_auxmode, |
89 | WM8974_INPUT, 3, wm8974_auxmode_text); | |
8a123ee2 | 90 | |
a5f8d2f1 MB |
91 | static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1); |
92 | static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); | |
93 | static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0); | |
94 | static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0); | |
95 | ||
0a1bf553 MB |
96 | static const struct snd_kcontrol_new wm8974_snd_controls[] = { |
97 | ||
98 | SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0), | |
99 | ||
100 | SOC_ENUM("DAC Companding", wm8974_enum[1]), | |
101 | SOC_ENUM("ADC Companding", wm8974_enum[0]), | |
102 | ||
103 | SOC_ENUM("Playback De-emphasis", wm8974_enum[2]), | |
104 | SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0), | |
105 | ||
a5f8d2f1 | 106 | SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL, 0, 255, 0, digital_tlv), |
0a1bf553 MB |
107 | |
108 | SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0), | |
109 | SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0), | |
25cbf465 | 110 | SOC_SINGLE("ADC Inversion Switch", WM8974_ADC, 0, 1, 0), |
0a1bf553 | 111 | |
a5f8d2f1 | 112 | SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL, 0, 255, 0, digital_tlv), |
0a1bf553 MB |
113 | |
114 | SOC_ENUM("Equaliser Function", wm8974_enum[3]), | |
115 | SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]), | |
a5f8d2f1 | 116 | SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1, 0, 24, 1, eq_tlv), |
0a1bf553 | 117 | |
c46d5c04 | 118 | SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum[5]), |
0a1bf553 | 119 | SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]), |
a5f8d2f1 | 120 | SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2, 0, 24, 1, eq_tlv), |
0a1bf553 | 121 | |
c46d5c04 | 122 | SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum[7]), |
0a1bf553 | 123 | SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]), |
a5f8d2f1 | 124 | SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3, 0, 24, 1, eq_tlv), |
0a1bf553 | 125 | |
c46d5c04 | 126 | SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum[9]), |
0a1bf553 | 127 | SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]), |
a5f8d2f1 | 128 | SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4, 0, 24, 1, eq_tlv), |
0a1bf553 | 129 | |
a895d57d | 130 | SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum[11]), |
0a1bf553 | 131 | SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]), |
a5f8d2f1 | 132 | SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5, 0, 24, 1, eq_tlv), |
0a1bf553 MB |
133 | |
134 | SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1, 8, 1, 0), | |
135 | SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1, 4, 15, 0), | |
136 | SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1, 0, 15, 0), | |
137 | ||
138 | SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2, 4, 7, 0), | |
139 | SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2, 0, 15, 0), | |
140 | ||
141 | SOC_SINGLE("ALC Enable Switch", WM8974_ALC1, 8, 1, 0), | |
142 | SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1, 3, 7, 0), | |
143 | SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1, 0, 7, 0), | |
144 | ||
145 | SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2, 8, 1, 0), | |
146 | SOC_SINGLE("ALC Capture Hold", WM8974_ALC2, 4, 7, 0), | |
147 | SOC_SINGLE("ALC Capture Target", WM8974_ALC2, 0, 15, 0), | |
148 | ||
149 | SOC_ENUM("ALC Capture Mode", wm8974_enum[13]), | |
150 | SOC_SINGLE("ALC Capture Decay", WM8974_ALC3, 4, 15, 0), | |
151 | SOC_SINGLE("ALC Capture Attack", WM8974_ALC3, 0, 15, 0), | |
152 | ||
153 | SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE, 3, 1, 0), | |
154 | SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE, 0, 7, 0), | |
155 | ||
156 | SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA, 7, 1, 0), | |
a5f8d2f1 | 157 | SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA, 0, 63, 0, inpga_tlv), |
0a1bf553 MB |
158 | |
159 | SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL, 7, 1, 0), | |
160 | SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL, 6, 1, 1), | |
8a123ee2 MB |
161 | SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL, 0, 63, 0, spk_tlv), |
162 | ||
163 | SOC_ENUM("Aux Mode", wm8974_auxmode), | |
0a1bf553 MB |
164 | |
165 | SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST, 8, 1, 0), | |
8a123ee2 | 166 | SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 1), |
b2c3e923 GL |
167 | |
168 | /* DAC / ADC oversampling */ | |
169 | SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC, 8, 1, 0), | |
170 | SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC, 8, 1, 0), | |
0a1bf553 MB |
171 | }; |
172 | ||
0a1bf553 MB |
173 | /* Speaker Output Mixer */ |
174 | static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = { | |
175 | SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0), | |
176 | SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0), | |
759512fb | 177 | SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 0), |
0a1bf553 MB |
178 | }; |
179 | ||
180 | /* Mono Output Mixer */ | |
181 | static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = { | |
182 | SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0), | |
183 | SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0), | |
8a123ee2 MB |
184 | SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0), |
185 | }; | |
186 | ||
187 | /* Boost mixer */ | |
188 | static const struct snd_kcontrol_new wm8974_boost_mixer[] = { | |
189 | SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 0), | |
190 | }; | |
191 | ||
192 | /* Input PGA */ | |
193 | static const struct snd_kcontrol_new wm8974_inpga[] = { | |
194 | SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT, 2, 1, 0), | |
195 | SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT, 1, 1, 0), | |
196 | SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT, 0, 1, 0), | |
0a1bf553 MB |
197 | }; |
198 | ||
0a1bf553 MB |
199 | static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = { |
200 | SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0, | |
201 | &wm8974_speaker_mixer_controls[0], | |
202 | ARRAY_SIZE(wm8974_speaker_mixer_controls)), | |
203 | SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0, | |
204 | &wm8974_mono_mixer_controls[0], | |
205 | ARRAY_SIZE(wm8974_mono_mixer_controls)), | |
206 | SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0), | |
8a123ee2 | 207 | SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2, 0, 0), |
0a1bf553 MB |
208 | SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0), |
209 | SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0), | |
210 | SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0), | |
211 | SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0), | |
0a1bf553 | 212 | |
8a123ee2 MB |
213 | SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga, |
214 | ARRAY_SIZE(wm8974_inpga)), | |
215 | SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0, | |
216 | wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)), | |
0a1bf553 | 217 | |
48dd231b | 218 | SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0), |
0a1bf553 MB |
219 | |
220 | SND_SOC_DAPM_INPUT("MICN"), | |
221 | SND_SOC_DAPM_INPUT("MICP"), | |
222 | SND_SOC_DAPM_INPUT("AUX"), | |
223 | SND_SOC_DAPM_OUTPUT("MONOOUT"), | |
224 | SND_SOC_DAPM_OUTPUT("SPKOUTP"), | |
225 | SND_SOC_DAPM_OUTPUT("SPKOUTN"), | |
226 | }; | |
227 | ||
a2bd691c | 228 | static const struct snd_soc_dapm_route wm8974_dapm_routes[] = { |
0a1bf553 MB |
229 | /* Mono output mixer */ |
230 | {"Mono Mixer", "PCM Playback Switch", "DAC"}, | |
231 | {"Mono Mixer", "Aux Playback Switch", "Aux Input"}, | |
232 | {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"}, | |
233 | ||
234 | /* Speaker output mixer */ | |
235 | {"Speaker Mixer", "PCM Playback Switch", "DAC"}, | |
236 | {"Speaker Mixer", "Aux Playback Switch", "Aux Input"}, | |
237 | {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"}, | |
238 | ||
239 | /* Outputs */ | |
240 | {"Mono Out", NULL, "Mono Mixer"}, | |
241 | {"MONOOUT", NULL, "Mono Out"}, | |
242 | {"SpkN Out", NULL, "Speaker Mixer"}, | |
243 | {"SpkP Out", NULL, "Speaker Mixer"}, | |
244 | {"SPKOUTN", NULL, "SpkN Out"}, | |
245 | {"SPKOUTP", NULL, "SpkP Out"}, | |
246 | ||
247 | /* Boost Mixer */ | |
8a123ee2 MB |
248 | {"ADC", NULL, "Boost Mixer"}, |
249 | {"Boost Mixer", "Aux Switch", "Aux Input"}, | |
250 | {"Boost Mixer", NULL, "Input PGA"}, | |
251 | {"Boost Mixer", NULL, "MICP"}, | |
252 | ||
253 | /* Input PGA */ | |
254 | {"Input PGA", "Aux Switch", "Aux Input"}, | |
255 | {"Input PGA", "MicN Switch", "MICN"}, | |
256 | {"Input PGA", "MicP Switch", "MICP"}, | |
0a1bf553 MB |
257 | |
258 | /* Inputs */ | |
8a123ee2 | 259 | {"Aux Input", NULL, "AUX"}, |
0a1bf553 MB |
260 | }; |
261 | ||
0a1bf553 | 262 | struct pll_ { |
c36b2fc7 | 263 | unsigned int pre_div:1; |
0a1bf553 MB |
264 | unsigned int n:4; |
265 | unsigned int k; | |
266 | }; | |
267 | ||
91d0c3ec MB |
268 | /* The size in bits of the pll divide multiplied by 10 |
269 | * to allow rounding later */ | |
270 | #define FIXED_PLL_SIZE ((1 << 24) * 10) | |
271 | ||
c36b2fc7 MB |
272 | static void pll_factors(struct pll_ *pll_div, |
273 | unsigned int target, unsigned int source) | |
91d0c3ec MB |
274 | { |
275 | unsigned long long Kpart; | |
276 | unsigned int K, Ndiv, Nmod; | |
277 | ||
c36b2fc7 MB |
278 | /* There is a fixed divide by 4 in the output path */ |
279 | target *= 4; | |
280 | ||
91d0c3ec MB |
281 | Ndiv = target / source; |
282 | if (Ndiv < 6) { | |
c36b2fc7 MB |
283 | source /= 2; |
284 | pll_div->pre_div = 1; | |
91d0c3ec MB |
285 | Ndiv = target / source; |
286 | } else | |
c36b2fc7 | 287 | pll_div->pre_div = 0; |
91d0c3ec MB |
288 | |
289 | if ((Ndiv < 6) || (Ndiv > 12)) | |
290 | printk(KERN_WARNING | |
8b83a193 | 291 | "WM8974 N value %u outwith recommended range!\n", |
91d0c3ec MB |
292 | Ndiv); |
293 | ||
c36b2fc7 | 294 | pll_div->n = Ndiv; |
91d0c3ec MB |
295 | Nmod = target % source; |
296 | Kpart = FIXED_PLL_SIZE * (long long)Nmod; | |
297 | ||
298 | do_div(Kpart, source); | |
299 | ||
300 | K = Kpart & 0xFFFFFFFF; | |
301 | ||
302 | /* Check if we need to round */ | |
303 | if ((K % 10) >= 5) | |
304 | K += 5; | |
305 | ||
306 | /* Move down to proper range now rounding is done */ | |
307 | K /= 10; | |
308 | ||
c36b2fc7 | 309 | pll_div->k = K; |
91d0c3ec | 310 | } |
0a1bf553 | 311 | |
85488037 MB |
312 | static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
313 | int source, unsigned int freq_in, unsigned int freq_out) | |
0a1bf553 | 314 | { |
3e32a3ff | 315 | struct snd_soc_component *component = codec_dai->component; |
c36b2fc7 | 316 | struct pll_ pll_div; |
0a1bf553 MB |
317 | u16 reg; |
318 | ||
1a55b3f6 | 319 | if (freq_in == 0 || freq_out == 0) { |
91d0c3ec | 320 | /* Clock CODEC directly from MCLK */ |
3e32a3ff KM |
321 | reg = snd_soc_component_read32(component, WM8974_CLOCK); |
322 | snd_soc_component_write(component, WM8974_CLOCK, reg & 0x0ff); | |
91d0c3ec MB |
323 | |
324 | /* Turn off PLL */ | |
3e32a3ff KM |
325 | reg = snd_soc_component_read32(component, WM8974_POWER1); |
326 | snd_soc_component_write(component, WM8974_POWER1, reg & 0x1df); | |
0a1bf553 MB |
327 | return 0; |
328 | } | |
329 | ||
c36b2fc7 | 330 | pll_factors(&pll_div, freq_out, freq_in); |
91d0c3ec | 331 | |
3e32a3ff KM |
332 | snd_soc_component_write(component, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n); |
333 | snd_soc_component_write(component, WM8974_PLLK1, pll_div.k >> 18); | |
334 | snd_soc_component_write(component, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff); | |
335 | snd_soc_component_write(component, WM8974_PLLK3, pll_div.k & 0x1ff); | |
336 | reg = snd_soc_component_read32(component, WM8974_POWER1); | |
337 | snd_soc_component_write(component, WM8974_POWER1, reg | 0x020); | |
1a55b3f6 | 338 | |
91d0c3ec | 339 | /* Run CODEC from PLL instead of MCLK */ |
3e32a3ff KM |
340 | reg = snd_soc_component_read32(component, WM8974_CLOCK); |
341 | snd_soc_component_write(component, WM8974_CLOCK, reg | 0x100); | |
91d0c3ec MB |
342 | |
343 | return 0; | |
0a1bf553 MB |
344 | } |
345 | ||
346 | /* | |
347 | * Configure WM8974 clock dividers. | |
348 | */ | |
349 | static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai, | |
350 | int div_id, int div) | |
351 | { | |
3e32a3ff | 352 | struct snd_soc_component *component = codec_dai->component; |
0a1bf553 MB |
353 | u16 reg; |
354 | ||
355 | switch (div_id) { | |
356 | case WM8974_OPCLKDIV: | |
3e32a3ff KM |
357 | reg = snd_soc_component_read32(component, WM8974_GPIO) & 0x1cf; |
358 | snd_soc_component_write(component, WM8974_GPIO, reg | div); | |
0a1bf553 MB |
359 | break; |
360 | case WM8974_MCLKDIV: | |
3e32a3ff KM |
361 | reg = snd_soc_component_read32(component, WM8974_CLOCK) & 0x11f; |
362 | snd_soc_component_write(component, WM8974_CLOCK, reg | div); | |
0a1bf553 | 363 | break; |
0a1bf553 | 364 | case WM8974_BCLKDIV: |
3e32a3ff KM |
365 | reg = snd_soc_component_read32(component, WM8974_CLOCK) & 0x1e3; |
366 | snd_soc_component_write(component, WM8974_CLOCK, reg | div); | |
0a1bf553 MB |
367 | break; |
368 | default: | |
369 | return -EINVAL; | |
370 | } | |
371 | ||
372 | return 0; | |
373 | } | |
374 | ||
51b2bb3f MR |
375 | static unsigned int wm8974_get_mclkdiv(unsigned int f_in, unsigned int f_out, |
376 | int *mclkdiv) | |
377 | { | |
378 | unsigned int ratio = 2 * f_in / f_out; | |
379 | ||
380 | if (ratio <= 2) { | |
381 | *mclkdiv = WM8974_MCLKDIV_1; | |
382 | ratio = 2; | |
383 | } else if (ratio == 3) { | |
384 | *mclkdiv = WM8974_MCLKDIV_1_5; | |
385 | } else if (ratio == 4) { | |
386 | *mclkdiv = WM8974_MCLKDIV_2; | |
387 | } else if (ratio <= 6) { | |
388 | *mclkdiv = WM8974_MCLKDIV_3; | |
389 | ratio = 6; | |
390 | } else if (ratio <= 8) { | |
391 | *mclkdiv = WM8974_MCLKDIV_4; | |
392 | ratio = 8; | |
393 | } else if (ratio <= 12) { | |
394 | *mclkdiv = WM8974_MCLKDIV_6; | |
395 | ratio = 12; | |
396 | } else if (ratio <= 16) { | |
397 | *mclkdiv = WM8974_MCLKDIV_8; | |
398 | ratio = 16; | |
399 | } else { | |
400 | *mclkdiv = WM8974_MCLKDIV_12; | |
401 | ratio = 24; | |
402 | } | |
403 | ||
404 | return f_out * ratio / 2; | |
405 | } | |
406 | ||
407 | static int wm8974_update_clocks(struct snd_soc_dai *dai) | |
408 | { | |
3e32a3ff KM |
409 | struct snd_soc_component *component = dai->component; |
410 | struct wm8974_priv *priv = snd_soc_component_get_drvdata(component); | |
51b2bb3f MR |
411 | unsigned int fs256; |
412 | unsigned int fpll = 0; | |
413 | unsigned int f; | |
414 | int mclkdiv; | |
415 | ||
416 | if (!priv->mclk || !priv->fs) | |
417 | return 0; | |
418 | ||
419 | fs256 = 256 * priv->fs; | |
420 | ||
421 | f = wm8974_get_mclkdiv(priv->mclk, fs256, &mclkdiv); | |
422 | ||
423 | if (f != priv->mclk) { | |
424 | /* The PLL performs best around 90MHz */ | |
425 | fpll = wm8974_get_mclkdiv(22500000, fs256, &mclkdiv); | |
426 | } | |
427 | ||
428 | wm8974_set_dai_pll(dai, 0, 0, priv->mclk, fpll); | |
429 | wm8974_set_dai_clkdiv(dai, WM8974_MCLKDIV, mclkdiv); | |
430 | ||
431 | return 0; | |
432 | } | |
433 | ||
434 | static int wm8974_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, | |
435 | unsigned int freq, int dir) | |
436 | { | |
3e32a3ff KM |
437 | struct snd_soc_component *component = dai->component; |
438 | struct wm8974_priv *priv = snd_soc_component_get_drvdata(component); | |
51b2bb3f MR |
439 | |
440 | if (dir != SND_SOC_CLOCK_IN) | |
441 | return -EINVAL; | |
442 | ||
443 | priv->mclk = freq; | |
444 | ||
445 | return wm8974_update_clocks(dai); | |
446 | } | |
447 | ||
0a1bf553 MB |
448 | static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai, |
449 | unsigned int fmt) | |
450 | { | |
3e32a3ff | 451 | struct snd_soc_component *component = codec_dai->component; |
0a1bf553 | 452 | u16 iface = 0; |
3e32a3ff | 453 | u16 clk = snd_soc_component_read32(component, WM8974_CLOCK) & 0x1fe; |
0a1bf553 MB |
454 | |
455 | /* set master/slave audio interface */ | |
456 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
457 | case SND_SOC_DAIFMT_CBM_CFM: | |
458 | clk |= 0x0001; | |
459 | break; | |
460 | case SND_SOC_DAIFMT_CBS_CFS: | |
461 | break; | |
462 | default: | |
463 | return -EINVAL; | |
464 | } | |
465 | ||
466 | /* interface format */ | |
467 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
468 | case SND_SOC_DAIFMT_I2S: | |
469 | iface |= 0x0010; | |
470 | break; | |
471 | case SND_SOC_DAIFMT_RIGHT_J: | |
472 | break; | |
473 | case SND_SOC_DAIFMT_LEFT_J: | |
474 | iface |= 0x0008; | |
475 | break; | |
476 | case SND_SOC_DAIFMT_DSP_A: | |
477 | iface |= 0x00018; | |
478 | break; | |
479 | default: | |
480 | return -EINVAL; | |
481 | } | |
482 | ||
483 | /* clock inversion */ | |
484 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
485 | case SND_SOC_DAIFMT_NB_NF: | |
486 | break; | |
487 | case SND_SOC_DAIFMT_IB_IF: | |
488 | iface |= 0x0180; | |
489 | break; | |
490 | case SND_SOC_DAIFMT_IB_NF: | |
491 | iface |= 0x0100; | |
492 | break; | |
493 | case SND_SOC_DAIFMT_NB_IF: | |
494 | iface |= 0x0080; | |
495 | break; | |
496 | default: | |
497 | return -EINVAL; | |
498 | } | |
499 | ||
3e32a3ff KM |
500 | snd_soc_component_write(component, WM8974_IFACE, iface); |
501 | snd_soc_component_write(component, WM8974_CLOCK, clk); | |
0a1bf553 MB |
502 | return 0; |
503 | } | |
504 | ||
505 | static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream, | |
506 | struct snd_pcm_hw_params *params, | |
507 | struct snd_soc_dai *dai) | |
508 | { | |
3e32a3ff KM |
509 | struct snd_soc_component *component = dai->component; |
510 | struct wm8974_priv *priv = snd_soc_component_get_drvdata(component); | |
511 | u16 iface = snd_soc_component_read32(component, WM8974_IFACE) & 0x19f; | |
512 | u16 adn = snd_soc_component_read32(component, WM8974_ADD) & 0x1f1; | |
51b2bb3f MR |
513 | int err; |
514 | ||
515 | priv->fs = params_rate(params); | |
516 | err = wm8974_update_clocks(dai); | |
517 | if (err) | |
518 | return err; | |
0a1bf553 MB |
519 | |
520 | /* bit size */ | |
6afdc9a0 MB |
521 | switch (params_width(params)) { |
522 | case 16: | |
0a1bf553 | 523 | break; |
6afdc9a0 | 524 | case 20: |
0a1bf553 MB |
525 | iface |= 0x0020; |
526 | break; | |
6afdc9a0 | 527 | case 24: |
0a1bf553 MB |
528 | iface |= 0x0040; |
529 | break; | |
6afdc9a0 | 530 | case 32: |
0a1bf553 MB |
531 | iface |= 0x0060; |
532 | break; | |
533 | } | |
534 | ||
535 | /* filter coefficient */ | |
536 | switch (params_rate(params)) { | |
b3172f22 | 537 | case 8000: |
0a1bf553 MB |
538 | adn |= 0x5 << 1; |
539 | break; | |
b3172f22 | 540 | case 11025: |
0a1bf553 MB |
541 | adn |= 0x4 << 1; |
542 | break; | |
b3172f22 | 543 | case 16000: |
0a1bf553 MB |
544 | adn |= 0x3 << 1; |
545 | break; | |
b3172f22 | 546 | case 22050: |
0a1bf553 MB |
547 | adn |= 0x2 << 1; |
548 | break; | |
b3172f22 | 549 | case 32000: |
0a1bf553 MB |
550 | adn |= 0x1 << 1; |
551 | break; | |
b3172f22 GL |
552 | case 44100: |
553 | case 48000: | |
0a1bf553 MB |
554 | break; |
555 | } | |
556 | ||
3e32a3ff KM |
557 | snd_soc_component_write(component, WM8974_IFACE, iface); |
558 | snd_soc_component_write(component, WM8974_ADD, adn); | |
0a1bf553 MB |
559 | return 0; |
560 | } | |
561 | ||
562 | static int wm8974_mute(struct snd_soc_dai *dai, int mute) | |
563 | { | |
3e32a3ff KM |
564 | struct snd_soc_component *component = dai->component; |
565 | u16 mute_reg = snd_soc_component_read32(component, WM8974_DAC) & 0xffbf; | |
0a1bf553 | 566 | |
1a55b3f6 | 567 | if (mute) |
3e32a3ff | 568 | snd_soc_component_write(component, WM8974_DAC, mute_reg | 0x40); |
0a1bf553 | 569 | else |
3e32a3ff | 570 | snd_soc_component_write(component, WM8974_DAC, mute_reg); |
0a1bf553 MB |
571 | return 0; |
572 | } | |
573 | ||
574 | /* liam need to make this lower power with dapm */ | |
3e32a3ff | 575 | static int wm8974_set_bias_level(struct snd_soc_component *component, |
0a1bf553 MB |
576 | enum snd_soc_bias_level level) |
577 | { | |
3e32a3ff | 578 | u16 power1 = snd_soc_component_read32(component, WM8974_POWER1) & ~0x3; |
df1ef7a3 | 579 | |
0a1bf553 MB |
580 | switch (level) { |
581 | case SND_SOC_BIAS_ON: | |
0a1bf553 | 582 | case SND_SOC_BIAS_PREPARE: |
df1ef7a3 | 583 | power1 |= 0x1; /* VMID 50k */ |
3e32a3ff | 584 | snd_soc_component_write(component, WM8974_POWER1, power1); |
0a1bf553 | 585 | break; |
df1ef7a3 | 586 | |
0a1bf553 | 587 | case SND_SOC_BIAS_STANDBY: |
df1ef7a3 MB |
588 | power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN; |
589 | ||
3e32a3ff KM |
590 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { |
591 | regcache_sync(dev_get_regmap(component->dev, NULL)); | |
0bad3d84 | 592 | |
df1ef7a3 | 593 | /* Initial cap charge at VMID 5k */ |
3e32a3ff | 594 | snd_soc_component_write(component, WM8974_POWER1, power1 | 0x3); |
df1ef7a3 MB |
595 | mdelay(100); |
596 | } | |
597 | ||
598 | power1 |= 0x2; /* VMID 500k */ | |
3e32a3ff | 599 | snd_soc_component_write(component, WM8974_POWER1, power1); |
0a1bf553 | 600 | break; |
df1ef7a3 | 601 | |
0a1bf553 | 602 | case SND_SOC_BIAS_OFF: |
3e32a3ff KM |
603 | snd_soc_component_write(component, WM8974_POWER1, 0); |
604 | snd_soc_component_write(component, WM8974_POWER2, 0); | |
605 | snd_soc_component_write(component, WM8974_POWER3, 0); | |
0a1bf553 MB |
606 | break; |
607 | } | |
df1ef7a3 | 608 | |
0a1bf553 MB |
609 | return 0; |
610 | } | |
611 | ||
1a55b3f6 | 612 | #define WM8974_RATES (SNDRV_PCM_RATE_8000_48000) |
0a1bf553 MB |
613 | |
614 | #define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
615 | SNDRV_PCM_FMTBIT_S24_LE) | |
616 | ||
85e7652d | 617 | static const struct snd_soc_dai_ops wm8974_ops = { |
0a1bf553 MB |
618 | .hw_params = wm8974_pcm_hw_params, |
619 | .digital_mute = wm8974_mute, | |
620 | .set_fmt = wm8974_set_dai_fmt, | |
621 | .set_clkdiv = wm8974_set_dai_clkdiv, | |
622 | .set_pll = wm8974_set_dai_pll, | |
51b2bb3f | 623 | .set_sysclk = wm8974_set_dai_sysclk, |
0a1bf553 MB |
624 | }; |
625 | ||
f0fba2ad LG |
626 | static struct snd_soc_dai_driver wm8974_dai = { |
627 | .name = "wm8974-hifi", | |
0a1bf553 MB |
628 | .playback = { |
629 | .stream_name = "Playback", | |
630 | .channels_min = 1, | |
33d81af4 | 631 | .channels_max = 2, /* Only 1 channel of data */ |
0a1bf553 MB |
632 | .rates = WM8974_RATES, |
633 | .formats = WM8974_FORMATS,}, | |
634 | .capture = { | |
635 | .stream_name = "Capture", | |
636 | .channels_min = 1, | |
33d81af4 | 637 | .channels_max = 2, /* Only 1 channel of data */ |
0a1bf553 MB |
638 | .rates = WM8974_RATES, |
639 | .formats = WM8974_FORMATS,}, | |
640 | .ops = &wm8974_ops, | |
cb11d39e | 641 | .symmetric_rates = 1, |
0a1bf553 | 642 | }; |
0a1bf553 | 643 | |
e40e0b5d MB |
644 | static const struct regmap_config wm8974_regmap = { |
645 | .reg_bits = 7, | |
646 | .val_bits = 9, | |
647 | ||
648 | .max_register = WM8974_MONOMIX, | |
649 | .reg_defaults = wm8974_reg_defaults, | |
650 | .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults), | |
1ea5998a | 651 | .cache_type = REGCACHE_FLAT, |
e40e0b5d MB |
652 | }; |
653 | ||
3e32a3ff | 654 | static int wm8974_probe(struct snd_soc_component *component) |
0a1bf553 | 655 | { |
0a1bf553 MB |
656 | int ret = 0; |
657 | ||
3e32a3ff | 658 | ret = wm8974_reset(component); |
1a55b3f6 | 659 | if (ret < 0) { |
3e32a3ff | 660 | dev_err(component->dev, "Failed to issue reset\n"); |
f0fba2ad | 661 | return ret; |
0a1bf553 MB |
662 | } |
663 | ||
4fcbbb67 MB |
664 | return 0; |
665 | } | |
0a1bf553 | 666 | |
3e32a3ff KM |
667 | static const struct snd_soc_component_driver soc_component_dev_wm8974 = { |
668 | .probe = wm8974_probe, | |
669 | .set_bias_level = wm8974_set_bias_level, | |
670 | .controls = wm8974_snd_controls, | |
671 | .num_controls = ARRAY_SIZE(wm8974_snd_controls), | |
672 | .dapm_widgets = wm8974_dapm_widgets, | |
673 | .num_dapm_widgets = ARRAY_SIZE(wm8974_dapm_widgets), | |
674 | .dapm_routes = wm8974_dapm_routes, | |
675 | .num_dapm_routes = ARRAY_SIZE(wm8974_dapm_routes), | |
676 | .suspend_bias_off = 1, | |
677 | .idle_bias_on = 1, | |
678 | .use_pmdown_time = 1, | |
679 | .endianness = 1, | |
680 | .non_legacy_dai_naming = 1, | |
4fcbbb67 | 681 | }; |
0a1bf553 | 682 | |
7a79e94e BP |
683 | static int wm8974_i2c_probe(struct i2c_client *i2c, |
684 | const struct i2c_device_id *id) | |
0a1bf553 | 685 | { |
51b2bb3f | 686 | struct wm8974_priv *priv; |
e40e0b5d | 687 | struct regmap *regmap; |
f0fba2ad | 688 | int ret; |
0a1bf553 | 689 | |
51b2bb3f MR |
690 | priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); |
691 | if (!priv) | |
692 | return -ENOMEM; | |
693 | ||
694 | i2c_set_clientdata(i2c, priv); | |
695 | ||
e40e0b5d MB |
696 | regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap); |
697 | if (IS_ERR(regmap)) | |
698 | return PTR_ERR(regmap); | |
699 | ||
3e32a3ff KM |
700 | ret = devm_snd_soc_register_component(&i2c->dev, |
701 | &soc_component_dev_wm8974, &wm8974_dai, 1); | |
c2562a8e | 702 | |
f0fba2ad | 703 | return ret; |
4fcbbb67 | 704 | } |
0a1bf553 | 705 | |
4fcbbb67 MB |
706 | static const struct i2c_device_id wm8974_i2c_id[] = { |
707 | { "wm8974", 0 }, | |
708 | { } | |
709 | }; | |
710 | MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id); | |
711 | ||
2005bd88 MR |
712 | static const struct of_device_id wm8974_of_match[] = { |
713 | { .compatible = "wlf,wm8974", }, | |
714 | { } | |
715 | }; | |
716 | MODULE_DEVICE_TABLE(of, wm8974_of_match); | |
717 | ||
4fcbbb67 MB |
718 | static struct i2c_driver wm8974_i2c_driver = { |
719 | .driver = { | |
091edccf | 720 | .name = "wm8974", |
2005bd88 | 721 | .of_match_table = wm8974_of_match, |
4fcbbb67 MB |
722 | }, |
723 | .probe = wm8974_i2c_probe, | |
4fcbbb67 | 724 | .id_table = wm8974_i2c_id, |
0a1bf553 | 725 | }; |
0a1bf553 | 726 | |
2be59418 | 727 | module_i2c_driver(wm8974_i2c_driver); |
0a1bf553 MB |
728 | |
729 | MODULE_DESCRIPTION("ASoC WM8974 driver"); | |
730 | MODULE_AUTHOR("Liam Girdwood"); | |
731 | MODULE_LICENSE("GPL"); |