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1 | /* |
2 | * wm8988.c -- WM8988 ALSA SoC audio driver | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics plc | |
5 | * Copyright 2005 Openedhand Ltd. | |
6 | * | |
7 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/pm.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/spi/spi.h> | |
21 | #include <linux/platform_device.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
5409fb4e MB |
23 | #include <sound/core.h> |
24 | #include <sound/pcm.h> | |
25 | #include <sound/pcm_params.h> | |
26 | #include <sound/tlv.h> | |
27 | #include <sound/soc.h> | |
28 | #include <sound/soc-dapm.h> | |
29 | #include <sound/initval.h> | |
30 | ||
31 | #include "wm8988.h" | |
32 | ||
33 | /* | |
34 | * wm8988 register cache | |
35 | * We can't read the WM8988 register space when we | |
36 | * are using 2 wire for device control, so we cache them instead. | |
37 | */ | |
38 | static const u16 wm8988_reg[] = { | |
39 | 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ | |
40 | 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ | |
41 | 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ | |
42 | 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ | |
43 | 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ | |
44 | 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ | |
45 | 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ | |
46 | 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ | |
47 | 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ | |
48 | 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ | |
49 | 0x0079, 0x0079, 0x0079, /* 40 */ | |
50 | }; | |
51 | ||
52 | /* codec private data */ | |
53 | struct wm8988_priv { | |
54 | unsigned int sysclk; | |
55 | struct snd_soc_codec codec; | |
56 | struct snd_pcm_hw_constraint_list *sysclk_constraints; | |
57 | u16 reg_cache[WM8988_NUM_REG]; | |
58 | }; | |
59 | ||
60 | ||
17a52fd6 | 61 | #define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0) |
5409fb4e MB |
62 | |
63 | /* | |
64 | * WM8988 Controls | |
65 | */ | |
66 | ||
67 | static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"}; | |
68 | static const struct soc_enum bass_boost = | |
69 | SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt); | |
70 | ||
71 | static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; | |
72 | static const struct soc_enum bass_filter = | |
73 | SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt); | |
74 | ||
75 | static const char *treble_txt[] = {"8kHz", "4kHz"}; | |
76 | static const struct soc_enum treble = | |
77 | SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt); | |
78 | ||
79 | static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"}; | |
80 | static const struct soc_enum stereo_3d_lc = | |
81 | SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt); | |
82 | ||
83 | static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"}; | |
84 | static const struct soc_enum stereo_3d_uc = | |
85 | SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt); | |
86 | ||
87 | static const char *stereo_3d_func_txt[] = {"Capture", "Playback"}; | |
88 | static const struct soc_enum stereo_3d_func = | |
89 | SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt); | |
90 | ||
91 | static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"}; | |
92 | static const struct soc_enum alc_func = | |
93 | SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt); | |
94 | ||
95 | static const char *ng_type_txt[] = {"Constant PGA Gain", | |
96 | "Mute ADC Output"}; | |
97 | static const struct soc_enum ng_type = | |
98 | SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt); | |
99 | ||
100 | static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"}; | |
101 | static const struct soc_enum deemph = | |
102 | SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt); | |
103 | ||
104 | static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert", | |
105 | "L + R Invert"}; | |
106 | static const struct soc_enum adcpol = | |
107 | SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt); | |
108 | ||
109 | static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0); | |
110 | static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1); | |
111 | static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); | |
112 | static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); | |
113 | static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); | |
114 | ||
115 | static const struct snd_kcontrol_new wm8988_snd_controls[] = { | |
116 | ||
117 | SOC_ENUM("Bass Boost", bass_boost), | |
118 | SOC_ENUM("Bass Filter", bass_filter), | |
119 | SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1), | |
120 | ||
121 | SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0), | |
122 | SOC_ENUM("Treble Cut-off", treble), | |
123 | ||
124 | SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0), | |
125 | SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0), | |
126 | SOC_ENUM("3D Lower Cut-off", stereo_3d_lc), | |
127 | SOC_ENUM("3D Upper Cut-off", stereo_3d_uc), | |
128 | SOC_ENUM("3D Mode", stereo_3d_func), | |
129 | ||
130 | SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0), | |
131 | SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0), | |
132 | SOC_ENUM("ALC Capture Function", alc_func), | |
133 | SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0), | |
134 | SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0), | |
135 | SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0), | |
136 | SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0), | |
137 | SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0), | |
138 | SOC_ENUM("ALC Capture NG Type", ng_type), | |
139 | SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0), | |
140 | ||
141 | SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0), | |
142 | ||
143 | SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC, | |
144 | 0, 255, 0, adc_tlv), | |
145 | SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL, | |
146 | 0, 63, 0, pga_tlv), | |
147 | SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0), | |
148 | SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1), | |
149 | ||
150 | SOC_ENUM("Playback De-emphasis", deemph), | |
151 | ||
152 | SOC_ENUM("Capture Polarity", adcpol), | |
153 | SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0), | |
154 | SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0), | |
155 | ||
156 | SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv), | |
157 | ||
158 | SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1, | |
159 | bypass_tlv), | |
160 | SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1, | |
161 | bypass_tlv), | |
162 | SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1, | |
163 | bypass_tlv), | |
164 | SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1, | |
165 | bypass_tlv), | |
166 | ||
167 | SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V, | |
168 | WM8988_ROUT1V, 7, 1, 0), | |
169 | SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V, | |
170 | 0, 127, 0, out_tlv), | |
171 | ||
172 | SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V, | |
173 | WM8988_ROUT2V, 7, 1, 0), | |
174 | SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V, | |
175 | 0, 127, 0, out_tlv), | |
176 | ||
177 | }; | |
178 | ||
179 | /* | |
180 | * DAPM Controls | |
181 | */ | |
182 | ||
183 | static int wm8988_lrc_control(struct snd_soc_dapm_widget *w, | |
184 | struct snd_kcontrol *kcontrol, int event) | |
185 | { | |
186 | struct snd_soc_codec *codec = w->codec; | |
17a52fd6 | 187 | u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2); |
5409fb4e MB |
188 | |
189 | /* Use the DAC to gate LRC if active, otherwise use ADC */ | |
17a52fd6 | 190 | if (snd_soc_read(codec, WM8988_PWR2) & 0x180) |
5409fb4e MB |
191 | adctl2 &= ~0x4; |
192 | else | |
193 | adctl2 |= 0x4; | |
194 | ||
17a52fd6 | 195 | return snd_soc_write(codec, WM8988_ADCTL2, adctl2); |
5409fb4e MB |
196 | } |
197 | ||
198 | static const char *wm8988_line_texts[] = { | |
199 | "Line 1", "Line 2", "PGA", "Differential"}; | |
200 | ||
201 | static const unsigned int wm8988_line_values[] = { | |
202 | 0, 1, 3, 4}; | |
203 | ||
204 | static const struct soc_enum wm8988_lline_enum = | |
205 | SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7, | |
206 | ARRAY_SIZE(wm8988_line_texts), | |
207 | wm8988_line_texts, | |
208 | wm8988_line_values); | |
209 | static const struct snd_kcontrol_new wm8988_left_line_controls = | |
210 | SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum); | |
211 | ||
212 | static const struct soc_enum wm8988_rline_enum = | |
213 | SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7, | |
214 | ARRAY_SIZE(wm8988_line_texts), | |
215 | wm8988_line_texts, | |
216 | wm8988_line_values); | |
217 | static const struct snd_kcontrol_new wm8988_right_line_controls = | |
218 | SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum); | |
219 | ||
220 | /* Left Mixer */ | |
221 | static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = { | |
222 | SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0), | |
223 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0), | |
224 | SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0), | |
225 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0), | |
226 | }; | |
227 | ||
228 | /* Right Mixer */ | |
229 | static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = { | |
230 | SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0), | |
231 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0), | |
232 | SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0), | |
233 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0), | |
234 | }; | |
235 | ||
236 | static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"}; | |
237 | static const unsigned int wm8988_pga_val[] = { 0, 1, 3 }; | |
238 | ||
239 | /* Left PGA Mux */ | |
240 | static const struct soc_enum wm8988_lpga_enum = | |
241 | SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3, | |
242 | ARRAY_SIZE(wm8988_pga_sel), | |
243 | wm8988_pga_sel, | |
244 | wm8988_pga_val); | |
245 | static const struct snd_kcontrol_new wm8988_left_pga_controls = | |
246 | SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum); | |
247 | ||
248 | /* Right PGA Mux */ | |
249 | static const struct soc_enum wm8988_rpga_enum = | |
250 | SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3, | |
251 | ARRAY_SIZE(wm8988_pga_sel), | |
252 | wm8988_pga_sel, | |
253 | wm8988_pga_val); | |
254 | static const struct snd_kcontrol_new wm8988_right_pga_controls = | |
255 | SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum); | |
256 | ||
257 | /* Differential Mux */ | |
258 | static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"}; | |
259 | static const struct soc_enum diffmux = | |
260 | SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel); | |
261 | static const struct snd_kcontrol_new wm8988_diffmux_controls = | |
262 | SOC_DAPM_ENUM("Route", diffmux); | |
263 | ||
264 | /* Mono ADC Mux */ | |
265 | static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)", | |
266 | "Mono (Right)", "Digital Mono"}; | |
267 | static const struct soc_enum monomux = | |
268 | SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux); | |
269 | static const struct snd_kcontrol_new wm8988_monomux_controls = | |
270 | SOC_DAPM_ENUM("Route", monomux); | |
271 | ||
272 | static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = { | |
273 | SND_SOC_DAPM_MICBIAS("Mic Bias", WM8988_PWR1, 1, 0), | |
274 | ||
275 | SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, | |
276 | &wm8988_diffmux_controls), | |
277 | SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, | |
278 | &wm8988_monomux_controls), | |
279 | SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, | |
280 | &wm8988_monomux_controls), | |
281 | ||
282 | SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0, | |
283 | &wm8988_left_pga_controls), | |
284 | SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0, | |
285 | &wm8988_right_pga_controls), | |
286 | ||
287 | SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, | |
288 | &wm8988_left_line_controls), | |
289 | SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, | |
290 | &wm8988_right_line_controls), | |
291 | ||
292 | SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0), | |
293 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0), | |
294 | ||
295 | SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0), | |
296 | SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0), | |
297 | ||
298 | SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, | |
299 | &wm8988_left_mixer_controls[0], | |
300 | ARRAY_SIZE(wm8988_left_mixer_controls)), | |
301 | SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, | |
302 | &wm8988_right_mixer_controls[0], | |
303 | ARRAY_SIZE(wm8988_right_mixer_controls)), | |
304 | ||
305 | SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0), | |
306 | SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0), | |
307 | SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0), | |
308 | SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0), | |
309 | ||
310 | SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control), | |
311 | ||
312 | SND_SOC_DAPM_OUTPUT("LOUT1"), | |
313 | SND_SOC_DAPM_OUTPUT("ROUT1"), | |
314 | SND_SOC_DAPM_OUTPUT("LOUT2"), | |
315 | SND_SOC_DAPM_OUTPUT("ROUT2"), | |
316 | SND_SOC_DAPM_OUTPUT("VREF"), | |
317 | ||
318 | SND_SOC_DAPM_INPUT("LINPUT1"), | |
319 | SND_SOC_DAPM_INPUT("LINPUT2"), | |
320 | SND_SOC_DAPM_INPUT("RINPUT1"), | |
321 | SND_SOC_DAPM_INPUT("RINPUT2"), | |
322 | }; | |
323 | ||
324 | static const struct snd_soc_dapm_route audio_map[] = { | |
325 | ||
326 | { "Left Line Mux", "Line 1", "LINPUT1" }, | |
327 | { "Left Line Mux", "Line 2", "LINPUT2" }, | |
328 | { "Left Line Mux", "PGA", "Left PGA Mux" }, | |
329 | { "Left Line Mux", "Differential", "Differential Mux" }, | |
330 | ||
331 | { "Right Line Mux", "Line 1", "RINPUT1" }, | |
332 | { "Right Line Mux", "Line 2", "RINPUT2" }, | |
333 | { "Right Line Mux", "PGA", "Right PGA Mux" }, | |
334 | { "Right Line Mux", "Differential", "Differential Mux" }, | |
335 | ||
336 | { "Left PGA Mux", "Line 1", "LINPUT1" }, | |
337 | { "Left PGA Mux", "Line 2", "LINPUT2" }, | |
338 | { "Left PGA Mux", "Differential", "Differential Mux" }, | |
339 | ||
340 | { "Right PGA Mux", "Line 1", "RINPUT1" }, | |
341 | { "Right PGA Mux", "Line 2", "RINPUT2" }, | |
342 | { "Right PGA Mux", "Differential", "Differential Mux" }, | |
343 | ||
344 | { "Differential Mux", "Line 1", "LINPUT1" }, | |
345 | { "Differential Mux", "Line 1", "RINPUT1" }, | |
346 | { "Differential Mux", "Line 2", "LINPUT2" }, | |
347 | { "Differential Mux", "Line 2", "RINPUT2" }, | |
348 | ||
349 | { "Left ADC Mux", "Stereo", "Left PGA Mux" }, | |
350 | { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" }, | |
351 | { "Left ADC Mux", "Digital Mono", "Left PGA Mux" }, | |
352 | ||
353 | { "Right ADC Mux", "Stereo", "Right PGA Mux" }, | |
354 | { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" }, | |
355 | { "Right ADC Mux", "Digital Mono", "Right PGA Mux" }, | |
356 | ||
357 | { "Left ADC", NULL, "Left ADC Mux" }, | |
358 | { "Right ADC", NULL, "Right ADC Mux" }, | |
359 | ||
360 | { "Left Line Mux", "Line 1", "LINPUT1" }, | |
361 | { "Left Line Mux", "Line 2", "LINPUT2" }, | |
362 | { "Left Line Mux", "PGA", "Left PGA Mux" }, | |
363 | { "Left Line Mux", "Differential", "Differential Mux" }, | |
364 | ||
365 | { "Right Line Mux", "Line 1", "RINPUT1" }, | |
366 | { "Right Line Mux", "Line 2", "RINPUT2" }, | |
367 | { "Right Line Mux", "PGA", "Right PGA Mux" }, | |
368 | { "Right Line Mux", "Differential", "Differential Mux" }, | |
369 | ||
370 | { "Left Mixer", "Playback Switch", "Left DAC" }, | |
371 | { "Left Mixer", "Left Bypass Switch", "Left Line Mux" }, | |
372 | { "Left Mixer", "Right Playback Switch", "Right DAC" }, | |
373 | { "Left Mixer", "Right Bypass Switch", "Right Line Mux" }, | |
374 | ||
375 | { "Right Mixer", "Left Playback Switch", "Left DAC" }, | |
376 | { "Right Mixer", "Left Bypass Switch", "Left Line Mux" }, | |
377 | { "Right Mixer", "Playback Switch", "Right DAC" }, | |
378 | { "Right Mixer", "Right Bypass Switch", "Right Line Mux" }, | |
379 | ||
380 | { "Left Out 1", NULL, "Left Mixer" }, | |
381 | { "LOUT1", NULL, "Left Out 1" }, | |
382 | { "Right Out 1", NULL, "Right Mixer" }, | |
383 | { "ROUT1", NULL, "Right Out 1" }, | |
384 | ||
385 | { "Left Out 2", NULL, "Left Mixer" }, | |
386 | { "LOUT2", NULL, "Left Out 2" }, | |
387 | { "Right Out 2", NULL, "Right Mixer" }, | |
388 | { "ROUT2", NULL, "Right Out 2" }, | |
389 | }; | |
390 | ||
391 | struct _coeff_div { | |
392 | u32 mclk; | |
393 | u32 rate; | |
394 | u16 fs; | |
395 | u8 sr:5; | |
396 | u8 usb:1; | |
397 | }; | |
398 | ||
399 | /* codec hifi mclk clock divider coefficients */ | |
400 | static const struct _coeff_div coeff_div[] = { | |
401 | /* 8k */ | |
402 | {12288000, 8000, 1536, 0x6, 0x0}, | |
403 | {11289600, 8000, 1408, 0x16, 0x0}, | |
404 | {18432000, 8000, 2304, 0x7, 0x0}, | |
405 | {16934400, 8000, 2112, 0x17, 0x0}, | |
406 | {12000000, 8000, 1500, 0x6, 0x1}, | |
407 | ||
408 | /* 11.025k */ | |
409 | {11289600, 11025, 1024, 0x18, 0x0}, | |
410 | {16934400, 11025, 1536, 0x19, 0x0}, | |
411 | {12000000, 11025, 1088, 0x19, 0x1}, | |
412 | ||
413 | /* 16k */ | |
414 | {12288000, 16000, 768, 0xa, 0x0}, | |
415 | {18432000, 16000, 1152, 0xb, 0x0}, | |
416 | {12000000, 16000, 750, 0xa, 0x1}, | |
417 | ||
418 | /* 22.05k */ | |
419 | {11289600, 22050, 512, 0x1a, 0x0}, | |
420 | {16934400, 22050, 768, 0x1b, 0x0}, | |
421 | {12000000, 22050, 544, 0x1b, 0x1}, | |
422 | ||
423 | /* 32k */ | |
424 | {12288000, 32000, 384, 0xc, 0x0}, | |
425 | {18432000, 32000, 576, 0xd, 0x0}, | |
426 | {12000000, 32000, 375, 0xa, 0x1}, | |
427 | ||
428 | /* 44.1k */ | |
429 | {11289600, 44100, 256, 0x10, 0x0}, | |
430 | {16934400, 44100, 384, 0x11, 0x0}, | |
431 | {12000000, 44100, 272, 0x11, 0x1}, | |
432 | ||
433 | /* 48k */ | |
434 | {12288000, 48000, 256, 0x0, 0x0}, | |
435 | {18432000, 48000, 384, 0x1, 0x0}, | |
436 | {12000000, 48000, 250, 0x0, 0x1}, | |
437 | ||
438 | /* 88.2k */ | |
439 | {11289600, 88200, 128, 0x1e, 0x0}, | |
440 | {16934400, 88200, 192, 0x1f, 0x0}, | |
441 | {12000000, 88200, 136, 0x1f, 0x1}, | |
442 | ||
443 | /* 96k */ | |
444 | {12288000, 96000, 128, 0xe, 0x0}, | |
445 | {18432000, 96000, 192, 0xf, 0x0}, | |
446 | {12000000, 96000, 125, 0xe, 0x1}, | |
447 | }; | |
448 | ||
449 | static inline int get_coeff(int mclk, int rate) | |
450 | { | |
451 | int i; | |
452 | ||
453 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { | |
454 | if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) | |
455 | return i; | |
456 | } | |
457 | ||
458 | return -EINVAL; | |
459 | } | |
460 | ||
461 | /* The set of rates we can generate from the above for each SYSCLK */ | |
462 | ||
463 | static unsigned int rates_12288[] = { | |
464 | 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000, | |
465 | }; | |
466 | ||
467 | static struct snd_pcm_hw_constraint_list constraints_12288 = { | |
468 | .count = ARRAY_SIZE(rates_12288), | |
469 | .list = rates_12288, | |
470 | }; | |
471 | ||
472 | static unsigned int rates_112896[] = { | |
473 | 8000, 11025, 22050, 44100, | |
474 | }; | |
475 | ||
476 | static struct snd_pcm_hw_constraint_list constraints_112896 = { | |
477 | .count = ARRAY_SIZE(rates_112896), | |
478 | .list = rates_112896, | |
479 | }; | |
480 | ||
481 | static unsigned int rates_12[] = { | |
482 | 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000, | |
483 | 48000, 88235, 96000, | |
484 | }; | |
485 | ||
486 | static struct snd_pcm_hw_constraint_list constraints_12 = { | |
487 | .count = ARRAY_SIZE(rates_12), | |
488 | .list = rates_12, | |
489 | }; | |
490 | ||
491 | /* | |
492 | * Note that this should be called from init rather than from hw_params. | |
493 | */ | |
494 | static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
495 | int clk_id, unsigned int freq, int dir) | |
496 | { | |
497 | struct snd_soc_codec *codec = codec_dai->codec; | |
b2c812e2 | 498 | struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec); |
5409fb4e MB |
499 | |
500 | switch (freq) { | |
501 | case 11289600: | |
502 | case 18432000: | |
503 | case 22579200: | |
504 | case 36864000: | |
505 | wm8988->sysclk_constraints = &constraints_112896; | |
506 | wm8988->sysclk = freq; | |
507 | return 0; | |
508 | ||
509 | case 12288000: | |
510 | case 16934400: | |
511 | case 24576000: | |
512 | case 33868800: | |
513 | wm8988->sysclk_constraints = &constraints_12288; | |
514 | wm8988->sysclk = freq; | |
515 | return 0; | |
516 | ||
517 | case 12000000: | |
518 | case 24000000: | |
519 | wm8988->sysclk_constraints = &constraints_12; | |
520 | wm8988->sysclk = freq; | |
521 | return 0; | |
522 | } | |
523 | return -EINVAL; | |
524 | } | |
525 | ||
526 | static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
527 | unsigned int fmt) | |
528 | { | |
529 | struct snd_soc_codec *codec = codec_dai->codec; | |
530 | u16 iface = 0; | |
531 | ||
532 | /* set master/slave audio interface */ | |
533 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
534 | case SND_SOC_DAIFMT_CBM_CFM: | |
535 | iface = 0x0040; | |
536 | break; | |
537 | case SND_SOC_DAIFMT_CBS_CFS: | |
538 | break; | |
539 | default: | |
540 | return -EINVAL; | |
541 | } | |
542 | ||
543 | /* interface format */ | |
544 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
545 | case SND_SOC_DAIFMT_I2S: | |
546 | iface |= 0x0002; | |
547 | break; | |
548 | case SND_SOC_DAIFMT_RIGHT_J: | |
549 | break; | |
550 | case SND_SOC_DAIFMT_LEFT_J: | |
551 | iface |= 0x0001; | |
552 | break; | |
553 | case SND_SOC_DAIFMT_DSP_A: | |
554 | iface |= 0x0003; | |
555 | break; | |
556 | case SND_SOC_DAIFMT_DSP_B: | |
557 | iface |= 0x0013; | |
558 | break; | |
559 | default: | |
560 | return -EINVAL; | |
561 | } | |
562 | ||
563 | /* clock inversion */ | |
564 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
565 | case SND_SOC_DAIFMT_NB_NF: | |
566 | break; | |
567 | case SND_SOC_DAIFMT_IB_IF: | |
568 | iface |= 0x0090; | |
569 | break; | |
570 | case SND_SOC_DAIFMT_IB_NF: | |
571 | iface |= 0x0080; | |
572 | break; | |
573 | case SND_SOC_DAIFMT_NB_IF: | |
574 | iface |= 0x0010; | |
575 | break; | |
576 | default: | |
577 | return -EINVAL; | |
578 | } | |
579 | ||
17a52fd6 | 580 | snd_soc_write(codec, WM8988_IFACE, iface); |
5409fb4e MB |
581 | return 0; |
582 | } | |
583 | ||
584 | static int wm8988_pcm_startup(struct snd_pcm_substream *substream, | |
585 | struct snd_soc_dai *dai) | |
586 | { | |
587 | struct snd_soc_codec *codec = dai->codec; | |
b2c812e2 | 588 | struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec); |
5409fb4e MB |
589 | |
590 | /* The set of sample rates that can be supported depends on the | |
591 | * MCLK supplied to the CODEC - enforce this. | |
592 | */ | |
593 | if (!wm8988->sysclk) { | |
594 | dev_err(codec->dev, | |
595 | "No MCLK configured, call set_sysclk() on init\n"); | |
596 | return -EINVAL; | |
597 | } | |
598 | ||
599 | snd_pcm_hw_constraint_list(substream->runtime, 0, | |
600 | SNDRV_PCM_HW_PARAM_RATE, | |
601 | wm8988->sysclk_constraints); | |
602 | ||
603 | return 0; | |
604 | } | |
605 | ||
606 | static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream, | |
607 | struct snd_pcm_hw_params *params, | |
608 | struct snd_soc_dai *dai) | |
609 | { | |
610 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
611 | struct snd_soc_device *socdev = rtd->socdev; | |
612 | struct snd_soc_codec *codec = socdev->card->codec; | |
b2c812e2 | 613 | struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec); |
17a52fd6 MB |
614 | u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3; |
615 | u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180; | |
5409fb4e MB |
616 | int coeff; |
617 | ||
618 | coeff = get_coeff(wm8988->sysclk, params_rate(params)); | |
619 | if (coeff < 0) { | |
620 | coeff = get_coeff(wm8988->sysclk / 2, params_rate(params)); | |
621 | srate |= 0x40; | |
622 | } | |
623 | if (coeff < 0) { | |
624 | dev_err(codec->dev, | |
625 | "Unable to configure sample rate %dHz with %dHz MCLK\n", | |
626 | params_rate(params), wm8988->sysclk); | |
627 | return coeff; | |
628 | } | |
629 | ||
630 | /* bit size */ | |
631 | switch (params_format(params)) { | |
632 | case SNDRV_PCM_FORMAT_S16_LE: | |
633 | break; | |
634 | case SNDRV_PCM_FORMAT_S20_3LE: | |
635 | iface |= 0x0004; | |
636 | break; | |
637 | case SNDRV_PCM_FORMAT_S24_LE: | |
638 | iface |= 0x0008; | |
639 | break; | |
640 | case SNDRV_PCM_FORMAT_S32_LE: | |
641 | iface |= 0x000c; | |
642 | break; | |
643 | } | |
644 | ||
645 | /* set iface & srate */ | |
17a52fd6 | 646 | snd_soc_write(codec, WM8988_IFACE, iface); |
5409fb4e | 647 | if (coeff >= 0) |
17a52fd6 | 648 | snd_soc_write(codec, WM8988_SRATE, srate | |
5409fb4e MB |
649 | (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); |
650 | ||
651 | return 0; | |
652 | } | |
653 | ||
654 | static int wm8988_mute(struct snd_soc_dai *dai, int mute) | |
655 | { | |
656 | struct snd_soc_codec *codec = dai->codec; | |
17a52fd6 | 657 | u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7; |
5409fb4e MB |
658 | |
659 | if (mute) | |
17a52fd6 | 660 | snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8); |
5409fb4e | 661 | else |
17a52fd6 | 662 | snd_soc_write(codec, WM8988_ADCDAC, mute_reg); |
5409fb4e MB |
663 | return 0; |
664 | } | |
665 | ||
666 | static int wm8988_set_bias_level(struct snd_soc_codec *codec, | |
667 | enum snd_soc_bias_level level) | |
668 | { | |
17a52fd6 | 669 | u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1; |
5409fb4e MB |
670 | |
671 | switch (level) { | |
672 | case SND_SOC_BIAS_ON: | |
673 | break; | |
674 | ||
675 | case SND_SOC_BIAS_PREPARE: | |
676 | /* VREF, VMID=2x50k, digital enabled */ | |
17a52fd6 | 677 | snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0); |
5409fb4e MB |
678 | break; |
679 | ||
680 | case SND_SOC_BIAS_STANDBY: | |
681 | if (codec->bias_level == SND_SOC_BIAS_OFF) { | |
682 | /* VREF, VMID=2x5k */ | |
17a52fd6 | 683 | snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1); |
5409fb4e MB |
684 | |
685 | /* Charge caps */ | |
686 | msleep(100); | |
687 | } | |
688 | ||
689 | /* VREF, VMID=2*500k, digital stopped */ | |
17a52fd6 | 690 | snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141); |
5409fb4e MB |
691 | break; |
692 | ||
693 | case SND_SOC_BIAS_OFF: | |
17a52fd6 | 694 | snd_soc_write(codec, WM8988_PWR1, 0x0000); |
5409fb4e MB |
695 | break; |
696 | } | |
697 | codec->bias_level = level; | |
698 | return 0; | |
699 | } | |
700 | ||
701 | #define WM8988_RATES SNDRV_PCM_RATE_8000_96000 | |
702 | ||
703 | #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
704 | SNDRV_PCM_FMTBIT_S24_LE) | |
705 | ||
706 | static struct snd_soc_dai_ops wm8988_ops = { | |
707 | .startup = wm8988_pcm_startup, | |
708 | .hw_params = wm8988_pcm_hw_params, | |
709 | .set_fmt = wm8988_set_dai_fmt, | |
710 | .set_sysclk = wm8988_set_dai_sysclk, | |
711 | .digital_mute = wm8988_mute, | |
712 | }; | |
713 | ||
714 | struct snd_soc_dai wm8988_dai = { | |
715 | .name = "WM8988", | |
716 | .playback = { | |
717 | .stream_name = "Playback", | |
718 | .channels_min = 1, | |
719 | .channels_max = 2, | |
720 | .rates = WM8988_RATES, | |
721 | .formats = WM8988_FORMATS, | |
722 | }, | |
723 | .capture = { | |
724 | .stream_name = "Capture", | |
725 | .channels_min = 1, | |
726 | .channels_max = 2, | |
727 | .rates = WM8988_RATES, | |
728 | .formats = WM8988_FORMATS, | |
729 | }, | |
730 | .ops = &wm8988_ops, | |
731 | .symmetric_rates = 1, | |
732 | }; | |
733 | EXPORT_SYMBOL_GPL(wm8988_dai); | |
734 | ||
735 | static int wm8988_suspend(struct platform_device *pdev, pm_message_t state) | |
736 | { | |
737 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
738 | struct snd_soc_codec *codec = socdev->card->codec; | |
739 | ||
740 | wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
741 | return 0; | |
742 | } | |
743 | ||
744 | static int wm8988_resume(struct platform_device *pdev) | |
745 | { | |
746 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
747 | struct snd_soc_codec *codec = socdev->card->codec; | |
748 | int i; | |
749 | u8 data[2]; | |
750 | u16 *cache = codec->reg_cache; | |
751 | ||
752 | /* Sync reg_cache with the hardware */ | |
753 | for (i = 0; i < WM8988_NUM_REG; i++) { | |
754 | if (i == WM8988_RESET) | |
755 | continue; | |
756 | data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); | |
757 | data[1] = cache[i] & 0x00ff; | |
758 | codec->hw_write(codec->control_data, data, 2); | |
759 | } | |
760 | ||
761 | wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
762 | ||
763 | return 0; | |
764 | } | |
765 | ||
766 | static struct snd_soc_codec *wm8988_codec; | |
767 | ||
768 | static int wm8988_probe(struct platform_device *pdev) | |
769 | { | |
770 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
771 | struct snd_soc_codec *codec; | |
772 | int ret = 0; | |
773 | ||
774 | if (wm8988_codec == NULL) { | |
775 | dev_err(&pdev->dev, "Codec device not registered\n"); | |
776 | return -ENODEV; | |
777 | } | |
778 | ||
779 | socdev->card->codec = wm8988_codec; | |
780 | codec = wm8988_codec; | |
781 | ||
782 | /* register pcms */ | |
783 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
784 | if (ret < 0) { | |
785 | dev_err(codec->dev, "failed to create pcms: %d\n", ret); | |
786 | goto pcm_err; | |
787 | } | |
788 | ||
789 | snd_soc_add_controls(codec, wm8988_snd_controls, | |
790 | ARRAY_SIZE(wm8988_snd_controls)); | |
791 | snd_soc_dapm_new_controls(codec, wm8988_dapm_widgets, | |
792 | ARRAY_SIZE(wm8988_dapm_widgets)); | |
793 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); | |
5409fb4e | 794 | |
5409fb4e MB |
795 | return ret; |
796 | ||
5409fb4e MB |
797 | pcm_err: |
798 | return ret; | |
799 | } | |
800 | ||
801 | static int wm8988_remove(struct platform_device *pdev) | |
802 | { | |
803 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
804 | ||
805 | snd_soc_free_pcms(socdev); | |
806 | snd_soc_dapm_free(socdev); | |
807 | ||
808 | return 0; | |
809 | } | |
810 | ||
811 | struct snd_soc_codec_device soc_codec_dev_wm8988 = { | |
812 | .probe = wm8988_probe, | |
813 | .remove = wm8988_remove, | |
814 | .suspend = wm8988_suspend, | |
815 | .resume = wm8988_resume, | |
816 | }; | |
817 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8988); | |
818 | ||
7084a42b MB |
819 | static int wm8988_register(struct wm8988_priv *wm8988, |
820 | enum snd_soc_control_type control) | |
5409fb4e MB |
821 | { |
822 | struct snd_soc_codec *codec = &wm8988->codec; | |
823 | int ret; | |
824 | u16 reg; | |
825 | ||
826 | if (wm8988_codec) { | |
827 | dev_err(codec->dev, "Another WM8988 is registered\n"); | |
828 | ret = -EINVAL; | |
829 | goto err; | |
830 | } | |
831 | ||
832 | mutex_init(&codec->mutex); | |
833 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
834 | INIT_LIST_HEAD(&codec->dapm_paths); | |
835 | ||
b2c812e2 | 836 | snd_soc_codec_set_drvdata(codec, wm8988); |
5409fb4e MB |
837 | codec->name = "WM8988"; |
838 | codec->owner = THIS_MODULE; | |
5409fb4e MB |
839 | codec->dai = &wm8988_dai; |
840 | codec->num_dai = 1; | |
841 | codec->reg_cache_size = ARRAY_SIZE(wm8988->reg_cache); | |
842 | codec->reg_cache = &wm8988->reg_cache; | |
843 | codec->bias_level = SND_SOC_BIAS_OFF; | |
844 | codec->set_bias_level = wm8988_set_bias_level; | |
845 | ||
846 | memcpy(codec->reg_cache, wm8988_reg, | |
847 | sizeof(wm8988_reg)); | |
848 | ||
7084a42b | 849 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, control); |
17a52fd6 MB |
850 | if (ret < 0) { |
851 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | |
852 | goto err; | |
853 | } | |
854 | ||
5409fb4e MB |
855 | ret = wm8988_reset(codec); |
856 | if (ret < 0) { | |
857 | dev_err(codec->dev, "Failed to issue reset\n"); | |
5420f307 | 858 | goto err; |
5409fb4e MB |
859 | } |
860 | ||
861 | /* set the update bits (we always update left then right) */ | |
17a52fd6 MB |
862 | reg = snd_soc_read(codec, WM8988_RADC); |
863 | snd_soc_write(codec, WM8988_RADC, reg | 0x100); | |
864 | reg = snd_soc_read(codec, WM8988_RDAC); | |
865 | snd_soc_write(codec, WM8988_RDAC, reg | 0x0100); | |
866 | reg = snd_soc_read(codec, WM8988_ROUT1V); | |
867 | snd_soc_write(codec, WM8988_ROUT1V, reg | 0x0100); | |
868 | reg = snd_soc_read(codec, WM8988_ROUT2V); | |
869 | snd_soc_write(codec, WM8988_ROUT2V, reg | 0x0100); | |
870 | reg = snd_soc_read(codec, WM8988_RINVOL); | |
871 | snd_soc_write(codec, WM8988_RINVOL, reg | 0x0100); | |
5409fb4e MB |
872 | |
873 | wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_STANDBY); | |
874 | ||
875 | wm8988_dai.dev = codec->dev; | |
876 | ||
877 | wm8988_codec = codec; | |
878 | ||
879 | ret = snd_soc_register_codec(codec); | |
880 | if (ret != 0) { | |
881 | dev_err(codec->dev, "Failed to register codec: %d\n", ret); | |
5420f307 | 882 | goto err; |
5409fb4e MB |
883 | } |
884 | ||
885 | ret = snd_soc_register_dai(&wm8988_dai); | |
886 | if (ret != 0) { | |
887 | dev_err(codec->dev, "Failed to register DAI: %d\n", ret); | |
5420f307 | 888 | goto err_codec; |
5409fb4e MB |
889 | } |
890 | ||
891 | return 0; | |
892 | ||
5420f307 MB |
893 | err_codec: |
894 | snd_soc_unregister_codec(codec); | |
5409fb4e MB |
895 | err: |
896 | kfree(wm8988); | |
897 | return ret; | |
898 | } | |
899 | ||
900 | static void wm8988_unregister(struct wm8988_priv *wm8988) | |
901 | { | |
902 | wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_OFF); | |
903 | snd_soc_unregister_dai(&wm8988_dai); | |
904 | snd_soc_unregister_codec(&wm8988->codec); | |
905 | kfree(wm8988); | |
906 | wm8988_codec = NULL; | |
907 | } | |
908 | ||
909 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
910 | static int wm8988_i2c_probe(struct i2c_client *i2c, | |
911 | const struct i2c_device_id *id) | |
912 | { | |
913 | struct wm8988_priv *wm8988; | |
914 | struct snd_soc_codec *codec; | |
915 | ||
916 | wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL); | |
917 | if (wm8988 == NULL) | |
918 | return -ENOMEM; | |
919 | ||
920 | codec = &wm8988->codec; | |
5409fb4e MB |
921 | |
922 | i2c_set_clientdata(i2c, wm8988); | |
923 | codec->control_data = i2c; | |
924 | ||
925 | codec->dev = &i2c->dev; | |
926 | ||
7084a42b | 927 | return wm8988_register(wm8988, SND_SOC_I2C); |
5409fb4e MB |
928 | } |
929 | ||
930 | static int wm8988_i2c_remove(struct i2c_client *client) | |
931 | { | |
932 | struct wm8988_priv *wm8988 = i2c_get_clientdata(client); | |
933 | wm8988_unregister(wm8988); | |
934 | return 0; | |
935 | } | |
936 | ||
937 | static const struct i2c_device_id wm8988_i2c_id[] = { | |
938 | { "wm8988", 0 }, | |
939 | { } | |
940 | }; | |
941 | MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id); | |
942 | ||
943 | static struct i2c_driver wm8988_i2c_driver = { | |
944 | .driver = { | |
945 | .name = "WM8988", | |
946 | .owner = THIS_MODULE, | |
947 | }, | |
948 | .probe = wm8988_i2c_probe, | |
949 | .remove = wm8988_i2c_remove, | |
950 | .id_table = wm8988_i2c_id, | |
951 | }; | |
952 | #endif | |
953 | ||
954 | #if defined(CONFIG_SPI_MASTER) | |
5409fb4e MB |
955 | static int __devinit wm8988_spi_probe(struct spi_device *spi) |
956 | { | |
957 | struct wm8988_priv *wm8988; | |
958 | struct snd_soc_codec *codec; | |
959 | ||
960 | wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL); | |
961 | if (wm8988 == NULL) | |
962 | return -ENOMEM; | |
963 | ||
964 | codec = &wm8988->codec; | |
5409fb4e MB |
965 | codec->control_data = spi; |
966 | codec->dev = &spi->dev; | |
967 | ||
864e1e8d | 968 | dev_set_drvdata(&spi->dev, wm8988); |
5409fb4e | 969 | |
7084a42b | 970 | return wm8988_register(wm8988, SND_SOC_SPI); |
5409fb4e MB |
971 | } |
972 | ||
973 | static int __devexit wm8988_spi_remove(struct spi_device *spi) | |
974 | { | |
864e1e8d | 975 | struct wm8988_priv *wm8988 = dev_get_drvdata(&spi->dev); |
5409fb4e MB |
976 | |
977 | wm8988_unregister(wm8988); | |
978 | ||
979 | return 0; | |
980 | } | |
981 | ||
982 | static struct spi_driver wm8988_spi_driver = { | |
983 | .driver = { | |
984 | .name = "wm8988", | |
985 | .bus = &spi_bus_type, | |
986 | .owner = THIS_MODULE, | |
987 | }, | |
988 | .probe = wm8988_spi_probe, | |
989 | .remove = __devexit_p(wm8988_spi_remove), | |
990 | }; | |
991 | #endif | |
992 | ||
993 | static int __init wm8988_modinit(void) | |
994 | { | |
995 | int ret; | |
996 | ||
997 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
998 | ret = i2c_add_driver(&wm8988_i2c_driver); | |
999 | if (ret != 0) | |
1000 | pr_err("WM8988: Unable to register I2C driver: %d\n", ret); | |
1001 | #endif | |
1002 | #if defined(CONFIG_SPI_MASTER) | |
1003 | ret = spi_register_driver(&wm8988_spi_driver); | |
1004 | if (ret != 0) | |
1005 | pr_err("WM8988: Unable to register SPI driver: %d\n", ret); | |
1006 | #endif | |
1007 | return ret; | |
1008 | } | |
1009 | module_init(wm8988_modinit); | |
1010 | ||
1011 | static void __exit wm8988_exit(void) | |
1012 | { | |
1013 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
1014 | i2c_del_driver(&wm8988_i2c_driver); | |
1015 | #endif | |
1016 | #if defined(CONFIG_SPI_MASTER) | |
1017 | spi_unregister_driver(&wm8988_spi_driver); | |
1018 | #endif | |
1019 | } | |
1020 | module_exit(wm8988_exit); | |
1021 | ||
1022 | ||
1023 | MODULE_DESCRIPTION("ASoC WM8988 driver"); | |
1024 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | |
1025 | MODULE_LICENSE("GPL"); |