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1 | /* |
2 | * wm8990.c -- WM8990 ALSA Soc Audio driver | |
3 | * | |
4 | * Copyright 2008 Wolfson Microelectronics PLC. | |
5 | * Author: Liam Girdwood | |
6 | * lg@opensource.wolfsonmicro.com or linux@wolfsonmicro.com | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pm.h> | |
20 | #include <linux/i2c.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <sound/core.h> | |
23 | #include <sound/pcm.h> | |
24 | #include <sound/pcm_params.h> | |
25 | #include <sound/soc.h> | |
26 | #include <sound/soc-dapm.h> | |
27 | #include <sound/initval.h> | |
28 | #include <sound/tlv.h> | |
29 | #include <asm/div64.h> | |
30 | ||
31 | #include "wm8990.h" | |
32 | ||
33 | #define AUDIO_NAME "wm8990" | |
34 | #define WM8990_VERSION "0.2" | |
35 | ||
36 | /* | |
37 | * Debug | |
38 | */ | |
39 | ||
40 | #define WM8990_DEBUG 0 | |
41 | ||
42 | #ifdef WM8990_DEBUG | |
43 | #define dbg(format, arg...) \ | |
44 | printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg) | |
45 | #else | |
46 | #define dbg(format, arg...) do {} while (0) | |
47 | #endif | |
48 | #define err(format, arg...) \ | |
49 | printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg) | |
50 | #define info(format, arg...) \ | |
51 | printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg) | |
52 | #define warn(format, arg...) \ | |
53 | printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg) | |
54 | ||
55 | /* codec private data */ | |
56 | struct wm8990_priv { | |
57 | unsigned int sysclk; | |
58 | unsigned int pcmclk; | |
59 | }; | |
60 | ||
61 | /* | |
62 | * wm8990 register cache. Note that register 0 is not included in the | |
63 | * cache. | |
64 | */ | |
65 | static const u16 wm8990_reg[] = { | |
66 | 0x8990, /* R0 - Reset */ | |
67 | 0x0000, /* R1 - Power Management (1) */ | |
68 | 0x6000, /* R2 - Power Management (2) */ | |
69 | 0x0000, /* R3 - Power Management (3) */ | |
70 | 0x4050, /* R4 - Audio Interface (1) */ | |
71 | 0x4000, /* R5 - Audio Interface (2) */ | |
72 | 0x01C8, /* R6 - Clocking (1) */ | |
73 | 0x0000, /* R7 - Clocking (2) */ | |
74 | 0x0040, /* R8 - Audio Interface (3) */ | |
75 | 0x0040, /* R9 - Audio Interface (4) */ | |
76 | 0x0004, /* R10 - DAC CTRL */ | |
77 | 0x00C0, /* R11 - Left DAC Digital Volume */ | |
78 | 0x00C0, /* R12 - Right DAC Digital Volume */ | |
79 | 0x0000, /* R13 - Digital Side Tone */ | |
80 | 0x0100, /* R14 - ADC CTRL */ | |
81 | 0x00C0, /* R15 - Left ADC Digital Volume */ | |
82 | 0x00C0, /* R16 - Right ADC Digital Volume */ | |
83 | 0x0000, /* R17 */ | |
84 | 0x0000, /* R18 - GPIO CTRL 1 */ | |
85 | 0x1000, /* R19 - GPIO1 & GPIO2 */ | |
86 | 0x1010, /* R20 - GPIO3 & GPIO4 */ | |
87 | 0x1010, /* R21 - GPIO5 & GPIO6 */ | |
88 | 0x8000, /* R22 - GPIOCTRL 2 */ | |
89 | 0x0800, /* R23 - GPIO_POL */ | |
90 | 0x008B, /* R24 - Left Line Input 1&2 Volume */ | |
91 | 0x008B, /* R25 - Left Line Input 3&4 Volume */ | |
92 | 0x008B, /* R26 - Right Line Input 1&2 Volume */ | |
93 | 0x008B, /* R27 - Right Line Input 3&4 Volume */ | |
94 | 0x0000, /* R28 - Left Output Volume */ | |
95 | 0x0000, /* R29 - Right Output Volume */ | |
96 | 0x0066, /* R30 - Line Outputs Volume */ | |
97 | 0x0022, /* R31 - Out3/4 Volume */ | |
98 | 0x0079, /* R32 - Left OPGA Volume */ | |
99 | 0x0079, /* R33 - Right OPGA Volume */ | |
100 | 0x0003, /* R34 - Speaker Volume */ | |
101 | 0x0003, /* R35 - ClassD1 */ | |
102 | 0x0000, /* R36 */ | |
103 | 0x0100, /* R37 - ClassD3 */ | |
104 | 0x0000, /* R38 */ | |
105 | 0x0000, /* R39 - Input Mixer1 */ | |
106 | 0x0000, /* R40 - Input Mixer2 */ | |
107 | 0x0000, /* R41 - Input Mixer3 */ | |
108 | 0x0000, /* R42 - Input Mixer4 */ | |
109 | 0x0000, /* R43 - Input Mixer5 */ | |
110 | 0x0000, /* R44 - Input Mixer6 */ | |
111 | 0x0000, /* R45 - Output Mixer1 */ | |
112 | 0x0000, /* R46 - Output Mixer2 */ | |
113 | 0x0000, /* R47 - Output Mixer3 */ | |
114 | 0x0000, /* R48 - Output Mixer4 */ | |
115 | 0x0000, /* R49 - Output Mixer5 */ | |
116 | 0x0000, /* R50 - Output Mixer6 */ | |
117 | 0x0180, /* R51 - Out3/4 Mixer */ | |
118 | 0x0000, /* R52 - Line Mixer1 */ | |
119 | 0x0000, /* R53 - Line Mixer2 */ | |
120 | 0x0000, /* R54 - Speaker Mixer */ | |
121 | 0x0000, /* R55 - Additional Control */ | |
122 | 0x0000, /* R56 - AntiPOP1 */ | |
123 | 0x0000, /* R57 - AntiPOP2 */ | |
124 | 0x0000, /* R58 - MICBIAS */ | |
125 | 0x0000, /* R59 */ | |
126 | 0x0008, /* R60 - PLL1 */ | |
127 | 0x0031, /* R61 - PLL2 */ | |
128 | 0x0026, /* R62 - PLL3 */ | |
129 | }; | |
130 | ||
131 | /* | |
132 | * read wm8990 register cache | |
133 | */ | |
134 | static inline unsigned int wm8990_read_reg_cache(struct snd_soc_codec *codec, | |
135 | unsigned int reg) | |
136 | { | |
137 | u16 *cache = codec->reg_cache; | |
138 | BUG_ON(reg > (ARRAY_SIZE(wm8990_reg)) - 1); | |
139 | return cache[reg]; | |
140 | } | |
141 | ||
142 | /* | |
143 | * write wm8990 register cache | |
144 | */ | |
145 | static inline void wm8990_write_reg_cache(struct snd_soc_codec *codec, | |
146 | unsigned int reg, unsigned int value) | |
147 | { | |
148 | u16 *cache = codec->reg_cache; | |
149 | BUG_ON(reg > (ARRAY_SIZE(wm8990_reg)) - 1); | |
150 | ||
151 | /* Reset register is uncached */ | |
152 | if (reg == 0) | |
153 | return; | |
154 | ||
155 | cache[reg] = value; | |
156 | } | |
157 | ||
158 | /* | |
159 | * write to the wm8990 register space | |
160 | */ | |
161 | static int wm8990_write(struct snd_soc_codec *codec, unsigned int reg, | |
162 | unsigned int value) | |
163 | { | |
164 | u8 data[3]; | |
165 | ||
166 | data[0] = reg & 0xFF; | |
167 | data[1] = (value >> 8) & 0xFF; | |
168 | data[2] = value & 0xFF; | |
169 | ||
170 | wm8990_write_reg_cache(codec, reg, value); | |
171 | ||
172 | if (codec->hw_write(codec->control_data, data, 3) == 2) | |
173 | return 0; | |
174 | else | |
175 | return -EIO; | |
176 | } | |
177 | ||
178 | #define wm8990_reset(c) wm8990_write(c, WM8990_RESET, 0) | |
179 | ||
180 | static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600); | |
181 | ||
182 | static const DECLARE_TLV_DB_LINEAR(in_pga_tlv, -1650, 3000); | |
183 | ||
184 | static const DECLARE_TLV_DB_LINEAR(out_mix_tlv, 0, -2100); | |
185 | ||
186 | static const DECLARE_TLV_DB_LINEAR(out_pga_tlv, -7300, 600); | |
187 | ||
188 | static const DECLARE_TLV_DB_LINEAR(out_omix_tlv, -600, 0); | |
189 | ||
190 | static const DECLARE_TLV_DB_LINEAR(out_dac_tlv, -7163, 0); | |
191 | ||
192 | static const DECLARE_TLV_DB_LINEAR(in_adc_tlv, -7163, 1763); | |
193 | ||
194 | static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv, -3600, 0); | |
195 | ||
196 | static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, | |
197 | struct snd_ctl_elem_value *ucontrol) | |
198 | { | |
199 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
200 | int reg = kcontrol->private_value & 0xff; | |
201 | int ret; | |
202 | u16 val; | |
203 | ||
204 | ret = snd_soc_put_volsw(kcontrol, ucontrol); | |
205 | if (ret < 0) | |
206 | return ret; | |
207 | ||
208 | /* now hit the volume update bits (always bit 8) */ | |
209 | val = wm8990_read_reg_cache(codec, reg); | |
210 | return wm8990_write(codec, reg, val | 0x0100); | |
211 | } | |
212 | ||
213 | #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ | |
214 | tlv_array) {\ | |
215 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
216 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
217 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
218 | .tlv.p = (tlv_array), \ | |
219 | .info = snd_soc_info_volsw, \ | |
220 | .get = snd_soc_get_volsw, .put = wm899x_outpga_put_volsw_vu, \ | |
221 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } | |
222 | ||
223 | ||
224 | static const char *wm8990_digital_sidetone[] = | |
225 | {"None", "Left ADC", "Right ADC", "Reserved"}; | |
226 | ||
227 | static const struct soc_enum wm8990_left_digital_sidetone_enum = | |
228 | SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE, | |
229 | WM8990_ADC_TO_DACL_SHIFT, | |
230 | WM8990_ADC_TO_DACL_MASK, | |
231 | wm8990_digital_sidetone); | |
232 | ||
233 | static const struct soc_enum wm8990_right_digital_sidetone_enum = | |
234 | SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE, | |
235 | WM8990_ADC_TO_DACR_SHIFT, | |
236 | WM8990_ADC_TO_DACR_MASK, | |
237 | wm8990_digital_sidetone); | |
238 | ||
239 | static const char *wm8990_adcmode[] = | |
240 | {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; | |
241 | ||
242 | static const struct soc_enum wm8990_right_adcmode_enum = | |
243 | SOC_ENUM_SINGLE(WM8990_ADC_CTRL, | |
244 | WM8990_ADC_HPF_CUT_SHIFT, | |
245 | WM8990_ADC_HPF_CUT_MASK, | |
246 | wm8990_adcmode); | |
247 | ||
248 | static const struct snd_kcontrol_new wm8990_snd_controls[] = { | |
249 | /* INMIXL */ | |
250 | SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L12MNBST_BIT, 1, 0), | |
251 | SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L34MNBST_BIT, 1, 0), | |
252 | /* INMIXR */ | |
253 | SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R12MNBST_BIT, 1, 0), | |
254 | SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R34MNBST_BIT, 1, 0), | |
255 | ||
256 | /* LOMIX */ | |
257 | SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, | |
258 | WM8990_LLI3LOVOL_SHIFT, WM8990_LLI3LOVOL_MASK, 1, out_mix_tlv), | |
259 | SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, | |
260 | WM8990_LR12LOVOL_SHIFT, WM8990_LR12LOVOL_MASK, 1, out_mix_tlv), | |
261 | SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, | |
262 | WM8990_LL12LOVOL_SHIFT, WM8990_LL12LOVOL_MASK, 1, out_mix_tlv), | |
263 | SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, | |
264 | WM8990_LRI3LOVOL_SHIFT, WM8990_LRI3LOVOL_MASK, 1, out_mix_tlv), | |
265 | SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, | |
266 | WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), | |
267 | SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, | |
268 | WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), | |
269 | ||
270 | /* ROMIX */ | |
271 | SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, | |
272 | WM8990_RRI3ROVOL_SHIFT, WM8990_RRI3ROVOL_MASK, 1, out_mix_tlv), | |
273 | SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, | |
274 | WM8990_RL12ROVOL_SHIFT, WM8990_RL12ROVOL_MASK, 1, out_mix_tlv), | |
275 | SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, | |
276 | WM8990_RR12ROVOL_SHIFT, WM8990_RR12ROVOL_MASK, 1, out_mix_tlv), | |
277 | SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, | |
278 | WM8990_RLI3ROVOL_SHIFT, WM8990_RLI3ROVOL_MASK, 1, out_mix_tlv), | |
279 | SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6, | |
280 | WM8990_RLBROVOL_SHIFT, WM8990_RLBROVOL_MASK, 1, out_mix_tlv), | |
281 | SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6, | |
282 | WM8990_RRBROVOL_SHIFT, WM8990_RRBROVOL_MASK, 1, out_mix_tlv), | |
283 | ||
284 | /* LOUT */ | |
285 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME, | |
286 | WM8990_LOUTVOL_SHIFT, WM8990_LOUTVOL_MASK, 0, out_pga_tlv), | |
287 | SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME, WM8990_LOZC_BIT, 1, 0), | |
288 | ||
289 | /* ROUT */ | |
290 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME, | |
291 | WM8990_ROUTVOL_SHIFT, WM8990_ROUTVOL_MASK, 0, out_pga_tlv), | |
292 | SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME, WM8990_ROZC_BIT, 1, 0), | |
293 | ||
294 | /* LOPGA */ | |
295 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME, | |
296 | WM8990_LOPGAVOL_SHIFT, WM8990_LOPGAVOL_MASK, 0, out_pga_tlv), | |
297 | SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME, | |
298 | WM8990_LOPGAZC_BIT, 1, 0), | |
299 | ||
300 | /* ROPGA */ | |
301 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME, | |
302 | WM8990_ROPGAVOL_SHIFT, WM8990_ROPGAVOL_MASK, 0, out_pga_tlv), | |
303 | SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME, | |
304 | WM8990_ROPGAZC_BIT, 1, 0), | |
305 | ||
306 | SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, | |
307 | WM8990_LONMUTE_BIT, 1, 0), | |
308 | SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, | |
309 | WM8990_LOPMUTE_BIT, 1, 0), | |
310 | SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, | |
311 | WM8990_LOATTN_BIT, 1, 0), | |
312 | SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, | |
313 | WM8990_RONMUTE_BIT, 1, 0), | |
314 | SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, | |
315 | WM8990_ROPMUTE_BIT, 1, 0), | |
316 | SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, | |
317 | WM8990_ROATTN_BIT, 1, 0), | |
318 | ||
319 | SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME, | |
320 | WM8990_OUT3MUTE_BIT, 1, 0), | |
321 | SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME, | |
322 | WM8990_OUT3ATTN_BIT, 1, 0), | |
323 | ||
324 | SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME, | |
325 | WM8990_OUT4MUTE_BIT, 1, 0), | |
326 | SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME, | |
327 | WM8990_OUT4ATTN_BIT, 1, 0), | |
328 | ||
329 | SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1, | |
330 | WM8990_CDMODE_BIT, 1, 0), | |
331 | ||
332 | SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME, | |
333 | WM8990_SPKVOL_SHIFT, WM8990_SPKVOL_MASK, 0), | |
334 | SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3, | |
335 | WM8990_DCGAIN_SHIFT, WM8990_DCGAIN_MASK, 0), | |
336 | SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3, | |
337 | WM8990_ACGAIN_SHIFT, WM8990_ACGAIN_MASK, 0), | |
338 | ||
339 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", | |
340 | WM8990_LEFT_DAC_DIGITAL_VOLUME, | |
341 | WM8990_DACL_VOL_SHIFT, | |
342 | WM8990_DACL_VOL_MASK, | |
343 | 0, | |
344 | out_dac_tlv), | |
345 | ||
346 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", | |
347 | WM8990_RIGHT_DAC_DIGITAL_VOLUME, | |
348 | WM8990_DACR_VOL_SHIFT, | |
349 | WM8990_DACR_VOL_MASK, | |
350 | 0, | |
351 | out_dac_tlv), | |
352 | ||
353 | SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum), | |
354 | SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum), | |
355 | ||
356 | SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, | |
357 | WM8990_ADCL_DAC_SVOL_SHIFT, WM8990_ADCL_DAC_SVOL_MASK, 0, | |
358 | out_sidetone_tlv), | |
359 | SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, | |
360 | WM8990_ADCR_DAC_SVOL_SHIFT, WM8990_ADCR_DAC_SVOL_MASK, 0, | |
361 | out_sidetone_tlv), | |
362 | ||
363 | SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL, | |
364 | WM8990_ADC_HPF_ENA_BIT, 1, 0), | |
365 | ||
366 | SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum), | |
367 | ||
368 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", | |
369 | WM8990_LEFT_ADC_DIGITAL_VOLUME, | |
370 | WM8990_ADCL_VOL_SHIFT, | |
371 | WM8990_ADCL_VOL_MASK, | |
372 | 0, | |
373 | in_adc_tlv), | |
374 | ||
375 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", | |
376 | WM8990_RIGHT_ADC_DIGITAL_VOLUME, | |
377 | WM8990_ADCR_VOL_SHIFT, | |
378 | WM8990_ADCR_VOL_MASK, | |
379 | 0, | |
380 | in_adc_tlv), | |
381 | ||
382 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume", | |
383 | WM8990_LEFT_LINE_INPUT_1_2_VOLUME, | |
384 | WM8990_LIN12VOL_SHIFT, | |
385 | WM8990_LIN12VOL_MASK, | |
386 | 0, | |
387 | in_pga_tlv), | |
388 | ||
389 | SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, | |
390 | WM8990_LI12ZC_BIT, 1, 0), | |
391 | ||
392 | SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, | |
393 | WM8990_LI12MUTE_BIT, 1, 0), | |
394 | ||
395 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume", | |
396 | WM8990_LEFT_LINE_INPUT_3_4_VOLUME, | |
397 | WM8990_LIN34VOL_SHIFT, | |
398 | WM8990_LIN34VOL_MASK, | |
399 | 0, | |
400 | in_pga_tlv), | |
401 | ||
402 | SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, | |
403 | WM8990_LI34ZC_BIT, 1, 0), | |
404 | ||
405 | SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, | |
406 | WM8990_LI34MUTE_BIT, 1, 0), | |
407 | ||
408 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume", | |
409 | WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, | |
410 | WM8990_RIN12VOL_SHIFT, | |
411 | WM8990_RIN12VOL_MASK, | |
412 | 0, | |
413 | in_pga_tlv), | |
414 | ||
415 | SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, | |
416 | WM8990_RI12ZC_BIT, 1, 0), | |
417 | ||
418 | SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, | |
419 | WM8990_RI12MUTE_BIT, 1, 0), | |
420 | ||
421 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume", | |
422 | WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, | |
423 | WM8990_RIN34VOL_SHIFT, | |
424 | WM8990_RIN34VOL_MASK, | |
425 | 0, | |
426 | in_pga_tlv), | |
427 | ||
428 | SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, | |
429 | WM8990_RI34ZC_BIT, 1, 0), | |
430 | ||
431 | SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, | |
432 | WM8990_RI34MUTE_BIT, 1, 0), | |
433 | ||
434 | }; | |
435 | ||
436 | /* add non dapm controls */ | |
437 | static int wm8990_add_controls(struct snd_soc_codec *codec) | |
438 | { | |
439 | int err, i; | |
440 | ||
441 | for (i = 0; i < ARRAY_SIZE(wm8990_snd_controls); i++) { | |
442 | err = snd_ctl_add(codec->card, | |
443 | snd_soc_cnew(&wm8990_snd_controls[i], codec, | |
444 | NULL)); | |
445 | if (err < 0) | |
446 | return err; | |
447 | } | |
448 | return 0; | |
449 | } | |
450 | ||
451 | /* | |
452 | * _DAPM_ Controls | |
453 | */ | |
454 | ||
455 | static int inmixer_event(struct snd_soc_dapm_widget *w, | |
456 | struct snd_kcontrol *kcontrol, int event) | |
457 | { | |
458 | u16 reg, fakepower; | |
459 | ||
460 | reg = wm8990_read_reg_cache(w->codec, WM8990_POWER_MANAGEMENT_2); | |
461 | fakepower = wm8990_read_reg_cache(w->codec, WM8990_INTDRIVBITS); | |
462 | ||
463 | if (fakepower & ((1 << WM8990_INMIXL_PWR_BIT) | | |
464 | (1 << WM8990_AINLMUX_PWR_BIT))) { | |
465 | reg |= WM8990_AINL_ENA; | |
466 | } else { | |
467 | reg &= ~WM8990_AINL_ENA; | |
468 | } | |
469 | ||
470 | if (fakepower & ((1 << WM8990_INMIXR_PWR_BIT) | | |
471 | (1 << WM8990_AINRMUX_PWR_BIT))) { | |
472 | reg |= WM8990_AINR_ENA; | |
473 | } else { | |
474 | reg &= ~WM8990_AINL_ENA; | |
475 | } | |
476 | wm8990_write(w->codec, WM8990_POWER_MANAGEMENT_2, reg); | |
477 | ||
478 | return 0; | |
479 | } | |
480 | ||
481 | static int outmixer_event(struct snd_soc_dapm_widget *w, | |
482 | struct snd_kcontrol *kcontrol, int event) | |
483 | { | |
484 | u32 reg_shift = kcontrol->private_value & 0xfff; | |
485 | int ret = 0; | |
486 | u16 reg; | |
487 | ||
488 | switch (reg_shift) { | |
489 | case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : | |
490 | reg = wm8990_read_reg_cache(w->codec, WM8990_OUTPUT_MIXER1); | |
491 | if (reg & WM8990_LDLO) { | |
492 | printk(KERN_WARNING | |
493 | "Cannot set as Output Mixer 1 LDLO Set\n"); | |
494 | ret = -1; | |
495 | } | |
496 | break; | |
497 | case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): | |
498 | reg = wm8990_read_reg_cache(w->codec, WM8990_OUTPUT_MIXER2); | |
499 | if (reg & WM8990_RDRO) { | |
500 | printk(KERN_WARNING | |
501 | "Cannot set as Output Mixer 2 RDRO Set\n"); | |
502 | ret = -1; | |
503 | } | |
504 | break; | |
505 | case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): | |
506 | reg = wm8990_read_reg_cache(w->codec, WM8990_SPEAKER_MIXER); | |
507 | if (reg & WM8990_LDSPK) { | |
508 | printk(KERN_WARNING | |
509 | "Cannot set as Speaker Mixer LDSPK Set\n"); | |
510 | ret = -1; | |
511 | } | |
512 | break; | |
513 | case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): | |
514 | reg = wm8990_read_reg_cache(w->codec, WM8990_SPEAKER_MIXER); | |
515 | if (reg & WM8990_RDSPK) { | |
516 | printk(KERN_WARNING | |
517 | "Cannot set as Speaker Mixer RDSPK Set\n"); | |
518 | ret = -1; | |
519 | } | |
520 | break; | |
521 | } | |
522 | ||
523 | return ret; | |
524 | } | |
525 | ||
526 | /* INMIX dB values */ | |
527 | static const unsigned int in_mix_tlv[] = { | |
528 | TLV_DB_RANGE_HEAD(1), | |
529 | 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600), | |
530 | }; | |
531 | ||
532 | /* Left In PGA Connections */ | |
533 | static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls[] = { | |
534 | SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2, WM8990_LMN1_BIT, 1, 0), | |
535 | SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2, WM8990_LMP2_BIT, 1, 0), | |
536 | }; | |
537 | ||
538 | static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls[] = { | |
539 | SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2, WM8990_LMN3_BIT, 1, 0), | |
540 | SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2, WM8990_LMP4_BIT, 1, 0), | |
541 | }; | |
542 | ||
543 | /* Right In PGA Connections */ | |
544 | static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls[] = { | |
545 | SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2, WM8990_RMN1_BIT, 1, 0), | |
546 | SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2, WM8990_RMP2_BIT, 1, 0), | |
547 | }; | |
548 | ||
549 | static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls[] = { | |
550 | SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2, WM8990_RMN3_BIT, 1, 0), | |
551 | SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2, WM8990_RMP4_BIT, 1, 0), | |
552 | }; | |
553 | ||
554 | /* INMIXL */ | |
555 | static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls[] = { | |
556 | SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3, | |
557 | WM8990_LDBVOL_SHIFT, WM8990_LDBVOL_MASK, 0, in_mix_tlv), | |
558 | SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5, WM8990_LI2BVOL_SHIFT, | |
559 | 7, 0, in_mix_tlv), | |
560 | SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, | |
561 | 1, 0), | |
562 | SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, | |
563 | 1, 0), | |
564 | }; | |
565 | ||
566 | /* INMIXR */ | |
567 | static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls[] = { | |
568 | SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4, | |
569 | WM8990_RDBVOL_SHIFT, WM8990_RDBVOL_MASK, 0, in_mix_tlv), | |
570 | SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6, WM8990_RI2BVOL_SHIFT, | |
571 | 7, 0, in_mix_tlv), | |
572 | SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, | |
573 | 1, 0), | |
574 | SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, | |
575 | 1, 0), | |
576 | }; | |
577 | ||
578 | /* AINLMUX */ | |
579 | static const char *wm8990_ainlmux[] = | |
580 | {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; | |
581 | ||
582 | static const struct soc_enum wm8990_ainlmux_enum = | |
583 | SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1, WM8990_AINLMODE_SHIFT, | |
584 | ARRAY_SIZE(wm8990_ainlmux), wm8990_ainlmux); | |
585 | ||
586 | static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls = | |
587 | SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum); | |
588 | ||
589 | /* DIFFINL */ | |
590 | ||
591 | /* AINRMUX */ | |
592 | static const char *wm8990_ainrmux[] = | |
593 | {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; | |
594 | ||
595 | static const struct soc_enum wm8990_ainrmux_enum = | |
596 | SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1, WM8990_AINRMODE_SHIFT, | |
597 | ARRAY_SIZE(wm8990_ainrmux), wm8990_ainrmux); | |
598 | ||
599 | static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls = | |
600 | SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum); | |
601 | ||
602 | /* RXVOICE */ | |
603 | static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls[] = { | |
604 | SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5, WM8990_LR4BVOL_SHIFT, | |
605 | WM8990_LR4BVOL_MASK, 0, in_mix_tlv), | |
606 | SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6, WM8990_RL4BVOL_SHIFT, | |
607 | WM8990_RL4BVOL_MASK, 0, in_mix_tlv), | |
608 | }; | |
609 | ||
610 | /* LOMIX */ | |
611 | static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = { | |
612 | SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1, | |
613 | WM8990_LRBLO_BIT, 1, 0), | |
614 | SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1, | |
615 | WM8990_LLBLO_BIT, 1, 0), | |
616 | SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, | |
617 | WM8990_LRI3LO_BIT, 1, 0), | |
618 | SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, | |
619 | WM8990_LLI3LO_BIT, 1, 0), | |
620 | SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, | |
621 | WM8990_LR12LO_BIT, 1, 0), | |
622 | SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, | |
623 | WM8990_LL12LO_BIT, 1, 0), | |
624 | SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1, | |
625 | WM8990_LDLO_BIT, 1, 0), | |
626 | }; | |
627 | ||
628 | /* ROMIX */ | |
629 | static const struct snd_kcontrol_new wm8990_dapm_romix_controls[] = { | |
630 | SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2, | |
631 | WM8990_RLBRO_BIT, 1, 0), | |
632 | SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2, | |
633 | WM8990_RRBRO_BIT, 1, 0), | |
634 | SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, | |
635 | WM8990_RLI3RO_BIT, 1, 0), | |
636 | SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, | |
637 | WM8990_RRI3RO_BIT, 1, 0), | |
638 | SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, | |
639 | WM8990_RL12RO_BIT, 1, 0), | |
640 | SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, | |
641 | WM8990_RR12RO_BIT, 1, 0), | |
642 | SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2, | |
643 | WM8990_RDRO_BIT, 1, 0), | |
644 | }; | |
645 | ||
646 | /* LONMIX */ | |
647 | static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls[] = { | |
648 | SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, | |
649 | WM8990_LLOPGALON_BIT, 1, 0), | |
650 | SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1, | |
651 | WM8990_LROPGALON_BIT, 1, 0), | |
652 | SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1, | |
653 | WM8990_LOPLON_BIT, 1, 0), | |
654 | }; | |
655 | ||
656 | /* LOPMIX */ | |
657 | static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls[] = { | |
658 | SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1, | |
659 | WM8990_LR12LOP_BIT, 1, 0), | |
660 | SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1, | |
661 | WM8990_LL12LOP_BIT, 1, 0), | |
662 | SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, | |
663 | WM8990_LLOPGALOP_BIT, 1, 0), | |
664 | }; | |
665 | ||
666 | /* RONMIX */ | |
667 | static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls[] = { | |
668 | SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, | |
669 | WM8990_RROPGARON_BIT, 1, 0), | |
670 | SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2, | |
671 | WM8990_RLOPGARON_BIT, 1, 0), | |
672 | SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2, | |
673 | WM8990_ROPRON_BIT, 1, 0), | |
674 | }; | |
675 | ||
676 | /* ROPMIX */ | |
677 | static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls[] = { | |
678 | SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2, | |
679 | WM8990_RL12ROP_BIT, 1, 0), | |
680 | SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2, | |
681 | WM8990_RR12ROP_BIT, 1, 0), | |
682 | SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, | |
683 | WM8990_RROPGAROP_BIT, 1, 0), | |
684 | }; | |
685 | ||
686 | /* OUT3MIX */ | |
687 | static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls[] = { | |
688 | SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, | |
689 | WM8990_LI4O3_BIT, 1, 0), | |
690 | SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER, | |
691 | WM8990_LPGAO3_BIT, 1, 0), | |
692 | }; | |
693 | ||
694 | /* OUT4MIX */ | |
695 | static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls[] = { | |
696 | SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER, | |
697 | WM8990_RPGAO4_BIT, 1, 0), | |
698 | SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, | |
699 | WM8990_RI4O4_BIT, 1, 0), | |
700 | }; | |
701 | ||
702 | /* SPKMIX */ | |
703 | static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls[] = { | |
704 | SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER, | |
705 | WM8990_LI2SPK_BIT, 1, 0), | |
706 | SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER, | |
707 | WM8990_LB2SPK_BIT, 1, 0), | |
708 | SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER, | |
709 | WM8990_LOPGASPK_BIT, 1, 0), | |
710 | SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER, | |
711 | WM8990_LDSPK_BIT, 1, 0), | |
712 | SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER, | |
713 | WM8990_RDSPK_BIT, 1, 0), | |
714 | SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER, | |
715 | WM8990_ROPGASPK_BIT, 1, 0), | |
716 | SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER, | |
717 | WM8990_RL12ROP_BIT, 1, 0), | |
718 | SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER, | |
719 | WM8990_RI2SPK_BIT, 1, 0), | |
720 | }; | |
721 | ||
722 | static const struct snd_soc_dapm_widget wm8990_dapm_widgets[] = { | |
723 | /* Input Side */ | |
724 | /* Input Lines */ | |
725 | SND_SOC_DAPM_INPUT("LIN1"), | |
726 | SND_SOC_DAPM_INPUT("LIN2"), | |
727 | SND_SOC_DAPM_INPUT("LIN3"), | |
728 | SND_SOC_DAPM_INPUT("LIN4/RXN"), | |
729 | SND_SOC_DAPM_INPUT("RIN3"), | |
730 | SND_SOC_DAPM_INPUT("RIN4/RXP"), | |
731 | SND_SOC_DAPM_INPUT("RIN1"), | |
732 | SND_SOC_DAPM_INPUT("RIN2"), | |
733 | SND_SOC_DAPM_INPUT("Internal ADC Source"), | |
734 | ||
735 | /* DACs */ | |
736 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, | |
737 | WM8990_ADCL_ENA_BIT, 0), | |
738 | SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2, | |
739 | WM8990_ADCR_ENA_BIT, 0), | |
740 | ||
741 | /* Input PGAs */ | |
742 | SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN12_ENA_BIT, | |
743 | 0, &wm8990_dapm_lin12_pga_controls[0], | |
744 | ARRAY_SIZE(wm8990_dapm_lin12_pga_controls)), | |
745 | SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN34_ENA_BIT, | |
746 | 0, &wm8990_dapm_lin34_pga_controls[0], | |
747 | ARRAY_SIZE(wm8990_dapm_lin34_pga_controls)), | |
748 | SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN12_ENA_BIT, | |
749 | 0, &wm8990_dapm_rin12_pga_controls[0], | |
750 | ARRAY_SIZE(wm8990_dapm_rin12_pga_controls)), | |
751 | SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT, | |
752 | 0, &wm8990_dapm_rin34_pga_controls[0], | |
753 | ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), | |
754 | ||
755 | /* INMIXL */ | |
756 | SND_SOC_DAPM_MIXER_E("INMIXL", WM8990_INTDRIVBITS, WM8990_INMIXL_PWR_BIT, 0, | |
757 | &wm8990_dapm_inmixl_controls[0], | |
758 | ARRAY_SIZE(wm8990_dapm_inmixl_controls), | |
759 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
760 | ||
761 | /* AINLMUX */ | |
762 | SND_SOC_DAPM_MUX_E("AILNMUX", WM8990_INTDRIVBITS, WM8990_AINLMUX_PWR_BIT, 0, | |
763 | &wm8990_dapm_ainlmux_controls, inmixer_event, | |
764 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
765 | ||
766 | /* INMIXR */ | |
767 | SND_SOC_DAPM_MIXER_E("INMIXR", WM8990_INTDRIVBITS, WM8990_INMIXR_PWR_BIT, 0, | |
768 | &wm8990_dapm_inmixr_controls[0], | |
769 | ARRAY_SIZE(wm8990_dapm_inmixr_controls), | |
770 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
771 | ||
772 | /* AINRMUX */ | |
773 | SND_SOC_DAPM_MUX_E("AIRNMUX", WM8990_INTDRIVBITS, WM8990_AINRMUX_PWR_BIT, 0, | |
774 | &wm8990_dapm_ainrmux_controls, inmixer_event, | |
775 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
776 | ||
777 | /* Output Side */ | |
778 | /* DACs */ | |
779 | SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3, | |
780 | WM8990_DACL_ENA_BIT, 0), | |
781 | SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3, | |
782 | WM8990_DACR_ENA_BIT, 0), | |
783 | ||
784 | /* LOMIX */ | |
785 | SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOMIX_ENA_BIT, | |
786 | 0, &wm8990_dapm_lomix_controls[0], | |
787 | ARRAY_SIZE(wm8990_dapm_lomix_controls), | |
788 | outmixer_event, SND_SOC_DAPM_PRE_REG), | |
789 | ||
790 | /* LONMIX */ | |
791 | SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LON_ENA_BIT, 0, | |
792 | &wm8990_dapm_lonmix_controls[0], | |
793 | ARRAY_SIZE(wm8990_dapm_lonmix_controls)), | |
794 | ||
795 | /* LOPMIX */ | |
796 | SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOP_ENA_BIT, 0, | |
797 | &wm8990_dapm_lopmix_controls[0], | |
798 | ARRAY_SIZE(wm8990_dapm_lopmix_controls)), | |
799 | ||
800 | /* OUT3MIX */ | |
801 | SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT3_ENA_BIT, 0, | |
802 | &wm8990_dapm_out3mix_controls[0], | |
803 | ARRAY_SIZE(wm8990_dapm_out3mix_controls)), | |
804 | ||
805 | /* SPKMIX */ | |
806 | SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1, WM8990_SPK_ENA_BIT, 0, | |
807 | &wm8990_dapm_spkmix_controls[0], | |
808 | ARRAY_SIZE(wm8990_dapm_spkmix_controls), outmixer_event, | |
809 | SND_SOC_DAPM_PRE_REG), | |
810 | ||
811 | /* OUT4MIX */ | |
812 | SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT4_ENA_BIT, 0, | |
813 | &wm8990_dapm_out4mix_controls[0], | |
814 | ARRAY_SIZE(wm8990_dapm_out4mix_controls)), | |
815 | ||
816 | /* ROPMIX */ | |
817 | SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROP_ENA_BIT, 0, | |
818 | &wm8990_dapm_ropmix_controls[0], | |
819 | ARRAY_SIZE(wm8990_dapm_ropmix_controls)), | |
820 | ||
821 | /* RONMIX */ | |
822 | SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_RON_ENA_BIT, 0, | |
823 | &wm8990_dapm_ronmix_controls[0], | |
824 | ARRAY_SIZE(wm8990_dapm_ronmix_controls)), | |
825 | ||
826 | /* ROMIX */ | |
827 | SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROMIX_ENA_BIT, | |
828 | 0, &wm8990_dapm_romix_controls[0], | |
829 | ARRAY_SIZE(wm8990_dapm_romix_controls), | |
830 | outmixer_event, SND_SOC_DAPM_PRE_REG), | |
831 | ||
832 | /* LOUT PGA */ | |
833 | SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_LOUT_ENA_BIT, 0, | |
834 | NULL, 0), | |
835 | ||
836 | /* ROUT PGA */ | |
837 | SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_ROUT_ENA_BIT, 0, | |
838 | NULL, 0), | |
839 | ||
840 | /* LOPGA */ | |
841 | SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3, WM8990_LOPGA_ENA_BIT, 0, | |
842 | NULL, 0), | |
843 | ||
844 | /* ROPGA */ | |
845 | SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0, | |
846 | NULL, 0), | |
847 | ||
848 | /* MICBIAS */ | |
849 | SND_SOC_DAPM_MICBIAS("MICBIAS", WM8990_POWER_MANAGEMENT_1, | |
850 | WM8990_MICBIAS_ENA_BIT, 0), | |
851 | ||
852 | SND_SOC_DAPM_OUTPUT("LON"), | |
853 | SND_SOC_DAPM_OUTPUT("LOP"), | |
854 | SND_SOC_DAPM_OUTPUT("OUT3"), | |
855 | SND_SOC_DAPM_OUTPUT("LOUT"), | |
856 | SND_SOC_DAPM_OUTPUT("SPKN"), | |
857 | SND_SOC_DAPM_OUTPUT("SPKP"), | |
858 | SND_SOC_DAPM_OUTPUT("ROUT"), | |
859 | SND_SOC_DAPM_OUTPUT("OUT4"), | |
860 | SND_SOC_DAPM_OUTPUT("ROP"), | |
861 | SND_SOC_DAPM_OUTPUT("RON"), | |
862 | ||
863 | SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), | |
864 | }; | |
865 | ||
866 | static const struct snd_soc_dapm_route audio_map[] = { | |
867 | /* Make DACs turn on when playing even if not mixed into any outputs */ | |
868 | {"Internal DAC Sink", NULL, "Left DAC"}, | |
869 | {"Internal DAC Sink", NULL, "Right DAC"}, | |
870 | ||
871 | /* Make ADCs turn on when recording even if not mixed from any inputs */ | |
872 | {"Left ADC", NULL, "Internal ADC Source"}, | |
873 | {"Right ADC", NULL, "Internal ADC Source"}, | |
874 | ||
875 | /* Input Side */ | |
876 | /* LIN12 PGA */ | |
877 | {"LIN12 PGA", "LIN1 Switch", "LIN1"}, | |
878 | {"LIN12 PGA", "LIN2 Switch", "LIN2"}, | |
879 | /* LIN34 PGA */ | |
880 | {"LIN34 PGA", "LIN3 Switch", "LIN3"}, | |
881 | {"LIN34 PGA", "LIN4 Switch", "LIN4"}, | |
882 | /* INMIXL */ | |
883 | {"INMIXL", "Record Left Volume", "LOMIX"}, | |
884 | {"INMIXL", "LIN2 Volume", "LIN2"}, | |
885 | {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, | |
886 | {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, | |
887 | /* AILNMUX */ | |
888 | {"AILNMUX", "INMIXL Mix", "INMIXL"}, | |
889 | {"AILNMUX", "DIFFINL Mix", "LIN12PGA"}, | |
890 | {"AILNMUX", "DIFFINL Mix", "LIN34PGA"}, | |
891 | {"AILNMUX", "RXVOICE Mix", "LIN4/RXN"}, | |
892 | {"AILNMUX", "RXVOICE Mix", "RIN4/RXP"}, | |
893 | /* ADC */ | |
894 | {"Left ADC", NULL, "AILNMUX"}, | |
895 | ||
896 | /* RIN12 PGA */ | |
897 | {"RIN12 PGA", "RIN1 Switch", "RIN1"}, | |
898 | {"RIN12 PGA", "RIN2 Switch", "RIN2"}, | |
899 | /* RIN34 PGA */ | |
900 | {"RIN34 PGA", "RIN3 Switch", "RIN3"}, | |
901 | {"RIN34 PGA", "RIN4 Switch", "RIN4"}, | |
902 | /* INMIXL */ | |
903 | {"INMIXR", "Record Right Volume", "ROMIX"}, | |
904 | {"INMIXR", "RIN2 Volume", "RIN2"}, | |
905 | {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, | |
906 | {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, | |
907 | /* AIRNMUX */ | |
908 | {"AIRNMUX", "INMIXR Mix", "INMIXR"}, | |
909 | {"AIRNMUX", "DIFFINR Mix", "RIN12PGA"}, | |
910 | {"AIRNMUX", "DIFFINR Mix", "RIN34PGA"}, | |
911 | {"AIRNMUX", "RXVOICE Mix", "RIN4/RXN"}, | |
912 | {"AIRNMUX", "RXVOICE Mix", "RIN4/RXP"}, | |
913 | /* ADC */ | |
914 | {"Right ADC", NULL, "AIRNMUX"}, | |
915 | ||
916 | /* LOMIX */ | |
917 | {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, | |
918 | {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, | |
919 | {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, | |
920 | {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, | |
921 | {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"}, | |
922 | {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"}, | |
923 | {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, | |
924 | ||
925 | /* ROMIX */ | |
926 | {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, | |
927 | {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, | |
928 | {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, | |
929 | {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, | |
930 | {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"}, | |
931 | {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"}, | |
932 | {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, | |
933 | ||
934 | /* SPKMIX */ | |
935 | {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, | |
936 | {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, | |
937 | {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"}, | |
938 | {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"}, | |
939 | {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, | |
940 | {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, | |
941 | {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, | |
942 | {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"}, | |
943 | ||
944 | /* LONMIX */ | |
945 | {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, | |
946 | {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, | |
947 | {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, | |
948 | ||
949 | /* LOPMIX */ | |
950 | {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, | |
951 | {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, | |
952 | {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, | |
953 | ||
954 | /* OUT3MIX */ | |
955 | {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXP"}, | |
956 | {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, | |
957 | ||
958 | /* OUT4MIX */ | |
959 | {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, | |
960 | {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"}, | |
961 | ||
962 | /* RONMIX */ | |
963 | {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, | |
964 | {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, | |
965 | {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, | |
966 | ||
967 | /* ROPMIX */ | |
968 | {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, | |
969 | {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, | |
970 | {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, | |
971 | ||
972 | /* Out Mixer PGAs */ | |
973 | {"LOPGA", NULL, "LOMIX"}, | |
974 | {"ROPGA", NULL, "ROMIX"}, | |
975 | ||
976 | {"LOUT PGA", NULL, "LOMIX"}, | |
977 | {"ROUT PGA", NULL, "ROMIX"}, | |
978 | ||
979 | /* Output Pins */ | |
980 | {"LON", NULL, "LONMIX"}, | |
981 | {"LOP", NULL, "LOPMIX"}, | |
982 | {"OUT", NULL, "OUT3MIX"}, | |
983 | {"LOUT", NULL, "LOUT PGA"}, | |
984 | {"SPKN", NULL, "SPKMIX"}, | |
985 | {"ROUT", NULL, "ROUT PGA"}, | |
986 | {"OUT4", NULL, "OUT4MIX"}, | |
987 | {"ROP", NULL, "ROPMIX"}, | |
988 | {"RON", NULL, "RONMIX"}, | |
989 | }; | |
990 | ||
991 | static int wm8990_add_widgets(struct snd_soc_codec *codec) | |
992 | { | |
993 | snd_soc_dapm_new_controls(codec, wm8990_dapm_widgets, | |
994 | ARRAY_SIZE(wm8990_dapm_widgets)); | |
995 | ||
996 | /* set up the WM8990 audio map */ | |
997 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); | |
998 | ||
999 | snd_soc_dapm_new_widgets(codec); | |
1000 | return 0; | |
1001 | } | |
1002 | ||
1003 | /* PLL divisors */ | |
1004 | struct _pll_div { | |
1005 | u32 div2; | |
1006 | u32 n; | |
1007 | u32 k; | |
1008 | }; | |
1009 | ||
1010 | /* The size in bits of the pll divide multiplied by 10 | |
1011 | * to allow rounding later */ | |
1012 | #define FIXED_PLL_SIZE ((1 << 16) * 10) | |
1013 | ||
1014 | static void pll_factors(struct _pll_div *pll_div, unsigned int target, | |
1015 | unsigned int source) | |
1016 | { | |
1017 | u64 Kpart; | |
1018 | unsigned int K, Ndiv, Nmod; | |
1019 | ||
1020 | ||
1021 | Ndiv = target / source; | |
1022 | if (Ndiv < 6) { | |
1023 | source >>= 1; | |
1024 | pll_div->div2 = 1; | |
1025 | Ndiv = target / source; | |
1026 | } else | |
1027 | pll_div->div2 = 0; | |
1028 | ||
1029 | if ((Ndiv < 6) || (Ndiv > 12)) | |
1030 | printk(KERN_WARNING | |
1031 | "WM8990 N value outwith recommended range! N = %d\n", Ndiv); | |
1032 | ||
1033 | pll_div->n = Ndiv; | |
1034 | Nmod = target % source; | |
1035 | Kpart = FIXED_PLL_SIZE * (long long)Nmod; | |
1036 | ||
1037 | do_div(Kpart, source); | |
1038 | ||
1039 | K = Kpart & 0xFFFFFFFF; | |
1040 | ||
1041 | /* Check if we need to round */ | |
1042 | if ((K % 10) >= 5) | |
1043 | K += 5; | |
1044 | ||
1045 | /* Move down to proper range now rounding is done */ | |
1046 | K /= 10; | |
1047 | ||
1048 | pll_div->k = K; | |
1049 | } | |
1050 | ||
1051 | static int wm8990_set_dai_pll(struct snd_soc_codec_dai *codec_dai, | |
1052 | int pll_id, unsigned int freq_in, unsigned int freq_out) | |
1053 | { | |
1054 | u16 reg; | |
1055 | struct snd_soc_codec *codec = codec_dai->codec; | |
1056 | struct _pll_div pll_div; | |
1057 | ||
1058 | if (freq_in && freq_out) { | |
1059 | pll_factors(&pll_div, freq_out * 4, freq_in); | |
1060 | ||
1061 | /* Turn on PLL */ | |
1062 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); | |
1063 | reg |= WM8990_PLL_ENA; | |
1064 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg); | |
1065 | ||
1066 | /* sysclk comes from PLL */ | |
1067 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2); | |
1068 | wm8990_write(codec, WM8990_CLOCKING_2, reg | WM8990_SYSCLK_SRC); | |
1069 | ||
1070 | /* set up N , fractional mode and pre-divisor if neccessary */ | |
1071 | wm8990_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM | | |
1072 | (pll_div.div2?WM8990_PRESCALE:0)); | |
1073 | wm8990_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8)); | |
1074 | wm8990_write(codec, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); | |
1075 | } else { | |
1076 | /* Turn on PLL */ | |
1077 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); | |
1078 | reg &= ~WM8990_PLL_ENA; | |
1079 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg); | |
1080 | } | |
1081 | return 0; | |
1082 | } | |
1083 | ||
1084 | /* | |
1085 | * Clock after PLL and dividers | |
1086 | */ | |
1087 | static int wm8990_set_dai_sysclk(struct snd_soc_codec_dai *codec_dai, | |
1088 | int clk_id, unsigned int freq, int dir) | |
1089 | { | |
1090 | struct snd_soc_codec *codec = codec_dai->codec; | |
1091 | struct wm8990_priv *wm8990 = codec->private_data; | |
1092 | ||
1093 | wm8990->sysclk = freq; | |
1094 | return 0; | |
1095 | } | |
1096 | ||
1097 | /* | |
1098 | * Set's ADC and Voice DAC format. | |
1099 | */ | |
1100 | static int wm8990_set_dai_fmt(struct snd_soc_codec_dai *codec_dai, | |
1101 | unsigned int fmt) | |
1102 | { | |
1103 | struct snd_soc_codec *codec = codec_dai->codec; | |
1104 | u16 audio1, audio3; | |
1105 | ||
1106 | audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1); | |
1107 | audio3 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_3); | |
1108 | ||
1109 | /* set master/slave audio interface */ | |
1110 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
1111 | case SND_SOC_DAIFMT_CBS_CFS: | |
1112 | audio3 &= ~WM8990_AIF_MSTR1; | |
1113 | break; | |
1114 | case SND_SOC_DAIFMT_CBM_CFM: | |
1115 | audio3 |= WM8990_AIF_MSTR1; | |
1116 | break; | |
1117 | default: | |
1118 | return -EINVAL; | |
1119 | } | |
1120 | ||
1121 | audio1 &= ~WM8990_AIF_FMT_MASK; | |
1122 | ||
1123 | /* interface format */ | |
1124 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
1125 | case SND_SOC_DAIFMT_I2S: | |
1126 | audio1 |= WM8990_AIF_TMF_I2S; | |
1127 | audio1 &= ~WM8990_AIF_LRCLK_INV; | |
1128 | break; | |
1129 | case SND_SOC_DAIFMT_RIGHT_J: | |
1130 | audio1 |= WM8990_AIF_TMF_RIGHTJ; | |
1131 | audio1 &= ~WM8990_AIF_LRCLK_INV; | |
1132 | break; | |
1133 | case SND_SOC_DAIFMT_LEFT_J: | |
1134 | audio1 |= WM8990_AIF_TMF_LEFTJ; | |
1135 | audio1 &= ~WM8990_AIF_LRCLK_INV; | |
1136 | break; | |
1137 | case SND_SOC_DAIFMT_DSP_A: | |
1138 | audio1 |= WM8990_AIF_TMF_DSP; | |
1139 | audio1 &= ~WM8990_AIF_LRCLK_INV; | |
1140 | break; | |
1141 | case SND_SOC_DAIFMT_DSP_B: | |
1142 | audio1 |= WM8990_AIF_TMF_DSP | WM8990_AIF_LRCLK_INV; | |
1143 | break; | |
1144 | default: | |
1145 | return -EINVAL; | |
1146 | } | |
1147 | ||
1148 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); | |
1149 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_3, audio3); | |
1150 | return 0; | |
1151 | } | |
1152 | ||
1153 | static int wm8990_set_dai_clkdiv(struct snd_soc_codec_dai *codec_dai, | |
1154 | int div_id, int div) | |
1155 | { | |
1156 | struct snd_soc_codec *codec = codec_dai->codec; | |
1157 | u16 reg; | |
1158 | ||
1159 | switch (div_id) { | |
1160 | case WM8990_MCLK_DIV: | |
1161 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & | |
1162 | ~WM8990_MCLK_DIV_MASK; | |
1163 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); | |
1164 | break; | |
1165 | case WM8990_DACCLK_DIV: | |
1166 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & | |
1167 | ~WM8990_DAC_CLKDIV_MASK; | |
1168 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); | |
1169 | break; | |
1170 | case WM8990_ADCCLK_DIV: | |
1171 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & | |
1172 | ~WM8990_ADC_CLKDIV_MASK; | |
1173 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); | |
1174 | break; | |
1175 | case WM8990_BCLK_DIV: | |
1176 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_1) & | |
1177 | ~WM8990_BCLK_DIV_MASK; | |
1178 | wm8990_write(codec, WM8990_CLOCKING_1, reg | div); | |
1179 | break; | |
1180 | default: | |
1181 | return -EINVAL; | |
1182 | } | |
1183 | ||
1184 | return 0; | |
1185 | } | |
1186 | ||
1187 | /* | |
1188 | * Set PCM DAI bit size and sample rate. | |
1189 | */ | |
1190 | static int wm8990_hw_params(struct snd_pcm_substream *substream, | |
1191 | struct snd_pcm_hw_params *params) | |
1192 | { | |
1193 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
1194 | struct snd_soc_device *socdev = rtd->socdev; | |
1195 | struct snd_soc_codec *codec = socdev->codec; | |
1196 | u16 audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1); | |
1197 | ||
1198 | audio1 &= ~WM8990_AIF_WL_MASK; | |
1199 | /* bit size */ | |
1200 | switch (params_format(params)) { | |
1201 | case SNDRV_PCM_FORMAT_S16_LE: | |
1202 | break; | |
1203 | case SNDRV_PCM_FORMAT_S20_3LE: | |
1204 | audio1 |= WM8990_AIF_WL_20BITS; | |
1205 | break; | |
1206 | case SNDRV_PCM_FORMAT_S24_LE: | |
1207 | audio1 |= WM8990_AIF_WL_24BITS; | |
1208 | break; | |
1209 | case SNDRV_PCM_FORMAT_S32_LE: | |
1210 | audio1 |= WM8990_AIF_WL_32BITS; | |
1211 | break; | |
1212 | } | |
1213 | ||
1214 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); | |
1215 | return 0; | |
1216 | } | |
1217 | ||
1218 | static int wm8990_mute(struct snd_soc_codec_dai *dai, int mute) | |
1219 | { | |
1220 | struct snd_soc_codec *codec = dai->codec; | |
1221 | u16 val; | |
1222 | ||
1223 | val = wm8990_read_reg_cache(codec, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; | |
1224 | ||
1225 | if (mute) | |
1226 | wm8990_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); | |
1227 | else | |
1228 | wm8990_write(codec, WM8990_DAC_CTRL, val); | |
1229 | ||
1230 | return 0; | |
1231 | } | |
1232 | ||
1233 | static int wm8990_set_bias_level(struct snd_soc_codec *codec, | |
1234 | enum snd_soc_bias_level level) | |
1235 | { | |
1236 | u16 val; | |
1237 | ||
1238 | switch (level) { | |
1239 | case SND_SOC_BIAS_ON: | |
1240 | break; | |
1241 | case SND_SOC_BIAS_PREPARE: | |
1242 | break; | |
1243 | case SND_SOC_BIAS_STANDBY: | |
1244 | if (codec->bias_level == SND_SOC_BIAS_OFF) { | |
1245 | /* Enable all output discharge bits */ | |
1246 | wm8990_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | | |
1247 | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | | |
1248 | WM8990_DIS_OUT4 | WM8990_DIS_LOUT | | |
1249 | WM8990_DIS_ROUT); | |
1250 | ||
1251 | /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ | |
1252 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | |
1253 | WM8990_BUFDCOPEN | WM8990_POBCTRL | | |
1254 | WM8990_VMIDTOG); | |
1255 | ||
1256 | /* Delay to allow output caps to discharge */ | |
1257 | msleep(msecs_to_jiffies(300)); | |
1258 | ||
1259 | /* Disable VMIDTOG */ | |
1260 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | |
1261 | WM8990_BUFDCOPEN | WM8990_POBCTRL); | |
1262 | ||
1263 | /* disable all output discharge bits */ | |
1264 | wm8990_write(codec, WM8990_ANTIPOP1, 0); | |
1265 | ||
1266 | /* Enable outputs */ | |
1267 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00); | |
1268 | ||
1269 | msleep(msecs_to_jiffies(50)); | |
1270 | ||
1271 | /* Enable VMID at 2x50k */ | |
1272 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02); | |
1273 | ||
1274 | msleep(msecs_to_jiffies(100)); | |
1275 | ||
1276 | /* Enable VREF */ | |
1277 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); | |
1278 | ||
1279 | msleep(msecs_to_jiffies(600)); | |
1280 | ||
1281 | /* Enable BUFIOEN */ | |
1282 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | |
1283 | WM8990_BUFDCOPEN | WM8990_POBCTRL | | |
1284 | WM8990_BUFIOEN); | |
1285 | ||
1286 | /* Disable outputs */ | |
1287 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x3); | |
1288 | ||
1289 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ | |
1290 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN); | |
1291 | } else { | |
1292 | /* ON -> standby */ | |
1293 | ||
1294 | } | |
1295 | break; | |
1296 | ||
1297 | case SND_SOC_BIAS_OFF: | |
1298 | /* Enable POBCTRL and SOFT_ST */ | |
1299 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | |
1300 | WM8990_POBCTRL | WM8990_BUFIOEN); | |
1301 | ||
1302 | /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ | |
1303 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | |
1304 | WM8990_BUFDCOPEN | WM8990_POBCTRL | | |
1305 | WM8990_BUFIOEN); | |
1306 | ||
1307 | /* mute DAC */ | |
1308 | val = wm8990_read_reg_cache(codec, WM8990_DAC_CTRL); | |
1309 | wm8990_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); | |
1310 | ||
1311 | /* Enable any disabled outputs */ | |
1312 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); | |
1313 | ||
1314 | /* Disable VMID */ | |
1315 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01); | |
1316 | ||
1317 | msleep(msecs_to_jiffies(300)); | |
1318 | ||
1319 | /* Enable all output discharge bits */ | |
1320 | wm8990_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | | |
1321 | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | | |
1322 | WM8990_DIS_OUT4 | WM8990_DIS_LOUT | | |
1323 | WM8990_DIS_ROUT); | |
1324 | ||
1325 | /* Disable VREF */ | |
1326 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0); | |
1327 | ||
1328 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ | |
1329 | wm8990_write(codec, WM8990_ANTIPOP2, 0x0); | |
1330 | break; | |
1331 | } | |
1332 | ||
1333 | codec->bias_level = level; | |
1334 | return 0; | |
1335 | } | |
1336 | ||
1337 | #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ | |
1338 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ | |
1339 | SNDRV_PCM_RATE_48000) | |
1340 | ||
1341 | #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
1342 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
1343 | ||
1344 | /* | |
1345 | * The WM8990 supports 2 different and mutually exclusive DAI | |
1346 | * configurations. | |
1347 | * | |
1348 | * 1. ADC/DAC on Primary Interface | |
1349 | * 2. ADC on Primary Interface/DAC on secondary | |
1350 | */ | |
1351 | struct snd_soc_codec_dai wm8990_dai = { | |
1352 | /* ADC/DAC on primary */ | |
1353 | .name = "WM8990 ADC/DAC Primary", | |
1354 | .id = 1, | |
1355 | .playback = { | |
1356 | .stream_name = "Playback", | |
1357 | .channels_min = 1, | |
1358 | .channels_max = 2, | |
1359 | .rates = WM8990_RATES, | |
1360 | .formats = WM8990_FORMATS,}, | |
1361 | .capture = { | |
1362 | .stream_name = "Capture", | |
1363 | .channels_min = 1, | |
1364 | .channels_max = 2, | |
1365 | .rates = WM8990_RATES, | |
1366 | .formats = WM8990_FORMATS,}, | |
1367 | .ops = { | |
1368 | .hw_params = wm8990_hw_params,}, | |
1369 | .dai_ops = { | |
1370 | .digital_mute = wm8990_mute, | |
1371 | .set_fmt = wm8990_set_dai_fmt, | |
1372 | .set_clkdiv = wm8990_set_dai_clkdiv, | |
1373 | .set_pll = wm8990_set_dai_pll, | |
1374 | .set_sysclk = wm8990_set_dai_sysclk, | |
1375 | }, | |
1376 | }; | |
1377 | EXPORT_SYMBOL_GPL(wm8990_dai); | |
1378 | ||
1379 | static int wm8990_suspend(struct platform_device *pdev, pm_message_t state) | |
1380 | { | |
1381 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
1382 | struct snd_soc_codec *codec = socdev->codec; | |
1383 | ||
1384 | /* we only need to suspend if we are a valid card */ | |
1385 | if (!codec->card) | |
1386 | return 0; | |
1387 | ||
1388 | wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
1389 | return 0; | |
1390 | } | |
1391 | ||
1392 | static int wm8990_resume(struct platform_device *pdev) | |
1393 | { | |
1394 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
1395 | struct snd_soc_codec *codec = socdev->codec; | |
1396 | int i; | |
1397 | u8 data[2]; | |
1398 | u16 *cache = codec->reg_cache; | |
1399 | ||
1400 | /* we only need to resume if we are a valid card */ | |
1401 | if (!codec->card) | |
1402 | return 0; | |
1403 | ||
1404 | /* Sync reg_cache with the hardware */ | |
1405 | for (i = 0; i < ARRAY_SIZE(wm8990_reg); i++) { | |
1406 | if (i + 1 == WM8990_RESET) | |
1407 | continue; | |
1408 | data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001); | |
1409 | data[1] = cache[i] & 0x00ff; | |
1410 | codec->hw_write(codec->control_data, data, 2); | |
1411 | } | |
1412 | ||
1413 | wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
1414 | return 0; | |
1415 | } | |
1416 | ||
1417 | /* | |
1418 | * initialise the WM8990 driver | |
1419 | * register the mixer and dsp interfaces with the kernel | |
1420 | */ | |
1421 | static int wm8990_init(struct snd_soc_device *socdev) | |
1422 | { | |
1423 | struct snd_soc_codec *codec = socdev->codec; | |
1424 | u16 reg; | |
1425 | int ret = 0; | |
1426 | ||
1427 | codec->name = "WM8990"; | |
1428 | codec->owner = THIS_MODULE; | |
1429 | codec->read = wm8990_read_reg_cache; | |
1430 | codec->write = wm8990_write; | |
1431 | codec->set_bias_level = wm8990_set_bias_level; | |
1432 | codec->dai = &wm8990_dai; | |
1433 | codec->num_dai = 2; | |
1434 | codec->reg_cache_size = ARRAY_SIZE(wm8990_reg); | |
1435 | codec->reg_cache = kmemdup(wm8990_reg, sizeof(wm8990_reg), GFP_KERNEL); | |
1436 | ||
1437 | if (codec->reg_cache == NULL) | |
1438 | return -ENOMEM; | |
1439 | ||
1440 | wm8990_reset(codec); | |
1441 | ||
1442 | /* register pcms */ | |
1443 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
1444 | if (ret < 0) { | |
1445 | printk(KERN_ERR "wm8990: failed to create pcms\n"); | |
1446 | goto pcm_err; | |
1447 | } | |
1448 | ||
1449 | /* charge output caps */ | |
1450 | codec->bias_level = SND_SOC_BIAS_OFF; | |
1451 | wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
1452 | ||
1453 | reg = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_4); | |
1454 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_4, reg | WM8990_ALRCGPIO1); | |
1455 | ||
1456 | reg = wm8990_read_reg_cache(codec, WM8990_GPIO1_GPIO2) & | |
1457 | ~WM8990_GPIO1_SEL_MASK; | |
1458 | wm8990_write(codec, WM8990_GPIO1_GPIO2, reg | 1); | |
1459 | ||
1460 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); | |
1461 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg | WM8990_OPCLK_ENA); | |
1462 | ||
1463 | wm8990_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); | |
1464 | wm8990_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); | |
1465 | ||
1466 | wm8990_add_controls(codec); | |
1467 | wm8990_add_widgets(codec); | |
1468 | ret = snd_soc_register_card(socdev); | |
1469 | if (ret < 0) { | |
1470 | printk(KERN_ERR "wm8990: failed to register card\n"); | |
1471 | goto card_err; | |
1472 | } | |
1473 | return ret; | |
1474 | ||
1475 | card_err: | |
1476 | snd_soc_free_pcms(socdev); | |
1477 | snd_soc_dapm_free(socdev); | |
1478 | pcm_err: | |
1479 | kfree(codec->reg_cache); | |
1480 | return ret; | |
1481 | } | |
1482 | ||
1483 | /* If the i2c layer weren't so broken, we could pass this kind of data | |
1484 | around */ | |
1485 | static struct snd_soc_device *wm8990_socdev; | |
1486 | ||
1487 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
1488 | ||
1489 | /* | |
1490 | * WM891 2 wire address is determined by GPIO5 | |
1491 | * state during powerup. | |
1492 | * low = 0x34 | |
1493 | * high = 0x36 | |
1494 | */ | |
1495 | static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; | |
1496 | ||
1497 | /* Magic definition of all other variables and things */ | |
1498 | I2C_CLIENT_INSMOD; | |
1499 | ||
1500 | static struct i2c_driver wm8990_i2c_driver; | |
1501 | static struct i2c_client client_template; | |
1502 | ||
1503 | static int wm8990_codec_probe(struct i2c_adapter *adap, int addr, int kind) | |
1504 | { | |
1505 | struct snd_soc_device *socdev = wm8990_socdev; | |
1506 | struct wm8990_setup_data *setup = socdev->codec_data; | |
1507 | struct snd_soc_codec *codec = socdev->codec; | |
1508 | struct i2c_client *i2c; | |
1509 | int ret; | |
1510 | ||
1511 | if (addr != setup->i2c_address) | |
1512 | return -ENODEV; | |
1513 | ||
1514 | client_template.adapter = adap; | |
1515 | client_template.addr = addr; | |
1516 | ||
1517 | i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL); | |
1518 | if (i2c == NULL) { | |
1519 | kfree(codec); | |
1520 | return -ENOMEM; | |
1521 | } | |
1522 | i2c_set_clientdata(i2c, codec); | |
1523 | codec->control_data = i2c; | |
1524 | ||
1525 | ret = i2c_attach_client(i2c); | |
1526 | if (ret < 0) { | |
1527 | err("failed to attach codec at addr %x\n", addr); | |
1528 | goto err; | |
1529 | } | |
1530 | ||
1531 | ret = wm8990_init(socdev); | |
1532 | if (ret < 0) { | |
1533 | err("failed to initialise WM8990\n"); | |
1534 | goto err; | |
1535 | } | |
1536 | return ret; | |
1537 | ||
1538 | err: | |
1539 | kfree(codec); | |
1540 | kfree(i2c); | |
1541 | return ret; | |
1542 | } | |
1543 | ||
1544 | static int wm8990_i2c_detach(struct i2c_client *client) | |
1545 | { | |
1546 | struct snd_soc_codec *codec = i2c_get_clientdata(client); | |
1547 | i2c_detach_client(client); | |
1548 | kfree(codec->reg_cache); | |
1549 | kfree(client); | |
1550 | return 0; | |
1551 | } | |
1552 | ||
1553 | static int wm8990_i2c_attach(struct i2c_adapter *adap) | |
1554 | { | |
1555 | return i2c_probe(adap, &addr_data, wm8990_codec_probe); | |
1556 | } | |
1557 | ||
1558 | static struct i2c_driver wm8990_i2c_driver = { | |
1559 | .driver = { | |
1560 | .name = "WM8990 I2C Codec", | |
1561 | .owner = THIS_MODULE, | |
1562 | }, | |
1563 | .attach_adapter = wm8990_i2c_attach, | |
1564 | .detach_client = wm8990_i2c_detach, | |
1565 | .command = NULL, | |
1566 | }; | |
1567 | ||
1568 | static struct i2c_client client_template = { | |
1569 | .name = "WM8990", | |
1570 | .driver = &wm8990_i2c_driver, | |
1571 | }; | |
1572 | #endif | |
1573 | ||
1574 | static int wm8990_probe(struct platform_device *pdev) | |
1575 | { | |
1576 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
1577 | struct wm8990_setup_data *setup; | |
1578 | struct snd_soc_codec *codec; | |
1579 | struct wm8990_priv *wm8990; | |
1580 | int ret = 0; | |
1581 | ||
1582 | info("WM8990 Audio Codec %s\n", WM8990_VERSION); | |
1583 | ||
1584 | setup = socdev->codec_data; | |
1585 | codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); | |
1586 | if (codec == NULL) | |
1587 | return -ENOMEM; | |
1588 | ||
1589 | wm8990 = kzalloc(sizeof(struct wm8990_priv), GFP_KERNEL); | |
1590 | if (wm8990 == NULL) { | |
1591 | kfree(codec); | |
1592 | return -ENOMEM; | |
1593 | } | |
1594 | ||
1595 | codec->private_data = wm8990; | |
1596 | socdev->codec = codec; | |
1597 | mutex_init(&codec->mutex); | |
1598 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
1599 | INIT_LIST_HEAD(&codec->dapm_paths); | |
1600 | wm8990_socdev = socdev; | |
1601 | ||
1602 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
1603 | if (setup->i2c_address) { | |
1604 | normal_i2c[0] = setup->i2c_address; | |
1605 | codec->hw_write = (hw_write_t)i2c_master_send; | |
1606 | ret = i2c_add_driver(&wm8990_i2c_driver); | |
1607 | if (ret != 0) | |
1608 | printk(KERN_ERR "can't add i2c driver"); | |
1609 | } | |
1610 | #else | |
1611 | /* Add other interfaces here */ | |
1612 | #endif | |
1613 | return ret; | |
1614 | } | |
1615 | ||
1616 | /* power down chip */ | |
1617 | static int wm8990_remove(struct platform_device *pdev) | |
1618 | { | |
1619 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
1620 | struct snd_soc_codec *codec = socdev->codec; | |
1621 | ||
1622 | if (codec->control_data) | |
1623 | wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
1624 | snd_soc_free_pcms(socdev); | |
1625 | snd_soc_dapm_free(socdev); | |
1626 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
1627 | i2c_del_driver(&wm8990_i2c_driver); | |
1628 | #endif | |
1629 | kfree(codec->private_data); | |
1630 | kfree(codec); | |
1631 | ||
1632 | return 0; | |
1633 | } | |
1634 | ||
1635 | struct snd_soc_codec_device soc_codec_dev_wm8990 = { | |
1636 | .probe = wm8990_probe, | |
1637 | .remove = wm8990_remove, | |
1638 | .suspend = wm8990_suspend, | |
1639 | .resume = wm8990_resume, | |
1640 | }; | |
1641 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8990); | |
1642 | ||
1643 | MODULE_DESCRIPTION("ASoC WM8990 driver"); | |
1644 | MODULE_AUTHOR("Liam Girdwood"); | |
1645 | MODULE_LICENSE("GPL"); |