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[mirror_ubuntu-jammy-kernel.git] / sound / soc / codecs / wm9713.c
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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
83ac08c0
LG		 2/*
3 * wm9713.c -- ALSA Soc WM9713 codec support
4 *
656baaeb 5 * Copyright 2006-10 Wolfson Microelectronics PLC.
d331124d 6 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
83ac08c0 7 *
83ac08c0
LG		 8 * Features:-
9 *
10 * o Support for AC97 Codec, Voice DAC and Aux DAC
11 * o Support for DAPM
12 */
13
14#include <linux/init.h>
5a0e3ad6 15#include <linux/slab.h>
9bd400ca 16#include <linux/mfd/wm97xx.h>
83ac08c0
LG		 17#include <linux/module.h>
18#include <linux/device.h>
700dadfe 19#include <linux/regmap.h>
83ac08c0
LG		 20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/ac97_codec.h>
9bd400ca
RJ		 23#include <sound/ac97/codec.h>
24#include <sound/ac97/compat.h>
83ac08c0
LG		 25#include <sound/initval.h>
26#include <sound/pcm_params.h>
e03a8d2c 27#include <sound/tlv.h>
83ac08c0 28#include <sound/soc.h>
83ac08c0
LG		 29
30#include "wm9713.h"
31
310398f5
LPC		 32#define WM9713_VENDOR_ID 0x574d4c13
33#define WM9713_VENDOR_ID_MASK 0xffffffff
34
83ac08c0 35struct wm9713_priv {
358a8bb5 36 struct snd_ac97 *ac97;
83ac08c0 37 u32 pll_in; /* PLL input frequency */
cf1f2ebe
LPC		 38 unsigned int hp_mixer[2];
39 struct mutex lock;
9bd400ca 40 struct wm97xx_platform_data *mfd_pdata;
83ac08c0
LG		 41};
42
cf1f2ebe
LPC		 43#define HPL_MIXER 0
44#define HPR_MIXER 1
83ac08c0
LG		 45
46static const char *wm9713_mic_mixer[] = {"Stereo", "Mic 1", "Mic 2", "Mute"};
47static const char *wm9713_rec_mux[] = {"Stereo", "Left", "Right", "Mute"};
48static const char *wm9713_rec_src[] =
49 {"Mic 1", "Mic 2", "Line", "Mono In", "Headphone", "Speaker",
50 "Mono Out", "Zh"};
51static const char *wm9713_rec_gain[] = {"+1.5dB Steps", "+0.75dB Steps"};
52static const char *wm9713_alc_select[] = {"None", "Left", "Right", "Stereo"};
a7f0b839 53static const char *wm9713_mono_pga[] = {"Vmid", "Zh", "Mono", "Inv"};
83ac08c0
LG		 54static const char *wm9713_spk_pga[] =
55 {"Vmid", "Zh", "Headphone", "Speaker", "Inv", "Headphone Vmid",
56 "Speaker Vmid", "Inv Vmid"};
57static const char *wm9713_hp_pga[] = {"Vmid", "Zh", "Headphone",
58 "Headphone Vmid"};
59static const char *wm9713_out3_pga[] = {"Vmid", "Zh", "Inv 1", "Inv 1 Vmid"};
60static const char *wm9713_out4_pga[] = {"Vmid", "Zh", "Inv 2", "Inv 2 Vmid"};
61static const char *wm9713_dac_inv[] =
62 {"Off", "Mono", "Speaker", "Left Headphone", "Right Headphone",
63 "Headphone Mono", "NC", "Vmid"};
64static const char *wm9713_bass[] = {"Linear Control", "Adaptive Boost"};
65static const char *wm9713_ng_type[] = {"Constant Gain", "Mute"};
66static const char *wm9713_mic_select[] = {"Mic 1", "Mic 2 A", "Mic 2 B"};
67static const char *wm9713_micb_select[] = {"MPB", "MPA"};
68
69static const struct soc_enum wm9713_enum[] = {
70SOC_ENUM_SINGLE(AC97_LINE, 3, 4, wm9713_mic_mixer), /* record mic mixer 0 */
71SOC_ENUM_SINGLE(AC97_VIDEO, 14, 4, wm9713_rec_mux), /* record mux hp 1 */
72SOC_ENUM_SINGLE(AC97_VIDEO, 9, 4, wm9713_rec_mux), /* record mux mono 2 */
73SOC_ENUM_SINGLE(AC97_VIDEO, 3, 8, wm9713_rec_src), /* record mux left 3 */
74SOC_ENUM_SINGLE(AC97_VIDEO, 0, 8, wm9713_rec_src), /* record mux right 4*/
75SOC_ENUM_DOUBLE(AC97_CD, 14, 6, 2, wm9713_rec_gain), /* record step size 5 */
76SOC_ENUM_SINGLE(AC97_PCI_SVID, 14, 4, wm9713_alc_select), /* alc source select 6*/
77SOC_ENUM_SINGLE(AC97_REC_GAIN, 14, 4, wm9713_mono_pga), /* mono input select 7 */
78SOC_ENUM_SINGLE(AC97_REC_GAIN, 11, 8, wm9713_spk_pga), /* speaker left input select 8 */
79SOC_ENUM_SINGLE(AC97_REC_GAIN, 8, 8, wm9713_spk_pga), /* speaker right input select 9 */
80SOC_ENUM_SINGLE(AC97_REC_GAIN, 6, 3, wm9713_hp_pga), /* headphone left input 10 */
81SOC_ENUM_SINGLE(AC97_REC_GAIN, 4, 3, wm9713_hp_pga), /* headphone right input 11 */
82SOC_ENUM_SINGLE(AC97_REC_GAIN, 2, 4, wm9713_out3_pga), /* out 3 source 12 */
83SOC_ENUM_SINGLE(AC97_REC_GAIN, 0, 4, wm9713_out4_pga), /* out 4 source 13 */
84SOC_ENUM_SINGLE(AC97_REC_GAIN_MIC, 13, 8, wm9713_dac_inv), /* dac invert 1 14 */
85SOC_ENUM_SINGLE(AC97_REC_GAIN_MIC, 10, 8, wm9713_dac_inv), /* dac invert 2 15 */
86SOC_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 15, 2, wm9713_bass), /* bass control 16 */
87SOC_ENUM_SINGLE(AC97_PCI_SVID, 5, 2, wm9713_ng_type), /* noise gate type 17 */
88SOC_ENUM_SINGLE(AC97_3D_CONTROL, 12, 3, wm9713_mic_select), /* mic selection 18 */
5bc39b50 89SOC_ENUM_SINGLE_VIRT(2, wm9713_micb_select), /* mic selection 19 */
83ac08c0
LG		 90};
91
e03a8d2c
MB		 92static const DECLARE_TLV_DB_SCALE(out_tlv, -4650, 150, 0);
93static const DECLARE_TLV_DB_SCALE(main_tlv, -3450, 150, 0);
94static const DECLARE_TLV_DB_SCALE(misc_tlv, -1500, 300, 0);
5092e76b 95static const DECLARE_TLV_DB_RANGE(mic_tlv,
e03a8d2c 96 0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0),
5092e76b
LPC		 97 3, 3, TLV_DB_SCALE_ITEM(3000, 0, 0)
98);
e03a8d2c 99
83ac08c0 100static const struct snd_kcontrol_new wm9713_snd_ac97_controls[] = {
e03a8d2c 101SOC_DOUBLE_TLV("Speaker Playback Volume", AC97_MASTER, 8, 0, 31, 1, out_tlv),
83ac08c0 102SOC_DOUBLE("Speaker Playback Switch", AC97_MASTER, 15, 7, 1, 1),
e03a8d2c
MB		 103SOC_DOUBLE_TLV("Headphone Playback Volume", AC97_HEADPHONE, 8, 0, 31, 1,
104 out_tlv),
83ac08c0 105SOC_DOUBLE("Headphone Playback Switch", AC97_HEADPHONE, 15, 7, 1, 1),
e03a8d2c
MB		 106SOC_DOUBLE_TLV("Line In Volume", AC97_PC_BEEP, 8, 0, 31, 1, main_tlv),
107SOC_DOUBLE_TLV("PCM Playback Volume", AC97_PHONE, 8, 0, 31, 1, main_tlv),
108SOC_SINGLE_TLV("Mic 1 Volume", AC97_MIC, 8, 31, 1, main_tlv),
109SOC_SINGLE_TLV("Mic 2 Volume", AC97_MIC, 0, 31, 1, main_tlv),
110SOC_SINGLE_TLV("Mic 1 Preamp Volume", AC97_3D_CONTROL, 10, 3, 0, mic_tlv),
111SOC_SINGLE_TLV("Mic 2 Preamp Volume", AC97_3D_CONTROL, 12, 3, 0, mic_tlv),
83ac08c0
LG		 112
113SOC_SINGLE("Mic Boost (+20dB) Switch", AC97_LINE, 5, 1, 0),
114SOC_SINGLE("Mic Headphone Mixer Volume", AC97_LINE, 0, 7, 1),
115
116SOC_SINGLE("Capture Switch", AC97_CD, 15, 1, 1),
117SOC_ENUM("Capture Volume Steps", wm9713_enum[5]),
118SOC_DOUBLE("Capture Volume", AC97_CD, 8, 0, 31, 0),
119SOC_SINGLE("Capture ZC Switch", AC97_CD, 7, 1, 0),
120
e03a8d2c 121SOC_SINGLE_TLV("Capture to Headphone Volume", AC97_VIDEO, 11, 7, 1, misc_tlv),
83ac08c0
LG		 122SOC_SINGLE("Capture to Mono Boost (+20dB) Switch", AC97_VIDEO, 8, 1, 0),
123SOC_SINGLE("Capture ADC Boost (+20dB) Switch", AC97_VIDEO, 6, 1, 0),
124
125SOC_SINGLE("ALC Target Volume", AC97_CODEC_CLASS_REV, 12, 15, 0),
126SOC_SINGLE("ALC Hold Time", AC97_CODEC_CLASS_REV, 8, 15, 0),
13d622b3 127SOC_SINGLE("ALC Decay Time", AC97_CODEC_CLASS_REV, 4, 15, 0),
83ac08c0
LG		 128SOC_SINGLE("ALC Attack Time", AC97_CODEC_CLASS_REV, 0, 15, 0),
129SOC_ENUM("ALC Function", wm9713_enum[6]),
130SOC_SINGLE("ALC Max Volume", AC97_PCI_SVID, 11, 7, 0),
131SOC_SINGLE("ALC ZC Timeout", AC97_PCI_SVID, 9, 3, 0),
132SOC_SINGLE("ALC ZC Switch", AC97_PCI_SVID, 8, 1, 0),
133SOC_SINGLE("ALC NG Switch", AC97_PCI_SVID, 7, 1, 0),
134SOC_ENUM("ALC NG Type", wm9713_enum[17]),
135SOC_SINGLE("ALC NG Threshold", AC97_PCI_SVID, 0, 31, 0),
136
137SOC_DOUBLE("Speaker Playback ZC Switch", AC97_MASTER, 14, 6, 1, 0),
138SOC_DOUBLE("Headphone Playback ZC Switch", AC97_HEADPHONE, 14, 6, 1, 0),
139
140SOC_SINGLE("Out4 Playback Switch", AC97_MASTER_MONO, 15, 1, 1),
141SOC_SINGLE("Out4 Playback ZC Switch", AC97_MASTER_MONO, 14, 1, 0),
e03a8d2c 142SOC_SINGLE_TLV("Out4 Playback Volume", AC97_MASTER_MONO, 8, 31, 1, out_tlv),
83ac08c0
LG		 143
144SOC_SINGLE("Out3 Playback Switch", AC97_MASTER_MONO, 7, 1, 1),
145SOC_SINGLE("Out3 Playback ZC Switch", AC97_MASTER_MONO, 6, 1, 0),
e03a8d2c 146SOC_SINGLE_TLV("Out3 Playback Volume", AC97_MASTER_MONO, 0, 31, 1, out_tlv),
83ac08c0 147
e03a8d2c 148SOC_SINGLE_TLV("Mono Capture Volume", AC97_MASTER_TONE, 8, 31, 1, main_tlv),
83ac08c0
LG		 149SOC_SINGLE("Mono Playback Switch", AC97_MASTER_TONE, 7, 1, 1),
150SOC_SINGLE("Mono Playback ZC Switch", AC97_MASTER_TONE, 6, 1, 0),
e03a8d2c 151SOC_SINGLE_TLV("Mono Playback Volume", AC97_MASTER_TONE, 0, 31, 1, out_tlv),
83ac08c0 152
e03a8d2c
MB		 153SOC_SINGLE_TLV("Headphone Mixer Beep Playback Volume", AC97_AUX, 12, 7, 1,
154 misc_tlv),
155SOC_SINGLE_TLV("Speaker Mixer Beep Playback Volume", AC97_AUX, 8, 7, 1,
156 misc_tlv),
157SOC_SINGLE_TLV("Mono Mixer Beep Playback Volume", AC97_AUX, 4, 7, 1, misc_tlv),
83ac08c0 158
e03a8d2c
MB		 159SOC_SINGLE_TLV("Voice Playback Headphone Volume", AC97_PCM, 12, 7, 1,
160 misc_tlv),
83ac08c0
LG		 161SOC_SINGLE("Voice Playback Master Volume", AC97_PCM, 8, 7, 1),
162SOC_SINGLE("Voice Playback Mono Volume", AC97_PCM, 4, 7, 1),
163
e03a8d2c
MB		 164SOC_SINGLE_TLV("Headphone Mixer Aux Playback Volume", AC97_REC_SEL, 12, 7, 1,
165 misc_tlv),
166
167SOC_SINGLE_TLV("Speaker Mixer Voice Playback Volume", AC97_PCM, 8, 7, 1,
168 misc_tlv),
169SOC_SINGLE_TLV("Speaker Mixer Aux Playback Volume", AC97_REC_SEL, 8, 7, 1,
170 misc_tlv),
171
172SOC_SINGLE_TLV("Mono Mixer Voice Playback Volume", AC97_PCM, 4, 7, 1,
173 misc_tlv),
174SOC_SINGLE_TLV("Mono Mixer Aux Playback Volume", AC97_REC_SEL, 4, 7, 1,
175 misc_tlv),
176
83ac08c0
LG		 177SOC_SINGLE("Aux Playback Headphone Volume", AC97_REC_SEL, 12, 7, 1),
178SOC_SINGLE("Aux Playback Master Volume", AC97_REC_SEL, 8, 7, 1),
83ac08c0
LG		 179
180SOC_ENUM("Bass Control", wm9713_enum[16]),
181SOC_SINGLE("Bass Cut-off Switch", AC97_GENERAL_PURPOSE, 12, 1, 1),
182SOC_SINGLE("Tone Cut-off Switch", AC97_GENERAL_PURPOSE, 4, 1, 1),
183SOC_SINGLE("Playback Attenuate (-6dB) Switch", AC97_GENERAL_PURPOSE, 6, 1, 0),
184SOC_SINGLE("Bass Volume", AC97_GENERAL_PURPOSE, 8, 15, 1),
185SOC_SINGLE("Tone Volume", AC97_GENERAL_PURPOSE, 0, 15, 1),
186
187SOC_SINGLE("3D Upper Cut-off Switch", AC97_REC_GAIN_MIC, 5, 1, 0),
188SOC_SINGLE("3D Lower Cut-off Switch", AC97_REC_GAIN_MIC, 4, 1, 0),
189SOC_SINGLE("3D Depth", AC97_REC_GAIN_MIC, 0, 15, 1),
190};
191
6bbcb459
MB		 192static int wm9713_voice_shutdown(struct snd_soc_dapm_widget *w,
193 struct snd_kcontrol *kcontrol, int event)
194{
8ea99bc6 195 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
6bbcb459 196
fb2e3e70
TI		 197 if (WARN_ON(event != SND_SOC_DAPM_PRE_PMD))
198 return -EINVAL;
6bbcb459
MB		 199
200 /* Gracefully shut down the voice interface. */
8ea99bc6 201 snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0f00, 0x0200);
6bbcb459 202 schedule_timeout_interruptible(msecs_to_jiffies(1));
8ea99bc6
KM		 203 snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0f00, 0x0f00);
204 snd_soc_component_update_bits(component, AC97_EXTENDED_MID, 0x1000, 0x1000);
6bbcb459
MB		 205
206 return 0;
207}
208
cf1f2ebe
LPC		 209static const unsigned int wm9713_mixer_mute_regs[] = {
210 AC97_PC_BEEP,
211 AC97_MASTER_TONE,
212 AC97_PHONE,
213 AC97_REC_SEL,
214 AC97_PCM,
215 AC97_AUX,
216};
6bbcb459 217
83ac08c0
LG		 218/* We have to create a fake left and right HP mixers because
219 * the codec only has a single control that is shared by both channels.
220 * This makes it impossible to determine the audio path using the current
221 * register map, thus we add a new (virtual) register to help determine the
222 * audio route within the device.
223 */
cf1f2ebe
LPC		 224static int wm9713_hp_mixer_put(struct snd_kcontrol *kcontrol,
225 struct snd_ctl_elem_value *ucontrol)
83ac08c0 226{
cf1f2ebe 227 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
8ea99bc6
KM		 228 struct snd_soc_component *component = snd_soc_dapm_to_component(dapm);
229 struct wm9713_priv *wm9713 = snd_soc_component_get_drvdata(component);
87a8b286 230 unsigned int val = ucontrol->value.integer.value[0];
cf1f2ebe
LPC		 231 struct soc_mixer_control *mc =
232 (struct soc_mixer_control *)kcontrol->private_value;
233 unsigned int mixer, mask, shift, old;
91cd0008 234 struct snd_soc_dapm_update update = {};
cf1f2ebe
LPC		 235 bool change;
236
237 mixer = mc->shift >> 8;
238 shift = mc->shift & 0xff;
239 mask = (1 << shift);
240
241 mutex_lock(&wm9713->lock);
242 old = wm9713->hp_mixer[mixer];
87a8b286 243 if (ucontrol->value.integer.value[0])
cf1f2ebe 244 wm9713->hp_mixer[mixer] |= mask;
83ac08c0 245 else
cf1f2ebe
LPC		 246 wm9713->hp_mixer[mixer] &= ~mask;
247
248 change = old != wm9713->hp_mixer[mixer];
249 if (change) {
250 update.kcontrol = kcontrol;
251 update.reg = wm9713_mixer_mute_regs[shift];
252 update.mask = 0x8000;
253 if ((wm9713->hp_mixer[0] & mask) ||
254 (wm9713->hp_mixer[1] & mask))
255 update.val = 0x0;
256 else
257 update.val = 0x8000;
258
259 snd_soc_dapm_mixer_update_power(dapm, kcontrol, val,
260 &update);
261 }
83ac08c0 262
cf1f2ebe 263 mutex_unlock(&wm9713->lock);
83ac08c0 264
cf1f2ebe
LPC		 265 return change;
266}
83ac08c0 267
cf1f2ebe
LPC		 268static int wm9713_hp_mixer_get(struct snd_kcontrol *kcontrol,
269 struct snd_ctl_elem_value *ucontrol)
270{
271 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
8ea99bc6
KM		 272 struct snd_soc_component *component = snd_soc_dapm_to_component(dapm);
273 struct wm9713_priv *wm9713 = snd_soc_component_get_drvdata(component);
cf1f2ebe
LPC		 274 struct soc_mixer_control *mc =
275 (struct soc_mixer_control *)kcontrol->private_value;
276 unsigned int mixer, shift;
83ac08c0 277
cf1f2ebe
LPC		 278 mixer = mc->shift >> 8;
279 shift = mc->shift & 0xff;
83ac08c0 280
87a8b286 281 ucontrol->value.integer.value[0] =
cf1f2ebe 282 (wm9713->hp_mixer[mixer] >> shift) & 1;
83ac08c0
LG		 283
284 return 0;
285}
286
cf1f2ebe
LPC		 287#define WM9713_HP_MIXER_CTRL(xname, xmixer, xshift) { \
288 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
289 .info = snd_soc_info_volsw, \
290 .get = wm9713_hp_mixer_get, .put = wm9713_hp_mixer_put, \
291 .private_value = SOC_DOUBLE_VALUE(SND_SOC_NOPM, \
292 xshift, xmixer, 1, 0, 0) \
293}
294
83ac08c0
LG		 295/* Left Headphone Mixers */
296static const struct snd_kcontrol_new wm9713_hpl_mixer_controls[] = {
cf1f2ebe
LPC		 297WM9713_HP_MIXER_CTRL("Beep Playback Switch", HPL_MIXER, 5),
298WM9713_HP_MIXER_CTRL("Voice Playback Switch", HPL_MIXER, 4),
299WM9713_HP_MIXER_CTRL("Aux Playback Switch", HPL_MIXER, 3),
300WM9713_HP_MIXER_CTRL("PCM Playback Switch", HPL_MIXER, 2),
301WM9713_HP_MIXER_CTRL("MonoIn Playback Switch", HPL_MIXER, 1),
302WM9713_HP_MIXER_CTRL("Bypass Playback Switch", HPL_MIXER, 0),
83ac08c0
LG		 303};
304
305/* Right Headphone Mixers */
306static const struct snd_kcontrol_new wm9713_hpr_mixer_controls[] = {
cf1f2ebe
LPC		 307WM9713_HP_MIXER_CTRL("Beep Playback Switch", HPR_MIXER, 5),
308WM9713_HP_MIXER_CTRL("Voice Playback Switch", HPR_MIXER, 4),
309WM9713_HP_MIXER_CTRL("Aux Playback Switch", HPR_MIXER, 3),
310WM9713_HP_MIXER_CTRL("PCM Playback Switch", HPR_MIXER, 2),
311WM9713_HP_MIXER_CTRL("MonoIn Playback Switch", HPR_MIXER, 1),
312WM9713_HP_MIXER_CTRL("Bypass Playback Switch", HPR_MIXER, 0),
83ac08c0
LG		 313};
314
315/* headphone capture mux */
316static const struct snd_kcontrol_new wm9713_hp_rec_mux_controls =
317SOC_DAPM_ENUM("Route", wm9713_enum[1]);
318
319/* headphone mic mux */
320static const struct snd_kcontrol_new wm9713_hp_mic_mux_controls =
321SOC_DAPM_ENUM("Route", wm9713_enum[0]);
322
323/* Speaker Mixer */
324static const struct snd_kcontrol_new wm9713_speaker_mixer_controls[] = {
d355c82a 325SOC_DAPM_SINGLE("Beep Playback Switch", AC97_AUX, 11, 1, 1),
83ac08c0
LG		 326SOC_DAPM_SINGLE("Voice Playback Switch", AC97_PCM, 11, 1, 1),
327SOC_DAPM_SINGLE("Aux Playback Switch", AC97_REC_SEL, 11, 1, 1),
328SOC_DAPM_SINGLE("PCM Playback Switch", AC97_PHONE, 14, 1, 1),
329SOC_DAPM_SINGLE("MonoIn Playback Switch", AC97_MASTER_TONE, 14, 1, 1),
330SOC_DAPM_SINGLE("Bypass Playback Switch", AC97_PC_BEEP, 14, 1, 1),
331};
332
333/* Mono Mixer */
334static const struct snd_kcontrol_new wm9713_mono_mixer_controls[] = {
d355c82a 335SOC_DAPM_SINGLE("Beep Playback Switch", AC97_AUX, 7, 1, 1),
83ac08c0
LG		 336SOC_DAPM_SINGLE("Voice Playback Switch", AC97_PCM, 7, 1, 1),
337SOC_DAPM_SINGLE("Aux Playback Switch", AC97_REC_SEL, 7, 1, 1),
338SOC_DAPM_SINGLE("PCM Playback Switch", AC97_PHONE, 13, 1, 1),
339SOC_DAPM_SINGLE("MonoIn Playback Switch", AC97_MASTER_TONE, 13, 1, 1),
340SOC_DAPM_SINGLE("Bypass Playback Switch", AC97_PC_BEEP, 13, 1, 1),
341SOC_DAPM_SINGLE("Mic 1 Sidetone Switch", AC97_LINE, 7, 1, 1),
342SOC_DAPM_SINGLE("Mic 2 Sidetone Switch", AC97_LINE, 6, 1, 1),
343};
344
345/* mono mic mux */
346static const struct snd_kcontrol_new wm9713_mono_mic_mux_controls =
347SOC_DAPM_ENUM("Route", wm9713_enum[2]);
348
349/* mono output mux */
350static const struct snd_kcontrol_new wm9713_mono_mux_controls =
351SOC_DAPM_ENUM("Route", wm9713_enum[7]);
352
353/* speaker left output mux */
354static const struct snd_kcontrol_new wm9713_hp_spkl_mux_controls =
355SOC_DAPM_ENUM("Route", wm9713_enum[8]);
356
357/* speaker right output mux */
358static const struct snd_kcontrol_new wm9713_hp_spkr_mux_controls =
359SOC_DAPM_ENUM("Route", wm9713_enum[9]);
360
361/* headphone left output mux */
362static const struct snd_kcontrol_new wm9713_hpl_out_mux_controls =
363SOC_DAPM_ENUM("Route", wm9713_enum[10]);
364
365/* headphone right output mux */
366static const struct snd_kcontrol_new wm9713_hpr_out_mux_controls =
367SOC_DAPM_ENUM("Route", wm9713_enum[11]);
368
369/* Out3 mux */
370static const struct snd_kcontrol_new wm9713_out3_mux_controls =
371SOC_DAPM_ENUM("Route", wm9713_enum[12]);
372
373/* Out4 mux */
374static const struct snd_kcontrol_new wm9713_out4_mux_controls =
375SOC_DAPM_ENUM("Route", wm9713_enum[13]);
376
377/* DAC inv mux 1 */
378static const struct snd_kcontrol_new wm9713_dac_inv1_mux_controls =
379SOC_DAPM_ENUM("Route", wm9713_enum[14]);
380
381/* DAC inv mux 2 */
382static const struct snd_kcontrol_new wm9713_dac_inv2_mux_controls =
383SOC_DAPM_ENUM("Route", wm9713_enum[15]);
384
385/* Capture source left */
386static const struct snd_kcontrol_new wm9713_rec_srcl_mux_controls =
387SOC_DAPM_ENUM("Route", wm9713_enum[3]);
388
389/* Capture source right */
390static const struct snd_kcontrol_new wm9713_rec_srcr_mux_controls =
391SOC_DAPM_ENUM("Route", wm9713_enum[4]);
392
393/* mic source */
394static const struct snd_kcontrol_new wm9713_mic_sel_mux_controls =
395SOC_DAPM_ENUM("Route", wm9713_enum[18]);
396
397/* mic source B virtual control */
398static const struct snd_kcontrol_new wm9713_micb_sel_mux_controls =
399SOC_DAPM_ENUM("Route", wm9713_enum[19]);
400
401static const struct snd_soc_dapm_widget wm9713_dapm_widgets[] = {
402SND_SOC_DAPM_MUX("Capture Headphone Mux", SND_SOC_NOPM, 0, 0,
403 &wm9713_hp_rec_mux_controls),
404SND_SOC_DAPM_MUX("Sidetone Mux", SND_SOC_NOPM, 0, 0,
405 &wm9713_hp_mic_mux_controls),
406SND_SOC_DAPM_MUX("Capture Mono Mux", SND_SOC_NOPM, 0, 0,
407 &wm9713_mono_mic_mux_controls),
408SND_SOC_DAPM_MUX("Mono Out Mux", SND_SOC_NOPM, 0, 0,
409 &wm9713_mono_mux_controls),
410SND_SOC_DAPM_MUX("Left Speaker Out Mux", SND_SOC_NOPM, 0, 0,
411 &wm9713_hp_spkl_mux_controls),
412SND_SOC_DAPM_MUX("Right Speaker Out Mux", SND_SOC_NOPM, 0, 0,
413 &wm9713_hp_spkr_mux_controls),
414SND_SOC_DAPM_MUX("Left Headphone Out Mux", SND_SOC_NOPM, 0, 0,
415 &wm9713_hpl_out_mux_controls),
416SND_SOC_DAPM_MUX("Right Headphone Out Mux", SND_SOC_NOPM, 0, 0,
417 &wm9713_hpr_out_mux_controls),
418SND_SOC_DAPM_MUX("Out 3 Mux", SND_SOC_NOPM, 0, 0,
419 &wm9713_out3_mux_controls),
420SND_SOC_DAPM_MUX("Out 4 Mux", SND_SOC_NOPM, 0, 0,
421 &wm9713_out4_mux_controls),
422SND_SOC_DAPM_MUX("DAC Inv Mux 1", SND_SOC_NOPM, 0, 0,
423 &wm9713_dac_inv1_mux_controls),
424SND_SOC_DAPM_MUX("DAC Inv Mux 2", SND_SOC_NOPM, 0, 0,
425 &wm9713_dac_inv2_mux_controls),
426SND_SOC_DAPM_MUX("Left Capture Source", SND_SOC_NOPM, 0, 0,
427 &wm9713_rec_srcl_mux_controls),
428SND_SOC_DAPM_MUX("Right Capture Source", SND_SOC_NOPM, 0, 0,
429 &wm9713_rec_srcr_mux_controls),
430SND_SOC_DAPM_MUX("Mic A Source", SND_SOC_NOPM, 0, 0,
431 &wm9713_mic_sel_mux_controls),
432SND_SOC_DAPM_MUX("Mic B Source", SND_SOC_NOPM, 0, 0,
433 &wm9713_micb_sel_mux_controls),
cf1f2ebe
LPC		 434SND_SOC_DAPM_MIXER("Left HP Mixer", AC97_EXTENDED_MID, 3, 1,
435 &wm9713_hpl_mixer_controls[0], ARRAY_SIZE(wm9713_hpl_mixer_controls)),
436SND_SOC_DAPM_MIXER("Right HP Mixer", AC97_EXTENDED_MID, 2, 1,
437 &wm9713_hpr_mixer_controls[0], ARRAY_SIZE(wm9713_hpr_mixer_controls)),
83ac08c0
LG		 438SND_SOC_DAPM_MIXER("Mono Mixer", AC97_EXTENDED_MID, 0, 1,
439 &wm9713_mono_mixer_controls[0], ARRAY_SIZE(wm9713_mono_mixer_controls)),
440SND_SOC_DAPM_MIXER("Speaker Mixer", AC97_EXTENDED_MID, 1, 1,
441 &wm9713_speaker_mixer_controls[0],
442 ARRAY_SIZE(wm9713_speaker_mixer_controls)),
443SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", AC97_EXTENDED_MID, 7, 1),
444SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", AC97_EXTENDED_MID, 6, 1),
445SND_SOC_DAPM_MIXER("AC97 Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
446SND_SOC_DAPM_MIXER("HP Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
447SND_SOC_DAPM_MIXER("Line Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
448SND_SOC_DAPM_MIXER("Capture Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
6bbcb459
MB		 449SND_SOC_DAPM_DAC_E("Voice DAC", "Voice Playback", AC97_EXTENDED_MID, 12, 1,
450 wm9713_voice_shutdown, SND_SOC_DAPM_PRE_PMD),
83ac08c0 451SND_SOC_DAPM_DAC("Aux DAC", "Aux Playback", AC97_EXTENDED_MID, 11, 1),
ccbc301e
MB		 452SND_SOC_DAPM_PGA("Left ADC", AC97_EXTENDED_MID, 5, 1, NULL, 0),
453SND_SOC_DAPM_PGA("Right ADC", AC97_EXTENDED_MID, 4, 1, NULL, 0),
454SND_SOC_DAPM_ADC("Left HiFi ADC", "Left HiFi Capture", SND_SOC_NOPM, 0, 0),
455SND_SOC_DAPM_ADC("Right HiFi ADC", "Right HiFi Capture", SND_SOC_NOPM, 0, 0),
456SND_SOC_DAPM_ADC("Left Voice ADC", "Left Voice Capture", SND_SOC_NOPM, 0, 0),
457SND_SOC_DAPM_ADC("Right Voice ADC", "Right Voice Capture", SND_SOC_NOPM, 0, 0),
83ac08c0
LG		 458SND_SOC_DAPM_PGA("Left Headphone", AC97_EXTENDED_MSTATUS, 10, 1, NULL, 0),
459SND_SOC_DAPM_PGA("Right Headphone", AC97_EXTENDED_MSTATUS, 9, 1, NULL, 0),
460SND_SOC_DAPM_PGA("Left Speaker", AC97_EXTENDED_MSTATUS, 8, 1, NULL, 0),
461SND_SOC_DAPM_PGA("Right Speaker", AC97_EXTENDED_MSTATUS, 7, 1, NULL, 0),
462SND_SOC_DAPM_PGA("Out 3", AC97_EXTENDED_MSTATUS, 11, 1, NULL, 0),
463SND_SOC_DAPM_PGA("Out 4", AC97_EXTENDED_MSTATUS, 12, 1, NULL, 0),
464SND_SOC_DAPM_PGA("Mono Out", AC97_EXTENDED_MSTATUS, 13, 1, NULL, 0),
465SND_SOC_DAPM_PGA("Left Line In", AC97_EXTENDED_MSTATUS, 6, 1, NULL, 0),
466SND_SOC_DAPM_PGA("Right Line In", AC97_EXTENDED_MSTATUS, 5, 1, NULL, 0),
467SND_SOC_DAPM_PGA("Mono In", AC97_EXTENDED_MSTATUS, 4, 1, NULL, 0),
468SND_SOC_DAPM_PGA("Mic A PGA", AC97_EXTENDED_MSTATUS, 3, 1, NULL, 0),
469SND_SOC_DAPM_PGA("Mic B PGA", AC97_EXTENDED_MSTATUS, 2, 1, NULL, 0),
470SND_SOC_DAPM_PGA("Mic A Pre Amp", AC97_EXTENDED_MSTATUS, 1, 1, NULL, 0),
471SND_SOC_DAPM_PGA("Mic B Pre Amp", AC97_EXTENDED_MSTATUS, 0, 1, NULL, 0),
472SND_SOC_DAPM_MICBIAS("Mic Bias", AC97_EXTENDED_MSTATUS, 14, 1),
473SND_SOC_DAPM_OUTPUT("MONO"),
474SND_SOC_DAPM_OUTPUT("HPL"),
475SND_SOC_DAPM_OUTPUT("HPR"),
476SND_SOC_DAPM_OUTPUT("SPKL"),
477SND_SOC_DAPM_OUTPUT("SPKR"),
478SND_SOC_DAPM_OUTPUT("OUT3"),
479SND_SOC_DAPM_OUTPUT("OUT4"),
480SND_SOC_DAPM_INPUT("LINEL"),
481SND_SOC_DAPM_INPUT("LINER"),
482SND_SOC_DAPM_INPUT("MONOIN"),
483SND_SOC_DAPM_INPUT("PCBEEP"),
484SND_SOC_DAPM_INPUT("MIC1"),
485SND_SOC_DAPM_INPUT("MIC2A"),
486SND_SOC_DAPM_INPUT("MIC2B"),
487SND_SOC_DAPM_VMID("VMID"),
488};
489
7ad7dd12 490static const struct snd_soc_dapm_route wm9713_audio_map[] = {
83ac08c0 491 /* left HP mixer */
d355c82a 492 {"Left HP Mixer", "Beep Playback Switch", "PCBEEP"},
83ac08c0
LG		 493 {"Left HP Mixer", "Voice Playback Switch", "Voice DAC"},
494 {"Left HP Mixer", "Aux Playback Switch", "Aux DAC"},
495 {"Left HP Mixer", "Bypass Playback Switch", "Left Line In"},
496 {"Left HP Mixer", "PCM Playback Switch", "Left DAC"},
497 {"Left HP Mixer", "MonoIn Playback Switch", "Mono In"},
498 {"Left HP Mixer", NULL, "Capture Headphone Mux"},
499
500 /* right HP mixer */
d355c82a 501 {"Right HP Mixer", "Beep Playback Switch", "PCBEEP"},
83ac08c0
LG		 502 {"Right HP Mixer", "Voice Playback Switch", "Voice DAC"},
503 {"Right HP Mixer", "Aux Playback Switch", "Aux DAC"},
504 {"Right HP Mixer", "Bypass Playback Switch", "Right Line In"},
505 {"Right HP Mixer", "PCM Playback Switch", "Right DAC"},
506 {"Right HP Mixer", "MonoIn Playback Switch", "Mono In"},
507 {"Right HP Mixer", NULL, "Capture Headphone Mux"},
508
509 /* virtual mixer - mixes left & right channels for spk and mono */
510 {"AC97 Mixer", NULL, "Left DAC"},
511 {"AC97 Mixer", NULL, "Right DAC"},
512 {"Line Mixer", NULL, "Right Line In"},
513 {"Line Mixer", NULL, "Left Line In"},
514 {"HP Mixer", NULL, "Left HP Mixer"},
515 {"HP Mixer", NULL, "Right HP Mixer"},
516 {"Capture Mixer", NULL, "Left Capture Source"},
517 {"Capture Mixer", NULL, "Right Capture Source"},
518
519 /* speaker mixer */
d355c82a 520 {"Speaker Mixer", "Beep Playback Switch", "PCBEEP"},
83ac08c0
LG		 521 {"Speaker Mixer", "Voice Playback Switch", "Voice DAC"},
522 {"Speaker Mixer", "Aux Playback Switch", "Aux DAC"},
523 {"Speaker Mixer", "Bypass Playback Switch", "Line Mixer"},
524 {"Speaker Mixer", "PCM Playback Switch", "AC97 Mixer"},
525 {"Speaker Mixer", "MonoIn Playback Switch", "Mono In"},
526
527 /* mono mixer */
d355c82a 528 {"Mono Mixer", "Beep Playback Switch", "PCBEEP"},
83ac08c0
LG		 529 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
530 {"Mono Mixer", "Aux Playback Switch", "Aux DAC"},
531 {"Mono Mixer", "Bypass Playback Switch", "Line Mixer"},
532 {"Mono Mixer", "PCM Playback Switch", "AC97 Mixer"},
c0bbf48d
RJ		 533 {"Mono Mixer", "Mic 1 Sidetone Switch", "Mic A PGA"},
534 {"Mono Mixer", "Mic 2 Sidetone Switch", "Mic B PGA"},
83ac08c0
LG		 535 {"Mono Mixer", NULL, "Capture Mono Mux"},
536
537 /* DAC inv mux 1 */
538 {"DAC Inv Mux 1", "Mono", "Mono Mixer"},
539 {"DAC Inv Mux 1", "Speaker", "Speaker Mixer"},
540 {"DAC Inv Mux 1", "Left Headphone", "Left HP Mixer"},
541 {"DAC Inv Mux 1", "Right Headphone", "Right HP Mixer"},
542 {"DAC Inv Mux 1", "Headphone Mono", "HP Mixer"},
543
544 /* DAC inv mux 2 */
545 {"DAC Inv Mux 2", "Mono", "Mono Mixer"},
546 {"DAC Inv Mux 2", "Speaker", "Speaker Mixer"},
547 {"DAC Inv Mux 2", "Left Headphone", "Left HP Mixer"},
548 {"DAC Inv Mux 2", "Right Headphone", "Right HP Mixer"},
549 {"DAC Inv Mux 2", "Headphone Mono", "HP Mixer"},
550
551 /* headphone left mux */
552 {"Left Headphone Out Mux", "Headphone", "Left HP Mixer"},
553
554 /* headphone right mux */
555 {"Right Headphone Out Mux", "Headphone", "Right HP Mixer"},
556
557 /* speaker left mux */
558 {"Left Speaker Out Mux", "Headphone", "Left HP Mixer"},
559 {"Left Speaker Out Mux", "Speaker", "Speaker Mixer"},
560 {"Left Speaker Out Mux", "Inv", "DAC Inv Mux 1"},
561
562 /* speaker right mux */
563 {"Right Speaker Out Mux", "Headphone", "Right HP Mixer"},
564 {"Right Speaker Out Mux", "Speaker", "Speaker Mixer"},
565 {"Right Speaker Out Mux", "Inv", "DAC Inv Mux 2"},
566
567 /* mono mux */
568 {"Mono Out Mux", "Mono", "Mono Mixer"},
569 {"Mono Out Mux", "Inv", "DAC Inv Mux 1"},
570
571 /* out 3 mux */
572 {"Out 3 Mux", "Inv 1", "DAC Inv Mux 1"},
573
574 /* out 4 mux */
575 {"Out 4 Mux", "Inv 2", "DAC Inv Mux 2"},
576
577 /* output pga */
578 {"HPL", NULL, "Left Headphone"},
579 {"Left Headphone", NULL, "Left Headphone Out Mux"},
580 {"HPR", NULL, "Right Headphone"},
581 {"Right Headphone", NULL, "Right Headphone Out Mux"},
582 {"OUT3", NULL, "Out 3"},
583 {"Out 3", NULL, "Out 3 Mux"},
584 {"OUT4", NULL, "Out 4"},
585 {"Out 4", NULL, "Out 4 Mux"},
586 {"SPKL", NULL, "Left Speaker"},
587 {"Left Speaker", NULL, "Left Speaker Out Mux"},
588 {"SPKR", NULL, "Right Speaker"},
589 {"Right Speaker", NULL, "Right Speaker Out Mux"},
590 {"MONO", NULL, "Mono Out"},
591 {"Mono Out", NULL, "Mono Out Mux"},
592
593 /* input pga */
594 {"Left Line In", NULL, "LINEL"},
595 {"Right Line In", NULL, "LINER"},
596 {"Mono In", NULL, "MONOIN"},
597 {"Mic A PGA", NULL, "Mic A Pre Amp"},
598 {"Mic B PGA", NULL, "Mic B Pre Amp"},
599
600 /* left capture select */
601 {"Left Capture Source", "Mic 1", "Mic A Pre Amp"},
602 {"Left Capture Source", "Mic 2", "Mic B Pre Amp"},
603 {"Left Capture Source", "Line", "LINEL"},
604 {"Left Capture Source", "Mono In", "MONOIN"},
605 {"Left Capture Source", "Headphone", "Left HP Mixer"},
606 {"Left Capture Source", "Speaker", "Speaker Mixer"},
607 {"Left Capture Source", "Mono Out", "Mono Mixer"},
608
609 /* right capture select */
610 {"Right Capture Source", "Mic 1", "Mic A Pre Amp"},
611 {"Right Capture Source", "Mic 2", "Mic B Pre Amp"},
612 {"Right Capture Source", "Line", "LINER"},
613 {"Right Capture Source", "Mono In", "MONOIN"},
614 {"Right Capture Source", "Headphone", "Right HP Mixer"},
615 {"Right Capture Source", "Speaker", "Speaker Mixer"},
616 {"Right Capture Source", "Mono Out", "Mono Mixer"},
617
618 /* left ADC */
619 {"Left ADC", NULL, "Left Capture Source"},
ccbc301e
MB		 620 {"Left Voice ADC", NULL, "Left ADC"},
621 {"Left HiFi ADC", NULL, "Left ADC"},
83ac08c0
LG		 622
623 /* right ADC */
624 {"Right ADC", NULL, "Right Capture Source"},
ccbc301e
MB		 625 {"Right Voice ADC", NULL, "Right ADC"},
626 {"Right HiFi ADC", NULL, "Right ADC"},
83ac08c0
LG		 627
628 /* mic */
629 {"Mic A Pre Amp", NULL, "Mic A Source"},
630 {"Mic A Source", "Mic 1", "MIC1"},
631 {"Mic A Source", "Mic 2 A", "MIC2A"},
632 {"Mic A Source", "Mic 2 B", "Mic B Source"},
633 {"Mic B Pre Amp", "MPB", "Mic B Source"},
634 {"Mic B Source", NULL, "MIC2B"},
635
636 /* headphone capture */
637 {"Capture Headphone Mux", "Stereo", "Capture Mixer"},
638 {"Capture Headphone Mux", "Left", "Left Capture Source"},
639 {"Capture Headphone Mux", "Right", "Right Capture Source"},
640
641 /* mono capture */
642 {"Capture Mono Mux", "Stereo", "Capture Mixer"},
643 {"Capture Mono Mux", "Left", "Left Capture Source"},
644 {"Capture Mono Mux", "Right", "Right Capture Source"},
83ac08c0
LG		 645};
646
700dadfe 647static bool wm9713_readable_reg(struct device *dev, unsigned int reg)
83ac08c0 648{
700dadfe
RJ		 649 switch (reg) {
650 case AC97_RESET ... AC97_PCM_SURR_DAC_RATE:
651 case AC97_PCM_LR_ADC_RATE:
652 case AC97_CENTER_LFE_MASTER:
653 case AC97_SPDIF ... AC97_LINE1_LEVEL:
654 case AC97_GPIO_CFG ... 0x5c:
655 case AC97_CODEC_CLASS_REV ... AC97_PCI_SID:
656 case 0x74 ... AC97_VENDOR_ID2:
657 return true;
658 default:
659 return false;
83ac08c0
LG		 660 }
661}
662
700dadfe 663static bool wm9713_writeable_reg(struct device *dev, unsigned int reg)
83ac08c0 664{
700dadfe
RJ		 665 switch (reg) {
666 case AC97_VENDOR_ID1:
667 case AC97_VENDOR_ID2:
668 return false;
669 default:
670 return wm9713_readable_reg(dev, reg);
671 }
672}
358a8bb5 673
700dadfe
RJ		 674static const struct reg_default wm9713_reg_defaults[] = {
675 { 0x02, 0x8080 }, /* Speaker Output Volume */
676 { 0x04, 0x8080 }, /* Headphone Output Volume */
677 { 0x06, 0x8080 }, /* Out3/OUT4 Volume */
678 { 0x08, 0xc880 }, /* Mono Volume */
679 { 0x0a, 0xe808 }, /* LINEIN Volume */
680 { 0x0c, 0xe808 }, /* DAC PGA Volume */
681 { 0x0e, 0x0808 }, /* MIC PGA Volume */
682 { 0x10, 0x00da }, /* MIC Routing Control */
683 { 0x12, 0x8000 }, /* Record PGA Volume */
684 { 0x14, 0xd600 }, /* Record Routing */
685 { 0x16, 0xaaa0 }, /* PCBEEP Volume */
686 { 0x18, 0xaaa0 }, /* VxDAC Volume */
687 { 0x1a, 0xaaa0 }, /* AUXDAC Volume */
688 { 0x1c, 0x0000 }, /* Output PGA Mux */
689 { 0x1e, 0x0000 }, /* DAC 3D control */
690 { 0x20, 0x0f0f }, /* DAC Tone Control*/
691 { 0x22, 0x0040 }, /* MIC Input Select & Bias */
692 { 0x24, 0x0000 }, /* Output Volume Mapping & Jack */
693 { 0x26, 0x7f00 }, /* Powerdown Ctrl/Stat*/
694 { 0x28, 0x0405 }, /* Extended Audio ID */
695 { 0x2a, 0x0410 }, /* Extended Audio Start/Ctrl */
696 { 0x2c, 0xbb80 }, /* Audio DACs Sample Rate */
697 { 0x2e, 0xbb80 }, /* AUXDAC Sample Rate */
698 { 0x32, 0xbb80 }, /* Audio ADCs Sample Rate */
699 { 0x36, 0x4523 }, /* PCM codec control */
700 { 0x3a, 0x2000 }, /* SPDIF control */
701 { 0x3c, 0xfdff }, /* Powerdown 1 */
702 { 0x3e, 0xffff }, /* Powerdown 2 */
703 { 0x40, 0x0000 }, /* General Purpose */
704 { 0x42, 0x0000 }, /* Fast Power-Up Control */
705 { 0x44, 0x0080 }, /* MCLK/PLL Control */
706 { 0x46, 0x0000 }, /* MCLK/PLL Control */
707 { 0x4c, 0xfffe }, /* GPIO Pin Configuration */
708 { 0x4e, 0xffff }, /* GPIO Pin Polarity / Type */
709 { 0x50, 0x0000 }, /* GPIO Pin Sticky */
710 { 0x52, 0x0000 }, /* GPIO Pin Wake-Up */
711 /* GPIO Pin Status */
712 { 0x56, 0xfffe }, /* GPIO Pin Sharing */
713 { 0x58, 0x4000 }, /* GPIO PullUp/PullDown */
714 { 0x5a, 0x0000 }, /* Additional Functions 1 */
715 { 0x5c, 0x0000 }, /* Additional Functions 2 */
716 { 0x60, 0xb032 }, /* ALC Control */
717 { 0x62, 0x3e00 }, /* ALC / Noise Gate Control */
718 { 0x64, 0x0000 }, /* AUXDAC input control */
719 { 0x74, 0x0000 }, /* Digitiser Reg 1 */
720 { 0x76, 0x0006 }, /* Digitiser Reg 2 */
721 { 0x78, 0x0001 }, /* Digitiser Reg 3 */
722 { 0x7a, 0x0000 }, /* Digitiser Read Back */
723};
83ac08c0 724
700dadfe
RJ		 725static const struct regmap_config wm9713_regmap_config = {
726 .reg_bits = 16,
727 .reg_stride = 2,
728 .val_bits = 16,
729 .max_register = 0x7e,
730 .cache_type = REGCACHE_RBTREE,
731
732 .reg_defaults = wm9713_reg_defaults,
733 .num_reg_defaults = ARRAY_SIZE(wm9713_reg_defaults),
734 .volatile_reg = regmap_ac97_default_volatile,
735 .readable_reg = wm9713_readable_reg,
736 .writeable_reg = wm9713_writeable_reg,
737};
83ac08c0
LG		 738
739/* PLL divisors */
740struct _pll_div {
741 u32 divsel:1;
742 u32 divctl:1;
743 u32 lf:1;
744 u32 n:4;
745 u32 k:24;
746};
747
748/* The size in bits of the PLL divide multiplied by 10
749 * to allow rounding later */
750#define FIXED_PLL_SIZE ((1 << 22) * 10)
751
8ea99bc6 752static void pll_factors(struct snd_soc_component *component,
a6c2b07f 753 struct _pll_div *pll_div, unsigned int source)
83ac08c0
LG		 754{
755 u64 Kpart;
756 unsigned int K, Ndiv, Nmod, target;
757
758 /* The the PLL output is always 98.304MHz. */
759 target = 98304000;
760
761 /* If the input frequency is over 14.4MHz then scale it down. */
762 if (source > 14400000) {
763 source >>= 1;
764 pll_div->divsel = 1;
765
766 if (source > 14400000) {
767 source >>= 1;
768 pll_div->divctl = 1;
769 } else
770 pll_div->divctl = 0;
771
772 } else {
773 pll_div->divsel = 0;
774 pll_div->divctl = 0;
775 }
776
777 /* Low frequency sources require an additional divide in the
778 * loop.
779 */
780 if (source < 8192000) {
781 pll_div->lf = 1;
782 target >>= 2;
783 } else
784 pll_div->lf = 0;
785
786 Ndiv = target / source;
787 if ((Ndiv < 5) || (Ndiv > 12))
8ea99bc6 788 dev_warn(component->dev,
449bd54d 789 "WM9713 PLL N value %u out of recommended range!\n",
83ac08c0
LG		 790 Ndiv);
791
792 pll_div->n = Ndiv;
793 Nmod = target % source;
794 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
795
796 do_div(Kpart, source);
797
798 K = Kpart & 0xFFFFFFFF;
799
800 /* Check if we need to round */
801 if ((K % 10) >= 5)
802 K += 5;
803
804 /* Move down to proper range now rounding is done */
805 K /= 10;
806
807 pll_div->k = K;
808}
809
810/**
811 * Please note that changing the PLL input frequency may require
812 * resynchronisation with the AC97 controller.
813 */
8ea99bc6 814static int wm9713_set_pll(struct snd_soc_component *component,
83ac08c0
LG		 815 int pll_id, unsigned int freq_in, unsigned int freq_out)
816{
8ea99bc6 817 struct wm9713_priv *wm9713 = snd_soc_component_get_drvdata(component);
83ac08c0
LG		 818 u16 reg, reg2;
819 struct _pll_div pll_div;
820
821 /* turn PLL off ? */
c42f69bb 822 if (freq_in == 0) {
83ac08c0 823 /* disable PLL power and select ext source */
8ea99bc6
KM		 824 snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0080, 0x0080);
825 snd_soc_component_update_bits(component, AC97_EXTENDED_MID, 0x0200, 0x0200);
c42f69bb 826 wm9713->pll_in = 0;
83ac08c0
LG		 827 return 0;
828 }
829
8ea99bc6 830 pll_factors(component, &pll_div, freq_in);
83ac08c0
LG		 831
832 if (pll_div.k == 0) {
833 reg = (pll_div.n << 12) | (pll_div.lf << 11) |
834 (pll_div.divsel << 9) | (pll_div.divctl << 8);
8ea99bc6 835 snd_soc_component_write(component, AC97_LINE1_LEVEL, reg);
83ac08c0
LG		 836 } else {
837 /* write the fractional k to the reg 0x46 pages */
838 reg2 = (pll_div.n << 12) | (pll_div.lf << 11) | (1 << 10) |
839 (pll_div.divsel << 9) | (pll_div.divctl << 8);
840
841 /* K [21:20] */
842 reg = reg2 | (0x5 << 4) | (pll_div.k >> 20);
8ea99bc6 843 snd_soc_component_write(component, AC97_LINE1_LEVEL, reg);
83ac08c0
LG		 844
845 /* K [19:16] */
846 reg = reg2 | (0x4 << 4) | ((pll_div.k >> 16) & 0xf);
8ea99bc6 847 snd_soc_component_write(component, AC97_LINE1_LEVEL, reg);
83ac08c0
LG		 848
849 /* K [15:12] */
850 reg = reg2 | (0x3 << 4) | ((pll_div.k >> 12) & 0xf);
8ea99bc6 851 snd_soc_component_write(component, AC97_LINE1_LEVEL, reg);
83ac08c0
LG		 852
853 /* K [11:8] */
854 reg = reg2 | (0x2 << 4) | ((pll_div.k >> 8) & 0xf);
8ea99bc6 855 snd_soc_component_write(component, AC97_LINE1_LEVEL, reg);
83ac08c0
LG		 856
857 /* K [7:4] */
858 reg = reg2 | (0x1 << 4) | ((pll_div.k >> 4) & 0xf);
8ea99bc6 859 snd_soc_component_write(component, AC97_LINE1_LEVEL, reg);
83ac08c0
LG		 860
861 reg = reg2 | (0x0 << 4) | (pll_div.k & 0xf); /* K [3:0] */
8ea99bc6 862 snd_soc_component_write(component, AC97_LINE1_LEVEL, reg);
83ac08c0
LG		 863 }
864
865 /* turn PLL on and select as source */
8ea99bc6
KM		 866 snd_soc_component_update_bits(component, AC97_EXTENDED_MID, 0x0200, 0x0000);
867 snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0080, 0x0000);
83ac08c0
LG		 868 wm9713->pll_in = freq_in;
869
870 /* wait 10ms AC97 link frames for the link to stabilise */
871 schedule_timeout_interruptible(msecs_to_jiffies(10));
872 return 0;
873}
874
85488037
MB		 875static int wm9713_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
876 int source, unsigned int freq_in, unsigned int freq_out)
83ac08c0 877{
8ea99bc6
KM		 878 struct snd_soc_component *component = codec_dai->component;
879 return wm9713_set_pll(component, pll_id, freq_in, freq_out);
83ac08c0
LG		 880}
881
882/*
883 * Tristate the PCM DAI lines, tristate can be disabled by calling
884 * wm9713_set_dai_fmt()
885 */
e550e17f 886static int wm9713_set_dai_tristate(struct snd_soc_dai *codec_dai,
83ac08c0
LG		 887 int tristate)
888{
8ea99bc6 889 struct snd_soc_component *component = codec_dai->component;
83ac08c0
LG		 890
891 if (tristate)
8ea99bc6 892 snd_soc_component_update_bits(component, AC97_CENTER_LFE_MASTER,
fa1a51f3 893 0x6000, 0x0000);
83ac08c0
LG		 894
895 return 0;
896}
897
898/*
899 * Configure WM9713 clock dividers.
900 * Voice DAC needs 256 FS
901 */
e550e17f 902static int wm9713_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
83ac08c0
LG		 903 int div_id, int div)
904{
8ea99bc6 905 struct snd_soc_component *component = codec_dai->component;
83ac08c0
LG		 906
907 switch (div_id) {
908 case WM9713_PCMCLK_DIV:
8ea99bc6 909 snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0f00, div);
83ac08c0
LG		 910 break;
911 case WM9713_CLKA_MULT:
8ea99bc6 912 snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0002, div);
83ac08c0
LG		 913 break;
914 case WM9713_CLKB_MULT:
8ea99bc6 915 snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0004, div);
83ac08c0
LG		 916 break;
917 case WM9713_HIFI_DIV:
8ea99bc6 918 snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x7000, div);
83ac08c0
LG		 919 break;
920 case WM9713_PCMBCLK_DIV:
8ea99bc6 921 snd_soc_component_update_bits(component, AC97_CENTER_LFE_MASTER, 0x0e00, div);
83ac08c0
LG		 922 break;
923 case WM9713_PCMCLK_PLL_DIV:
8ea99bc6 924 snd_soc_component_update_bits(component, AC97_LINE1_LEVEL,
fa1a51f3 925 0x007f, div | 0x60);
83ac08c0
LG		 926 break;
927 case WM9713_HIFI_PLL_DIV:
8ea99bc6 928 snd_soc_component_update_bits(component, AC97_LINE1_LEVEL,
fa1a51f3 929 0x007f, div | 0x70);
83ac08c0
LG		 930 break;
931 default:
932 return -EINVAL;
933 }
934
935 return 0;
936}
937
e550e17f 938static int wm9713_set_dai_fmt(struct snd_soc_dai *codec_dai,
83ac08c0
LG		 939 unsigned int fmt)
940{
8ea99bc6
KM		 941 struct snd_soc_component *component = codec_dai->component;
942 u16 gpio = snd_soc_component_read32(component, AC97_GPIO_CFG) & 0xffc5;
83ac08c0
LG		 943 u16 reg = 0x8000;
944
945 /* clock masters */
946 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
947 case SND_SOC_DAIFMT_CBM_CFM:
948 reg |= 0x4000;
949 gpio |= 0x0010;
950 break;
951 case SND_SOC_DAIFMT_CBM_CFS:
952 reg |= 0x6000;
953 gpio |= 0x0018;
954 break;
955 case SND_SOC_DAIFMT_CBS_CFS:
d133b0ce 956 reg |= 0x2000;
83ac08c0
LG		 957 gpio |= 0x001a;
958 break;
959 case SND_SOC_DAIFMT_CBS_CFM:
960 gpio |= 0x0012;
961 break;
962 }
963
964 /* clock inversion */
965 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
966 case SND_SOC_DAIFMT_IB_IF:
967 reg |= 0x00c0;
968 break;
969 case SND_SOC_DAIFMT_IB_NF:
970 reg |= 0x0080;
971 break;
972 case SND_SOC_DAIFMT_NB_IF:
973 reg |= 0x0040;
974 break;
975 }
976
977 /* DAI format */
978 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
979 case SND_SOC_DAIFMT_I2S:
980 reg |= 0x0002;
981 break;
982 case SND_SOC_DAIFMT_RIGHT_J:
983 break;
984 case SND_SOC_DAIFMT_LEFT_J:
985 reg |= 0x0001;
986 break;
987 case SND_SOC_DAIFMT_DSP_A:
988 reg |= 0x0003;
989 break;
990 case SND_SOC_DAIFMT_DSP_B:
991 reg |= 0x0043;
992 break;
993 }
994
8ea99bc6
KM		 995 snd_soc_component_write(component, AC97_GPIO_CFG, gpio);
996 snd_soc_component_write(component, AC97_CENTER_LFE_MASTER, reg);
83ac08c0
LG		 997 return 0;
998}
999
1000static int wm9713_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1001 struct snd_pcm_hw_params *params,
1002 struct snd_soc_dai *dai)
83ac08c0 1003{
8ea99bc6 1004 struct snd_soc_component *component = dai->component;
83ac08c0 1005
fa1a51f3 1006 /* enable PCM interface in master mode */
563fe71f
MB		 1007 switch (params_width(params)) {
1008 case 16:
83ac08c0 1009 break;
563fe71f 1010 case 20:
8ea99bc6 1011 snd_soc_component_update_bits(component, AC97_CENTER_LFE_MASTER,
fa1a51f3 1012 0x000c, 0x0004);
83ac08c0 1013 break;
563fe71f 1014 case 24:
8ea99bc6 1015 snd_soc_component_update_bits(component, AC97_CENTER_LFE_MASTER,
fa1a51f3 1016 0x000c, 0x0008);
83ac08c0 1017 break;
563fe71f 1018 case 32:
8ea99bc6 1019 snd_soc_component_update_bits(component, AC97_CENTER_LFE_MASTER,
fa1a51f3 1020 0x000c, 0x000c);
83ac08c0
LG		 1021 break;
1022 }
83ac08c0
LG		 1023 return 0;
1024}
1025
dee89c4d
MB		 1026static int ac97_hifi_prepare(struct snd_pcm_substream *substream,
1027 struct snd_soc_dai *dai)
83ac08c0 1028{
8ea99bc6 1029 struct snd_soc_component *component = dai->component;
83ac08c0 1030 struct snd_pcm_runtime *runtime = substream->runtime;
83ac08c0 1031 int reg;
83ac08c0 1032
8ea99bc6 1033 snd_soc_component_update_bits(component, AC97_EXTENDED_STATUS, 0x0001, 0x0001);
83ac08c0
LG		 1034
1035 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1036 reg = AC97_PCM_FRONT_DAC_RATE;
1037 else
1038 reg = AC97_PCM_LR_ADC_RATE;
1039
8ea99bc6 1040 return snd_soc_component_write(component, reg, runtime->rate);
83ac08c0
LG		 1041}
1042
dee89c4d
MB		 1043static int ac97_aux_prepare(struct snd_pcm_substream *substream,
1044 struct snd_soc_dai *dai)
83ac08c0 1045{
8ea99bc6 1046 struct snd_soc_component *component = dai->component;
83ac08c0 1047 struct snd_pcm_runtime *runtime = substream->runtime;
83ac08c0 1048
8ea99bc6
KM		 1049 snd_soc_component_update_bits(component, AC97_EXTENDED_STATUS, 0x0001, 0x0001);
1050 snd_soc_component_update_bits(component, AC97_PCI_SID, 0x8000, 0x8000);
83ac08c0
LG		 1051
1052 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
1053 return -ENODEV;
1054
8ea99bc6 1055 return snd_soc_component_write(component, AC97_PCM_SURR_DAC_RATE, runtime->rate);
83ac08c0
LG		 1056}
1057
5415552d
MB		 1058#define WM9713_RATES (SNDRV_PCM_RATE_8000 | \
1059 SNDRV_PCM_RATE_11025 | \
1060 SNDRV_PCM_RATE_22050 | \
1061 SNDRV_PCM_RATE_44100 | \
1062 SNDRV_PCM_RATE_48000)
1063
1064#define WM9713_PCM_RATES (SNDRV_PCM_RATE_8000 | \
1065 SNDRV_PCM_RATE_11025 | \
1066 SNDRV_PCM_RATE_16000 | \
1067 SNDRV_PCM_RATE_22050 | \
1068 SNDRV_PCM_RATE_44100 | \
1069 SNDRV_PCM_RATE_48000)
83ac08c0
LG		 1070
1071#define WM9713_PCM_FORMATS \
e712bfca
MS		 1072 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1073 SNDRV_PCM_FMTBIT_S24_LE)
83ac08c0 1074
85e7652d 1075static const struct snd_soc_dai_ops wm9713_dai_ops_hifi = {
6335d055
EM		 1076 .prepare = ac97_hifi_prepare,
1077 .set_clkdiv = wm9713_set_dai_clkdiv,
1078 .set_pll = wm9713_set_dai_pll,
1079};
1080
85e7652d 1081static const struct snd_soc_dai_ops wm9713_dai_ops_aux = {
6335d055
EM		 1082 .prepare = ac97_aux_prepare,
1083 .set_clkdiv = wm9713_set_dai_clkdiv,
1084 .set_pll = wm9713_set_dai_pll,
1085};
1086
85e7652d 1087static const struct snd_soc_dai_ops wm9713_dai_ops_voice = {
6335d055 1088 .hw_params = wm9713_pcm_hw_params,
6335d055
EM		 1089 .set_clkdiv = wm9713_set_dai_clkdiv,
1090 .set_pll = wm9713_set_dai_pll,
1091 .set_fmt = wm9713_set_dai_fmt,
1092 .set_tristate = wm9713_set_dai_tristate,
1093};
1094
f0fba2ad 1095static struct snd_soc_dai_driver wm9713_dai[] = {
83ac08c0 1096{
f0fba2ad 1097 .name = "wm9713-hifi",
83ac08c0
LG		 1098 .playback = {
1099 .stream_name = "HiFi Playback",
1100 .channels_min = 1,
1101 .channels_max = 2,
1102 .rates = WM9713_RATES,
33f503c9 1103 .formats = SND_SOC_STD_AC97_FMTS,},
83ac08c0
LG		 1104 .capture = {
1105 .stream_name = "HiFi Capture",
1106 .channels_min = 1,
1107 .channels_max = 2,
1108 .rates = WM9713_RATES,
33f503c9 1109 .formats = SND_SOC_STD_AC97_FMTS,},
6335d055 1110 .ops = &wm9713_dai_ops_hifi,
83ac08c0
LG		 1111 },
1112 {
f0fba2ad 1113 .name = "wm9713-aux",
83ac08c0
LG		 1114 .playback = {
1115 .stream_name = "Aux Playback",
1116 .channels_min = 1,
1117 .channels_max = 1,
1118 .rates = WM9713_RATES,
33f503c9 1119 .formats = SND_SOC_STD_AC97_FMTS,},
6335d055 1120 .ops = &wm9713_dai_ops_aux,
83ac08c0
LG		 1121 },
1122 {
f0fba2ad 1123 .name = "wm9713-voice",
83ac08c0
LG		 1124 .playback = {
1125 .stream_name = "Voice Playback",
1126 .channels_min = 1,
1127 .channels_max = 1,
5415552d 1128 .rates = WM9713_PCM_RATES,
83ac08c0
LG		 1129 .formats = WM9713_PCM_FORMATS,},
1130 .capture = {
1131 .stream_name = "Voice Capture",
1132 .channels_min = 1,
1133 .channels_max = 2,
5415552d 1134 .rates = WM9713_PCM_RATES,
83ac08c0 1135 .formats = WM9713_PCM_FORMATS,},
6335d055 1136 .ops = &wm9713_dai_ops_voice,
f4976116 1137 .symmetric_rates = 1,
83ac08c0
LG		 1138 },
1139};
83ac08c0 1140
8ea99bc6 1141static int wm9713_set_bias_level(struct snd_soc_component *component,
0be9898a 1142 enum snd_soc_bias_level level)
83ac08c0 1143{
0be9898a
MB		 1144 switch (level) {
1145 case SND_SOC_BIAS_ON:
83ac08c0 1146 /* enable thermal shutdown */
8ea99bc6 1147 snd_soc_component_update_bits(component, AC97_EXTENDED_MID, 0xe400, 0x0000);
83ac08c0 1148 break;
0be9898a 1149 case SND_SOC_BIAS_PREPARE:
83ac08c0 1150 break;
0be9898a 1151 case SND_SOC_BIAS_STANDBY:
83ac08c0 1152 /* enable master bias and vmid */
8ea99bc6
KM		 1153 snd_soc_component_update_bits(component, AC97_EXTENDED_MID, 0xc400, 0x0000);
1154 snd_soc_component_write(component, AC97_POWERDOWN, 0x0000);
83ac08c0 1155 break;
0be9898a 1156 case SND_SOC_BIAS_OFF:
83ac08c0 1157 /* disable everything including AC link */
8ea99bc6
KM		 1158 snd_soc_component_write(component, AC97_EXTENDED_MID, 0xffff);
1159 snd_soc_component_write(component, AC97_EXTENDED_MSTATUS, 0xffff);
1160 snd_soc_component_write(component, AC97_POWERDOWN, 0xffff);
83ac08c0
LG		 1161 break;
1162 }
83ac08c0
LG		 1163 return 0;
1164}
1165
8ea99bc6 1166static int wm9713_soc_suspend(struct snd_soc_component *component)
83ac08c0 1167{
87b57fe2
MB		 1168 /* Disable everything except touchpanel - that will be handled
1169 * by the touch driver and left disabled if touch is not in
1170 * use. */
8ea99bc6 1171 snd_soc_component_update_bits(component, AC97_EXTENDED_MID, 0x7fff,
fa1a51f3 1172 0x7fff);
8ea99bc6
KM		 1173 snd_soc_component_write(component, AC97_EXTENDED_MSTATUS, 0xffff);
1174 snd_soc_component_write(component, AC97_POWERDOWN, 0x6f00);
1175 snd_soc_component_write(component, AC97_POWERDOWN, 0xffff);
83ac08c0 1176
83ac08c0
LG		 1177 return 0;
1178}
1179
8ea99bc6 1180static int wm9713_soc_resume(struct snd_soc_component *component)
83ac08c0 1181{
8ea99bc6 1182 struct wm9713_priv *wm9713 = snd_soc_component_get_drvdata(component);
700dadfe 1183 int ret;
83ac08c0 1184
310398f5
LPC		 1185 ret = snd_ac97_reset(wm9713->ac97, true, WM9713_VENDOR_ID,
1186 WM9713_VENDOR_ID_MASK);
a6c2b07f 1187 if (ret < 0)
83ac08c0 1188 return ret;
83ac08c0 1189
8ea99bc6 1190 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
83ac08c0
LG		 1191
1192 /* do we need to re-start the PLL ? */
c42f69bb 1193 if (wm9713->pll_in)
8ea99bc6 1194 wm9713_set_pll(component, 0, wm9713->pll_in, 0);
83ac08c0
LG		 1195
1196 /* only synchronise the codec if warm reset failed */
1197 if (ret == 0) {
8ea99bc6
KM		 1198 regcache_mark_dirty(component->regmap);
1199 snd_soc_component_cache_sync(component);
83ac08c0
LG		 1200 }
1201
83ac08c0
LG		 1202 return ret;
1203}
1204
8ea99bc6 1205static int wm9713_soc_probe(struct snd_soc_component *component)
83ac08c0 1206{
8ea99bc6 1207 struct wm9713_priv *wm9713 = snd_soc_component_get_drvdata(component);
9bd400ca 1208 struct regmap *regmap = NULL;
83ac08c0 1209
9bd400ca
RJ		 1210 if (wm9713->mfd_pdata) {
1211 wm9713->ac97 = wm9713->mfd_pdata->ac97;
1212 regmap = wm9713->mfd_pdata->regmap;
576ce407 1213 } else if (IS_ENABLED(CONFIG_SND_SOC_AC97_BUS)) {
8ea99bc6 1214 wm9713->ac97 = snd_soc_new_ac97_component(component, WM9713_VENDOR_ID,
9bd400ca
RJ		 1215 WM9713_VENDOR_ID_MASK);
1216 if (IS_ERR(wm9713->ac97))
1217 return PTR_ERR(wm9713->ac97);
1218 regmap = regmap_init_ac97(wm9713->ac97, &wm9713_regmap_config);
1219 if (IS_ERR(regmap)) {
8ea99bc6 1220 snd_soc_free_ac97_component(wm9713->ac97);
9bd400ca
RJ		 1221 return PTR_ERR(regmap);
1222 }
576ce407
AB		 1223 } else {
1224 return -ENXIO;
700dadfe
RJ		 1225 }
1226
8ea99bc6 1227 snd_soc_component_init_regmap(component, regmap);
700dadfe 1228
83ac08c0 1229 /* unmute the adc - move to kcontrol */
8ea99bc6 1230 snd_soc_component_update_bits(component, AC97_CD, 0x7fff, 0x0000);
83ac08c0 1231
83ac08c0 1232 return 0;
83ac08c0
LG		 1233}
1234
8ea99bc6 1235static void wm9713_soc_remove(struct snd_soc_component *component)
83ac08c0 1236{
8ea99bc6 1237 struct wm9713_priv *wm9713 = snd_soc_component_get_drvdata(component);
358a8bb5 1238
576ce407 1239 if (IS_ENABLED(CONFIG_SND_SOC_AC97_BUS) && !wm9713->mfd_pdata) {
8ea99bc6
KM		 1240 snd_soc_component_exit_regmap(component);
1241 snd_soc_free_ac97_component(wm9713->ac97);
9bd400ca 1242 }
83ac08c0
LG		 1243}
1244
8ea99bc6
KM		 1245static const struct snd_soc_component_driver soc_component_dev_wm9713 = {
1246 .probe = wm9713_soc_probe,
1247 .remove = wm9713_soc_remove,
1248 .suspend = wm9713_soc_suspend,
1249 .resume = wm9713_soc_resume,
1250 .set_bias_level = wm9713_set_bias_level,
1251 .controls = wm9713_snd_ac97_controls,
1252 .num_controls = ARRAY_SIZE(wm9713_snd_ac97_controls),
1253 .dapm_widgets = wm9713_dapm_widgets,
1254 .num_dapm_widgets = ARRAY_SIZE(wm9713_dapm_widgets),
1255 .dapm_routes = wm9713_audio_map,
1256 .num_dapm_routes = ARRAY_SIZE(wm9713_audio_map),
1257 .idle_bias_on = 1,
1258 .use_pmdown_time = 1,
1259 .endianness = 1,
1260 .non_legacy_dai_naming = 1,
f0fba2ad
LG		 1261};
1262
7a79e94e 1263static int wm9713_probe(struct platform_device *pdev)
f0fba2ad 1264{
5efe89d9
LPC		 1265 struct wm9713_priv *wm9713;
1266
1267 wm9713 = devm_kzalloc(&pdev->dev, sizeof(*wm9713), GFP_KERNEL);
1268 if (wm9713 == NULL)
1269 return -ENOMEM;
1270
cf1f2ebe
LPC		 1271 mutex_init(&wm9713->lock);
1272
9bd400ca 1273 wm9713->mfd_pdata = dev_get_platdata(&pdev->dev);
5efe89d9
LPC		 1274 platform_set_drvdata(pdev, wm9713);
1275
8ea99bc6
KM		 1276 return devm_snd_soc_register_component(&pdev->dev,
1277 &soc_component_dev_wm9713, wm9713_dai, ARRAY_SIZE(wm9713_dai));
f0fba2ad
LG		 1278}
1279
1280static struct platform_driver wm9713_codec_driver = {
1281 .driver = {
1282 .name = "wm9713-codec",
f0fba2ad
LG		 1283 },
1284
1285 .probe = wm9713_probe,
83ac08c0 1286};
f0fba2ad 1287
5bbcc3c0 1288module_platform_driver(wm9713_codec_driver);
83ac08c0
LG		 1289
1290MODULE_DESCRIPTION("ASoC WM9713/WM9714 driver");
1291MODULE_AUTHOR("Liam Girdwood");
1292MODULE_LICENSE("GPL");
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