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Commit | Line | Data |
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310355c1 VB |
1 | /* |
2 | * ALSA PCM interface for the TI DAVINCI processor | |
3 | * | |
d6b52039 | 4 | * Author: Vladimir Barinov, <vbarinov@embeddedalley.com> |
310355c1 VB |
5 | * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com> |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/dma-mapping.h> | |
9cd28ab0 | 17 | #include <linux/kernel.h> |
310355c1 VB |
18 | |
19 | #include <sound/core.h> | |
20 | #include <sound/pcm.h> | |
21 | #include <sound/pcm_params.h> | |
22 | #include <sound/soc.h> | |
23 | ||
24 | #include <asm/dma.h> | |
82075af6 | 25 | #include <mach/edma.h> |
310355c1 VB |
26 | |
27 | #include "davinci-pcm.h" | |
28 | ||
310355c1 VB |
29 | static struct snd_pcm_hardware davinci_pcm_hardware = { |
30 | .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
31 | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | |
32 | SNDRV_PCM_INFO_PAUSE), | |
33 | .formats = (SNDRV_PCM_FMTBIT_S16_LE), | |
34 | .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | | |
35 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | | |
36 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | | |
37 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | | |
38 | SNDRV_PCM_RATE_KNOT), | |
39 | .rate_min = 8000, | |
40 | .rate_max = 96000, | |
41 | .channels_min = 2, | |
42 | .channels_max = 2, | |
43 | .buffer_bytes_max = 128 * 1024, | |
44 | .period_bytes_min = 32, | |
45 | .period_bytes_max = 8 * 1024, | |
46 | .periods_min = 16, | |
47 | .periods_max = 255, | |
48 | .fifo_size = 0, | |
49 | }; | |
50 | ||
51 | struct davinci_runtime_data { | |
52 | spinlock_t lock; | |
53 | int period; /* current DMA period */ | |
1587ea31 TK |
54 | int asp_channel; /* Master DMA channel */ |
55 | int asp_link[2]; /* asp parameter link channel, ping/pong */ | |
310355c1 VB |
56 | struct davinci_pcm_dma_params *params; /* DMA params */ |
57 | }; | |
58 | ||
59 | static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream) | |
60 | { | |
61 | struct davinci_runtime_data *prtd = substream->runtime->private_data; | |
62 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1587ea31 | 63 | int link = prtd->asp_link[0]; |
310355c1 VB |
64 | unsigned int period_size; |
65 | unsigned int dma_offset; | |
66 | dma_addr_t dma_pos; | |
67 | dma_addr_t src, dst; | |
68 | unsigned short src_bidx, dst_bidx; | |
4fa9c1a5 | 69 | unsigned short src_cidx, dst_cidx; |
310355c1 | 70 | unsigned int data_type; |
6a99fb5f | 71 | unsigned short acnt; |
310355c1 | 72 | unsigned int count; |
4fa9c1a5 | 73 | unsigned int fifo_level; |
310355c1 VB |
74 | |
75 | period_size = snd_pcm_lib_period_bytes(substream); | |
76 | dma_offset = prtd->period * period_size; | |
77 | dma_pos = runtime->dma_addr + dma_offset; | |
4fa9c1a5 | 78 | fifo_level = prtd->params->fifo_level; |
310355c1 | 79 | |
9cd28ab0 | 80 | pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d " |
1587ea31 | 81 | "dma_ptr = %x period_size=%x\n", link, dma_pos, period_size); |
310355c1 VB |
82 | |
83 | data_type = prtd->params->data_type; | |
84 | count = period_size / data_type; | |
4fa9c1a5 C |
85 | if (fifo_level) |
86 | count /= fifo_level; | |
310355c1 VB |
87 | |
88 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
89 | src = dma_pos; | |
90 | dst = prtd->params->dma_addr; | |
91 | src_bidx = data_type; | |
92 | dst_bidx = 0; | |
4fa9c1a5 C |
93 | src_cidx = data_type * fifo_level; |
94 | dst_cidx = 0; | |
310355c1 VB |
95 | } else { |
96 | src = prtd->params->dma_addr; | |
97 | dst = dma_pos; | |
98 | src_bidx = 0; | |
99 | dst_bidx = data_type; | |
4fa9c1a5 C |
100 | src_cidx = 0; |
101 | dst_cidx = data_type * fifo_level; | |
310355c1 VB |
102 | } |
103 | ||
6a99fb5f | 104 | acnt = prtd->params->acnt; |
1587ea31 TK |
105 | edma_set_src(link, src, INCR, W8BIT); |
106 | edma_set_dest(link, dst, INCR, W8BIT); | |
4fa9c1a5 | 107 | |
1587ea31 TK |
108 | edma_set_src_index(link, src_bidx, src_cidx); |
109 | edma_set_dest_index(link, dst_bidx, dst_cidx); | |
4fa9c1a5 C |
110 | |
111 | if (!fifo_level) | |
1587ea31 | 112 | edma_set_transfer_params(link, acnt, count, 1, 0, ASYNC); |
4fa9c1a5 | 113 | else |
1587ea31 | 114 | edma_set_transfer_params(link, acnt, fifo_level, count, |
4fa9c1a5 | 115 | fifo_level, ABSYNC); |
310355c1 VB |
116 | |
117 | prtd->period++; | |
118 | if (unlikely(prtd->period >= runtime->periods)) | |
119 | prtd->period = 0; | |
120 | } | |
121 | ||
1587ea31 | 122 | static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data) |
310355c1 VB |
123 | { |
124 | struct snd_pcm_substream *substream = data; | |
125 | struct davinci_runtime_data *prtd = substream->runtime->private_data; | |
126 | ||
1587ea31 | 127 | pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status); |
310355c1 VB |
128 | |
129 | if (unlikely(ch_status != DMA_COMPLETE)) | |
130 | return; | |
131 | ||
132 | if (snd_pcm_running(substream)) { | |
133 | snd_pcm_period_elapsed(substream); | |
134 | ||
135 | spin_lock(&prtd->lock); | |
136 | davinci_pcm_enqueue_dma(substream); | |
137 | spin_unlock(&prtd->lock); | |
138 | } | |
139 | } | |
140 | ||
141 | static int davinci_pcm_dma_request(struct snd_pcm_substream *substream) | |
142 | { | |
143 | struct davinci_runtime_data *prtd = substream->runtime->private_data; | |
82075af6 | 144 | struct edmacc_param p_ram; |
310355c1 VB |
145 | int ret; |
146 | ||
310355c1 | 147 | /* Request master DMA channel */ |
82075af6 | 148 | ret = edma_alloc_channel(prtd->params->channel, |
310355c1 | 149 | davinci_pcm_dma_irq, substream, |
82075af6 DB |
150 | EVENTQ_0); |
151 | if (ret < 0) | |
310355c1 | 152 | return ret; |
1587ea31 | 153 | prtd->asp_channel = ret; |
310355c1 | 154 | |
82075af6 | 155 | /* Request parameter RAM reload slot */ |
1587ea31 | 156 | ret = edma_alloc_slot(EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY); |
82075af6 | 157 | if (ret < 0) { |
1587ea31 | 158 | edma_free_channel(prtd->asp_channel); |
310355c1 VB |
159 | return ret; |
160 | } | |
1587ea31 | 161 | prtd->asp_link[0] = ret; |
82075af6 DB |
162 | |
163 | /* Issue transfer completion IRQ when the channel completes a | |
164 | * transfer, then always reload from the same slot (by a kind | |
165 | * of loopback link). The completion IRQ handler will update | |
166 | * the reload slot with a new buffer. | |
167 | * | |
168 | * REVISIT save p_ram here after setting up everything except | |
169 | * the buffer and its length (ccnt) ... use it as a template | |
170 | * so davinci_pcm_enqueue_dma() takes less time in IRQ. | |
171 | */ | |
1587ea31 TK |
172 | edma_read_slot(prtd->asp_link[0], &p_ram); |
173 | p_ram.opt |= TCINTEN | EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel)); | |
174 | p_ram.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5; | |
175 | edma_write_slot(prtd->asp_link[0], &p_ram); | |
310355c1 VB |
176 | |
177 | return 0; | |
178 | } | |
179 | ||
180 | static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd) | |
181 | { | |
182 | struct davinci_runtime_data *prtd = substream->runtime->private_data; | |
183 | int ret = 0; | |
184 | ||
185 | spin_lock(&prtd->lock); | |
186 | ||
187 | switch (cmd) { | |
188 | case SNDRV_PCM_TRIGGER_START: | |
189 | case SNDRV_PCM_TRIGGER_RESUME: | |
190 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
1587ea31 | 191 | edma_start(prtd->asp_channel); |
310355c1 VB |
192 | break; |
193 | case SNDRV_PCM_TRIGGER_STOP: | |
194 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
195 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
1587ea31 | 196 | edma_stop(prtd->asp_channel); |
310355c1 VB |
197 | break; |
198 | default: | |
199 | ret = -EINVAL; | |
200 | break; | |
201 | } | |
202 | ||
203 | spin_unlock(&prtd->lock); | |
204 | ||
205 | return ret; | |
206 | } | |
207 | ||
208 | static int davinci_pcm_prepare(struct snd_pcm_substream *substream) | |
209 | { | |
210 | struct davinci_runtime_data *prtd = substream->runtime->private_data; | |
82075af6 | 211 | struct edmacc_param temp; |
310355c1 VB |
212 | |
213 | prtd->period = 0; | |
214 | davinci_pcm_enqueue_dma(substream); | |
215 | ||
82075af6 | 216 | /* Copy self-linked parameter RAM entry into master channel */ |
1587ea31 TK |
217 | edma_read_slot(prtd->asp_link[0], &temp); |
218 | edma_write_slot(prtd->asp_channel, &temp); | |
6e541475 | 219 | davinci_pcm_enqueue_dma(substream); |
310355c1 VB |
220 | |
221 | return 0; | |
222 | } | |
223 | ||
224 | static snd_pcm_uframes_t | |
225 | davinci_pcm_pointer(struct snd_pcm_substream *substream) | |
226 | { | |
227 | struct snd_pcm_runtime *runtime = substream->runtime; | |
228 | struct davinci_runtime_data *prtd = runtime->private_data; | |
229 | unsigned int offset; | |
1587ea31 TK |
230 | int asp_count; |
231 | dma_addr_t asp_src, asp_dst; | |
310355c1 VB |
232 | |
233 | spin_lock(&prtd->lock); | |
234 | ||
1587ea31 | 235 | edma_get_position(prtd->asp_channel, &asp_src, &asp_dst); |
310355c1 | 236 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
1587ea31 | 237 | asp_count = asp_src - runtime->dma_addr; |
310355c1 | 238 | else |
1587ea31 | 239 | asp_count = asp_dst - runtime->dma_addr; |
310355c1 VB |
240 | |
241 | spin_unlock(&prtd->lock); | |
242 | ||
1587ea31 | 243 | offset = bytes_to_frames(runtime, asp_count); |
310355c1 VB |
244 | if (offset >= runtime->buffer_size) |
245 | offset = 0; | |
246 | ||
247 | return offset; | |
248 | } | |
249 | ||
250 | static int davinci_pcm_open(struct snd_pcm_substream *substream) | |
251 | { | |
252 | struct snd_pcm_runtime *runtime = substream->runtime; | |
253 | struct davinci_runtime_data *prtd; | |
254 | int ret = 0; | |
81ac55aa | 255 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
57512c64 TK |
256 | struct davinci_pcm_dma_params *pa = rtd->dai->cpu_dai->dma_data; |
257 | struct davinci_pcm_dma_params *params; | |
258 | if (!pa) | |
81ac55aa | 259 | return -ENODEV; |
57512c64 | 260 | params = &pa[substream->stream]; |
310355c1 VB |
261 | |
262 | snd_soc_set_runtime_hwparams(substream, &davinci_pcm_hardware); | |
6a90d536 TK |
263 | /* ensure that buffer size is a multiple of period size */ |
264 | ret = snd_pcm_hw_constraint_integer(runtime, | |
265 | SNDRV_PCM_HW_PARAM_PERIODS); | |
266 | if (ret < 0) | |
267 | return ret; | |
310355c1 VB |
268 | |
269 | prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL); | |
270 | if (prtd == NULL) | |
271 | return -ENOMEM; | |
272 | ||
273 | spin_lock_init(&prtd->lock); | |
81ac55aa | 274 | prtd->params = params; |
310355c1 VB |
275 | |
276 | runtime->private_data = prtd; | |
277 | ||
278 | ret = davinci_pcm_dma_request(substream); | |
279 | if (ret) { | |
280 | printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n"); | |
281 | kfree(prtd); | |
282 | } | |
283 | ||
284 | return ret; | |
285 | } | |
286 | ||
287 | static int davinci_pcm_close(struct snd_pcm_substream *substream) | |
288 | { | |
289 | struct snd_pcm_runtime *runtime = substream->runtime; | |
290 | struct davinci_runtime_data *prtd = runtime->private_data; | |
291 | ||
1587ea31 | 292 | edma_unlink(prtd->asp_link[0]); |
310355c1 | 293 | |
1587ea31 TK |
294 | edma_free_slot(prtd->asp_link[0]); |
295 | edma_free_channel(prtd->asp_channel); | |
310355c1 VB |
296 | |
297 | kfree(prtd); | |
298 | ||
299 | return 0; | |
300 | } | |
301 | ||
302 | static int davinci_pcm_hw_params(struct snd_pcm_substream *substream, | |
303 | struct snd_pcm_hw_params *hw_params) | |
304 | { | |
305 | return snd_pcm_lib_malloc_pages(substream, | |
306 | params_buffer_bytes(hw_params)); | |
307 | } | |
308 | ||
309 | static int davinci_pcm_hw_free(struct snd_pcm_substream *substream) | |
310 | { | |
311 | return snd_pcm_lib_free_pages(substream); | |
312 | } | |
313 | ||
314 | static int davinci_pcm_mmap(struct snd_pcm_substream *substream, | |
315 | struct vm_area_struct *vma) | |
316 | { | |
317 | struct snd_pcm_runtime *runtime = substream->runtime; | |
318 | ||
319 | return dma_mmap_writecombine(substream->pcm->card->dev, vma, | |
320 | runtime->dma_area, | |
321 | runtime->dma_addr, | |
322 | runtime->dma_bytes); | |
323 | } | |
324 | ||
b2a19d02 | 325 | static struct snd_pcm_ops davinci_pcm_ops = { |
310355c1 VB |
326 | .open = davinci_pcm_open, |
327 | .close = davinci_pcm_close, | |
328 | .ioctl = snd_pcm_lib_ioctl, | |
329 | .hw_params = davinci_pcm_hw_params, | |
330 | .hw_free = davinci_pcm_hw_free, | |
331 | .prepare = davinci_pcm_prepare, | |
332 | .trigger = davinci_pcm_trigger, | |
333 | .pointer = davinci_pcm_pointer, | |
334 | .mmap = davinci_pcm_mmap, | |
335 | }; | |
336 | ||
337 | static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) | |
338 | { | |
339 | struct snd_pcm_substream *substream = pcm->streams[stream].substream; | |
340 | struct snd_dma_buffer *buf = &substream->dma_buffer; | |
341 | size_t size = davinci_pcm_hardware.buffer_bytes_max; | |
342 | ||
343 | buf->dev.type = SNDRV_DMA_TYPE_DEV; | |
344 | buf->dev.dev = pcm->card->dev; | |
345 | buf->private_data = NULL; | |
346 | buf->area = dma_alloc_writecombine(pcm->card->dev, size, | |
347 | &buf->addr, GFP_KERNEL); | |
348 | ||
9cd28ab0 AB |
349 | pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, " |
350 | "size=%d\n", (void *) buf->area, (void *) buf->addr, size); | |
310355c1 VB |
351 | |
352 | if (!buf->area) | |
353 | return -ENOMEM; | |
354 | ||
355 | buf->bytes = size; | |
356 | return 0; | |
357 | } | |
358 | ||
359 | static void davinci_pcm_free(struct snd_pcm *pcm) | |
360 | { | |
361 | struct snd_pcm_substream *substream; | |
362 | struct snd_dma_buffer *buf; | |
363 | int stream; | |
364 | ||
365 | for (stream = 0; stream < 2; stream++) { | |
366 | substream = pcm->streams[stream].substream; | |
367 | if (!substream) | |
368 | continue; | |
369 | ||
370 | buf = &substream->dma_buffer; | |
371 | if (!buf->area) | |
372 | continue; | |
373 | ||
374 | dma_free_writecombine(pcm->card->dev, buf->bytes, | |
375 | buf->area, buf->addr); | |
376 | buf->area = NULL; | |
377 | } | |
378 | } | |
379 | ||
380 | static u64 davinci_pcm_dmamask = 0xffffffff; | |
381 | ||
382 | static int davinci_pcm_new(struct snd_card *card, | |
9cb132d7 | 383 | struct snd_soc_dai *dai, struct snd_pcm *pcm) |
310355c1 VB |
384 | { |
385 | int ret; | |
386 | ||
387 | if (!card->dev->dma_mask) | |
388 | card->dev->dma_mask = &davinci_pcm_dmamask; | |
389 | if (!card->dev->coherent_dma_mask) | |
390 | card->dev->coherent_dma_mask = 0xffffffff; | |
391 | ||
392 | if (dai->playback.channels_min) { | |
393 | ret = davinci_pcm_preallocate_dma_buffer(pcm, | |
394 | SNDRV_PCM_STREAM_PLAYBACK); | |
395 | if (ret) | |
396 | return ret; | |
397 | } | |
398 | ||
399 | if (dai->capture.channels_min) { | |
400 | ret = davinci_pcm_preallocate_dma_buffer(pcm, | |
401 | SNDRV_PCM_STREAM_CAPTURE); | |
402 | if (ret) | |
403 | return ret; | |
404 | } | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
409 | struct snd_soc_platform davinci_soc_platform = { | |
410 | .name = "davinci-audio", | |
411 | .pcm_ops = &davinci_pcm_ops, | |
412 | .pcm_new = davinci_pcm_new, | |
413 | .pcm_free = davinci_pcm_free, | |
414 | }; | |
415 | EXPORT_SYMBOL_GPL(davinci_soc_platform); | |
416 | ||
c9b3a40f | 417 | static int __init davinci_soc_platform_init(void) |
958e792c MB |
418 | { |
419 | return snd_soc_register_platform(&davinci_soc_platform); | |
420 | } | |
421 | module_init(davinci_soc_platform_init); | |
422 | ||
423 | static void __exit davinci_soc_platform_exit(void) | |
424 | { | |
425 | snd_soc_unregister_platform(&davinci_soc_platform); | |
426 | } | |
427 | module_exit(davinci_soc_platform_exit); | |
428 | ||
310355c1 VB |
429 | MODULE_AUTHOR("Vladimir Barinov"); |
430 | MODULE_DESCRIPTION("TI DAVINCI PCM DMA module"); | |
431 | MODULE_LICENSE("GPL"); |