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CommitLineData
8380222e
SH
1/*
2 * imx-pcm-fiq.c -- ALSA Soc Audio Layer
3 *
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
5 *
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/dma-mapping.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/module.h>
21#include <linux/platform_device.h>
5a0e3ad6 22#include <linux/slab.h>
8380222e
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23
24#include <sound/core.h>
9051cba1 25#include <sound/dmaengine_pcm.h>
8380222e
SH
26#include <sound/initval.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/soc.h>
30
31#include <asm/fiq.h>
32
82906b13 33#include <linux/platform_data/asoc-imx-ssi.h>
8380222e
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34
35#include "imx-ssi.h"
9051cba1 36#include "imx-pcm.h"
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SH
37
38struct imx_pcm_runtime_data {
2fb14880 39 unsigned int period;
8380222e 40 int periods;
8380222e 41 unsigned long offset;
43a3cec0
SH
42 struct hrtimer hrt;
43 int poll_time_ns;
44 struct snd_pcm_substream *substream;
fc7dc61d
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45 atomic_t playing;
46 atomic_t capturing;
8380222e
SH
47};
48
43a3cec0 49static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt)
b4e82b5b 50{
43a3cec0
SH
51 struct imx_pcm_runtime_data *iprtd =
52 container_of(hrt, struct imx_pcm_runtime_data, hrt);
53 struct snd_pcm_substream *substream = iprtd->substream;
8380222e
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54 struct pt_regs regs;
55
fc7dc61d 56 if (!atomic_read(&iprtd->playing) && !atomic_read(&iprtd->capturing))
83926099
SH
57 return HRTIMER_NORESTART;
58
8380222e
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59 get_fiq_regs(&regs);
60
61 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
62 iprtd->offset = regs.ARM_r8 & 0xffff;
63 else
64 iprtd->offset = regs.ARM_r9 & 0xffff;
65
68f9672b 66 snd_pcm_period_elapsed(substream);
b4e82b5b 67
43a3cec0 68 hrtimer_forward_now(hrt, ns_to_ktime(iprtd->poll_time_ns));
b4e82b5b 69
43a3cec0 70 return HRTIMER_RESTART;
8380222e
SH
71}
72
73static struct fiq_handler fh = {
74 .name = DRV_NAME,
75};
76
77static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream,
78 struct snd_pcm_hw_params *params)
79{
80 struct snd_pcm_runtime *runtime = substream->runtime;
81 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
82
8380222e 83 iprtd->periods = params_periods(params);
68f9672b 84 iprtd->period = params_period_bytes(params);
8380222e 85 iprtd->offset = 0;
43a3cec0
SH
86 iprtd->poll_time_ns = 1000000000 / params_rate(params) *
87 params_period_size(params);
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88 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
89
90 return 0;
91}
92
93static int snd_imx_pcm_prepare(struct snd_pcm_substream *substream)
94{
95 struct snd_pcm_runtime *runtime = substream->runtime;
96 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
97 struct pt_regs regs;
98
99 get_fiq_regs(&regs);
100 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
101 regs.ARM_r8 = (iprtd->period * iprtd->periods - 1) << 16;
102 else
103 regs.ARM_r9 = (iprtd->period * iprtd->periods - 1) << 16;
104
105 set_fiq_regs(&regs);
106
107 return 0;
108}
109
8380222e
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110static int imx_pcm_fiq;
111
112static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
113{
114 struct snd_pcm_runtime *runtime = substream->runtime;
115 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
116
117 switch (cmd) {
118 case SNDRV_PCM_TRIGGER_START:
119 case SNDRV_PCM_TRIGGER_RESUME:
120 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
fc7dc61d
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121 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
122 atomic_set(&iprtd->playing, 1);
123 else
124 atomic_set(&iprtd->capturing, 1);
43a3cec0
SH
125 hrtimer_start(&iprtd->hrt, ns_to_ktime(iprtd->poll_time_ns),
126 HRTIMER_MODE_REL);
fc7dc61d 127 enable_fiq(imx_pcm_fiq);
8380222e
SH
128 break;
129
130 case SNDRV_PCM_TRIGGER_STOP:
131 case SNDRV_PCM_TRIGGER_SUSPEND:
132 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
fc7dc61d
OS
133 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
134 atomic_set(&iprtd->playing, 0);
135 else
136 atomic_set(&iprtd->capturing, 0);
137 if (!atomic_read(&iprtd->playing) &&
138 !atomic_read(&iprtd->capturing))
8380222e 139 disable_fiq(imx_pcm_fiq);
8380222e 140 break;
fc7dc61d 141
8380222e
SH
142 default:
143 return -EINVAL;
144 }
145
146 return 0;
147}
148
149static snd_pcm_uframes_t snd_imx_pcm_pointer(struct snd_pcm_substream *substream)
150{
151 struct snd_pcm_runtime *runtime = substream->runtime;
152 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
153
154 return bytes_to_frames(substream->runtime, iprtd->offset);
155}
156
157static struct snd_pcm_hardware snd_imx_hardware = {
158 .info = SNDRV_PCM_INFO_INTERLEAVED |
159 SNDRV_PCM_INFO_BLOCK_TRANSFER |
160 SNDRV_PCM_INFO_MMAP |
161 SNDRV_PCM_INFO_MMAP_VALID |
162 SNDRV_PCM_INFO_PAUSE |
163 SNDRV_PCM_INFO_RESUME,
164 .formats = SNDRV_PCM_FMTBIT_S16_LE,
8380222e
SH
165 .buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
166 .period_bytes_min = 128,
167 .period_bytes_max = 16 * 1024,
565a79f7 168 .periods_min = 4,
8380222e
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169 .periods_max = 255,
170 .fifo_size = 0,
171};
172
173static int snd_imx_open(struct snd_pcm_substream *substream)
174{
175 struct snd_pcm_runtime *runtime = substream->runtime;
176 struct imx_pcm_runtime_data *iprtd;
177 int ret;
178
179 iprtd = kzalloc(sizeof(*iprtd), GFP_KERNEL);
50e8ce14
KV
180 if (iprtd == NULL)
181 return -ENOMEM;
8380222e
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182 runtime->private_data = iprtd;
183
43a3cec0
SH
184 iprtd->substream = substream;
185
fc7dc61d
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186 atomic_set(&iprtd->playing, 0);
187 atomic_set(&iprtd->capturing, 0);
43a3cec0
SH
188 hrtimer_init(&iprtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
189 iprtd->hrt.function = snd_hrtimer_callback;
8380222e
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190
191 ret = snd_pcm_hw_constraint_integer(substream->runtime,
192 SNDRV_PCM_HW_PARAM_PERIODS);
50e8ce14
KV
193 if (ret < 0) {
194 kfree(iprtd);
8380222e 195 return ret;
50e8ce14 196 }
8380222e
SH
197
198 snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
199 return 0;
200}
201
202static int snd_imx_close(struct snd_pcm_substream *substream)
203{
204 struct snd_pcm_runtime *runtime = substream->runtime;
205 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
206
43a3cec0
SH
207 hrtimer_cancel(&iprtd->hrt);
208
8380222e
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209 kfree(iprtd);
210
211 return 0;
212}
213
dbdf6b54
SG
214static int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
215 struct vm_area_struct *vma)
216{
217 struct snd_pcm_runtime *runtime = substream->runtime;
218 int ret;
219
f6e45661
LR
220 ret = dma_mmap_wc(substream->pcm->card->dev, vma, runtime->dma_area,
221 runtime->dma_addr, runtime->dma_bytes);
dbdf6b54 222
e92077c3 223 pr_debug("%s: ret: %d %p %pad 0x%08zx\n", __func__, ret,
dbdf6b54 224 runtime->dma_area,
34e684fa 225 &runtime->dma_addr,
dbdf6b54
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226 runtime->dma_bytes);
227 return ret;
228}
229
8380222e
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230static struct snd_pcm_ops imx_pcm_ops = {
231 .open = snd_imx_open,
232 .close = snd_imx_close,
233 .ioctl = snd_pcm_lib_ioctl,
234 .hw_params = snd_imx_pcm_hw_params,
235 .prepare = snd_imx_pcm_prepare,
236 .trigger = snd_imx_pcm_trigger,
237 .pointer = snd_imx_pcm_pointer,
238 .mmap = snd_imx_pcm_mmap,
239};
240
dbdf6b54
SG
241static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
242{
243 struct snd_pcm_substream *substream = pcm->streams[stream].substream;
244 struct snd_dma_buffer *buf = &substream->dma_buffer;
245 size_t size = IMX_SSI_DMABUF_SIZE;
246
247 buf->dev.type = SNDRV_DMA_TYPE_DEV;
248 buf->dev.dev = pcm->card->dev;
249 buf->private_data = NULL;
f6e45661 250 buf->area = dma_alloc_wc(pcm->card->dev, size, &buf->addr, GFP_KERNEL);
dbdf6b54
SG
251 if (!buf->area)
252 return -ENOMEM;
253 buf->bytes = size;
254
255 return 0;
256}
257
dbdf6b54
SG
258static int imx_pcm_new(struct snd_soc_pcm_runtime *rtd)
259{
260 struct snd_card *card = rtd->card->snd_card;
261 struct snd_pcm *pcm = rtd->pcm;
c9bd5e69
RK
262 int ret;
263
264 ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
265 if (ret)
266 return ret;
dbdf6b54 267
dbdf6b54
SG
268 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
269 ret = imx_pcm_preallocate_dma_buffer(pcm,
270 SNDRV_PCM_STREAM_PLAYBACK);
271 if (ret)
ea9f8535 272 return ret;
dbdf6b54
SG
273 }
274
275 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
276 ret = imx_pcm_preallocate_dma_buffer(pcm,
277 SNDRV_PCM_STREAM_CAPTURE);
278 if (ret)
ea9f8535 279 return ret;
dbdf6b54
SG
280 }
281
ea9f8535 282 return 0;
dbdf6b54
SG
283}
284
cb7d53b4 285static int ssi_irq;
f0fba2ad 286
552d1ef6 287static int imx_pcm_fiq_new(struct snd_soc_pcm_runtime *rtd)
8380222e 288{
552d1ef6 289 struct snd_pcm *pcm = rtd->pcm;
35dcf586 290 struct snd_pcm_substream *substream;
8380222e
SH
291 int ret;
292
552d1ef6 293 ret = imx_pcm_new(rtd);
8380222e
SH
294 if (ret)
295 return ret;
296
35dcf586
WS
297 substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
298 if (substream) {
8380222e
SH
299 struct snd_dma_buffer *buf = &substream->dma_buffer;
300
301 imx_ssi_fiq_tx_buffer = (unsigned long)buf->area;
302 }
303
35dcf586
WS
304 substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
305 if (substream) {
8380222e
SH
306 struct snd_dma_buffer *buf = &substream->dma_buffer;
307
308 imx_ssi_fiq_rx_buffer = (unsigned long)buf->area;
309 }
310
311 set_fiq_handler(&imx_ssi_fiq_start,
312 &imx_ssi_fiq_end - &imx_ssi_fiq_start);
313
314 return 0;
315}
316
dbdf6b54
SG
317static void imx_pcm_free(struct snd_pcm *pcm)
318{
319 struct snd_pcm_substream *substream;
320 struct snd_dma_buffer *buf;
321 int stream;
322
323 for (stream = 0; stream < 2; stream++) {
324 substream = pcm->streams[stream].substream;
325 if (!substream)
326 continue;
327
328 buf = &substream->dma_buffer;
329 if (!buf->area)
330 continue;
331
f6e45661 332 dma_free_wc(pcm->card->dev, buf->bytes, buf->area, buf->addr);
dbdf6b54
SG
333 buf->area = NULL;
334 }
335}
336
f0fba2ad
LG
337static void imx_pcm_fiq_free(struct snd_pcm *pcm)
338{
339 mxc_set_irq_fiq(ssi_irq, 0);
340 release_fiq(&fh);
341 imx_pcm_free(pcm);
342}
343
344static struct snd_soc_platform_driver imx_soc_platform_fiq = {
345 .ops = &imx_pcm_ops,
8380222e 346 .pcm_new = imx_pcm_fiq_new,
f0fba2ad 347 .pcm_free = imx_pcm_fiq_free,
8380222e
SH
348};
349
9051cba1
MP
350int imx_pcm_fiq_init(struct platform_device *pdev,
351 struct imx_pcm_fiq_params *params)
8380222e 352{
f0fba2ad 353 int ret;
8380222e
SH
354
355 ret = claim_fiq(&fh);
356 if (ret) {
357 dev_err(&pdev->dev, "failed to claim fiq: %d", ret);
f0fba2ad 358 return ret;
8380222e
SH
359 }
360
9051cba1
MP
361 mxc_set_irq_fiq(params->irq, 1);
362 ssi_irq = params->irq;
8380222e 363
9051cba1 364 imx_pcm_fiq = params->irq;
8380222e 365
9051cba1 366 imx_ssi_fiq_base = (unsigned long)params->base;
8380222e 367
9051cba1
MP
368 params->dma_params_tx->maxburst = 4;
369 params->dma_params_rx->maxburst = 6;
8380222e 370
f0fba2ad
LG
371 ret = snd_soc_register_platform(&pdev->dev, &imx_soc_platform_fiq);
372 if (ret)
373 goto failed_register;
374
375 return 0;
376
377failed_register:
378 mxc_set_irq_fiq(ssi_irq, 0);
379 release_fiq(&fh);
380
381 return ret;
8380222e 382}
dbdf6b54 383EXPORT_SYMBOL_GPL(imx_pcm_fiq_init);
88e89f55
SG
384
385void imx_pcm_fiq_exit(struct platform_device *pdev)
386{
387 snd_soc_unregister_platform(&pdev->dev);
388}
dbdf6b54 389EXPORT_SYMBOL_GPL(imx_pcm_fiq_exit);
3c1c32d3
MB
390
391MODULE_LICENSE("GPL");