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20d0e152 JS |
1 | /* |
2 | * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip. | |
3 | * | |
4 | * Copyright (C) 2009 Jon Smirl, Digispeaker | |
5 | * Author: Jon Smirl <jonsmirl@gmail.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/of_device.h> | |
14 | #include <linux/of_platform.h> | |
15 | ||
16 | #include <sound/pcm.h> | |
17 | #include <sound/pcm_params.h> | |
18 | #include <sound/soc.h> | |
19 | ||
20 | #include <asm/time.h> | |
21 | #include <asm/delay.h> | |
22 | #include <asm/mpc52xx_psc.h> | |
23 | ||
24 | #include "mpc5200_dma.h" | |
25 | #include "mpc5200_psc_ac97.h" | |
26 | ||
27 | #define DRV_NAME "mpc5200-psc-ac97" | |
28 | ||
29 | /* ALSA only supports a single AC97 device so static is recommend here */ | |
30 | static struct psc_dma *psc_dma; | |
31 | ||
32 | static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg) | |
33 | { | |
ea8b27ad | 34 | int status; |
20d0e152 JS |
35 | unsigned int val; |
36 | ||
0827d6ba GL |
37 | mutex_lock(&psc_dma->mutex); |
38 | ||
20d0e152 | 39 | /* Wait for command send status zero = ready */ |
ea8b27ad JS |
40 | status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & |
41 | MPC52xx_PSC_SR_CMDSEND), 100, 0); | |
42 | if (status == 0) { | |
20d0e152 | 43 | pr_err("timeout on ac97 bus (rdy)\n"); |
0827d6ba | 44 | mutex_unlock(&psc_dma->mutex); |
20d0e152 JS |
45 | return -ENODEV; |
46 | } | |
07573534 GL |
47 | |
48 | /* Force clear the data valid bit */ | |
49 | in_be32(&psc_dma->psc_regs->ac97_data); | |
50 | ||
20d0e152 JS |
51 | /* Send the read */ |
52 | out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); | |
53 | ||
54 | /* Wait for the answer */ | |
ea8b27ad JS |
55 | status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) & |
56 | MPC52xx_PSC_SR_DATA_VAL), 100, 0); | |
57 | if (status == 0) { | |
20d0e152 JS |
58 | pr_err("timeout on ac97 read (val) %x\n", |
59 | in_be16(&psc_dma->psc_regs->sr_csr.status)); | |
0827d6ba | 60 | mutex_unlock(&psc_dma->mutex); |
20d0e152 JS |
61 | return -ENODEV; |
62 | } | |
63 | /* Get the data */ | |
64 | val = in_be32(&psc_dma->psc_regs->ac97_data); | |
65 | if (((val >> 24) & 0x7f) != reg) { | |
66 | pr_err("reg echo error on ac97 read\n"); | |
0827d6ba | 67 | mutex_unlock(&psc_dma->mutex); |
20d0e152 JS |
68 | return -ENODEV; |
69 | } | |
70 | val = (val >> 8) & 0xffff; | |
71 | ||
0827d6ba | 72 | mutex_unlock(&psc_dma->mutex); |
20d0e152 JS |
73 | return (unsigned short) val; |
74 | } | |
75 | ||
76 | static void psc_ac97_write(struct snd_ac97 *ac97, | |
77 | unsigned short reg, unsigned short val) | |
78 | { | |
ea8b27ad | 79 | int status; |
20d0e152 | 80 | |
0827d6ba GL |
81 | mutex_lock(&psc_dma->mutex); |
82 | ||
20d0e152 | 83 | /* Wait for command status zero = ready */ |
ea8b27ad JS |
84 | status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & |
85 | MPC52xx_PSC_SR_CMDSEND), 100, 0); | |
86 | if (status == 0) { | |
20d0e152 | 87 | pr_err("timeout on ac97 bus (write)\n"); |
0827d6ba | 88 | goto out; |
20d0e152 JS |
89 | } |
90 | /* Write data */ | |
91 | out_be32(&psc_dma->psc_regs->ac97_cmd, | |
92 | ((reg & 0x7f) << 24) | (val << 8)); | |
0827d6ba GL |
93 | |
94 | out: | |
95 | mutex_unlock(&psc_dma->mutex); | |
20d0e152 JS |
96 | } |
97 | ||
98 | static void psc_ac97_warm_reset(struct snd_ac97 *ac97) | |
99 | { | |
20d0e152 JS |
100 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; |
101 | ||
102 | out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); | |
ea8b27ad | 103 | udelay(3); |
20d0e152 JS |
104 | out_be32(®s->sicr, psc_dma->sicr); |
105 | } | |
106 | ||
107 | static void psc_ac97_cold_reset(struct snd_ac97 *ac97) | |
108 | { | |
20d0e152 JS |
109 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; |
110 | ||
111 | /* Do a cold reset */ | |
112 | out_8(®s->op1, MPC52xx_PSC_OP_RES); | |
ea8b27ad | 113 | udelay(10); |
20d0e152 | 114 | out_8(®s->op0, MPC52xx_PSC_OP_RES); |
ea8b27ad | 115 | udelay(50); |
20d0e152 JS |
116 | psc_ac97_warm_reset(ac97); |
117 | } | |
118 | ||
119 | struct snd_ac97_bus_ops soc_ac97_ops = { | |
120 | .read = psc_ac97_read, | |
121 | .write = psc_ac97_write, | |
122 | .reset = psc_ac97_cold_reset, | |
123 | .warm_reset = psc_ac97_warm_reset, | |
124 | }; | |
125 | EXPORT_SYMBOL_GPL(soc_ac97_ops); | |
126 | ||
127 | static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream, | |
128 | struct snd_pcm_hw_params *params, | |
129 | struct snd_soc_dai *cpu_dai) | |
130 | { | |
131 | struct psc_dma *psc_dma = cpu_dai->private_data; | |
132 | ||
133 | dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i" | |
134 | " periods=%i buffer_size=%i buffer_bytes=%i channels=%i" | |
135 | " rate=%i format=%i\n", | |
136 | __func__, substream, params_period_size(params), | |
137 | params_period_bytes(params), params_periods(params), | |
138 | params_buffer_size(params), params_buffer_bytes(params), | |
139 | params_channels(params), params_rate(params), | |
140 | params_format(params)); | |
141 | ||
142 | ||
143 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) { | |
144 | if (params_channels(params) == 1) | |
145 | psc_dma->slots |= 0x00000100; | |
146 | else | |
147 | psc_dma->slots |= 0x00000300; | |
148 | } else { | |
149 | if (params_channels(params) == 1) | |
150 | psc_dma->slots |= 0x01000000; | |
151 | else | |
152 | psc_dma->slots |= 0x03000000; | |
153 | } | |
154 | out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); | |
155 | ||
156 | return 0; | |
157 | } | |
158 | ||
159 | static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream, | |
160 | struct snd_pcm_hw_params *params, | |
161 | struct snd_soc_dai *cpu_dai) | |
162 | { | |
163 | struct psc_dma *psc_dma = cpu_dai->private_data; | |
164 | ||
165 | if (params_channels(params) == 1) | |
166 | out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000); | |
167 | else | |
168 | out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000); | |
169 | ||
170 | return 0; | |
171 | } | |
172 | ||
173 | static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd, | |
174 | struct snd_soc_dai *dai) | |
175 | { | |
176 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
177 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; | |
178 | ||
179 | switch (cmd) { | |
180 | case SNDRV_PCM_TRIGGER_STOP: | |
181 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
182 | psc_dma->slots &= 0xFFFF0000; | |
183 | else | |
184 | psc_dma->slots &= 0x0000FFFF; | |
185 | ||
186 | out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); | |
187 | break; | |
188 | } | |
189 | return 0; | |
190 | } | |
191 | ||
192 | static int psc_ac97_probe(struct platform_device *pdev, | |
193 | struct snd_soc_dai *cpu_dai) | |
194 | { | |
195 | struct psc_dma *psc_dma = cpu_dai->private_data; | |
196 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; | |
197 | ||
198 | /* Go */ | |
199 | out_8(®s->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); | |
200 | return 0; | |
201 | } | |
202 | ||
203 | /* --------------------------------------------------------------------- | |
204 | * ALSA SoC Bindings | |
205 | * | |
206 | * - Digital Audio Interface (DAI) template | |
207 | * - create/destroy dai hooks | |
208 | */ | |
209 | ||
210 | /** | |
211 | * psc_ac97_dai_template: template CPU Digital Audio Interface | |
212 | */ | |
213 | static struct snd_soc_dai_ops psc_ac97_analog_ops = { | |
214 | .hw_params = psc_ac97_hw_analog_params, | |
215 | .trigger = psc_ac97_trigger, | |
216 | }; | |
217 | ||
218 | static struct snd_soc_dai_ops psc_ac97_digital_ops = { | |
219 | .hw_params = psc_ac97_hw_digital_params, | |
220 | }; | |
221 | ||
222 | struct snd_soc_dai psc_ac97_dai[] = { | |
223 | { | |
224 | .name = "AC97", | |
225 | .ac97_control = 1, | |
226 | .probe = psc_ac97_probe, | |
227 | .playback = { | |
228 | .channels_min = 1, | |
229 | .channels_max = 6, | |
230 | .rates = SNDRV_PCM_RATE_8000_48000, | |
231 | .formats = SNDRV_PCM_FMTBIT_S32_BE, | |
232 | }, | |
233 | .capture = { | |
234 | .channels_min = 1, | |
235 | .channels_max = 2, | |
236 | .rates = SNDRV_PCM_RATE_8000_48000, | |
237 | .formats = SNDRV_PCM_FMTBIT_S32_BE, | |
238 | }, | |
239 | .ops = &psc_ac97_analog_ops, | |
240 | }, | |
241 | { | |
242 | .name = "SPDIF", | |
243 | .ac97_control = 1, | |
244 | .playback = { | |
245 | .channels_min = 1, | |
246 | .channels_max = 2, | |
247 | .rates = SNDRV_PCM_RATE_32000 | \ | |
248 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, | |
249 | .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE, | |
250 | }, | |
251 | .ops = &psc_ac97_digital_ops, | |
252 | } }; | |
253 | EXPORT_SYMBOL_GPL(psc_ac97_dai); | |
254 | ||
255 | ||
256 | ||
257 | /* --------------------------------------------------------------------- | |
258 | * OF platform bus binding code: | |
259 | * - Probe/remove operations | |
260 | * - OF device match table | |
261 | */ | |
262 | static int __devinit psc_ac97_of_probe(struct of_device *op, | |
263 | const struct of_device_id *match) | |
264 | { | |
265 | int rc, i; | |
266 | struct snd_ac97 ac97; | |
267 | struct mpc52xx_psc __iomem *regs; | |
268 | ||
269 | rc = mpc5200_audio_dma_create(op); | |
270 | if (rc != 0) | |
271 | return rc; | |
272 | ||
273 | for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++) | |
274 | psc_ac97_dai[i].dev = &op->dev; | |
275 | ||
276 | rc = snd_soc_register_dais(psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai)); | |
277 | if (rc != 0) { | |
278 | dev_err(&op->dev, "Failed to register DAI\n"); | |
279 | return rc; | |
280 | } | |
281 | ||
282 | psc_dma = dev_get_drvdata(&op->dev); | |
283 | regs = psc_dma->psc_regs; | |
284 | ac97.private_data = psc_dma; | |
285 | ||
286 | for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++) | |
287 | psc_ac97_dai[i].private_data = psc_dma; | |
288 | ||
289 | psc_dma->imr = 0; | |
290 | out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); | |
291 | ||
292 | /* Configure the serial interface mode to AC97 */ | |
293 | psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97; | |
294 | out_be32(®s->sicr, psc_dma->sicr); | |
295 | ||
296 | /* No slots active */ | |
297 | out_be32(®s->ac97_slots, 0x00000000); | |
298 | ||
299 | return 0; | |
300 | } | |
301 | ||
302 | static int __devexit psc_ac97_of_remove(struct of_device *op) | |
303 | { | |
304 | return mpc5200_audio_dma_destroy(op); | |
305 | } | |
306 | ||
307 | /* Match table for of_platform binding */ | |
308 | static struct of_device_id psc_ac97_match[] __devinitdata = { | |
309 | { .compatible = "fsl,mpc5200-psc-ac97", }, | |
310 | { .compatible = "fsl,mpc5200b-psc-ac97", }, | |
311 | {} | |
312 | }; | |
313 | MODULE_DEVICE_TABLE(of, psc_ac97_match); | |
314 | ||
315 | static struct of_platform_driver psc_ac97_driver = { | |
316 | .match_table = psc_ac97_match, | |
317 | .probe = psc_ac97_of_probe, | |
318 | .remove = __devexit_p(psc_ac97_of_remove), | |
319 | .driver = { | |
320 | .name = "mpc5200-psc-ac97", | |
321 | .owner = THIS_MODULE, | |
322 | }, | |
323 | }; | |
324 | ||
325 | /* --------------------------------------------------------------------- | |
326 | * Module setup and teardown; simply register the of_platform driver | |
327 | * for the PSC in AC97 mode. | |
328 | */ | |
329 | static int __init psc_ac97_init(void) | |
330 | { | |
331 | return of_register_platform_driver(&psc_ac97_driver); | |
332 | } | |
333 | module_init(psc_ac97_init); | |
334 | ||
335 | static void __exit psc_ac97_exit(void) | |
336 | { | |
337 | of_unregister_platform_driver(&psc_ac97_driver); | |
338 | } | |
339 | module_exit(psc_ac97_exit); | |
340 | ||
341 | MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>"); | |
342 | MODULE_DESCRIPTION("mpc5200 AC97 module"); | |
343 | MODULE_LICENSE("GPL"); | |
344 |