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ASoC: bytcr_rt5640: Fix a typo and quirk parameter type
[mirror_ubuntu-hirsute-kernel.git] / sound / soc / intel / boards / bytcr_rt5640.c
CommitLineData
996cc849
SP		 1/*
2 * byt_cr_dpcm_rt5640.c - ASoc Machine driver for Intel Byt CR platform
3 *
4 * Copyright (C) 2014 Intel Corp
5 * Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
9f2cf73e 22#include <linux/moduleparam.h>
996cc849 23#include <linux/platform_device.h>
a2d5563b 24#include <linux/acpi.h>
996cc849 25#include <linux/device.h>
a2d5563b 26#include <linux/dmi.h>
996cc849 27#include <linux/slab.h>
e214f5e7
PLB		 28#include <asm/cpu_device_id.h>
29#include <asm/platform_sst_audio.h>
df1a2776 30#include <linux/clk.h>
996cc849
SP		 31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
a2d5563b 34#include <sound/jack.h>
e56c72d5 35#include "../../codecs/rt5640.h"
b97169da 36#include "../atom/sst-atom-controls.h"
caf94ed8 37#include "../common/sst-acpi.h"
e214f5e7 38#include "../common/sst-dsp.h"
996cc849 39
ab738e4e
PLB		 40enum {
41 BYT_RT5640_DMIC1_MAP,
42 BYT_RT5640_DMIC2_MAP,
43 BYT_RT5640_IN1_MAP,
59e8b652 44 BYT_RT5640_IN3_MAP,
ab738e4e
PLB		 45};
46
47#define BYT_RT5640_MAP(quirk) ((quirk) & 0xff)
48#define BYT_RT5640_DMIC_EN BIT(16)
68817cdb 49#define BYT_RT5640_MONO_SPEAKER BIT(17)
5d98f58f 50#define BYT_RT5640_DIFF_MIC BIT(18) /* defaut is single-ended */
89b8907c 51#define BYT_RT5640_SSP2_AIF2 BIT(19) /* default is using AIF1 */
f47088d5
PLB		 52#define BYT_RT5640_SSP0_AIF1 BIT(20)
53#define BYT_RT5640_SSP0_AIF2 BIT(21)
df1a2776
IT		 54#define BYT_RT5640_MCLK_EN BIT(22)
55#define BYT_RT5640_MCLK_25MHZ BIT(23)
56
57struct byt_rt5640_private {
58 struct clk *mclk;
59};
ab738e4e 60
bf46241b 61static unsigned long byt_rt5640_quirk = BYT_RT5640_MCLK_EN;
9f2cf73e 62static unsigned int quirk_override;
0b2c9f88 63module_param_named(quirk, quirk_override, uint, 0444);
9f2cf73e 64MODULE_PARM_DESC(quirk, "Board-specific quirk override");
df1a2776 65
d7e60d52
PLB		 66static void log_quirks(struct device *dev)
67{
68 if (BYT_RT5640_MAP(byt_rt5640_quirk) == BYT_RT5640_DMIC1_MAP)
69 dev_info(dev, "quirk DMIC1_MAP enabled");
70 if (BYT_RT5640_MAP(byt_rt5640_quirk) == BYT_RT5640_DMIC2_MAP)
71 dev_info(dev, "quirk DMIC2_MAP enabled");
72 if (BYT_RT5640_MAP(byt_rt5640_quirk) == BYT_RT5640_IN1_MAP)
73 dev_info(dev, "quirk IN1_MAP enabled");
74 if (BYT_RT5640_MAP(byt_rt5640_quirk) == BYT_RT5640_IN3_MAP)
75 dev_info(dev, "quirk IN3_MAP enabled");
76 if (byt_rt5640_quirk & BYT_RT5640_DMIC_EN)
77 dev_info(dev, "quirk DMIC enabled");
78 if (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER)
79 dev_info(dev, "quirk MONO_SPEAKER enabled");
80 if (byt_rt5640_quirk & BYT_RT5640_DIFF_MIC)
81 dev_info(dev, "quirk DIFF_MIC enabled");
82 if (byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2)
83 dev_info(dev, "quirk SSP2_AIF2 enabled");
84 if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1)
85 dev_info(dev, "quirk SSP0_AIF1 enabled");
86 if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)
87 dev_info(dev, "quirk SSP0_AIF2 enabled");
88 if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN)
89 dev_info(dev, "quirk MCLK_EN enabled");
90 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
91 dev_info(dev, "quirk MCLK_25MHZ enabled");
92}
93
94
df1a2776
IT		 95#define BYT_CODEC_DAI1 "rt5640-aif1"
96#define BYT_CODEC_DAI2 "rt5640-aif2"
97
98static inline struct snd_soc_dai *byt_get_codec_dai(struct snd_soc_card *card)
99{
100 struct snd_soc_pcm_runtime *rtd;
101
102 list_for_each_entry(rtd, &card->rtd_list, list) {
103 if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI1,
104 strlen(BYT_CODEC_DAI1)))
105 return rtd->codec_dai;
106 if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI2,
107 strlen(BYT_CODEC_DAI2)))
108 return rtd->codec_dai;
109
110 }
111 return NULL;
112}
113
114static int platform_clock_control(struct snd_soc_dapm_widget *w,
115 struct snd_kcontrol *k, int event)
116{
117 struct snd_soc_dapm_context *dapm = w->dapm;
118 struct snd_soc_card *card = dapm->card;
119 struct snd_soc_dai *codec_dai;
120 struct byt_rt5640_private *priv = snd_soc_card_get_drvdata(card);
121 int ret;
122
123 codec_dai = byt_get_codec_dai(card);
124 if (!codec_dai) {
125 dev_err(card->dev,
126 "Codec dai not found; Unable to set platform clock\n");
127 return -EIO;
128 }
129
130 if (SND_SOC_DAPM_EVENT_ON(event)) {
131 if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk) {
132 ret = clk_prepare_enable(priv->mclk);
133 if (ret < 0) {
134 dev_err(card->dev,
135 "could not configure MCLK state");
136 return ret;
137 }
138 }
139 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
140 48000 * 512,
141 SND_SOC_CLOCK_IN);
142 } else {
143 /*
144 * Set codec clock source to internal clock before
145 * turning off the platform clock. Codec needs clock
146 * for Jack detection and button press
147 */
148 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_RCCLK,
60448b07 149 48000 * 512,
df1a2776
IT		 150 SND_SOC_CLOCK_IN);
151 if (!ret) {
152 if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk)
153 clk_disable_unprepare(priv->mclk);
154 }
155 }
156
157 if (ret < 0) {
158 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
159 return ret;
160 }
161
162 return 0;
163}
ab738e4e 164
a2d5563b 165static const struct snd_soc_dapm_widget byt_rt5640_widgets[] = {
996cc849
SP		 166 SND_SOC_DAPM_HP("Headphone", NULL),
167 SND_SOC_DAPM_MIC("Headset Mic", NULL),
e2be1da0
PLB		 168 SND_SOC_DAPM_MIC("Internal Mic", NULL),
169 SND_SOC_DAPM_SPK("Speaker", NULL),
df1a2776
IT		 170 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
171 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
172 SND_SOC_DAPM_POST_PMD),
173
996cc849
SP		 174};
175
a2d5563b 176static const struct snd_soc_dapm_route byt_rt5640_audio_map[] = {
df1a2776
IT		 177 {"Headphone", NULL, "Platform Clock"},
178 {"Headset Mic", NULL, "Platform Clock"},
179 {"Internal Mic", NULL, "Platform Clock"},
180 {"Speaker", NULL, "Platform Clock"},
181
996cc849 182 {"Headset Mic", NULL, "MICBIAS1"},
e2be1da0 183 {"IN2P", NULL, "Headset Mic"},
996cc849
SP		 184 {"Headphone", NULL, "HPOL"},
185 {"Headphone", NULL, "HPOR"},
996cc849
SP		 186};
187
a2d5563b
PLB		 188static const struct snd_soc_dapm_route byt_rt5640_intmic_dmic1_map[] = {
189 {"DMIC1", NULL, "Internal Mic"},
190};
191
192static const struct snd_soc_dapm_route byt_rt5640_intmic_dmic2_map[] = {
193 {"DMIC2", NULL, "Internal Mic"},
194};
195
196static const struct snd_soc_dapm_route byt_rt5640_intmic_in1_map[] = {
197 {"Internal Mic", NULL, "MICBIAS1"},
198 {"IN1P", NULL, "Internal Mic"},
199};
200
59e8b652
PLB		 201static const struct snd_soc_dapm_route byt_rt5640_intmic_in3_map[] = {
202 {"Internal Mic", NULL, "MICBIAS1"},
203 {"IN3P", NULL, "Internal Mic"},
204};
205
89b8907c
PLB		 206static const struct snd_soc_dapm_route byt_rt5640_ssp2_aif1_map[] = {
207 {"ssp2 Tx", NULL, "codec_out0"},
208 {"ssp2 Tx", NULL, "codec_out1"},
209 {"codec_in0", NULL, "ssp2 Rx"},
210 {"codec_in1", NULL, "ssp2 Rx"},
211
212 {"AIF1 Playback", NULL, "ssp2 Tx"},
213 {"ssp2 Rx", NULL, "AIF1 Capture"},
214};
215
216static const struct snd_soc_dapm_route byt_rt5640_ssp2_aif2_map[] = {
217 {"ssp2 Tx", NULL, "codec_out0"},
218 {"ssp2 Tx", NULL, "codec_out1"},
219 {"codec_in0", NULL, "ssp2 Rx"},
220 {"codec_in1", NULL, "ssp2 Rx"},
221
222 {"AIF2 Playback", NULL, "ssp2 Tx"},
223 {"ssp2 Rx", NULL, "AIF2 Capture"},
224};
225
f47088d5
PLB		 226static const struct snd_soc_dapm_route byt_rt5640_ssp0_aif1_map[] = {
227 {"ssp0 Tx", NULL, "modem_out"},
228 {"modem_in", NULL, "ssp0 Rx"},
229
230 {"AIF1 Playback", NULL, "ssp0 Tx"},
231 {"ssp0 Rx", NULL, "AIF1 Capture"},
232};
233
234static const struct snd_soc_dapm_route byt_rt5640_ssp0_aif2_map[] = {
235 {"ssp0 Tx", NULL, "modem_out"},
236 {"modem_in", NULL, "ssp0 Rx"},
237
238 {"AIF2 Playback", NULL, "ssp0 Tx"},
239 {"ssp0 Rx", NULL, "AIF2 Capture"},
240};
241
68817cdb
PLB		 242static const struct snd_soc_dapm_route byt_rt5640_stereo_spk_map[] = {
243 {"Speaker", NULL, "SPOLP"},
244 {"Speaker", NULL, "SPOLN"},
245 {"Speaker", NULL, "SPORP"},
246 {"Speaker", NULL, "SPORN"},
247};
248
249static const struct snd_soc_dapm_route byt_rt5640_mono_spk_map[] = {
250 {"Speaker", NULL, "SPOLP"},
251 {"Speaker", NULL, "SPOLN"},
252};
253
a2d5563b 254static const struct snd_kcontrol_new byt_rt5640_controls[] = {
996cc849
SP		 255 SOC_DAPM_PIN_SWITCH("Headphone"),
256 SOC_DAPM_PIN_SWITCH("Headset Mic"),
e2be1da0
PLB		 257 SOC_DAPM_PIN_SWITCH("Internal Mic"),
258 SOC_DAPM_PIN_SWITCH("Speaker"),
996cc849
SP		 259};
260
a2d5563b 261static int byt_rt5640_aif1_hw_params(struct snd_pcm_substream *substream,
996cc849
SP		 262 struct snd_pcm_hw_params *params)
263{
264 struct snd_soc_pcm_runtime *rtd = substream->private_data;
265 struct snd_soc_dai *codec_dai = rtd->codec_dai;
266 int ret;
267
996cc849
SP		 268 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
269 params_rate(params) * 512,
270 SND_SOC_CLOCK_IN);
df1a2776 271
996cc849
SP		 272 if (ret < 0) {
273 dev_err(rtd->dev, "can't set codec clock %d\n", ret);
274 return ret;
275 }
276
df1a2776
IT		 277 if (!(byt_rt5640_quirk & BYT_RT5640_MCLK_EN)) {
278 /* use bitclock as PLL input */
279 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
280 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
281
282 /* 2x16 bit slots on SSP0 */
283 ret = snd_soc_dai_set_pll(codec_dai, 0,
284 RT5640_PLL1_S_BCLK1,
285 params_rate(params) * 32,
286 params_rate(params) * 512);
287 } else {
288 /* 2x15 bit slots on SSP2 */
289 ret = snd_soc_dai_set_pll(codec_dai, 0,
290 RT5640_PLL1_S_BCLK1,
291 params_rate(params) * 50,
292 params_rate(params) * 512);
293 }
038a50e7 294 } else {
df1a2776
IT		 295 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ) {
296 ret = snd_soc_dai_set_pll(codec_dai, 0,
297 RT5640_PLL1_S_MCLK,
298 25000000,
299 params_rate(params) * 512);
300 } else {
301 ret = snd_soc_dai_set_pll(codec_dai, 0,
302 RT5640_PLL1_S_MCLK,
303 19200000,
304 params_rate(params) * 512);
305 }
038a50e7
PLB		 306 }
307
996cc849
SP		 308 if (ret < 0) {
309 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
310 return ret;
311 }
312
313 return 0;
314}
315
a2d5563b
PLB		 316static int byt_rt5640_quirk_cb(const struct dmi_system_id *id)
317{
318 byt_rt5640_quirk = (unsigned long)id->driver_data;
319 return 1;
320}
321
322static const struct dmi_system_id byt_rt5640_quirk_table[] = {
323 {
324 .callback = byt_rt5640_quirk_cb,
325 .matches = {
73442e3c
PLB		 326 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
327 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TA"),
a2d5563b 328 },
df1a2776
IT		 329 .driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
330 BYT_RT5640_MCLK_EN),
a2d5563b
PLB		 331 },
332 {
333 .callback = byt_rt5640_quirk_cb,
334 .matches = {
73442e3c
PLB		 335 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
336 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TAF"),
337 },
68817cdb 338 .driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
5d98f58f 339 BYT_RT5640_MONO_SPEAKER |
e214f5e7 340 BYT_RT5640_DIFF_MIC |
df1a2776
IT		 341 BYT_RT5640_SSP0_AIF2 |
342 BYT_RT5640_MCLK_EN
68817cdb 343 ),
73442e3c
PLB		 344 },
345 {
346 .callback = byt_rt5640_quirk_cb,
347 .matches = {
348 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "DellInc."),
349 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5830"),
a2d5563b
PLB		 350 },
351 .driver_data = (unsigned long *)(BYT_RT5640_DMIC2_MAP |
df1a2776
IT		 352 BYT_RT5640_DMIC_EN |
353 BYT_RT5640_MCLK_EN),
a2d5563b 354 },
55fc2056
JFM		 355 {
356 .callback = byt_rt5640_quirk_cb,
357 .matches = {
73442e3c
PLB		 358 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
359 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HP ElitePad 1000 G2"),
55fc2056 360 },
df1a2776
IT		 361 .driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
362 BYT_RT5640_MCLK_EN),
55fc2056 363 },
0565e773
IT		 364 {
365 .callback = byt_rt5640_quirk_cb,
366 .matches = {
367 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
368 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
369 },
370 .driver_data = (unsigned long *)(BYT_RT5640_DMIC1_MAP |
371 BYT_RT5640_DMIC_EN),
372 },
ec1c90e7
PLB		 373 {
374 .callback = byt_rt5640_quirk_cb,
375 .matches = {
376 DMI_MATCH(DMI_BOARD_VENDOR, "TECLAST"),
377 DMI_MATCH(DMI_BOARD_NAME, "tPAD"),
378 },
379 .driver_data = (unsigned long *)(BYT_RT5640_IN3_MAP |
380 BYT_RT5640_MCLK_EN |
381 BYT_RT5640_SSP0_AIF1),
382 },
8f98307d
PLB		 383 {
384 .callback = byt_rt5640_quirk_cb,
385 .matches = {
386 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
387 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire SW5-012"),
388 },
389 .driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
390 BYT_RT5640_MCLK_EN |
391 BYT_RT5640_SSP0_AIF1),
392
57180048 393 },
394 {
395 .callback = byt_rt5640_quirk_cb,
396 .matches = {
397 DMI_MATCH(DMI_SYS_VENDOR, "Insyde"),
398 },
399 .driver_data = (unsigned long *)(BYT_RT5640_IN3_MAP |
8f98307d
PLB		 400 BYT_RT5640_MCLK_EN |
401 BYT_RT5640_SSP0_AIF1),
402
403 },
a2d5563b
PLB		 404 {}
405};
406
9fd57471
PLB		 407static int byt_rt5640_init(struct snd_soc_pcm_runtime *runtime)
408{
409 int ret;
410 struct snd_soc_codec *codec = runtime->codec;
411 struct snd_soc_card *card = runtime->card;
412 const struct snd_soc_dapm_route *custom_map;
df1a2776 413 struct byt_rt5640_private *priv = snd_soc_card_get_drvdata(card);
9fd57471
PLB		 414 int num_routes;
415
416 card->dapm.idle_bias_off = true;
417
0ec66e2d
PLB		 418 rt5640_sel_asrc_clk_src(codec,
419 RT5640_DA_STEREO_FILTER |
df1a2776
IT		 420 RT5640_DA_MONO_L_FILTER |
421 RT5640_DA_MONO_R_FILTER |
422 RT5640_AD_STEREO_FILTER |
423 RT5640_AD_MONO_L_FILTER |
424 RT5640_AD_MONO_R_FILTER,
0ec66e2d
PLB		 425 RT5640_CLK_SEL_ASRC);
426
9fd57471
PLB		 427 ret = snd_soc_add_card_controls(card, byt_rt5640_controls,
428 ARRAY_SIZE(byt_rt5640_controls));
429 if (ret) {
430 dev_err(card->dev, "unable to add card controls\n");
431 return ret;
432 }
433
9fd57471
PLB		 434 switch (BYT_RT5640_MAP(byt_rt5640_quirk)) {
435 case BYT_RT5640_IN1_MAP:
436 custom_map = byt_rt5640_intmic_in1_map;
437 num_routes = ARRAY_SIZE(byt_rt5640_intmic_in1_map);
438 break;
59e8b652
PLB		 439 case BYT_RT5640_IN3_MAP:
440 custom_map = byt_rt5640_intmic_in3_map;
441 num_routes = ARRAY_SIZE(byt_rt5640_intmic_in3_map);
442 break;
9fd57471
PLB		 443 case BYT_RT5640_DMIC2_MAP:
444 custom_map = byt_rt5640_intmic_dmic2_map;
445 num_routes = ARRAY_SIZE(byt_rt5640_intmic_dmic2_map);
446 break;
447 default:
448 custom_map = byt_rt5640_intmic_dmic1_map;
449 num_routes = ARRAY_SIZE(byt_rt5640_intmic_dmic1_map);
450 }
451
452 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
453 if (ret)
454 return ret;
455
89b8907c
PLB		 456 if (byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2) {
457 ret = snd_soc_dapm_add_routes(&card->dapm,
458 byt_rt5640_ssp2_aif2_map,
459 ARRAY_SIZE(byt_rt5640_ssp2_aif2_map));
f47088d5
PLB		 460 } else if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) {
461 ret = snd_soc_dapm_add_routes(&card->dapm,
462 byt_rt5640_ssp0_aif1_map,
463 ARRAY_SIZE(byt_rt5640_ssp0_aif1_map));
464 } else if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2) {
465 ret = snd_soc_dapm_add_routes(&card->dapm,
466 byt_rt5640_ssp0_aif2_map,
467 ARRAY_SIZE(byt_rt5640_ssp0_aif2_map));
89b8907c
PLB		 468 } else {
469 ret = snd_soc_dapm_add_routes(&card->dapm,
470 byt_rt5640_ssp2_aif1_map,
471 ARRAY_SIZE(byt_rt5640_ssp2_aif1_map));
472 }
473 if (ret)
474 return ret;
475
68817cdb
PLB		 476 if (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER) {
477 ret = snd_soc_dapm_add_routes(&card->dapm,
478 byt_rt5640_mono_spk_map,
479 ARRAY_SIZE(byt_rt5640_mono_spk_map));
480 } else {
481 ret = snd_soc_dapm_add_routes(&card->dapm,
482 byt_rt5640_stereo_spk_map,
483 ARRAY_SIZE(byt_rt5640_stereo_spk_map));
484 }
485 if (ret)
486 return ret;
487
5d98f58f
PLB		 488 if (byt_rt5640_quirk & BYT_RT5640_DIFF_MIC) {
489 snd_soc_update_bits(codec, RT5640_IN1_IN2, RT5640_IN_DF1,
490 RT5640_IN_DF1);
491 }
492
9fd57471
PLB		 493 if (byt_rt5640_quirk & BYT_RT5640_DMIC_EN) {
494 ret = rt5640_dmic_enable(codec, 0, 0);
495 if (ret)
496 return ret;
497 }
498
499 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
500 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
501
df1a2776
IT		 502 if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk) {
503 /*
504 * The firmware might enable the clock at
505 * boot (this information may or may not
506 * be reflected in the enable clock register).
507 * To change the rate we must disable the clock
508 * first to cover these cases. Due to common
509 * clock framework restrictions that do not allow
510 * to disable a clock that has not been enabled,
511 * we need to enable the clock first.
512 */
513 ret = clk_prepare_enable(priv->mclk);
514 if (!ret)
515 clk_disable_unprepare(priv->mclk);
516
517 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
518 ret = clk_set_rate(priv->mclk, 25000000);
519 else
520 ret = clk_set_rate(priv->mclk, 19200000);
521
522 if (ret)
523 dev_err(card->dev, "unable to set MCLK rate\n");
524 }
525
9fd57471
PLB		 526 return ret;
527}
528
a2d5563b 529static const struct snd_soc_pcm_stream byt_rt5640_dai_params = {
996cc849
SP		 530 .formats = SNDRV_PCM_FMTBIT_S24_LE,
531 .rate_min = 48000,
532 .rate_max = 48000,
533 .channels_min = 2,
534 .channels_max = 2,
535};
536
a2d5563b 537static int byt_rt5640_codec_fixup(struct snd_soc_pcm_runtime *rtd,
996cc849
SP		 538 struct snd_pcm_hw_params *params)
539{
540 struct snd_interval *rate = hw_param_interval(params,
541 SNDRV_PCM_HW_PARAM_RATE);
542 struct snd_interval *channels = hw_param_interval(params,
543 SNDRV_PCM_HW_PARAM_CHANNELS);
3f27dedd 544 int ret;
996cc849 545
038a50e7 546 /* The DSP will covert the FE rate to 48k, stereo */
996cc849
SP		 547 rate->min = rate->max = 48000;
548 channels->min = channels->max = 2;
549
038a50e7
PLB		 550 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
551 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
552
8f98307d 553 /* set SSP0 to 16-bit */
038a50e7
PLB		 554 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
555
556 /*
557 * Default mode for SSP configuration is TDM 4 slot, override config
558 * with explicit setting to I2S 2ch 16-bit. The word length is set with
559 * dai_set_tdm_slot() since there is no other API exposed
560 */
561 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
562 SND_SOC_DAIFMT_I2S |
f12f5c84 563 SND_SOC_DAIFMT_NB_NF |
038a50e7
PLB		 564 SND_SOC_DAIFMT_CBS_CFS
565 );
566 if (ret < 0) {
567 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
568 return ret;
569 }
3f27dedd 570
038a50e7
PLB		 571 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16);
572 if (ret < 0) {
573 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
574 return ret;
575 }
576
577 } else {
3f27dedd 578
038a50e7
PLB		 579 /* set SSP2 to 24-bit */
580 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
581
582 /*
583 * Default mode for SSP configuration is TDM 4 slot, override config
584 * with explicit setting to I2S 2ch 24-bit. The word length is set with
585 * dai_set_tdm_slot() since there is no other API exposed
586 */
587 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
588 SND_SOC_DAIFMT_I2S |
f12f5c84 589 SND_SOC_DAIFMT_NB_NF |
038a50e7
PLB		 590 SND_SOC_DAIFMT_CBS_CFS
591 );
592 if (ret < 0) {
593 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
594 return ret;
595 }
596
597 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 24);
598 if (ret < 0) {
599 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
600 return ret;
601 }
602 }
996cc849
SP		 603 return 0;
604}
605
a2d5563b 606static int byt_rt5640_aif1_startup(struct snd_pcm_substream *substream)
996cc849 607{
d0a1b660
LPC		 608 return snd_pcm_hw_constraint_single(substream->runtime,
609 SNDRV_PCM_HW_PARAM_RATE, 48000);
996cc849
SP		 610}
611
9b6fdef6 612static const struct snd_soc_ops byt_rt5640_aif1_ops = {
a2d5563b 613 .startup = byt_rt5640_aif1_startup,
996cc849
SP		 614};
615
9b6fdef6 616static const struct snd_soc_ops byt_rt5640_be_ssp2_ops = {
a2d5563b 617 .hw_params = byt_rt5640_aif1_hw_params,
996cc849
SP		 618};
619
a2d5563b 620static struct snd_soc_dai_link byt_rt5640_dais[] = {
996cc849
SP		 621 [MERR_DPCM_AUDIO] = {
622 .name = "Baytrail Audio Port",
623 .stream_name = "Baytrail Audio",
624 .cpu_dai_name = "media-cpu-dai",
625 .codec_dai_name = "snd-soc-dummy-dai",
626 .codec_name = "snd-soc-dummy",
627 .platform_name = "sst-mfld-platform",
628 .ignore_suspend = 1,
629 .dynamic = 1,
630 .dpcm_playback = 1,
631 .dpcm_capture = 1,
a2d5563b 632 .ops = &byt_rt5640_aif1_ops,
996cc849 633 },
d35eb96a
PLB		 634 [MERR_DPCM_DEEP_BUFFER] = {
635 .name = "Deep-Buffer Audio Port",
636 .stream_name = "Deep-Buffer Audio",
637 .cpu_dai_name = "deepbuffer-cpu-dai",
638 .codec_dai_name = "snd-soc-dummy-dai",
639 .codec_name = "snd-soc-dummy",
640 .platform_name = "sst-mfld-platform",
641 .ignore_suspend = 1,
642 .nonatomic = true,
643 .dynamic = 1,
644 .dpcm_playback = 1,
645 .ops = &byt_rt5640_aif1_ops,
646 },
996cc849
SP		 647 [MERR_DPCM_COMPR] = {
648 .name = "Baytrail Compressed Port",
649 .stream_name = "Baytrail Compress",
650 .cpu_dai_name = "compress-cpu-dai",
651 .codec_dai_name = "snd-soc-dummy-dai",
652 .codec_name = "snd-soc-dummy",
653 .platform_name = "sst-mfld-platform",
654 },
655 /* back ends */
656 {
657 .name = "SSP2-Codec",
2f0ad491 658 .id = 1,
f47088d5 659 .cpu_dai_name = "ssp2-port", /* overwritten for ssp0 routing */
996cc849
SP		 660 .platform_name = "sst-mfld-platform",
661 .no_pcm = 1,
89b8907c 662 .codec_dai_name = "rt5640-aif1", /* changed w/ quirk */
7762ef42 663 .codec_name = "i2c-10EC5640:00", /* overwritten with HID */
996cc849
SP		 664 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
665 | SND_SOC_DAIFMT_CBS_CFS,
a2d5563b 666 .be_hw_params_fixup = byt_rt5640_codec_fixup,
996cc849
SP		 667 .ignore_suspend = 1,
668 .dpcm_playback = 1,
669 .dpcm_capture = 1,
9fd57471 670 .init = byt_rt5640_init,
a2d5563b 671 .ops = &byt_rt5640_be_ssp2_ops,
996cc849
SP		 672 },
673};
674
675/* SoC card */
9fd57471 676static struct snd_soc_card byt_rt5640_card = {
a2d5563b 677 .name = "bytcr-rt5640",
54d8697f 678 .owner = THIS_MODULE,
a2d5563b
PLB		 679 .dai_link = byt_rt5640_dais,
680 .num_links = ARRAY_SIZE(byt_rt5640_dais),
681 .dapm_widgets = byt_rt5640_widgets,
682 .num_dapm_widgets = ARRAY_SIZE(byt_rt5640_widgets),
683 .dapm_routes = byt_rt5640_audio_map,
684 .num_dapm_routes = ARRAY_SIZE(byt_rt5640_audio_map),
9fd57471 685 .fully_routed = true,
996cc849
SP		 686};
687
caf94ed8 688static char byt_rt5640_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
89b8907c 689static char byt_rt5640_codec_aif_name[12]; /* = "rt5640-aif[1|2]" */
f47088d5 690static char byt_rt5640_cpu_dai_name[10]; /* = "ssp[0|2]-port" */
caf94ed8 691
e214f5e7
PLB		 692static bool is_valleyview(void)
693{
cac17731 694 static const struct x86_cpu_id cpu_ids[] = {
e214f5e7
PLB		 695 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
696 {}
697 };
698
699 if (!x86_match_cpu(cpu_ids))
700 return false;
701 return true;
702}
703
64e84305
PLB		 704struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */
705 u64 aif_value; /* 1: AIF1, 2: AIF2 */
706 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */
707};
df1a2776 708
a2d5563b 709static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
996cc849
SP		 710{
711 int ret_val = 0;
caf94ed8 712 struct sst_acpi_mach *mach;
a232b96d
PLB		 713 const char *i2c_name = NULL;
714 int i;
715 int dai_index;
df1a2776 716 struct byt_rt5640_private *priv;
64e84305 717 bool is_bytcr = false;
df1a2776
IT		 718
719 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_ATOMIC);
720 if (!priv)
721 return -ENOMEM;
996cc849
SP		 722
723 /* register the soc card */
9fd57471 724 byt_rt5640_card.dev = &pdev->dev;
caf94ed8 725 mach = byt_rt5640_card.dev->platform_data;
df1a2776 726 snd_soc_card_set_drvdata(&byt_rt5640_card, priv);
caf94ed8 727
a232b96d
PLB		 728 /* fix index of codec dai */
729 dai_index = MERR_DPCM_COMPR + 1;
730 for (i = 0; i < ARRAY_SIZE(byt_rt5640_dais); i++) {
731 if (!strcmp(byt_rt5640_dais[i].codec_name, "i2c-10EC5640:00")) {
732 dai_index = i;
733 break;
734 }
735 }
736
caf94ed8 737 /* fixup codec name based on HID */
a232b96d
PLB		 738 i2c_name = sst_acpi_find_name_from_hid(mach->id);
739 if (i2c_name != NULL) {
740 snprintf(byt_rt5640_codec_name, sizeof(byt_rt5640_codec_name),
741 "%s%s", "i2c-", i2c_name);
742
743 byt_rt5640_dais[dai_index].codec_name = byt_rt5640_codec_name;
744 }
9fd57471 745
e214f5e7
PLB		 746 /*
747 * swap SSP0 if bytcr is detected
748 * (will be overridden if DMI quirk is detected)
749 */
750 if (is_valleyview()) {
751 struct sst_platform_info *p_info = mach->pdata;
752 const struct sst_res_info *res_info = p_info->res_info;
753
64e84305
PLB		 754 if (res_info->acpi_ipc_irq_index == 0)
755 is_bytcr = true;
756 }
757
758 if (is_bytcr) {
759 /*
760 * Baytrail CR platforms may have CHAN package in BIOS, try
761 * to find relevant routing quirk based as done on Windows
762 * platforms. We have to read the information directly from the
763 * BIOS, at this stage the card is not created and the links
764 * with the codec driver/pdata are non-existent
765 */
766
767 struct acpi_chan_package chan_package;
768
769 /* format specified: 2 64-bit integers */
770 struct acpi_buffer format = {sizeof("NN"), "NN"};
771 struct acpi_buffer state = {0, NULL};
772 struct sst_acpi_package_context pkg_ctx;
773 bool pkg_found = false;
774
775 state.length = sizeof(chan_package);
776 state.pointer = &chan_package;
777
778 pkg_ctx.name = "CHAN";
779 pkg_ctx.length = 2;
780 pkg_ctx.format = &format;
781 pkg_ctx.state = &state;
782 pkg_ctx.data_valid = false;
783
784 pkg_found = sst_acpi_find_package_from_hid(mach->id, &pkg_ctx);
785 if (pkg_found) {
786 if (chan_package.aif_value == 1) {
787 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
788 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF1;
789 } else if (chan_package.aif_value == 2) {
790 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
791 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF2;
792 } else {
793 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
794 pkg_found = false;
795 }
796 }
797
798 if (!pkg_found) {
799 /* no BIOS indications, assume SSP0-AIF2 connection */
e214f5e7
PLB		 800 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF2;
801 }
bf46241b
PLB		 802
803 /* change defaults for Baytrail-CR capture */
804 byt_rt5640_quirk |= BYT_RT5640_IN1_MAP;
805 byt_rt5640_quirk |= BYT_RT5640_DIFF_MIC;
806 } else {
807 byt_rt5640_quirk |= (BYT_RT5640_DMIC1_MAP |
808 BYT_RT5640_DMIC_EN);
e214f5e7
PLB		 809 }
810
ab738e4e
PLB		 811 /* check quirks before creating card */
812 dmi_check_system(byt_rt5640_quirk_table);
9f2cf73e 813 if (quirk_override) {
0b2c9f88 814 dev_info(&pdev->dev, "Overriding quirk 0x%x => 0x%x\n",
9f2cf73e
TI		 815 (unsigned int)byt_rt5640_quirk, quirk_override);
816 byt_rt5640_quirk = quirk_override;
817 }
d7e60d52 818 log_quirks(&pdev->dev);
ab738e4e 819
f47088d5
PLB		 820 if ((byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2) ||
821 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
89b8907c
PLB		 822
823 /* fixup codec aif name */
824 snprintf(byt_rt5640_codec_aif_name,
825 sizeof(byt_rt5640_codec_aif_name),
826 "%s", "rt5640-aif2");
827
828 byt_rt5640_dais[dai_index].codec_dai_name =
829 byt_rt5640_codec_aif_name;
830 }
831
f47088d5
PLB		 832 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
833 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
834
835 /* fixup cpu dai name name */
836 snprintf(byt_rt5640_cpu_dai_name,
837 sizeof(byt_rt5640_cpu_dai_name),
838 "%s", "ssp0-port");
839
840 byt_rt5640_dais[dai_index].cpu_dai_name =
841 byt_rt5640_cpu_dai_name;
842 }
843
df1a2776
IT		 844 if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && (is_valleyview())) {
845 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
846 if (IS_ERR(priv->mclk)) {
4a8b3a68
PLB		 847 ret_val = PTR_ERR(priv->mclk);
848
df1a2776 849 dev_err(&pdev->dev,
4a8b3a68
PLB		 850 "Failed to get MCLK from pmc_plt_clk_3: %d\n",
851 ret_val);
852
853 /*
854 * Fall back to bit clock usage for -ENOENT (clock not
855 * available likely due to missing dependencies), bail
856 * for all other errors, including -EPROBE_DEFER
857 */
858 if (ret_val != -ENOENT)
859 return ret_val;
860 byt_rt5640_quirk &= ~BYT_RT5640_MCLK_EN;
df1a2776
IT		 861 }
862 }
863
9fd57471 864 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5640_card);
996cc849 865
996cc849 866 if (ret_val) {
a2d5563b
PLB		 867 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
868 ret_val);
996cc849
SP		 869 return ret_val;
870 }
9fd57471 871 platform_set_drvdata(pdev, &byt_rt5640_card);
996cc849
SP		 872 return ret_val;
873}
874
a2d5563b 875static struct platform_driver snd_byt_rt5640_mc_driver = {
996cc849 876 .driver = {
a2d5563b 877 .name = "bytcr_rt5640",
996cc849 878 },
a2d5563b 879 .probe = snd_byt_rt5640_mc_probe,
996cc849
SP		 880};
881
a2d5563b 882module_platform_driver(snd_byt_rt5640_mc_driver);
996cc849
SP		 883
884MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
885MODULE_AUTHOR("Subhransu S. Prusty <subhransu.s.prusty@intel.com>");
886MODULE_LICENSE("GPL v2");
a2d5563b 887MODULE_ALIAS("platform:bytcr_rt5640");
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