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ASoC: Intel: bytcr_rt5640: cosmetic fixes
[mirror_ubuntu-bionic-kernel.git] / sound / soc / intel / boards / bytcr_rt5640.c
CommitLineData
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1/*
2 * byt_cr_dpcm_rt5640.c - ASoc Machine driver for Intel Byt CR platform
3 *
4 * Copyright (C) 2014 Intel Corp
5 * Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
9f2cf73e 22#include <linux/moduleparam.h>
996cc849 23#include <linux/platform_device.h>
a2d5563b 24#include <linux/acpi.h>
17b5273d 25#include <linux/clk.h>
996cc849 26#include <linux/device.h>
a2d5563b 27#include <linux/dmi.h>
996cc849 28#include <linux/slab.h>
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29#include <asm/cpu_device_id.h>
30#include <asm/platform_sst_audio.h>
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31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
a2d5563b 34#include <sound/jack.h>
e56c72d5 35#include "../../codecs/rt5640.h"
b97169da 36#include "../atom/sst-atom-controls.h"
caf94ed8 37#include "../common/sst-acpi.h"
e214f5e7 38#include "../common/sst-dsp.h"
996cc849 39
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40enum {
41 BYT_RT5640_DMIC1_MAP,
42 BYT_RT5640_DMIC2_MAP,
43 BYT_RT5640_IN1_MAP,
59e8b652 44 BYT_RT5640_IN3_MAP,
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45};
46
17b5273d 47#define BYT_RT5640_MAP(quirk) ((quirk) & GENMASK(7, 0))
ab738e4e 48#define BYT_RT5640_DMIC_EN BIT(16)
68817cdb 49#define BYT_RT5640_MONO_SPEAKER BIT(17)
5d98f58f 50#define BYT_RT5640_DIFF_MIC BIT(18) /* defaut is single-ended */
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51#define BYT_RT5640_SSP2_AIF2 BIT(19) /* default is using AIF1 */
52#define BYT_RT5640_SSP0_AIF1 BIT(20)
53#define BYT_RT5640_SSP0_AIF2 BIT(21)
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54#define BYT_RT5640_MCLK_EN BIT(22)
55#define BYT_RT5640_MCLK_25MHZ BIT(23)
56
57struct byt_rt5640_private {
58 struct clk *mclk;
59};
cb67d765 60static bool is_bytcr;
ab738e4e 61
bf46241b 62static unsigned long byt_rt5640_quirk = BYT_RT5640_MCLK_EN;
9f2cf73e 63static unsigned int quirk_override;
0b2c9f88 64module_param_named(quirk, quirk_override, uint, 0444);
9f2cf73e 65MODULE_PARM_DESC(quirk, "Board-specific quirk override");
df1a2776 66
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67static void log_quirks(struct device *dev)
68{
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69 int map;
70 bool has_dmic = false;
71 bool has_mclk = false;
72 bool has_ssp0 = false;
73 bool has_ssp0_aif1 = false;
74 bool has_ssp0_aif2 = false;
75 bool has_ssp2_aif2 = false;
76
77 map = BYT_RT5640_MAP(byt_rt5640_quirk);
78 switch (map) {
79 case BYT_RT5640_DMIC1_MAP:
80 dev_info(dev, "quirk DMIC1_MAP enabled\n");
81 has_dmic = true;
82 break;
83 case BYT_RT5640_DMIC2_MAP:
84 dev_info(dev, "quirk DMIC2_MAP enabled\n");
85 has_dmic = true;
86 break;
87 case BYT_RT5640_IN1_MAP:
88 dev_info(dev, "quirk IN1_MAP enabled\n");
89 break;
90 case BYT_RT5640_IN3_MAP:
91 dev_info(dev, "quirk IN3_MAP enabled\n");
92 break;
93 default:
94 dev_err(dev, "quirk map 0x%x is not supported, microphone input will not work\n", map);
95 break;
96 }
97 if (byt_rt5640_quirk & BYT_RT5640_DMIC_EN) {
98 if (has_dmic)
99 dev_info(dev, "quirk DMIC enabled\n");
100 else
101 dev_err(dev, "quirk DMIC enabled but no DMIC input set, will be ignored\n");
102 }
d7e60d52 103 if (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER)
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104 dev_info(dev, "quirk MONO_SPEAKER enabled\n");
105 if (byt_rt5640_quirk & BYT_RT5640_DIFF_MIC) {
106 if (!has_dmic)
107 dev_info(dev, "quirk DIFF_MIC enabled\n");
108 else
109 dev_info(dev, "quirk DIFF_MIC enabled but DMIC input selected, will be ignored\n");
110 }
111 if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) {
112 dev_info(dev, "quirk SSP0_AIF1 enabled\n");
113 has_ssp0 = true;
114 has_ssp0_aif1 = true;
115 }
116 if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2) {
117 dev_info(dev, "quirk SSP0_AIF2 enabled\n");
118 has_ssp0 = true;
119 has_ssp0_aif2 = true;
120 }
121 if (byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2) {
122 dev_info(dev, "quirk SSP2_AIF2 enabled\n");
123 has_ssp2_aif2 = true;
124 }
125 if (is_bytcr && !has_ssp0)
126 dev_err(dev, "Invalid routing, bytcr detected but no SSP0-based quirk, audio cannot work with SSP2 on bytcr\n");
127 if (has_ssp0_aif1 && has_ssp0_aif2)
128 dev_err(dev, "Invalid routing, SSP0 cannot be connected to both AIF1 and AIF2\n");
129 if (has_ssp0 && has_ssp2_aif2)
130 dev_err(dev, "Invalid routing, cannot have both SSP0 and SSP2 connected to codec\n");
131
132 if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
133 dev_info(dev, "quirk MCLK_EN enabled\n");
134 has_mclk = true;
135 }
136 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ) {
137 if (has_mclk)
138 dev_info(dev, "quirk MCLK_25MHZ enabled\n");
139 else
140 dev_err(dev, "quirk MCLK_25MHZ enabled but quirk MCLK not selected, will be ignored\n");
141 }
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142}
143
144
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145#define BYT_CODEC_DAI1 "rt5640-aif1"
146#define BYT_CODEC_DAI2 "rt5640-aif2"
147
148static inline struct snd_soc_dai *byt_get_codec_dai(struct snd_soc_card *card)
149{
150 struct snd_soc_pcm_runtime *rtd;
151
152 list_for_each_entry(rtd, &card->rtd_list, list) {
153 if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI1,
154 strlen(BYT_CODEC_DAI1)))
155 return rtd->codec_dai;
156 if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI2,
157 strlen(BYT_CODEC_DAI2)))
158 return rtd->codec_dai;
159
160 }
161 return NULL;
162}
163
164static int platform_clock_control(struct snd_soc_dapm_widget *w,
165 struct snd_kcontrol *k, int event)
166{
167 struct snd_soc_dapm_context *dapm = w->dapm;
168 struct snd_soc_card *card = dapm->card;
169 struct snd_soc_dai *codec_dai;
170 struct byt_rt5640_private *priv = snd_soc_card_get_drvdata(card);
171 int ret;
172
173 codec_dai = byt_get_codec_dai(card);
174 if (!codec_dai) {
175 dev_err(card->dev,
176 "Codec dai not found; Unable to set platform clock\n");
177 return -EIO;
178 }
179
180 if (SND_SOC_DAPM_EVENT_ON(event)) {
17b5273d 181 if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
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182 ret = clk_prepare_enable(priv->mclk);
183 if (ret < 0) {
184 dev_err(card->dev,
cb67d765 185 "could not configure MCLK state\n");
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186 return ret;
187 }
188 }
189 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
190 48000 * 512,
191 SND_SOC_CLOCK_IN);
192 } else {
193 /*
194 * Set codec clock source to internal clock before
195 * turning off the platform clock. Codec needs clock
196 * for Jack detection and button press
197 */
198 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_RCCLK,
60448b07 199 48000 * 512,
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200 SND_SOC_CLOCK_IN);
201 if (!ret) {
17b5273d 202 if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN)
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203 clk_disable_unprepare(priv->mclk);
204 }
205 }
206
207 if (ret < 0) {
208 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
209 return ret;
210 }
211
212 return 0;
213}
ab738e4e 214
a2d5563b 215static const struct snd_soc_dapm_widget byt_rt5640_widgets[] = {
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216 SND_SOC_DAPM_HP("Headphone", NULL),
217 SND_SOC_DAPM_MIC("Headset Mic", NULL),
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218 SND_SOC_DAPM_MIC("Internal Mic", NULL),
219 SND_SOC_DAPM_SPK("Speaker", NULL),
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220 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
221 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
222 SND_SOC_DAPM_POST_PMD),
223
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224};
225
a2d5563b 226static const struct snd_soc_dapm_route byt_rt5640_audio_map[] = {
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227 {"Headphone", NULL, "Platform Clock"},
228 {"Headset Mic", NULL, "Platform Clock"},
229 {"Internal Mic", NULL, "Platform Clock"},
230 {"Speaker", NULL, "Platform Clock"},
231
996cc849 232 {"Headset Mic", NULL, "MICBIAS1"},
e2be1da0 233 {"IN2P", NULL, "Headset Mic"},
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234 {"Headphone", NULL, "HPOL"},
235 {"Headphone", NULL, "HPOR"},
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236};
237
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238static const struct snd_soc_dapm_route byt_rt5640_intmic_dmic1_map[] = {
239 {"DMIC1", NULL, "Internal Mic"},
240};
241
242static const struct snd_soc_dapm_route byt_rt5640_intmic_dmic2_map[] = {
243 {"DMIC2", NULL, "Internal Mic"},
244};
245
246static const struct snd_soc_dapm_route byt_rt5640_intmic_in1_map[] = {
247 {"Internal Mic", NULL, "MICBIAS1"},
248 {"IN1P", NULL, "Internal Mic"},
249};
250
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251static const struct snd_soc_dapm_route byt_rt5640_intmic_in3_map[] = {
252 {"Internal Mic", NULL, "MICBIAS1"},
253 {"IN3P", NULL, "Internal Mic"},
254};
255
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256static const struct snd_soc_dapm_route byt_rt5640_ssp2_aif1_map[] = {
257 {"ssp2 Tx", NULL, "codec_out0"},
258 {"ssp2 Tx", NULL, "codec_out1"},
259 {"codec_in0", NULL, "ssp2 Rx"},
260 {"codec_in1", NULL, "ssp2 Rx"},
261
262 {"AIF1 Playback", NULL, "ssp2 Tx"},
263 {"ssp2 Rx", NULL, "AIF1 Capture"},
264};
265
266static const struct snd_soc_dapm_route byt_rt5640_ssp2_aif2_map[] = {
267 {"ssp2 Tx", NULL, "codec_out0"},
268 {"ssp2 Tx", NULL, "codec_out1"},
269 {"codec_in0", NULL, "ssp2 Rx"},
270 {"codec_in1", NULL, "ssp2 Rx"},
271
272 {"AIF2 Playback", NULL, "ssp2 Tx"},
273 {"ssp2 Rx", NULL, "AIF2 Capture"},
274};
275
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276static const struct snd_soc_dapm_route byt_rt5640_ssp0_aif1_map[] = {
277 {"ssp0 Tx", NULL, "modem_out"},
278 {"modem_in", NULL, "ssp0 Rx"},
279
280 {"AIF1 Playback", NULL, "ssp0 Tx"},
281 {"ssp0 Rx", NULL, "AIF1 Capture"},
282};
283
284static const struct snd_soc_dapm_route byt_rt5640_ssp0_aif2_map[] = {
285 {"ssp0 Tx", NULL, "modem_out"},
286 {"modem_in", NULL, "ssp0 Rx"},
287
288 {"AIF2 Playback", NULL, "ssp0 Tx"},
289 {"ssp0 Rx", NULL, "AIF2 Capture"},
290};
291
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292static const struct snd_soc_dapm_route byt_rt5640_stereo_spk_map[] = {
293 {"Speaker", NULL, "SPOLP"},
294 {"Speaker", NULL, "SPOLN"},
295 {"Speaker", NULL, "SPORP"},
296 {"Speaker", NULL, "SPORN"},
297};
298
299static const struct snd_soc_dapm_route byt_rt5640_mono_spk_map[] = {
300 {"Speaker", NULL, "SPOLP"},
301 {"Speaker", NULL, "SPOLN"},
302};
303
a2d5563b 304static const struct snd_kcontrol_new byt_rt5640_controls[] = {
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305 SOC_DAPM_PIN_SWITCH("Headphone"),
306 SOC_DAPM_PIN_SWITCH("Headset Mic"),
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307 SOC_DAPM_PIN_SWITCH("Internal Mic"),
308 SOC_DAPM_PIN_SWITCH("Speaker"),
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309};
310
a2d5563b 311static int byt_rt5640_aif1_hw_params(struct snd_pcm_substream *substream,
996cc849
SP
312 struct snd_pcm_hw_params *params)
313{
314 struct snd_soc_pcm_runtime *rtd = substream->private_data;
315 struct snd_soc_dai *codec_dai = rtd->codec_dai;
316 int ret;
317
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SP
318 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
319 params_rate(params) * 512,
320 SND_SOC_CLOCK_IN);
df1a2776 321
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SP
322 if (ret < 0) {
323 dev_err(rtd->dev, "can't set codec clock %d\n", ret);
324 return ret;
325 }
326
df1a2776
IT
327 if (!(byt_rt5640_quirk & BYT_RT5640_MCLK_EN)) {
328 /* use bitclock as PLL input */
329 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
330 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
331
332 /* 2x16 bit slots on SSP0 */
333 ret = snd_soc_dai_set_pll(codec_dai, 0,
334 RT5640_PLL1_S_BCLK1,
335 params_rate(params) * 32,
336 params_rate(params) * 512);
337 } else {
338 /* 2x15 bit slots on SSP2 */
339 ret = snd_soc_dai_set_pll(codec_dai, 0,
340 RT5640_PLL1_S_BCLK1,
341 params_rate(params) * 50,
342 params_rate(params) * 512);
343 }
038a50e7 344 } else {
df1a2776
IT
345 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ) {
346 ret = snd_soc_dai_set_pll(codec_dai, 0,
347 RT5640_PLL1_S_MCLK,
348 25000000,
349 params_rate(params) * 512);
350 } else {
351 ret = snd_soc_dai_set_pll(codec_dai, 0,
352 RT5640_PLL1_S_MCLK,
353 19200000,
354 params_rate(params) * 512);
355 }
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356 }
357
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SP
358 if (ret < 0) {
359 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
360 return ret;
361 }
362
363 return 0;
364}
365
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366static int byt_rt5640_quirk_cb(const struct dmi_system_id *id)
367{
368 byt_rt5640_quirk = (unsigned long)id->driver_data;
369 return 1;
370}
371
372static const struct dmi_system_id byt_rt5640_quirk_table[] = {
373 {
374 .callback = byt_rt5640_quirk_cb,
375 .matches = {
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376 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
377 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TA"),
a2d5563b 378 },
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379 .driver_data = (void *)(BYT_RT5640_IN1_MAP |
380 BYT_RT5640_MCLK_EN),
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381 },
382 {
383 .callback = byt_rt5640_quirk_cb,
384 .matches = {
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385 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
386 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TAF"),
387 },
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388 .driver_data = (void *)(BYT_RT5640_IN1_MAP |
389 BYT_RT5640_MONO_SPEAKER |
390 BYT_RT5640_DIFF_MIC |
391 BYT_RT5640_SSP0_AIF2 |
392 BYT_RT5640_MCLK_EN),
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393 },
394 {
395 .callback = byt_rt5640_quirk_cb,
396 .matches = {
397 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "DellInc."),
398 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5830"),
a2d5563b 399 },
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400 .driver_data = (void *)(BYT_RT5640_DMIC2_MAP |
401 BYT_RT5640_DMIC_EN |
402 BYT_RT5640_MCLK_EN),
a2d5563b 403 },
55fc2056
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404 {
405 .callback = byt_rt5640_quirk_cb,
406 .matches = {
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407 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
408 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HP ElitePad 1000 G2"),
55fc2056 409 },
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410 .driver_data = (void *)(BYT_RT5640_IN1_MAP |
411 BYT_RT5640_MCLK_EN),
55fc2056 412 },
0565e773
IT
413 {
414 .callback = byt_rt5640_quirk_cb,
415 .matches = {
416 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
417 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
418 },
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419 .driver_data = (void *)(BYT_RT5640_DMIC1_MAP |
420 BYT_RT5640_DMIC_EN),
0565e773 421 },
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422 {
423 .callback = byt_rt5640_quirk_cb,
424 .matches = {
425 DMI_MATCH(DMI_BOARD_VENDOR, "TECLAST"),
426 DMI_MATCH(DMI_BOARD_NAME, "tPAD"),
427 },
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428 .driver_data = (void *)(BYT_RT5640_IN3_MAP |
429 BYT_RT5640_MCLK_EN |
430 BYT_RT5640_SSP0_AIF1),
ec1c90e7 431 },
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432 {
433 .callback = byt_rt5640_quirk_cb,
434 .matches = {
435 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
436 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire SW5-012"),
437 },
17b5273d 438 .driver_data = (void *)(BYT_RT5640_IN1_MAP |
8f98307d
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439 BYT_RT5640_MCLK_EN |
440 BYT_RT5640_SSP0_AIF1),
441
57180048 442 },
443 {
444 .callback = byt_rt5640_quirk_cb,
445 .matches = {
446 DMI_MATCH(DMI_SYS_VENDOR, "Insyde"),
447 },
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448 .driver_data = (void *)(BYT_RT5640_IN3_MAP |
449 BYT_RT5640_MCLK_EN |
450 BYT_RT5640_SSP0_AIF1),
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451
452 },
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453 {}
454};
455
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456static int byt_rt5640_init(struct snd_soc_pcm_runtime *runtime)
457{
9fd57471 458 struct snd_soc_card *card = runtime->card;
df1a2776 459 struct byt_rt5640_private *priv = snd_soc_card_get_drvdata(card);
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460 struct snd_soc_codec *codec = runtime->codec;
461 const struct snd_soc_dapm_route *custom_map;
9fd57471 462 int num_routes;
17b5273d 463 int ret;
9fd57471
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464
465 card->dapm.idle_bias_off = true;
466
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467 rt5640_sel_asrc_clk_src(codec,
468 RT5640_DA_STEREO_FILTER |
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IT
469 RT5640_DA_MONO_L_FILTER |
470 RT5640_DA_MONO_R_FILTER |
471 RT5640_AD_STEREO_FILTER |
472 RT5640_AD_MONO_L_FILTER |
473 RT5640_AD_MONO_R_FILTER,
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474 RT5640_CLK_SEL_ASRC);
475
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476 ret = snd_soc_add_card_controls(card, byt_rt5640_controls,
477 ARRAY_SIZE(byt_rt5640_controls));
478 if (ret) {
479 dev_err(card->dev, "unable to add card controls\n");
480 return ret;
481 }
482
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483 switch (BYT_RT5640_MAP(byt_rt5640_quirk)) {
484 case BYT_RT5640_IN1_MAP:
485 custom_map = byt_rt5640_intmic_in1_map;
486 num_routes = ARRAY_SIZE(byt_rt5640_intmic_in1_map);
487 break;
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488 case BYT_RT5640_IN3_MAP:
489 custom_map = byt_rt5640_intmic_in3_map;
490 num_routes = ARRAY_SIZE(byt_rt5640_intmic_in3_map);
491 break;
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492 case BYT_RT5640_DMIC2_MAP:
493 custom_map = byt_rt5640_intmic_dmic2_map;
494 num_routes = ARRAY_SIZE(byt_rt5640_intmic_dmic2_map);
495 break;
496 default:
497 custom_map = byt_rt5640_intmic_dmic1_map;
498 num_routes = ARRAY_SIZE(byt_rt5640_intmic_dmic1_map);
499 }
500
501 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
502 if (ret)
503 return ret;
504
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505 if (byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2) {
506 ret = snd_soc_dapm_add_routes(&card->dapm,
507 byt_rt5640_ssp2_aif2_map,
508 ARRAY_SIZE(byt_rt5640_ssp2_aif2_map));
f47088d5
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509 } else if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) {
510 ret = snd_soc_dapm_add_routes(&card->dapm,
511 byt_rt5640_ssp0_aif1_map,
512 ARRAY_SIZE(byt_rt5640_ssp0_aif1_map));
513 } else if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2) {
514 ret = snd_soc_dapm_add_routes(&card->dapm,
515 byt_rt5640_ssp0_aif2_map,
516 ARRAY_SIZE(byt_rt5640_ssp0_aif2_map));
89b8907c
PLB
517 } else {
518 ret = snd_soc_dapm_add_routes(&card->dapm,
519 byt_rt5640_ssp2_aif1_map,
520 ARRAY_SIZE(byt_rt5640_ssp2_aif1_map));
521 }
522 if (ret)
523 return ret;
524
68817cdb
PLB
525 if (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER) {
526 ret = snd_soc_dapm_add_routes(&card->dapm,
527 byt_rt5640_mono_spk_map,
528 ARRAY_SIZE(byt_rt5640_mono_spk_map));
529 } else {
530 ret = snd_soc_dapm_add_routes(&card->dapm,
531 byt_rt5640_stereo_spk_map,
532 ARRAY_SIZE(byt_rt5640_stereo_spk_map));
533 }
534 if (ret)
535 return ret;
536
5d98f58f
PLB
537 if (byt_rt5640_quirk & BYT_RT5640_DIFF_MIC) {
538 snd_soc_update_bits(codec, RT5640_IN1_IN2, RT5640_IN_DF1,
539 RT5640_IN_DF1);
540 }
541
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542 if (byt_rt5640_quirk & BYT_RT5640_DMIC_EN) {
543 ret = rt5640_dmic_enable(codec, 0, 0);
544 if (ret)
545 return ret;
546 }
547
548 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
549 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
550
17b5273d 551 if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
df1a2776
IT
552 /*
553 * The firmware might enable the clock at
554 * boot (this information may or may not
555 * be reflected in the enable clock register).
556 * To change the rate we must disable the clock
557 * first to cover these cases. Due to common
558 * clock framework restrictions that do not allow
559 * to disable a clock that has not been enabled,
560 * we need to enable the clock first.
561 */
562 ret = clk_prepare_enable(priv->mclk);
563 if (!ret)
564 clk_disable_unprepare(priv->mclk);
565
566 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
567 ret = clk_set_rate(priv->mclk, 25000000);
568 else
569 ret = clk_set_rate(priv->mclk, 19200000);
570
571 if (ret)
572 dev_err(card->dev, "unable to set MCLK rate\n");
573 }
574
9fd57471
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575 return ret;
576}
577
a2d5563b 578static const struct snd_soc_pcm_stream byt_rt5640_dai_params = {
996cc849
SP
579 .formats = SNDRV_PCM_FMTBIT_S24_LE,
580 .rate_min = 48000,
581 .rate_max = 48000,
582 .channels_min = 2,
583 .channels_max = 2,
584};
585
a2d5563b 586static int byt_rt5640_codec_fixup(struct snd_soc_pcm_runtime *rtd,
996cc849
SP
587 struct snd_pcm_hw_params *params)
588{
589 struct snd_interval *rate = hw_param_interval(params,
590 SNDRV_PCM_HW_PARAM_RATE);
591 struct snd_interval *channels = hw_param_interval(params,
592 SNDRV_PCM_HW_PARAM_CHANNELS);
3f27dedd 593 int ret;
996cc849 594
038a50e7 595 /* The DSP will covert the FE rate to 48k, stereo */
996cc849
SP
596 rate->min = rate->max = 48000;
597 channels->min = channels->max = 2;
598
038a50e7
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599 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
600 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
601
8f98307d 602 /* set SSP0 to 16-bit */
038a50e7
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603 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
604
605 /*
606 * Default mode for SSP configuration is TDM 4 slot, override config
607 * with explicit setting to I2S 2ch 16-bit. The word length is set with
608 * dai_set_tdm_slot() since there is no other API exposed
609 */
610 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
611 SND_SOC_DAIFMT_I2S |
f12f5c84 612 SND_SOC_DAIFMT_NB_NF |
038a50e7
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613 SND_SOC_DAIFMT_CBS_CFS
614 );
615 if (ret < 0) {
616 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
617 return ret;
618 }
3f27dedd 619
038a50e7
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620 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16);
621 if (ret < 0) {
622 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
623 return ret;
624 }
625
626 } else {
3f27dedd 627
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628 /* set SSP2 to 24-bit */
629 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
630
631 /*
632 * Default mode for SSP configuration is TDM 4 slot, override config
633 * with explicit setting to I2S 2ch 24-bit. The word length is set with
634 * dai_set_tdm_slot() since there is no other API exposed
635 */
636 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
637 SND_SOC_DAIFMT_I2S |
f12f5c84 638 SND_SOC_DAIFMT_NB_NF |
038a50e7
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639 SND_SOC_DAIFMT_CBS_CFS
640 );
641 if (ret < 0) {
642 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
643 return ret;
644 }
645
646 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 24);
647 if (ret < 0) {
648 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
649 return ret;
650 }
651 }
996cc849
SP
652 return 0;
653}
654
a2d5563b 655static int byt_rt5640_aif1_startup(struct snd_pcm_substream *substream)
996cc849 656{
d0a1b660
LPC
657 return snd_pcm_hw_constraint_single(substream->runtime,
658 SNDRV_PCM_HW_PARAM_RATE, 48000);
996cc849
SP
659}
660
9b6fdef6 661static const struct snd_soc_ops byt_rt5640_aif1_ops = {
a2d5563b 662 .startup = byt_rt5640_aif1_startup,
996cc849
SP
663};
664
9b6fdef6 665static const struct snd_soc_ops byt_rt5640_be_ssp2_ops = {
a2d5563b 666 .hw_params = byt_rt5640_aif1_hw_params,
996cc849
SP
667};
668
a2d5563b 669static struct snd_soc_dai_link byt_rt5640_dais[] = {
996cc849
SP
670 [MERR_DPCM_AUDIO] = {
671 .name = "Baytrail Audio Port",
672 .stream_name = "Baytrail Audio",
673 .cpu_dai_name = "media-cpu-dai",
674 .codec_dai_name = "snd-soc-dummy-dai",
675 .codec_name = "snd-soc-dummy",
676 .platform_name = "sst-mfld-platform",
6e4cac23 677 .nonatomic = true,
996cc849
SP
678 .dynamic = 1,
679 .dpcm_playback = 1,
680 .dpcm_capture = 1,
a2d5563b 681 .ops = &byt_rt5640_aif1_ops,
996cc849 682 },
d35eb96a
PLB
683 [MERR_DPCM_DEEP_BUFFER] = {
684 .name = "Deep-Buffer Audio Port",
685 .stream_name = "Deep-Buffer Audio",
686 .cpu_dai_name = "deepbuffer-cpu-dai",
687 .codec_dai_name = "snd-soc-dummy-dai",
688 .codec_name = "snd-soc-dummy",
689 .platform_name = "sst-mfld-platform",
d35eb96a
PLB
690 .nonatomic = true,
691 .dynamic = 1,
692 .dpcm_playback = 1,
693 .ops = &byt_rt5640_aif1_ops,
694 },
996cc849
SP
695 [MERR_DPCM_COMPR] = {
696 .name = "Baytrail Compressed Port",
697 .stream_name = "Baytrail Compress",
698 .cpu_dai_name = "compress-cpu-dai",
699 .codec_dai_name = "snd-soc-dummy-dai",
700 .codec_name = "snd-soc-dummy",
701 .platform_name = "sst-mfld-platform",
702 },
703 /* back ends */
704 {
705 .name = "SSP2-Codec",
2f0ad491 706 .id = 1,
f47088d5 707 .cpu_dai_name = "ssp2-port", /* overwritten for ssp0 routing */
996cc849
SP
708 .platform_name = "sst-mfld-platform",
709 .no_pcm = 1,
89b8907c 710 .codec_dai_name = "rt5640-aif1", /* changed w/ quirk */
7762ef42 711 .codec_name = "i2c-10EC5640:00", /* overwritten with HID */
996cc849
SP
712 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
713 | SND_SOC_DAIFMT_CBS_CFS,
a2d5563b 714 .be_hw_params_fixup = byt_rt5640_codec_fixup,
996cc849 715 .ignore_suspend = 1,
6e4cac23 716 .nonatomic = true,
996cc849
SP
717 .dpcm_playback = 1,
718 .dpcm_capture = 1,
9fd57471 719 .init = byt_rt5640_init,
a2d5563b 720 .ops = &byt_rt5640_be_ssp2_ops,
996cc849
SP
721 },
722};
723
724/* SoC card */
9fd57471 725static struct snd_soc_card byt_rt5640_card = {
a2d5563b 726 .name = "bytcr-rt5640",
54d8697f 727 .owner = THIS_MODULE,
a2d5563b
PLB
728 .dai_link = byt_rt5640_dais,
729 .num_links = ARRAY_SIZE(byt_rt5640_dais),
730 .dapm_widgets = byt_rt5640_widgets,
731 .num_dapm_widgets = ARRAY_SIZE(byt_rt5640_widgets),
732 .dapm_routes = byt_rt5640_audio_map,
733 .num_dapm_routes = ARRAY_SIZE(byt_rt5640_audio_map),
9fd57471 734 .fully_routed = true,
996cc849
SP
735};
736
caf94ed8 737static char byt_rt5640_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
89b8907c 738static char byt_rt5640_codec_aif_name[12]; /* = "rt5640-aif[1|2]" */
f47088d5 739static char byt_rt5640_cpu_dai_name[10]; /* = "ssp[0|2]-port" */
caf94ed8 740
e214f5e7
PLB
741static bool is_valleyview(void)
742{
cac17731 743 static const struct x86_cpu_id cpu_ids[] = {
e214f5e7
PLB
744 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
745 {}
746 };
747
748 if (!x86_match_cpu(cpu_ids))
749 return false;
750 return true;
751}
752
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753struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */
754 u64 aif_value; /* 1: AIF1, 2: AIF2 */
755 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */
756};
df1a2776 757
a2d5563b 758static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
996cc849 759{
17b5273d 760 struct byt_rt5640_private *priv;
caf94ed8 761 struct sst_acpi_mach *mach;
a232b96d 762 const char *i2c_name = NULL;
17b5273d 763 int ret_val = 0;
a232b96d 764 int dai_index;
17b5273d 765 int i;
df1a2776 766
cb67d765 767 is_bytcr = false;
df1a2776
IT
768 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_ATOMIC);
769 if (!priv)
770 return -ENOMEM;
996cc849
SP
771
772 /* register the soc card */
9fd57471 773 byt_rt5640_card.dev = &pdev->dev;
caf94ed8 774 mach = byt_rt5640_card.dev->platform_data;
df1a2776 775 snd_soc_card_set_drvdata(&byt_rt5640_card, priv);
caf94ed8 776
a232b96d
PLB
777 /* fix index of codec dai */
778 dai_index = MERR_DPCM_COMPR + 1;
779 for (i = 0; i < ARRAY_SIZE(byt_rt5640_dais); i++) {
780 if (!strcmp(byt_rt5640_dais[i].codec_name, "i2c-10EC5640:00")) {
781 dai_index = i;
782 break;
783 }
784 }
785
caf94ed8 786 /* fixup codec name based on HID */
a232b96d 787 i2c_name = sst_acpi_find_name_from_hid(mach->id);
17b5273d 788 if (i2c_name) {
a232b96d
PLB
789 snprintf(byt_rt5640_codec_name, sizeof(byt_rt5640_codec_name),
790 "%s%s", "i2c-", i2c_name);
791
792 byt_rt5640_dais[dai_index].codec_name = byt_rt5640_codec_name;
793 }
9fd57471 794
e214f5e7
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795 /*
796 * swap SSP0 if bytcr is detected
797 * (will be overridden if DMI quirk is detected)
798 */
799 if (is_valleyview()) {
800 struct sst_platform_info *p_info = mach->pdata;
801 const struct sst_res_info *res_info = p_info->res_info;
802
64e84305
PLB
803 if (res_info->acpi_ipc_irq_index == 0)
804 is_bytcr = true;
805 }
806
807 if (is_bytcr) {
808 /*
809 * Baytrail CR platforms may have CHAN package in BIOS, try
810 * to find relevant routing quirk based as done on Windows
811 * platforms. We have to read the information directly from the
812 * BIOS, at this stage the card is not created and the links
813 * with the codec driver/pdata are non-existent
814 */
815
816 struct acpi_chan_package chan_package;
817
818 /* format specified: 2 64-bit integers */
819 struct acpi_buffer format = {sizeof("NN"), "NN"};
820 struct acpi_buffer state = {0, NULL};
821 struct sst_acpi_package_context pkg_ctx;
822 bool pkg_found = false;
823
824 state.length = sizeof(chan_package);
825 state.pointer = &chan_package;
826
827 pkg_ctx.name = "CHAN";
828 pkg_ctx.length = 2;
829 pkg_ctx.format = &format;
830 pkg_ctx.state = &state;
831 pkg_ctx.data_valid = false;
832
833 pkg_found = sst_acpi_find_package_from_hid(mach->id, &pkg_ctx);
834 if (pkg_found) {
835 if (chan_package.aif_value == 1) {
836 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
837 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF1;
838 } else if (chan_package.aif_value == 2) {
839 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
840 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF2;
841 } else {
842 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
843 pkg_found = false;
844 }
845 }
846
847 if (!pkg_found) {
848 /* no BIOS indications, assume SSP0-AIF2 connection */
e214f5e7
PLB
849 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF2;
850 }
bf46241b
PLB
851
852 /* change defaults for Baytrail-CR capture */
853 byt_rt5640_quirk |= BYT_RT5640_IN1_MAP;
854 byt_rt5640_quirk |= BYT_RT5640_DIFF_MIC;
855 } else {
856 byt_rt5640_quirk |= (BYT_RT5640_DMIC1_MAP |
857 BYT_RT5640_DMIC_EN);
e214f5e7
PLB
858 }
859
ab738e4e
PLB
860 /* check quirks before creating card */
861 dmi_check_system(byt_rt5640_quirk_table);
9f2cf73e 862 if (quirk_override) {
0b2c9f88 863 dev_info(&pdev->dev, "Overriding quirk 0x%x => 0x%x\n",
9f2cf73e
TI
864 (unsigned int)byt_rt5640_quirk, quirk_override);
865 byt_rt5640_quirk = quirk_override;
866 }
d7e60d52 867 log_quirks(&pdev->dev);
ab738e4e 868
f47088d5
PLB
869 if ((byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2) ||
870 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
89b8907c
PLB
871
872 /* fixup codec aif name */
873 snprintf(byt_rt5640_codec_aif_name,
874 sizeof(byt_rt5640_codec_aif_name),
875 "%s", "rt5640-aif2");
876
877 byt_rt5640_dais[dai_index].codec_dai_name =
878 byt_rt5640_codec_aif_name;
879 }
880
f47088d5
PLB
881 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
882 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
883
884 /* fixup cpu dai name name */
885 snprintf(byt_rt5640_cpu_dai_name,
886 sizeof(byt_rt5640_cpu_dai_name),
887 "%s", "ssp0-port");
888
889 byt_rt5640_dais[dai_index].cpu_dai_name =
890 byt_rt5640_cpu_dai_name;
891 }
892
7735bce0 893 if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
df1a2776
IT
894 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
895 if (IS_ERR(priv->mclk)) {
4a8b3a68
PLB
896 ret_val = PTR_ERR(priv->mclk);
897
df1a2776 898 dev_err(&pdev->dev,
4a8b3a68
PLB
899 "Failed to get MCLK from pmc_plt_clk_3: %d\n",
900 ret_val);
901
902 /*
903 * Fall back to bit clock usage for -ENOENT (clock not
904 * available likely due to missing dependencies), bail
905 * for all other errors, including -EPROBE_DEFER
906 */
907 if (ret_val != -ENOENT)
908 return ret_val;
909 byt_rt5640_quirk &= ~BYT_RT5640_MCLK_EN;
df1a2776
IT
910 }
911 }
912
9fd57471 913 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5640_card);
996cc849 914
996cc849 915 if (ret_val) {
a2d5563b
PLB
916 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
917 ret_val);
996cc849
SP
918 return ret_val;
919 }
9fd57471 920 platform_set_drvdata(pdev, &byt_rt5640_card);
996cc849
SP
921 return ret_val;
922}
923
a2d5563b 924static struct platform_driver snd_byt_rt5640_mc_driver = {
996cc849 925 .driver = {
a2d5563b 926 .name = "bytcr_rt5640",
996cc849 927 },
a2d5563b 928 .probe = snd_byt_rt5640_mc_probe,
996cc849
SP
929};
930
a2d5563b 931module_platform_driver(snd_byt_rt5640_mc_driver);
996cc849
SP
932
933MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
934MODULE_AUTHOR("Subhransu S. Prusty <subhransu.s.prusty@intel.com>");
935MODULE_LICENSE("GPL v2");
a2d5563b 936MODULE_ALIAS("platform:bytcr_rt5640");