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Merge remote-tracking branches 'asoc/topic/rockchip', 'asoc/topic/rt5514', 'asoc...
[mirror_ubuntu-bionic-kernel.git] / sound / soc / intel / boards / bytcr_rt5640.c
CommitLineData
996cc849
SP		 1/*
2 * byt_cr_dpcm_rt5640.c - ASoc Machine driver for Intel Byt CR platform
3 *
4 * Copyright (C) 2014 Intel Corp
5 * Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
9f2cf73e 22#include <linux/moduleparam.h>
996cc849 23#include <linux/platform_device.h>
a2d5563b 24#include <linux/acpi.h>
996cc849 25#include <linux/device.h>
a2d5563b 26#include <linux/dmi.h>
996cc849 27#include <linux/slab.h>
e214f5e7
PLB		 28#include <asm/cpu_device_id.h>
29#include <asm/platform_sst_audio.h>
df1a2776 30#include <linux/clk.h>
996cc849
SP		 31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
a2d5563b 34#include <sound/jack.h>
e56c72d5 35#include "../../codecs/rt5640.h"
b97169da 36#include "../atom/sst-atom-controls.h"
caf94ed8 37#include "../common/sst-acpi.h"
e214f5e7 38#include "../common/sst-dsp.h"
996cc849 39
ab738e4e
PLB		 40enum {
41 BYT_RT5640_DMIC1_MAP,
42 BYT_RT5640_DMIC2_MAP,
43 BYT_RT5640_IN1_MAP,
59e8b652 44 BYT_RT5640_IN3_MAP,
ab738e4e
PLB		 45};
46
47#define BYT_RT5640_MAP(quirk) ((quirk) & 0xff)
48#define BYT_RT5640_DMIC_EN BIT(16)
68817cdb 49#define BYT_RT5640_MONO_SPEAKER BIT(17)
5d98f58f 50#define BYT_RT5640_DIFF_MIC BIT(18) /* defaut is single-ended */
89b8907c 51#define BYT_RT5640_SSP2_AIF2 BIT(19) /* default is using AIF1 */
f47088d5
PLB		 52#define BYT_RT5640_SSP0_AIF1 BIT(20)
53#define BYT_RT5640_SSP0_AIF2 BIT(21)
df1a2776
IT		 54#define BYT_RT5640_MCLK_EN BIT(22)
55#define BYT_RT5640_MCLK_25MHZ BIT(23)
56
57struct byt_rt5640_private {
58 struct clk *mclk;
59};
cb67d765 60static bool is_bytcr;
ab738e4e 61
bf46241b 62static unsigned long byt_rt5640_quirk = BYT_RT5640_MCLK_EN;
9f2cf73e 63static unsigned int quirk_override;
0b2c9f88 64module_param_named(quirk, quirk_override, uint, 0444);
9f2cf73e 65MODULE_PARM_DESC(quirk, "Board-specific quirk override");
df1a2776 66
d7e60d52
PLB		 67static void log_quirks(struct device *dev)
68{
cb67d765
PLB		 69 int map;
70 bool has_dmic = false;
71 bool has_mclk = false;
72 bool has_ssp0 = false;
73 bool has_ssp0_aif1 = false;
74 bool has_ssp0_aif2 = false;
75 bool has_ssp2_aif2 = false;
76
77 map = BYT_RT5640_MAP(byt_rt5640_quirk);
78 switch (map) {
79 case BYT_RT5640_DMIC1_MAP:
80 dev_info(dev, "quirk DMIC1_MAP enabled\n");
81 has_dmic = true;
82 break;
83 case BYT_RT5640_DMIC2_MAP:
84 dev_info(dev, "quirk DMIC2_MAP enabled\n");
85 has_dmic = true;
86 break;
87 case BYT_RT5640_IN1_MAP:
88 dev_info(dev, "quirk IN1_MAP enabled\n");
89 break;
90 case BYT_RT5640_IN3_MAP:
91 dev_info(dev, "quirk IN3_MAP enabled\n");
92 break;
93 default:
94 dev_err(dev, "quirk map 0x%x is not supported, microphone input will not work\n", map);
95 break;
96 }
97 if (byt_rt5640_quirk & BYT_RT5640_DMIC_EN) {
98 if (has_dmic)
99 dev_info(dev, "quirk DMIC enabled\n");
100 else
101 dev_err(dev, "quirk DMIC enabled but no DMIC input set, will be ignored\n");
102 }
d7e60d52 103 if (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER)
cb67d765
PLB		 104 dev_info(dev, "quirk MONO_SPEAKER enabled\n");
105 if (byt_rt5640_quirk & BYT_RT5640_DIFF_MIC) {
106 if (!has_dmic)
107 dev_info(dev, "quirk DIFF_MIC enabled\n");
108 else
109 dev_info(dev, "quirk DIFF_MIC enabled but DMIC input selected, will be ignored\n");
110 }
111 if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) {
112 dev_info(dev, "quirk SSP0_AIF1 enabled\n");
113 has_ssp0 = true;
114 has_ssp0_aif1 = true;
115 }
116 if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2) {
117 dev_info(dev, "quirk SSP0_AIF2 enabled\n");
118 has_ssp0 = true;
119 has_ssp0_aif2 = true;
120 }
121 if (byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2) {
122 dev_info(dev, "quirk SSP2_AIF2 enabled\n");
123 has_ssp2_aif2 = true;
124 }
125 if (is_bytcr && !has_ssp0)
126 dev_err(dev, "Invalid routing, bytcr detected but no SSP0-based quirk, audio cannot work with SSP2 on bytcr\n");
127 if (has_ssp0_aif1 && has_ssp0_aif2)
128 dev_err(dev, "Invalid routing, SSP0 cannot be connected to both AIF1 and AIF2\n");
129 if (has_ssp0 && has_ssp2_aif2)
130 dev_err(dev, "Invalid routing, cannot have both SSP0 and SSP2 connected to codec\n");
131
132 if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
133 dev_info(dev, "quirk MCLK_EN enabled\n");
134 has_mclk = true;
135 }
136 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ) {
137 if (has_mclk)
138 dev_info(dev, "quirk MCLK_25MHZ enabled\n");
139 else
140 dev_err(dev, "quirk MCLK_25MHZ enabled but quirk MCLK not selected, will be ignored\n");
141 }
d7e60d52
PLB		 142}
143
144
df1a2776
IT		 145#define BYT_CODEC_DAI1 "rt5640-aif1"
146#define BYT_CODEC_DAI2 "rt5640-aif2"
147
148static inline struct snd_soc_dai *byt_get_codec_dai(struct snd_soc_card *card)
149{
150 struct snd_soc_pcm_runtime *rtd;
151
152 list_for_each_entry(rtd, &card->rtd_list, list) {
153 if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI1,
154 strlen(BYT_CODEC_DAI1)))
155 return rtd->codec_dai;
156 if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI2,
157 strlen(BYT_CODEC_DAI2)))
158 return rtd->codec_dai;
159
160 }
161 return NULL;
162}
163
164static int platform_clock_control(struct snd_soc_dapm_widget *w,
165 struct snd_kcontrol *k, int event)
166{
167 struct snd_soc_dapm_context *dapm = w->dapm;
168 struct snd_soc_card *card = dapm->card;
169 struct snd_soc_dai *codec_dai;
170 struct byt_rt5640_private *priv = snd_soc_card_get_drvdata(card);
171 int ret;
172
173 codec_dai = byt_get_codec_dai(card);
174 if (!codec_dai) {
175 dev_err(card->dev,
176 "Codec dai not found; Unable to set platform clock\n");
177 return -EIO;
178 }
179
180 if (SND_SOC_DAPM_EVENT_ON(event)) {
181 if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk) {
182 ret = clk_prepare_enable(priv->mclk);
183 if (ret < 0) {
184 dev_err(card->dev,
cb67d765 185 "could not configure MCLK state\n");
df1a2776
IT		 186 return ret;
187 }
188 }
189 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
190 48000 * 512,
191 SND_SOC_CLOCK_IN);
192 } else {
193 /*
194 * Set codec clock source to internal clock before
195 * turning off the platform clock. Codec needs clock
196 * for Jack detection and button press
197 */
198 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_RCCLK,
60448b07 199 48000 * 512,
df1a2776
IT		 200 SND_SOC_CLOCK_IN);
201 if (!ret) {
202 if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk)
203 clk_disable_unprepare(priv->mclk);
204 }
205 }
206
207 if (ret < 0) {
208 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
209 return ret;
210 }
211
212 return 0;
213}
ab738e4e 214
a2d5563b 215static const struct snd_soc_dapm_widget byt_rt5640_widgets[] = {
996cc849
SP		 216 SND_SOC_DAPM_HP("Headphone", NULL),
217 SND_SOC_DAPM_MIC("Headset Mic", NULL),
e2be1da0
PLB		 218 SND_SOC_DAPM_MIC("Internal Mic", NULL),
219 SND_SOC_DAPM_SPK("Speaker", NULL),
df1a2776
IT		 220 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
221 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
222 SND_SOC_DAPM_POST_PMD),
223
996cc849
SP		 224};
225
a2d5563b 226static const struct snd_soc_dapm_route byt_rt5640_audio_map[] = {
df1a2776
IT		 227 {"Headphone", NULL, "Platform Clock"},
228 {"Headset Mic", NULL, "Platform Clock"},
229 {"Internal Mic", NULL, "Platform Clock"},
230 {"Speaker", NULL, "Platform Clock"},
231
996cc849 232 {"Headset Mic", NULL, "MICBIAS1"},
e2be1da0 233 {"IN2P", NULL, "Headset Mic"},
996cc849
SP		 234 {"Headphone", NULL, "HPOL"},
235 {"Headphone", NULL, "HPOR"},
996cc849
SP		 236};
237
a2d5563b
PLB		 238static const struct snd_soc_dapm_route byt_rt5640_intmic_dmic1_map[] = {
239 {"DMIC1", NULL, "Internal Mic"},
240};
241
242static const struct snd_soc_dapm_route byt_rt5640_intmic_dmic2_map[] = {
243 {"DMIC2", NULL, "Internal Mic"},
244};
245
246static const struct snd_soc_dapm_route byt_rt5640_intmic_in1_map[] = {
247 {"Internal Mic", NULL, "MICBIAS1"},
248 {"IN1P", NULL, "Internal Mic"},
249};
250
59e8b652
PLB		 251static const struct snd_soc_dapm_route byt_rt5640_intmic_in3_map[] = {
252 {"Internal Mic", NULL, "MICBIAS1"},
253 {"IN3P", NULL, "Internal Mic"},
254};
255
89b8907c
PLB		 256static const struct snd_soc_dapm_route byt_rt5640_ssp2_aif1_map[] = {
257 {"ssp2 Tx", NULL, "codec_out0"},
258 {"ssp2 Tx", NULL, "codec_out1"},
259 {"codec_in0", NULL, "ssp2 Rx"},
260 {"codec_in1", NULL, "ssp2 Rx"},
261
262 {"AIF1 Playback", NULL, "ssp2 Tx"},
263 {"ssp2 Rx", NULL, "AIF1 Capture"},
264};
265
266static const struct snd_soc_dapm_route byt_rt5640_ssp2_aif2_map[] = {
267 {"ssp2 Tx", NULL, "codec_out0"},
268 {"ssp2 Tx", NULL, "codec_out1"},
269 {"codec_in0", NULL, "ssp2 Rx"},
270 {"codec_in1", NULL, "ssp2 Rx"},
271
272 {"AIF2 Playback", NULL, "ssp2 Tx"},
273 {"ssp2 Rx", NULL, "AIF2 Capture"},
274};
275
f47088d5
PLB		 276static const struct snd_soc_dapm_route byt_rt5640_ssp0_aif1_map[] = {
277 {"ssp0 Tx", NULL, "modem_out"},
278 {"modem_in", NULL, "ssp0 Rx"},
279
280 {"AIF1 Playback", NULL, "ssp0 Tx"},
281 {"ssp0 Rx", NULL, "AIF1 Capture"},
282};
283
284static const struct snd_soc_dapm_route byt_rt5640_ssp0_aif2_map[] = {
285 {"ssp0 Tx", NULL, "modem_out"},
286 {"modem_in", NULL, "ssp0 Rx"},
287
288 {"AIF2 Playback", NULL, "ssp0 Tx"},
289 {"ssp0 Rx", NULL, "AIF2 Capture"},
290};
291
68817cdb
PLB		 292static const struct snd_soc_dapm_route byt_rt5640_stereo_spk_map[] = {
293 {"Speaker", NULL, "SPOLP"},
294 {"Speaker", NULL, "SPOLN"},
295 {"Speaker", NULL, "SPORP"},
296 {"Speaker", NULL, "SPORN"},
297};
298
299static const struct snd_soc_dapm_route byt_rt5640_mono_spk_map[] = {
300 {"Speaker", NULL, "SPOLP"},
301 {"Speaker", NULL, "SPOLN"},
302};
303
a2d5563b 304static const struct snd_kcontrol_new byt_rt5640_controls[] = {
996cc849
SP		 305 SOC_DAPM_PIN_SWITCH("Headphone"),
306 SOC_DAPM_PIN_SWITCH("Headset Mic"),
e2be1da0
PLB		 307 SOC_DAPM_PIN_SWITCH("Internal Mic"),
308 SOC_DAPM_PIN_SWITCH("Speaker"),
996cc849
SP		 309};
310
a2d5563b 311static int byt_rt5640_aif1_hw_params(struct snd_pcm_substream *substream,
996cc849
SP		 312 struct snd_pcm_hw_params *params)
313{
314 struct snd_soc_pcm_runtime *rtd = substream->private_data;
315 struct snd_soc_dai *codec_dai = rtd->codec_dai;
316 int ret;
317
996cc849
SP		 318 ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
319 params_rate(params) * 512,
320 SND_SOC_CLOCK_IN);
df1a2776 321
996cc849
SP		 322 if (ret < 0) {
323 dev_err(rtd->dev, "can't set codec clock %d\n", ret);
324 return ret;
325 }
326
df1a2776
IT		 327 if (!(byt_rt5640_quirk & BYT_RT5640_MCLK_EN)) {
328 /* use bitclock as PLL input */
329 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
330 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
331
332 /* 2x16 bit slots on SSP0 */
333 ret = snd_soc_dai_set_pll(codec_dai, 0,
334 RT5640_PLL1_S_BCLK1,
335 params_rate(params) * 32,
336 params_rate(params) * 512);
337 } else {
338 /* 2x15 bit slots on SSP2 */
339 ret = snd_soc_dai_set_pll(codec_dai, 0,
340 RT5640_PLL1_S_BCLK1,
341 params_rate(params) * 50,
342 params_rate(params) * 512);
343 }
038a50e7 344 } else {
df1a2776
IT		 345 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ) {
346 ret = snd_soc_dai_set_pll(codec_dai, 0,
347 RT5640_PLL1_S_MCLK,
348 25000000,
349 params_rate(params) * 512);
350 } else {
351 ret = snd_soc_dai_set_pll(codec_dai, 0,
352 RT5640_PLL1_S_MCLK,
353 19200000,
354 params_rate(params) * 512);
355 }
038a50e7
PLB		 356 }
357
996cc849
SP		 358 if (ret < 0) {
359 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
360 return ret;
361 }
362
363 return 0;
364}
365
a2d5563b
PLB		 366static int byt_rt5640_quirk_cb(const struct dmi_system_id *id)
367{
368 byt_rt5640_quirk = (unsigned long)id->driver_data;
369 return 1;
370}
371
372static const struct dmi_system_id byt_rt5640_quirk_table[] = {
373 {
374 .callback = byt_rt5640_quirk_cb,
375 .matches = {
73442e3c
PLB		 376 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
377 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TA"),
a2d5563b 378 },
df1a2776
IT		 379 .driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
380 BYT_RT5640_MCLK_EN),
a2d5563b
PLB		 381 },
382 {
383 .callback = byt_rt5640_quirk_cb,
384 .matches = {
73442e3c
PLB		 385 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
386 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TAF"),
387 },
68817cdb 388 .driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
5d98f58f 389 BYT_RT5640_MONO_SPEAKER |
e214f5e7 390 BYT_RT5640_DIFF_MIC |
df1a2776
IT		 391 BYT_RT5640_SSP0_AIF2 |
392 BYT_RT5640_MCLK_EN
68817cdb 393 ),
73442e3c
PLB		 394 },
395 {
396 .callback = byt_rt5640_quirk_cb,
397 .matches = {
398 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "DellInc."),
399 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5830"),
a2d5563b
PLB		 400 },
401 .driver_data = (unsigned long *)(BYT_RT5640_DMIC2_MAP |
df1a2776
IT		 402 BYT_RT5640_DMIC_EN |
403 BYT_RT5640_MCLK_EN),
a2d5563b 404 },
55fc2056
JFM		 405 {
406 .callback = byt_rt5640_quirk_cb,
407 .matches = {
73442e3c
PLB		 408 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
409 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HP ElitePad 1000 G2"),
55fc2056 410 },
df1a2776
IT		 411 .driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
412 BYT_RT5640_MCLK_EN),
55fc2056 413 },
0565e773
IT		 414 {
415 .callback = byt_rt5640_quirk_cb,
416 .matches = {
417 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
418 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
419 },
420 .driver_data = (unsigned long *)(BYT_RT5640_DMIC1_MAP |
421 BYT_RT5640_DMIC_EN),
422 },
ec1c90e7
PLB		 423 {
424 .callback = byt_rt5640_quirk_cb,
425 .matches = {
426 DMI_MATCH(DMI_BOARD_VENDOR, "TECLAST"),
427 DMI_MATCH(DMI_BOARD_NAME, "tPAD"),
428 },
429 .driver_data = (unsigned long *)(BYT_RT5640_IN3_MAP |
430 BYT_RT5640_MCLK_EN |
431 BYT_RT5640_SSP0_AIF1),
432 },
8f98307d
PLB		 433 {
434 .callback = byt_rt5640_quirk_cb,
435 .matches = {
436 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
437 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire SW5-012"),
438 },
439 .driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
440 BYT_RT5640_MCLK_EN |
441 BYT_RT5640_SSP0_AIF1),
442
57180048 443 },
444 {
445 .callback = byt_rt5640_quirk_cb,
446 .matches = {
447 DMI_MATCH(DMI_SYS_VENDOR, "Insyde"),
448 },
449 .driver_data = (unsigned long *)(BYT_RT5640_IN3_MAP |
8f98307d
PLB		 450 BYT_RT5640_MCLK_EN |
451 BYT_RT5640_SSP0_AIF1),
452
453 },
a2d5563b
PLB		 454 {}
455};
456
9fd57471
PLB		 457static int byt_rt5640_init(struct snd_soc_pcm_runtime *runtime)
458{
459 int ret;
460 struct snd_soc_codec *codec = runtime->codec;
461 struct snd_soc_card *card = runtime->card;
462 const struct snd_soc_dapm_route *custom_map;
df1a2776 463 struct byt_rt5640_private *priv = snd_soc_card_get_drvdata(card);
9fd57471
PLB		 464 int num_routes;
465
466 card->dapm.idle_bias_off = true;
467
0ec66e2d
PLB		 468 rt5640_sel_asrc_clk_src(codec,
469 RT5640_DA_STEREO_FILTER |
df1a2776
IT		 470 RT5640_DA_MONO_L_FILTER |
471 RT5640_DA_MONO_R_FILTER |
472 RT5640_AD_STEREO_FILTER |
473 RT5640_AD_MONO_L_FILTER |
474 RT5640_AD_MONO_R_FILTER,
0ec66e2d
PLB		 475 RT5640_CLK_SEL_ASRC);
476
9fd57471
PLB		 477 ret = snd_soc_add_card_controls(card, byt_rt5640_controls,
478 ARRAY_SIZE(byt_rt5640_controls));
479 if (ret) {
480 dev_err(card->dev, "unable to add card controls\n");
481 return ret;
482 }
483
9fd57471
PLB		 484 switch (BYT_RT5640_MAP(byt_rt5640_quirk)) {
485 case BYT_RT5640_IN1_MAP:
486 custom_map = byt_rt5640_intmic_in1_map;
487 num_routes = ARRAY_SIZE(byt_rt5640_intmic_in1_map);
488 break;
59e8b652
PLB		 489 case BYT_RT5640_IN3_MAP:
490 custom_map = byt_rt5640_intmic_in3_map;
491 num_routes = ARRAY_SIZE(byt_rt5640_intmic_in3_map);
492 break;
9fd57471
PLB		 493 case BYT_RT5640_DMIC2_MAP:
494 custom_map = byt_rt5640_intmic_dmic2_map;
495 num_routes = ARRAY_SIZE(byt_rt5640_intmic_dmic2_map);
496 break;
497 default:
498 custom_map = byt_rt5640_intmic_dmic1_map;
499 num_routes = ARRAY_SIZE(byt_rt5640_intmic_dmic1_map);
500 }
501
502 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
503 if (ret)
504 return ret;
505
89b8907c
PLB		 506 if (byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2) {
507 ret = snd_soc_dapm_add_routes(&card->dapm,
508 byt_rt5640_ssp2_aif2_map,
509 ARRAY_SIZE(byt_rt5640_ssp2_aif2_map));
f47088d5
PLB		 510 } else if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) {
511 ret = snd_soc_dapm_add_routes(&card->dapm,
512 byt_rt5640_ssp0_aif1_map,
513 ARRAY_SIZE(byt_rt5640_ssp0_aif1_map));
514 } else if (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2) {
515 ret = snd_soc_dapm_add_routes(&card->dapm,
516 byt_rt5640_ssp0_aif2_map,
517 ARRAY_SIZE(byt_rt5640_ssp0_aif2_map));
89b8907c
PLB		 518 } else {
519 ret = snd_soc_dapm_add_routes(&card->dapm,
520 byt_rt5640_ssp2_aif1_map,
521 ARRAY_SIZE(byt_rt5640_ssp2_aif1_map));
522 }
523 if (ret)
524 return ret;
525
68817cdb
PLB		 526 if (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER) {
527 ret = snd_soc_dapm_add_routes(&card->dapm,
528 byt_rt5640_mono_spk_map,
529 ARRAY_SIZE(byt_rt5640_mono_spk_map));
530 } else {
531 ret = snd_soc_dapm_add_routes(&card->dapm,
532 byt_rt5640_stereo_spk_map,
533 ARRAY_SIZE(byt_rt5640_stereo_spk_map));
534 }
535 if (ret)
536 return ret;
537
5d98f58f
PLB		 538 if (byt_rt5640_quirk & BYT_RT5640_DIFF_MIC) {
539 snd_soc_update_bits(codec, RT5640_IN1_IN2, RT5640_IN_DF1,
540 RT5640_IN_DF1);
541 }
542
9fd57471
PLB		 543 if (byt_rt5640_quirk & BYT_RT5640_DMIC_EN) {
544 ret = rt5640_dmic_enable(codec, 0, 0);
545 if (ret)
546 return ret;
547 }
548
549 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
550 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
551
df1a2776
IT		 552 if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk) {
553 /*
554 * The firmware might enable the clock at
555 * boot (this information may or may not
556 * be reflected in the enable clock register).
557 * To change the rate we must disable the clock
558 * first to cover these cases. Due to common
559 * clock framework restrictions that do not allow
560 * to disable a clock that has not been enabled,
561 * we need to enable the clock first.
562 */
563 ret = clk_prepare_enable(priv->mclk);
564 if (!ret)
565 clk_disable_unprepare(priv->mclk);
566
567 if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
568 ret = clk_set_rate(priv->mclk, 25000000);
569 else
570 ret = clk_set_rate(priv->mclk, 19200000);
571
572 if (ret)
573 dev_err(card->dev, "unable to set MCLK rate\n");
574 }
575
9fd57471
PLB		 576 return ret;
577}
578
a2d5563b 579static const struct snd_soc_pcm_stream byt_rt5640_dai_params = {
996cc849
SP		 580 .formats = SNDRV_PCM_FMTBIT_S24_LE,
581 .rate_min = 48000,
582 .rate_max = 48000,
583 .channels_min = 2,
584 .channels_max = 2,
585};
586
a2d5563b 587static int byt_rt5640_codec_fixup(struct snd_soc_pcm_runtime *rtd,
996cc849
SP		 588 struct snd_pcm_hw_params *params)
589{
590 struct snd_interval *rate = hw_param_interval(params,
591 SNDRV_PCM_HW_PARAM_RATE);
592 struct snd_interval *channels = hw_param_interval(params,
593 SNDRV_PCM_HW_PARAM_CHANNELS);
3f27dedd 594 int ret;
996cc849 595
038a50e7 596 /* The DSP will covert the FE rate to 48k, stereo */
996cc849
SP		 597 rate->min = rate->max = 48000;
598 channels->min = channels->max = 2;
599
038a50e7
PLB		 600 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
601 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
602
8f98307d 603 /* set SSP0 to 16-bit */
038a50e7
PLB		 604 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
605
606 /*
607 * Default mode for SSP configuration is TDM 4 slot, override config
608 * with explicit setting to I2S 2ch 16-bit. The word length is set with
609 * dai_set_tdm_slot() since there is no other API exposed
610 */
611 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
612 SND_SOC_DAIFMT_I2S |
f12f5c84 613 SND_SOC_DAIFMT_NB_NF |
038a50e7
PLB		 614 SND_SOC_DAIFMT_CBS_CFS
615 );
616 if (ret < 0) {
617 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
618 return ret;
619 }
3f27dedd 620
038a50e7
PLB		 621 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16);
622 if (ret < 0) {
623 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
624 return ret;
625 }
626
627 } else {
3f27dedd 628
038a50e7
PLB		 629 /* set SSP2 to 24-bit */
630 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
631
632 /*
633 * Default mode for SSP configuration is TDM 4 slot, override config
634 * with explicit setting to I2S 2ch 24-bit. The word length is set with
635 * dai_set_tdm_slot() since there is no other API exposed
636 */
637 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
638 SND_SOC_DAIFMT_I2S |
f12f5c84 639 SND_SOC_DAIFMT_NB_NF |
038a50e7
PLB		 640 SND_SOC_DAIFMT_CBS_CFS
641 );
642 if (ret < 0) {
643 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
644 return ret;
645 }
646
647 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 24);
648 if (ret < 0) {
649 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
650 return ret;
651 }
652 }
996cc849
SP		 653 return 0;
654}
655
a2d5563b 656static int byt_rt5640_aif1_startup(struct snd_pcm_substream *substream)
996cc849 657{
d0a1b660
LPC		 658 return snd_pcm_hw_constraint_single(substream->runtime,
659 SNDRV_PCM_HW_PARAM_RATE, 48000);
996cc849
SP		 660}
661
9b6fdef6 662static const struct snd_soc_ops byt_rt5640_aif1_ops = {
a2d5563b 663 .startup = byt_rt5640_aif1_startup,
996cc849
SP		 664};
665
9b6fdef6 666static const struct snd_soc_ops byt_rt5640_be_ssp2_ops = {
a2d5563b 667 .hw_params = byt_rt5640_aif1_hw_params,
996cc849
SP		 668};
669
a2d5563b 670static struct snd_soc_dai_link byt_rt5640_dais[] = {
996cc849
SP		 671 [MERR_DPCM_AUDIO] = {
672 .name = "Baytrail Audio Port",
673 .stream_name = "Baytrail Audio",
674 .cpu_dai_name = "media-cpu-dai",
675 .codec_dai_name = "snd-soc-dummy-dai",
676 .codec_name = "snd-soc-dummy",
677 .platform_name = "sst-mfld-platform",
6e4cac23 678 .nonatomic = true,
996cc849
SP		 679 .dynamic = 1,
680 .dpcm_playback = 1,
681 .dpcm_capture = 1,
a2d5563b 682 .ops = &byt_rt5640_aif1_ops,
996cc849 683 },
d35eb96a
PLB		 684 [MERR_DPCM_DEEP_BUFFER] = {
685 .name = "Deep-Buffer Audio Port",
686 .stream_name = "Deep-Buffer Audio",
687 .cpu_dai_name = "deepbuffer-cpu-dai",
688 .codec_dai_name = "snd-soc-dummy-dai",
689 .codec_name = "snd-soc-dummy",
690 .platform_name = "sst-mfld-platform",
d35eb96a
PLB		 691 .nonatomic = true,
692 .dynamic = 1,
693 .dpcm_playback = 1,
694 .ops = &byt_rt5640_aif1_ops,
695 },
996cc849
SP		 696 [MERR_DPCM_COMPR] = {
697 .name = "Baytrail Compressed Port",
698 .stream_name = "Baytrail Compress",
699 .cpu_dai_name = "compress-cpu-dai",
700 .codec_dai_name = "snd-soc-dummy-dai",
701 .codec_name = "snd-soc-dummy",
702 .platform_name = "sst-mfld-platform",
703 },
704 /* back ends */
705 {
706 .name = "SSP2-Codec",
2f0ad491 707 .id = 1,
f47088d5 708 .cpu_dai_name = "ssp2-port", /* overwritten for ssp0 routing */
996cc849
SP		 709 .platform_name = "sst-mfld-platform",
710 .no_pcm = 1,
89b8907c 711 .codec_dai_name = "rt5640-aif1", /* changed w/ quirk */
7762ef42 712 .codec_name = "i2c-10EC5640:00", /* overwritten with HID */
996cc849
SP		 713 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
714 | SND_SOC_DAIFMT_CBS_CFS,
a2d5563b 715 .be_hw_params_fixup = byt_rt5640_codec_fixup,
996cc849 716 .ignore_suspend = 1,
6e4cac23 717 .nonatomic = true,
996cc849
SP		 718 .dpcm_playback = 1,
719 .dpcm_capture = 1,
9fd57471 720 .init = byt_rt5640_init,
a2d5563b 721 .ops = &byt_rt5640_be_ssp2_ops,
996cc849
SP		 722 },
723};
724
725/* SoC card */
9fd57471 726static struct snd_soc_card byt_rt5640_card = {
a2d5563b 727 .name = "bytcr-rt5640",
54d8697f 728 .owner = THIS_MODULE,
a2d5563b
PLB		 729 .dai_link = byt_rt5640_dais,
730 .num_links = ARRAY_SIZE(byt_rt5640_dais),
731 .dapm_widgets = byt_rt5640_widgets,
732 .num_dapm_widgets = ARRAY_SIZE(byt_rt5640_widgets),
733 .dapm_routes = byt_rt5640_audio_map,
734 .num_dapm_routes = ARRAY_SIZE(byt_rt5640_audio_map),
9fd57471 735 .fully_routed = true,
996cc849
SP		 736};
737
caf94ed8 738static char byt_rt5640_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
89b8907c 739static char byt_rt5640_codec_aif_name[12]; /* = "rt5640-aif[1|2]" */
f47088d5 740static char byt_rt5640_cpu_dai_name[10]; /* = "ssp[0|2]-port" */
caf94ed8 741
e214f5e7
PLB		 742static bool is_valleyview(void)
743{
cac17731 744 static const struct x86_cpu_id cpu_ids[] = {
e214f5e7
PLB		 745 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
746 {}
747 };
748
749 if (!x86_match_cpu(cpu_ids))
750 return false;
751 return true;
752}
753
64e84305
PLB		 754struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */
755 u64 aif_value; /* 1: AIF1, 2: AIF2 */
756 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */
757};
df1a2776 758
a2d5563b 759static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
996cc849
SP		 760{
761 int ret_val = 0;
caf94ed8 762 struct sst_acpi_mach *mach;
a232b96d
PLB		 763 const char *i2c_name = NULL;
764 int i;
765 int dai_index;
df1a2776
IT		 766 struct byt_rt5640_private *priv;
767
cb67d765 768 is_bytcr = false;
df1a2776
IT		 769 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_ATOMIC);
770 if (!priv)
771 return -ENOMEM;
996cc849
SP		 772
773 /* register the soc card */
9fd57471 774 byt_rt5640_card.dev = &pdev->dev;
caf94ed8 775 mach = byt_rt5640_card.dev->platform_data;
df1a2776 776 snd_soc_card_set_drvdata(&byt_rt5640_card, priv);
caf94ed8 777
a232b96d
PLB		 778 /* fix index of codec dai */
779 dai_index = MERR_DPCM_COMPR + 1;
780 for (i = 0; i < ARRAY_SIZE(byt_rt5640_dais); i++) {
781 if (!strcmp(byt_rt5640_dais[i].codec_name, "i2c-10EC5640:00")) {
782 dai_index = i;
783 break;
784 }
785 }
786
caf94ed8 787 /* fixup codec name based on HID */
a232b96d
PLB		 788 i2c_name = sst_acpi_find_name_from_hid(mach->id);
789 if (i2c_name != NULL) {
790 snprintf(byt_rt5640_codec_name, sizeof(byt_rt5640_codec_name),
791 "%s%s", "i2c-", i2c_name);
792
793 byt_rt5640_dais[dai_index].codec_name = byt_rt5640_codec_name;
794 }
9fd57471 795
e214f5e7
PLB		 796 /*
797 * swap SSP0 if bytcr is detected
798 * (will be overridden if DMI quirk is detected)
799 */
800 if (is_valleyview()) {
801 struct sst_platform_info *p_info = mach->pdata;
802 const struct sst_res_info *res_info = p_info->res_info;
803
64e84305
PLB		 804 if (res_info->acpi_ipc_irq_index == 0)
805 is_bytcr = true;
806 }
807
808 if (is_bytcr) {
809 /*
810 * Baytrail CR platforms may have CHAN package in BIOS, try
811 * to find relevant routing quirk based as done on Windows
812 * platforms. We have to read the information directly from the
813 * BIOS, at this stage the card is not created and the links
814 * with the codec driver/pdata are non-existent
815 */
816
817 struct acpi_chan_package chan_package;
818
819 /* format specified: 2 64-bit integers */
820 struct acpi_buffer format = {sizeof("NN"), "NN"};
821 struct acpi_buffer state = {0, NULL};
822 struct sst_acpi_package_context pkg_ctx;
823 bool pkg_found = false;
824
825 state.length = sizeof(chan_package);
826 state.pointer = &chan_package;
827
828 pkg_ctx.name = "CHAN";
829 pkg_ctx.length = 2;
830 pkg_ctx.format = &format;
831 pkg_ctx.state = &state;
832 pkg_ctx.data_valid = false;
833
834 pkg_found = sst_acpi_find_package_from_hid(mach->id, &pkg_ctx);
835 if (pkg_found) {
836 if (chan_package.aif_value == 1) {
837 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
838 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF1;
839 } else if (chan_package.aif_value == 2) {
840 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
841 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF2;
842 } else {
843 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
844 pkg_found = false;
845 }
846 }
847
848 if (!pkg_found) {
849 /* no BIOS indications, assume SSP0-AIF2 connection */
e214f5e7
PLB		 850 byt_rt5640_quirk |= BYT_RT5640_SSP0_AIF2;
851 }
bf46241b
PLB		 852
853 /* change defaults for Baytrail-CR capture */
854 byt_rt5640_quirk |= BYT_RT5640_IN1_MAP;
855 byt_rt5640_quirk |= BYT_RT5640_DIFF_MIC;
856 } else {
857 byt_rt5640_quirk |= (BYT_RT5640_DMIC1_MAP |
858 BYT_RT5640_DMIC_EN);
e214f5e7
PLB		 859 }
860
ab738e4e
PLB		 861 /* check quirks before creating card */
862 dmi_check_system(byt_rt5640_quirk_table);
9f2cf73e 863 if (quirk_override) {
0b2c9f88 864 dev_info(&pdev->dev, "Overriding quirk 0x%x => 0x%x\n",
9f2cf73e
TI		 865 (unsigned int)byt_rt5640_quirk, quirk_override);
866 byt_rt5640_quirk = quirk_override;
867 }
d7e60d52 868 log_quirks(&pdev->dev);
ab738e4e 869
f47088d5
PLB		 870 if ((byt_rt5640_quirk & BYT_RT5640_SSP2_AIF2) ||
871 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
89b8907c
PLB		 872
873 /* fixup codec aif name */
874 snprintf(byt_rt5640_codec_aif_name,
875 sizeof(byt_rt5640_codec_aif_name),
876 "%s", "rt5640-aif2");
877
878 byt_rt5640_dais[dai_index].codec_dai_name =
879 byt_rt5640_codec_aif_name;
880 }
881
f47088d5
PLB		 882 if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
883 (byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
884
885 /* fixup cpu dai name name */
886 snprintf(byt_rt5640_cpu_dai_name,
887 sizeof(byt_rt5640_cpu_dai_name),
888 "%s", "ssp0-port");
889
890 byt_rt5640_dais[dai_index].cpu_dai_name =
891 byt_rt5640_cpu_dai_name;
892 }
893
df1a2776
IT		 894 if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && (is_valleyview())) {
895 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
896 if (IS_ERR(priv->mclk)) {
4a8b3a68
PLB		 897 ret_val = PTR_ERR(priv->mclk);
898
df1a2776 899 dev_err(&pdev->dev,
4a8b3a68
PLB		 900 "Failed to get MCLK from pmc_plt_clk_3: %d\n",
901 ret_val);
902
903 /*
904 * Fall back to bit clock usage for -ENOENT (clock not
905 * available likely due to missing dependencies), bail
906 * for all other errors, including -EPROBE_DEFER
907 */
908 if (ret_val != -ENOENT)
909 return ret_val;
910 byt_rt5640_quirk &= ~BYT_RT5640_MCLK_EN;
df1a2776
IT		 911 }
912 }
913
9fd57471 914 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5640_card);
996cc849 915
996cc849 916 if (ret_val) {
a2d5563b
PLB		 917 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
918 ret_val);
996cc849
SP		 919 return ret_val;
920 }
9fd57471 921 platform_set_drvdata(pdev, &byt_rt5640_card);
996cc849
SP		 922 return ret_val;
923}
924
a2d5563b 925static struct platform_driver snd_byt_rt5640_mc_driver = {
996cc849 926 .driver = {
a2d5563b 927 .name = "bytcr_rt5640",
996cc849 928 },
a2d5563b 929 .probe = snd_byt_rt5640_mc_probe,
996cc849
SP		 930};
931
a2d5563b 932module_platform_driver(snd_byt_rt5640_mc_driver);
996cc849
SP		 933
934MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
935MODULE_AUTHOR("Subhransu S. Prusty <subhransu.s.prusty@intel.com>");
936MODULE_LICENSE("GPL v2");
a2d5563b 937MODULE_ALIAS("platform:bytcr_rt5640");
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