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[mirror_ubuntu-bionic-kernel.git] / sound / soc / intel / boards / cht_bsw_max98090_ti.c
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17119a46
FY
1/*
2 * cht-bsw-max98090.c - ASoc Machine driver for Intel Cherryview-based
3 * platforms Cherrytrail and Braswell, with max98090 & TI codec.
4 *
5 * Copyright (C) 2015 Intel Corp
6 * Author: Fang, Yang A <yang.a.fang@intel.com>
7 * This file is modified from cht_bsw_rt5645.c
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
20 */
21
e7f0b0ec 22#include <linux/dmi.h>
17119a46
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23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/slab.h>
26#include <linux/acpi.h>
299bad36 27#include <linux/clk.h>
17119a46
FY
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/soc.h>
31#include <sound/jack.h>
32#include "../../codecs/max98090.h"
33#include "../atom/sst-atom-controls.h"
34#include "../../codecs/ts3a227e.h"
35
36#define CHT_PLAT_CLK_3_HZ 19200000
37#define CHT_CODEC_DAI "HiFi"
38
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HG
39#define QUIRK_PMC_PLT_CLK_0 0x01
40
17119a46 41struct cht_mc_private {
299bad36 42 struct clk *mclk;
17119a46
FY
43 struct snd_soc_jack jack;
44 bool ts3a227e_present;
45};
46
299bad36
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47static int platform_clock_control(struct snd_soc_dapm_widget *w,
48 struct snd_kcontrol *k, int event)
49{
50 struct snd_soc_dapm_context *dapm = w->dapm;
51 struct snd_soc_card *card = dapm->card;
52 struct snd_soc_dai *codec_dai;
53 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
54 int ret;
55
dfb6ec7a 56 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
299bad36
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57 if (!codec_dai) {
58 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
59 return -EIO;
60 }
61
62 if (SND_SOC_DAPM_EVENT_ON(event)) {
63 ret = clk_prepare_enable(ctx->mclk);
64 if (ret < 0) {
65 dev_err(card->dev,
66 "could not configure MCLK state");
67 return ret;
68 }
69 } else {
70 clk_disable_unprepare(ctx->mclk);
71 }
72
73 return 0;
74}
75
17119a46
FY
76static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
77 SND_SOC_DAPM_HP("Headphone", NULL),
78 SND_SOC_DAPM_MIC("Headset Mic", NULL),
79 SND_SOC_DAPM_MIC("Int Mic", NULL),
80 SND_SOC_DAPM_SPK("Ext Spk", NULL),
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81 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
82 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
83 SND_SOC_DAPM_POST_PMD),
17119a46
FY
84};
85
86static const struct snd_soc_dapm_route cht_audio_map[] = {
87 {"IN34", NULL, "Headset Mic"},
88 {"Headset Mic", NULL, "MICBIAS"},
89 {"DMICL", NULL, "Int Mic"},
90 {"Headphone", NULL, "HPL"},
91 {"Headphone", NULL, "HPR"},
92 {"Ext Spk", NULL, "SPKL"},
93 {"Ext Spk", NULL, "SPKR"},
8bc76c8b 94 {"HiFi Playback", NULL, "ssp2 Tx"},
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95 {"ssp2 Tx", NULL, "codec_out0"},
96 {"ssp2 Tx", NULL, "codec_out1"},
97 {"codec_in0", NULL, "ssp2 Rx" },
98 {"codec_in1", NULL, "ssp2 Rx" },
8bc76c8b 99 {"ssp2 Rx", NULL, "HiFi Capture"},
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100 {"Headphone", NULL, "Platform Clock"},
101 {"Headset Mic", NULL, "Platform Clock"},
102 {"Int Mic", NULL, "Platform Clock"},
103 {"Ext Spk", NULL, "Platform Clock"},
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104};
105
106static const struct snd_kcontrol_new cht_mc_controls[] = {
107 SOC_DAPM_PIN_SWITCH("Headphone"),
108 SOC_DAPM_PIN_SWITCH("Headset Mic"),
109 SOC_DAPM_PIN_SWITCH("Int Mic"),
110 SOC_DAPM_PIN_SWITCH("Ext Spk"),
111};
112
113static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
114 struct snd_pcm_hw_params *params)
115{
116 struct snd_soc_pcm_runtime *rtd = substream->private_data;
117 struct snd_soc_dai *codec_dai = rtd->codec_dai;
118 int ret;
119
120 ret = snd_soc_dai_set_sysclk(codec_dai, M98090_REG_SYSTEM_CLOCK,
121 CHT_PLAT_CLK_3_HZ, SND_SOC_CLOCK_IN);
122 if (ret < 0) {
123 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
124 return ret;
125 }
126
127 return 0;
128}
129
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130static int cht_ti_jack_event(struct notifier_block *nb,
131 unsigned long event, void *data)
132{
e8ed6702 133 struct snd_soc_jack *jack = (struct snd_soc_jack *)data;
c68c2be5 134 struct snd_soc_dapm_context *dapm = &jack->card->dapm;
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FY
135
136 if (event & SND_JACK_MICROPHONE) {
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137 snd_soc_dapm_force_enable_pin(dapm, "SHDN");
138 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS");
139 snd_soc_dapm_sync(dapm);
e8ed6702 140 } else {
c68c2be5
LPC
141 snd_soc_dapm_disable_pin(dapm, "MICBIAS");
142 snd_soc_dapm_disable_pin(dapm, "SHDN");
143 snd_soc_dapm_sync(dapm);
e8ed6702
FY
144 }
145
146 return 0;
147}
148
149static struct notifier_block cht_jack_nb = {
150 .notifier_call = cht_ti_jack_event,
151};
152
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153static struct snd_soc_jack_pin hs_jack_pins[] = {
154 {
155 .pin = "Headphone",
156 .mask = SND_JACK_HEADPHONE,
157 },
158 {
159 .pin = "Headset Mic",
160 .mask = SND_JACK_MICROPHONE,
161 },
162};
163
164static struct snd_soc_jack_gpio hs_jack_gpios[] = {
165 {
166 .name = "hp",
167 .report = SND_JACK_HEADPHONE | SND_JACK_LINEOUT,
168 .debounce_time = 200,
169 },
170 {
171 .name = "mic",
172 .invert = 1,
173 .report = SND_JACK_MICROPHONE,
174 .debounce_time = 200,
175 },
176};
177
178static const struct acpi_gpio_params hp_gpios = { 0, 0, false };
179static const struct acpi_gpio_params mic_gpios = { 1, 0, false };
180
181static const struct acpi_gpio_mapping acpi_max98090_gpios[] = {
182 { "hp-gpios", &hp_gpios, 1 },
183 { "mic-gpios", &mic_gpios, 1 },
184 {},
185};
186
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FY
187static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
188{
189 int ret;
190 int jack_type;
191 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
192 struct snd_soc_jack *jack = &ctx->jack;
193
3bbda5a3
TE
194 if (ctx->ts3a227e_present) {
195 /*
196 * The jack has already been created in the
197 * cht_max98090_headset_init() function.
198 */
199 snd_soc_jack_notifier_register(jack, &cht_jack_nb);
200 return 0;
201 }
17119a46 202
3bbda5a3 203 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE;
17119a46 204
17119a46 205 ret = snd_soc_card_jack_new(runtime->card, "Headset Jack",
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206 jack_type, jack,
207 hs_jack_pins, ARRAY_SIZE(hs_jack_pins));
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208 if (ret) {
209 dev_err(runtime->dev, "Headset Jack creation failed %d\n", ret);
210 return ret;
211 }
212
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213 ret = snd_soc_jack_add_gpiods(runtime->card->dev->parent, jack,
214 ARRAY_SIZE(hs_jack_gpios),
215 hs_jack_gpios);
216 if (ret) {
217 /*
218 * flag error but don't bail if jack detect is broken
219 * due to platform issues or bad BIOS/configuration
220 */
221 dev_err(runtime->dev,
222 "jack detection gpios not added, error %d\n", ret);
223 }
224
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225 /*
226 * The firmware might enable the clock at
227 * boot (this information may or may not
228 * be reflected in the enable clock register).
229 * To change the rate we must disable the clock
230 * first to cover these cases. Due to common
231 * clock framework restrictions that do not allow
232 * to disable a clock that has not been enabled,
233 * we need to enable the clock first.
234 */
235 ret = clk_prepare_enable(ctx->mclk);
236 if (!ret)
237 clk_disable_unprepare(ctx->mclk);
238
239 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
240
241 if (ret)
242 dev_err(runtime->dev, "unable to set MCLK rate\n");
e8ed6702 243
17119a46
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244 return ret;
245}
246
247static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
248 struct snd_pcm_hw_params *params)
249{
250 struct snd_interval *rate = hw_param_interval(params,
251 SNDRV_PCM_HW_PARAM_RATE);
252 struct snd_interval *channels = hw_param_interval(params,
253 SNDRV_PCM_HW_PARAM_CHANNELS);
254 int ret = 0;
255 unsigned int fmt = 0;
256
257 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16);
258 if (ret < 0) {
259 dev_err(rtd->dev, "can't set cpu_dai slot fmt: %d\n", ret);
260 return ret;
261 }
262
948c5e19 263 fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
17119a46
FY
264 | SND_SOC_DAIFMT_CBS_CFS;
265
266 ret = snd_soc_dai_set_fmt(rtd->cpu_dai, fmt);
267 if (ret < 0) {
268 dev_err(rtd->dev, "can't set cpu_dai set fmt: %d\n", ret);
269 return ret;
270 }
271
272 /* The DSP will covert the FE rate to 48k, stereo, 24bits */
273 rate->min = rate->max = 48000;
274 channels->min = channels->max = 2;
275
948c5e19
PLB
276 /* set SSP2 to 16-bit */
277 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
17119a46
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278 return 0;
279}
280
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281static int cht_aif1_startup(struct snd_pcm_substream *substream)
282{
a6553a24
LPC
283 return snd_pcm_hw_constraint_single(substream->runtime,
284 SNDRV_PCM_HW_PARAM_RATE, 48000);
17119a46
FY
285}
286
287static int cht_max98090_headset_init(struct snd_soc_component *component)
288{
289 struct snd_soc_card *card = component->card;
290 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
3bbda5a3
TE
291 struct snd_soc_jack *jack = &ctx->jack;
292 int jack_type;
293 int ret;
17119a46 294
3bbda5a3
TE
295 /*
296 * TI supports 4 butons headset detection
297 * KEY_MEDIA
298 * KEY_VOICECOMMAND
299 * KEY_VOLUMEUP
300 * KEY_VOLUMEDOWN
301 */
302 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
303 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
304 SND_JACK_BTN_2 | SND_JACK_BTN_3;
305
306 ret = snd_soc_card_jack_new(card, "Headset Jack", jack_type,
307 jack, NULL, 0);
308 if (ret) {
309 dev_err(card->dev, "Headset Jack creation failed %d\n", ret);
310 return ret;
311 }
17119a46 312
0087f201 313 return ts3a227e_enable_jack_detect(component, jack);
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314}
315
9b6fdef6 316static const struct snd_soc_ops cht_aif1_ops = {
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317 .startup = cht_aif1_startup,
318};
319
9b6fdef6 320static const struct snd_soc_ops cht_be_ssp2_ops = {
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321 .hw_params = cht_aif1_hw_params,
322};
323
324static struct snd_soc_aux_dev cht_max98090_headset_dev = {
325 .name = "Headset Chip",
326 .init = cht_max98090_headset_init,
327 .codec_name = "i2c-104C227E:00",
328};
329
330static struct snd_soc_dai_link cht_dailink[] = {
331 [MERR_DPCM_AUDIO] = {
332 .name = "Audio Port",
333 .stream_name = "Audio",
334 .cpu_dai_name = "media-cpu-dai",
335 .codec_dai_name = "snd-soc-dummy-dai",
336 .codec_name = "snd-soc-dummy",
337 .platform_name = "sst-mfld-platform",
338 .nonatomic = true,
339 .dynamic = 1,
340 .dpcm_playback = 1,
341 .dpcm_capture = 1,
342 .ops = &cht_aif1_ops,
343 },
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344 [MERR_DPCM_DEEP_BUFFER] = {
345 .name = "Deep-Buffer Audio Port",
346 .stream_name = "Deep-Buffer Audio",
347 .cpu_dai_name = "deepbuffer-cpu-dai",
348 .codec_dai_name = "snd-soc-dummy-dai",
349 .codec_name = "snd-soc-dummy",
350 .platform_name = "sst-mfld-platform",
351 .nonatomic = true,
352 .dynamic = 1,
353 .dpcm_playback = 1,
354 .ops = &cht_aif1_ops,
355 },
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356 /* back ends */
357 {
358 .name = "SSP2-Codec",
149f7757 359 .id = 0,
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360 .cpu_dai_name = "ssp2-port",
361 .platform_name = "sst-mfld-platform",
362 .no_pcm = 1,
363 .codec_dai_name = "HiFi",
364 .codec_name = "i2c-193C9890:00",
365 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
366 | SND_SOC_DAIFMT_CBS_CFS,
367 .init = cht_codec_init,
368 .be_hw_params_fixup = cht_codec_fixup,
369 .dpcm_playback = 1,
370 .dpcm_capture = 1,
371 .ops = &cht_be_ssp2_ops,
372 },
373};
374
375/* SoC card */
376static struct snd_soc_card snd_soc_card_cht = {
377 .name = "chtmax98090",
54d8697f 378 .owner = THIS_MODULE,
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379 .dai_link = cht_dailink,
380 .num_links = ARRAY_SIZE(cht_dailink),
381 .aux_dev = &cht_max98090_headset_dev,
382 .num_aux_devs = 1,
383 .dapm_widgets = cht_dapm_widgets,
384 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
385 .dapm_routes = cht_audio_map,
386 .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
387 .controls = cht_mc_controls,
388 .num_controls = ARRAY_SIZE(cht_mc_controls),
389};
390
e7f0b0ec 391static const struct dmi_system_id cht_max98090_quirk_table[] = {
c34db5da
HG
392 {
393 /* Clapper model Chromebook */
394 .matches = {
395 DMI_MATCH(DMI_PRODUCT_NAME, "Clapper"),
396 },
7134ed17
HG
397 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
398 },
399 {
400 /* Gnawty model Chromebook (Acer Chromebook CB3-111) */
401 .matches = {
402 DMI_MATCH(DMI_PRODUCT_NAME, "Gnawty"),
403 },
c34db5da
HG
404 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
405 },
e7f0b0ec
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406 {
407 /* Swanky model Chromebook (Toshiba Chromebook 2) */
408 .matches = {
409 DMI_MATCH(DMI_PRODUCT_NAME, "Swanky"),
410 },
411 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
412 },
413 {}
414};
415
17119a46
FY
416static int snd_cht_mc_probe(struct platform_device *pdev)
417{
e7f0b0ec 418 const struct dmi_system_id *dmi_id;
355b3552 419 struct device *dev = &pdev->dev;
17119a46 420 int ret_val = 0;
17119a46 421 struct cht_mc_private *drv;
e7f0b0ec
HG
422 const char *mclk_name;
423 int quirks = 0;
424
425 dmi_id = dmi_first_match(cht_max98090_quirk_table);
426 if (dmi_id)
427 quirks = (unsigned long)dmi_id->driver_data;
17119a46
FY
428
429 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
430 if (!drv)
431 return -ENOMEM;
432
c68ae33e 433 drv->ts3a227e_present = acpi_dev_found("104C227E");
6f08cbda 434 if (!drv->ts3a227e_present) {
17119a46
FY
435 /* no need probe TI jack detection chip */
436 snd_soc_card_cht.aux_dev = NULL;
437 snd_soc_card_cht.num_aux_devs = 0;
355b3552
PLB
438
439 ret_val = devm_acpi_dev_add_driver_gpios(dev->parent,
440 acpi_max98090_gpios);
441 if (ret_val)
442 dev_dbg(dev, "Unable to add GPIO mapping table\n");
17119a46
FY
443 }
444
445 /* register the soc card */
446 snd_soc_card_cht.dev = &pdev->dev;
447 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
299bad36 448
e7f0b0ec
HG
449 if (quirks & QUIRK_PMC_PLT_CLK_0)
450 mclk_name = "pmc_plt_clk_0";
451 else
452 mclk_name = "pmc_plt_clk_3";
453
454 drv->mclk = devm_clk_get(&pdev->dev, mclk_name);
299bad36
PLB
455 if (IS_ERR(drv->mclk)) {
456 dev_err(&pdev->dev,
e7f0b0ec
HG
457 "Failed to get MCLK from %s: %ld\n",
458 mclk_name, PTR_ERR(drv->mclk));
299bad36
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459 return PTR_ERR(drv->mclk);
460 }
461
17119a46
FY
462 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
463 if (ret_val) {
464 dev_err(&pdev->dev,
465 "snd_soc_register_card failed %d\n", ret_val);
466 return ret_val;
467 }
468 platform_set_drvdata(pdev, &snd_soc_card_cht);
469 return ret_val;
470}
471
472static struct platform_driver snd_cht_mc_driver = {
473 .driver = {
474 .name = "cht-bsw-max98090",
475 },
476 .probe = snd_cht_mc_probe,
477};
478
479module_platform_driver(snd_cht_mc_driver)
480
481MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver");
482MODULE_AUTHOR("Fang, Yang A <yang.a.fang@intel.com>");
483MODULE_LICENSE("GPL v2");
484MODULE_ALIAS("platform:cht-bsw-max98090");