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1/*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/firmware.h>
22#include <sound/soc.h>
23#include <sound/soc-topology.h>
6277e832 24#include <uapi/sound/snd_sst_tokens.h>
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25#include "skl-sst-dsp.h"
26#include "skl-sst-ipc.h"
27#include "skl-topology.h"
28#include "skl.h"
29#include "skl-tplg-interface.h"
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30#include "../common/sst-dsp.h"
31#include "../common/sst-dsp-priv.h"
e4e2d2f4 32
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33#define SKL_CH_FIXUP_MASK (1 << 0)
34#define SKL_RATE_FIXUP_MASK (1 << 1)
35#define SKL_FMT_FIXUP_MASK (1 << 2)
6277e832
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36#define SKL_IN_DIR_BIT_MASK BIT(0)
37#define SKL_PIN_COUNT_MASK GENMASK(7, 4)
f7590d4f 38
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39void skl_tplg_d0i3_get(struct skl *skl, enum d0i3_capability caps)
40{
41 struct skl_d0i3_data *d0i3 = &skl->skl_sst->d0i3;
42
43 switch (caps) {
44 case SKL_D0I3_NONE:
45 d0i3->non_d0i3++;
46 break;
47
48 case SKL_D0I3_STREAMING:
49 d0i3->streaming++;
50 break;
51
52 case SKL_D0I3_NON_STREAMING:
53 d0i3->non_streaming++;
54 break;
55 }
56}
57
58void skl_tplg_d0i3_put(struct skl *skl, enum d0i3_capability caps)
59{
60 struct skl_d0i3_data *d0i3 = &skl->skl_sst->d0i3;
61
62 switch (caps) {
63 case SKL_D0I3_NONE:
64 d0i3->non_d0i3--;
65 break;
66
67 case SKL_D0I3_STREAMING:
68 d0i3->streaming--;
69 break;
70
71 case SKL_D0I3_NON_STREAMING:
72 d0i3->non_streaming--;
73 break;
74 }
75}
76
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77/*
78 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
79 * ignore. This helpers checks if the SKL driver handles this widget type
80 */
81static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
82{
83 switch (w->id) {
84 case snd_soc_dapm_dai_link:
85 case snd_soc_dapm_dai_in:
86 case snd_soc_dapm_aif_in:
87 case snd_soc_dapm_aif_out:
88 case snd_soc_dapm_dai_out:
89 case snd_soc_dapm_switch:
90 return false;
91 default:
92 return true;
93 }
94}
95
96/*
97 * Each pipelines needs memory to be allocated. Check if we have free memory
9ba8ffef 98 * from available pool.
e4e2d2f4 99 */
9ba8ffef 100static bool skl_is_pipe_mem_avail(struct skl *skl,
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101 struct skl_module_cfg *mconfig)
102{
103 struct skl_sst *ctx = skl->skl_sst;
104
105 if (skl->resource.mem + mconfig->pipe->memory_pages >
106 skl->resource.max_mem) {
107 dev_err(ctx->dev,
108 "%s: module_id %d instance %d\n", __func__,
109 mconfig->id.module_id,
110 mconfig->id.instance_id);
111 dev_err(ctx->dev,
112 "exceeds ppl memory available %d mem %d\n",
113 skl->resource.max_mem, skl->resource.mem);
114 return false;
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115 } else {
116 return true;
e4e2d2f4 117 }
9ba8ffef 118}
e4e2d2f4 119
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120/*
121 * Add the mem to the mem pool. This is freed when pipe is deleted.
122 * Note: DSP does actual memory management we only keep track for complete
123 * pool
124 */
125static void skl_tplg_alloc_pipe_mem(struct skl *skl,
126 struct skl_module_cfg *mconfig)
127{
e4e2d2f4 128 skl->resource.mem += mconfig->pipe->memory_pages;
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129}
130
131/*
132 * Pipeline needs needs DSP CPU resources for computation, this is
133 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
134 *
135 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
9ba8ffef 136 * pipe.
e4e2d2f4 137 */
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138
139static bool skl_is_pipe_mcps_avail(struct skl *skl,
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140 struct skl_module_cfg *mconfig)
141{
142 struct skl_sst *ctx = skl->skl_sst;
143
144 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
145 dev_err(ctx->dev,
146 "%s: module_id %d instance %d\n", __func__,
147 mconfig->id.module_id, mconfig->id.instance_id);
148 dev_err(ctx->dev,
7ca42f5a 149 "exceeds ppl mcps available %d > mem %d\n",
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150 skl->resource.max_mcps, skl->resource.mcps);
151 return false;
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152 } else {
153 return true;
e4e2d2f4 154 }
9ba8ffef 155}
e4e2d2f4 156
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157static void skl_tplg_alloc_pipe_mcps(struct skl *skl,
158 struct skl_module_cfg *mconfig)
159{
e4e2d2f4 160 skl->resource.mcps += mconfig->mcps;
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161}
162
163/*
164 * Free the mcps when tearing down
165 */
166static void
167skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
168{
169 skl->resource.mcps -= mconfig->mcps;
170}
171
172/*
173 * Free the memory when tearing down
174 */
175static void
176skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
177{
178 skl->resource.mem -= mconfig->pipe->memory_pages;
179}
180
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181
182static void skl_dump_mconfig(struct skl_sst *ctx,
183 struct skl_module_cfg *mcfg)
184{
185 dev_dbg(ctx->dev, "Dumping config\n");
186 dev_dbg(ctx->dev, "Input Format:\n");
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187 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels);
188 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq);
189 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg);
190 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth);
f7590d4f 191 dev_dbg(ctx->dev, "Output Format:\n");
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192 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels);
193 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq);
194 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth);
195 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg);
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196}
197
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198static void skl_tplg_update_chmap(struct skl_module_fmt *fmt, int chs)
199{
200 int slot_map = 0xFFFFFFFF;
201 int start_slot = 0;
202 int i;
203
204 for (i = 0; i < chs; i++) {
205 /*
206 * For 2 channels with starting slot as 0, slot map will
207 * look like 0xFFFFFF10.
208 */
209 slot_map &= (~(0xF << (4 * i)) | (start_slot << (4 * i)));
210 start_slot++;
211 }
212 fmt->ch_map = slot_map;
213}
214
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215static void skl_tplg_update_params(struct skl_module_fmt *fmt,
216 struct skl_pipe_params *params, int fixup)
217{
218 if (fixup & SKL_RATE_FIXUP_MASK)
219 fmt->s_freq = params->s_freq;
ea5a137d 220 if (fixup & SKL_CH_FIXUP_MASK) {
f7590d4f 221 fmt->channels = params->ch;
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222 skl_tplg_update_chmap(fmt, fmt->channels);
223 }
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224 if (fixup & SKL_FMT_FIXUP_MASK) {
225 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
226
227 /*
228 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
229 * container so update bit depth accordingly
230 */
231 switch (fmt->valid_bit_depth) {
232 case SKL_DEPTH_16BIT:
233 fmt->bit_depth = fmt->valid_bit_depth;
234 break;
235
236 default:
237 fmt->bit_depth = SKL_DEPTH_32BIT;
238 break;
239 }
240 }
241
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242}
243
244/*
245 * A pipeline may have modules which impact the pcm parameters, like SRC,
246 * channel converter, format converter.
247 * We need to calculate the output params by applying the 'fixup'
248 * Topology will tell driver which type of fixup is to be applied by
249 * supplying the fixup mask, so based on that we calculate the output
250 *
251 * Now In FE the pcm hw_params is source/target format. Same is applicable
252 * for BE with its hw_params invoked.
253 * here based on FE, BE pipeline and direction we calculate the input and
254 * outfix and then apply that for a module
255 */
256static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
257 struct skl_pipe_params *params, bool is_fe)
258{
259 int in_fixup, out_fixup;
260 struct skl_module_fmt *in_fmt, *out_fmt;
261
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262 /* Fixups will be applied to pin 0 only */
263 in_fmt = &m_cfg->in_fmt[0];
264 out_fmt = &m_cfg->out_fmt[0];
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265
266 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
267 if (is_fe) {
268 in_fixup = m_cfg->params_fixup;
269 out_fixup = (~m_cfg->converter) &
270 m_cfg->params_fixup;
271 } else {
272 out_fixup = m_cfg->params_fixup;
273 in_fixup = (~m_cfg->converter) &
274 m_cfg->params_fixup;
275 }
276 } else {
277 if (is_fe) {
278 out_fixup = m_cfg->params_fixup;
279 in_fixup = (~m_cfg->converter) &
280 m_cfg->params_fixup;
281 } else {
282 in_fixup = m_cfg->params_fixup;
283 out_fixup = (~m_cfg->converter) &
284 m_cfg->params_fixup;
285 }
286 }
287
288 skl_tplg_update_params(in_fmt, params, in_fixup);
289 skl_tplg_update_params(out_fmt, params, out_fixup);
290}
291
292/*
293 * A module needs input and output buffers, which are dependent upon pcm
294 * params, so once we have calculate params, we need buffer calculation as
295 * well.
296 */
297static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
298 struct skl_module_cfg *mcfg)
299{
300 int multiplier = 1;
4cd9899f 301 struct skl_module_fmt *in_fmt, *out_fmt;
f0c8e1d9 302 int in_rate, out_rate;
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303
304
305 /* Since fixups is applied to pin 0 only, ibs, obs needs
306 * change for pin 0 only
307 */
308 in_fmt = &mcfg->in_fmt[0];
309 out_fmt = &mcfg->out_fmt[0];
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310
311 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
312 multiplier = 5;
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313
314 if (in_fmt->s_freq % 1000)
315 in_rate = (in_fmt->s_freq / 1000) + 1;
316 else
317 in_rate = (in_fmt->s_freq / 1000);
318
319 mcfg->ibs = in_rate * (mcfg->in_fmt->channels) *
320 (mcfg->in_fmt->bit_depth >> 3) *
321 multiplier;
322
323 if (mcfg->out_fmt->s_freq % 1000)
324 out_rate = (mcfg->out_fmt->s_freq / 1000) + 1;
325 else
326 out_rate = (mcfg->out_fmt->s_freq / 1000);
327
328 mcfg->obs = out_rate * (mcfg->out_fmt->channels) *
329 (mcfg->out_fmt->bit_depth >> 3) *
330 multiplier;
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331}
332
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333static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
334 struct skl_sst *ctx)
335{
336 struct skl_module_cfg *m_cfg = w->priv;
337 int link_type, dir;
338 u32 ch, s_freq, s_fmt;
339 struct nhlt_specific_cfg *cfg;
340 struct skl *skl = get_skl_ctx(ctx->dev);
341
342 /* check if we already have blob */
343 if (m_cfg->formats_config.caps_size > 0)
344 return 0;
345
c7c6c736 346 dev_dbg(ctx->dev, "Applying default cfg blob\n");
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347 switch (m_cfg->dev_type) {
348 case SKL_DEVICE_DMIC:
349 link_type = NHLT_LINK_DMIC;
c7c6c736 350 dir = SNDRV_PCM_STREAM_CAPTURE;
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351 s_freq = m_cfg->in_fmt[0].s_freq;
352 s_fmt = m_cfg->in_fmt[0].bit_depth;
353 ch = m_cfg->in_fmt[0].channels;
354 break;
355
356 case SKL_DEVICE_I2S:
357 link_type = NHLT_LINK_SSP;
358 if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) {
c7c6c736 359 dir = SNDRV_PCM_STREAM_PLAYBACK;
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360 s_freq = m_cfg->out_fmt[0].s_freq;
361 s_fmt = m_cfg->out_fmt[0].bit_depth;
362 ch = m_cfg->out_fmt[0].channels;
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363 } else {
364 dir = SNDRV_PCM_STREAM_CAPTURE;
365 s_freq = m_cfg->in_fmt[0].s_freq;
366 s_fmt = m_cfg->in_fmt[0].bit_depth;
367 ch = m_cfg->in_fmt[0].channels;
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368 }
369 break;
370
371 default:
372 return -EINVAL;
373 }
374
375 /* update the blob based on virtual bus_id and default params */
376 cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type,
377 s_fmt, ch, s_freq, dir);
378 if (cfg) {
379 m_cfg->formats_config.caps_size = cfg->size;
380 m_cfg->formats_config.caps = (u32 *) &cfg->caps;
381 } else {
382 dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n",
383 m_cfg->vbus_id, link_type, dir);
384 dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n",
385 ch, s_freq, s_fmt);
386 return -EIO;
387 }
388
389 return 0;
390}
391
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392static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
393 struct skl_sst *ctx)
394{
395 struct skl_module_cfg *m_cfg = w->priv;
396 struct skl_pipe_params *params = m_cfg->pipe->p_params;
397 int p_conn_type = m_cfg->pipe->conn_type;
398 bool is_fe;
399
400 if (!m_cfg->params_fixup)
401 return;
402
403 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
404 w->name);
405
406 skl_dump_mconfig(ctx, m_cfg);
407
408 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
409 is_fe = true;
410 else
411 is_fe = false;
412
413 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
414 skl_tplg_update_buffer_size(ctx, m_cfg);
415
416 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
417 w->name);
418
419 skl_dump_mconfig(ctx, m_cfg);
420}
421
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422/*
423 * some modules can have multiple params set from user control and
424 * need to be set after module is initialized. If set_param flag is
425 * set module params will be done after module is initialised.
426 */
427static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w,
428 struct skl_sst *ctx)
429{
430 int i, ret;
431 struct skl_module_cfg *mconfig = w->priv;
432 const struct snd_kcontrol_new *k;
433 struct soc_bytes_ext *sb;
434 struct skl_algo_data *bc;
435 struct skl_specific_cfg *sp_cfg;
436
437 if (mconfig->formats_config.caps_size > 0 &&
4ced1827 438 mconfig->formats_config.set_params == SKL_PARAM_SET) {
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439 sp_cfg = &mconfig->formats_config;
440 ret = skl_set_module_params(ctx, sp_cfg->caps,
441 sp_cfg->caps_size,
442 sp_cfg->param_id, mconfig);
443 if (ret < 0)
444 return ret;
445 }
446
447 for (i = 0; i < w->num_kcontrols; i++) {
448 k = &w->kcontrol_news[i];
449 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
450 sb = (void *) k->private_value;
451 bc = (struct skl_algo_data *)sb->dobj.private;
452
4ced1827 453 if (bc->set_params == SKL_PARAM_SET) {
abb74003 454 ret = skl_set_module_params(ctx,
0d682104 455 (u32 *)bc->params, bc->size,
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456 bc->param_id, mconfig);
457 if (ret < 0)
458 return ret;
459 }
460 }
461 }
462
463 return 0;
464}
465
466/*
467 * some module param can set from user control and this is required as
468 * when module is initailzed. if module param is required in init it is
469 * identifed by set_param flag. if set_param flag is not set, then this
470 * parameter needs to set as part of module init.
471 */
472static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w)
473{
474 const struct snd_kcontrol_new *k;
475 struct soc_bytes_ext *sb;
476 struct skl_algo_data *bc;
477 struct skl_module_cfg *mconfig = w->priv;
478 int i;
479
480 for (i = 0; i < w->num_kcontrols; i++) {
481 k = &w->kcontrol_news[i];
482 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
483 sb = (struct soc_bytes_ext *)k->private_value;
484 bc = (struct skl_algo_data *)sb->dobj.private;
485
4ced1827 486 if (bc->set_params != SKL_PARAM_INIT)
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487 continue;
488
489 mconfig->formats_config.caps = (u32 *)&bc->params;
0d682104 490 mconfig->formats_config.caps_size = bc->size;
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491
492 break;
493 }
494 }
495
496 return 0;
497}
498
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499/*
500 * Inside a pipe instance, we can have various modules. These modules need
501 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
502 * skl_init_module() routine, so invoke that for all modules in a pipeline
503 */
504static int
505skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
506{
507 struct skl_pipe_module *w_module;
508 struct snd_soc_dapm_widget *w;
509 struct skl_module_cfg *mconfig;
510 struct skl_sst *ctx = skl->skl_sst;
511 int ret = 0;
512
513 list_for_each_entry(w_module, &pipe->w_list, node) {
514 w = w_module->w;
515 mconfig = w->priv;
516
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517 /* check if module ids are populated */
518 if (mconfig->id.module_id < 0) {
a657ae7e
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519 dev_err(skl->skl_sst->dev,
520 "module %pUL id not populated\n",
521 (uuid_le *)mconfig->guid);
522 return -EIO;
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VK
523 }
524
e4e2d2f4 525 /* check resource available */
9ba8ffef 526 if (!skl_is_pipe_mcps_avail(skl, mconfig))
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527 return -ENOMEM;
528
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529 if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {
530 ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
531 mconfig->id.module_id, mconfig->guid);
532 if (ret < 0)
533 return ret;
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534
535 mconfig->m_state = SKL_MODULE_LOADED;
6c5768b3
D
536 }
537
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538 /* update blob if blob is null for be with default value */
539 skl_tplg_update_be_blob(w, ctx);
540
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541 /*
542 * apply fix/conversion to module params based on
543 * FE/BE params
544 */
545 skl_tplg_update_module_params(w, ctx);
ef2a352c
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546 mconfig->id.pvt_id = skl_get_pvt_id(ctx, mconfig);
547 if (mconfig->id.pvt_id < 0)
548 return ret;
abb74003 549 skl_tplg_set_module_init_data(w);
9939a9c3 550 ret = skl_init_module(ctx, mconfig);
ef2a352c
D
551 if (ret < 0) {
552 skl_put_pvt_id(ctx, mconfig);
e4e2d2f4 553 return ret;
ef2a352c 554 }
260eb73a 555 skl_tplg_alloc_pipe_mcps(skl, mconfig);
abb74003 556 ret = skl_tplg_set_module_params(w, ctx);
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557 if (ret < 0)
558 return ret;
559 }
560
561 return 0;
562}
d93f8e55 563
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564static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx,
565 struct skl_pipe *pipe)
566{
b0fab9c6 567 int ret;
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D
568 struct skl_pipe_module *w_module = NULL;
569 struct skl_module_cfg *mconfig = NULL;
570
571 list_for_each_entry(w_module, &pipe->w_list, node) {
572 mconfig = w_module->w->priv;
573
d643678b 574 if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod &&
b0fab9c6
D
575 mconfig->m_state > SKL_MODULE_UNINIT) {
576 ret = ctx->dsp->fw_ops.unload_mod(ctx->dsp,
6c5768b3 577 mconfig->id.module_id);
b0fab9c6
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578 if (ret < 0)
579 return -EIO;
580 }
ef2a352c 581 skl_put_pvt_id(ctx, mconfig);
6c5768b3
D
582 }
583
584 /* no modules to unload in this path, so return */
585 return 0;
586}
587
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588/*
589 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
590 * need create the pipeline. So we do following:
591 * - check the resources
592 * - Create the pipeline
593 * - Initialize the modules in pipeline
594 * - finally bind all modules together
595 */
596static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
597 struct skl *skl)
598{
599 int ret;
600 struct skl_module_cfg *mconfig = w->priv;
601 struct skl_pipe_module *w_module;
602 struct skl_pipe *s_pipe = mconfig->pipe;
603 struct skl_module_cfg *src_module = NULL, *dst_module;
604 struct skl_sst *ctx = skl->skl_sst;
605
606 /* check resource available */
9ba8ffef 607 if (!skl_is_pipe_mcps_avail(skl, mconfig))
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608 return -EBUSY;
609
9ba8ffef 610 if (!skl_is_pipe_mem_avail(skl, mconfig))
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611 return -ENOMEM;
612
613 /*
614 * Create a list of modules for pipe.
615 * This list contains modules from source to sink
616 */
617 ret = skl_create_pipeline(ctx, mconfig->pipe);
618 if (ret < 0)
619 return ret;
620
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621 skl_tplg_alloc_pipe_mem(skl, mconfig);
622 skl_tplg_alloc_pipe_mcps(skl, mconfig);
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623
624 /* Init all pipe modules from source to sink */
625 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
626 if (ret < 0)
627 return ret;
628
629 /* Bind modules from source to sink */
630 list_for_each_entry(w_module, &s_pipe->w_list, node) {
631 dst_module = w_module->w->priv;
632
633 if (src_module == NULL) {
634 src_module = dst_module;
635 continue;
636 }
637
638 ret = skl_bind_modules(ctx, src_module, dst_module);
639 if (ret < 0)
640 return ret;
641
642 src_module = dst_module;
643 }
644
645 return 0;
646}
647
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648static int skl_fill_sink_instance_id(struct skl_sst *ctx,
649 struct skl_algo_data *alg_data)
650{
651 struct skl_kpb_params *params = (struct skl_kpb_params *)alg_data->params;
652 struct skl_mod_inst_map *inst;
653 int i, pvt_id;
654
655 inst = params->map;
656
657 for (i = 0; i < params->num_modules; i++) {
658 pvt_id = skl_get_pvt_instance_id_map(ctx,
659 inst->mod_id, inst->inst_id);
660 if (pvt_id < 0)
661 return -EINVAL;
662 inst->inst_id = pvt_id;
663 inst++;
664 }
665 return 0;
666}
667
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668/*
669 * Some modules require params to be set after the module is bound to
670 * all pins connected.
671 *
672 * The module provider initializes set_param flag for such modules and we
673 * send params after binding
674 */
675static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w,
676 struct skl_module_cfg *mcfg, struct skl_sst *ctx)
677{
678 int i, ret;
679 struct skl_module_cfg *mconfig = w->priv;
680 const struct snd_kcontrol_new *k;
681 struct soc_bytes_ext *sb;
682 struct skl_algo_data *bc;
683 struct skl_specific_cfg *sp_cfg;
684
685 /*
686 * check all out/in pins are in bind state.
687 * if so set the module param
688 */
689 for (i = 0; i < mcfg->max_out_queue; i++) {
690 if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE)
691 return 0;
692 }
693
694 for (i = 0; i < mcfg->max_in_queue; i++) {
695 if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE)
696 return 0;
697 }
698
699 if (mconfig->formats_config.caps_size > 0 &&
700 mconfig->formats_config.set_params == SKL_PARAM_BIND) {
701 sp_cfg = &mconfig->formats_config;
702 ret = skl_set_module_params(ctx, sp_cfg->caps,
703 sp_cfg->caps_size,
704 sp_cfg->param_id, mconfig);
705 if (ret < 0)
706 return ret;
707 }
708
709 for (i = 0; i < w->num_kcontrols; i++) {
710 k = &w->kcontrol_news[i];
711 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
712 sb = (void *) k->private_value;
713 bc = (struct skl_algo_data *)sb->dobj.private;
714
715 if (bc->set_params == SKL_PARAM_BIND) {
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716 if (mconfig->m_type == SKL_MODULE_TYPE_KPB)
717 skl_fill_sink_instance_id(ctx, bc);
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718 ret = skl_set_module_params(ctx,
719 (u32 *)bc->params, bc->max,
720 bc->param_id, mconfig);
721 if (ret < 0)
722 return ret;
723 }
724 }
725 }
726
727 return 0;
728}
729
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730static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
731 struct skl *skl,
6bd4cf85 732 struct snd_soc_dapm_widget *src_w,
8724ff17 733 struct skl_module_cfg *src_mconfig)
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734{
735 struct snd_soc_dapm_path *p;
0ed95d76 736 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
8724ff17 737 struct skl_module_cfg *sink_mconfig;
d93f8e55 738 struct skl_sst *ctx = skl->skl_sst;
8724ff17 739 int ret;
d93f8e55 740
8724ff17 741 snd_soc_dapm_widget_for_each_sink_path(w, p) {
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742 if (!p->connect)
743 continue;
744
745 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
746 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
747
0ed95d76 748 next_sink = p->sink;
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749
750 if (!is_skl_dsp_widget_type(p->sink))
751 return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig);
752
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753 /*
754 * here we will check widgets in sink pipelines, so that
755 * can be any widgets type and we are only interested if
756 * they are ones used for SKL so check that first
757 */
758 if ((p->sink->priv != NULL) &&
759 is_skl_dsp_widget_type(p->sink)) {
760
761 sink = p->sink;
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762 sink_mconfig = sink->priv;
763
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764 if (src_mconfig->m_state == SKL_MODULE_UNINIT ||
765 sink_mconfig->m_state == SKL_MODULE_UNINIT)
766 continue;
767
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768 /* Bind source to sink, mixin is always source */
769 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
770 if (ret)
771 return ret;
772
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773 /* set module params after bind */
774 skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx);
775 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
776
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777 /* Start sinks pipe first */
778 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
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779 if (sink_mconfig->pipe->conn_type !=
780 SKL_PIPE_CONN_TYPE_FE)
781 ret = skl_run_pipe(ctx,
782 sink_mconfig->pipe);
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783 if (ret)
784 return ret;
785 }
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786 }
787 }
788
8724ff17 789 if (!sink)
6bd4cf85 790 return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig);
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791
792 return 0;
793}
794
795/*
796 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
797 * we need to do following:
798 * - Bind to sink pipeline
799 * Since the sink pipes can be running and we don't get mixer event on
800 * connect for already running mixer, we need to find the sink pipes
801 * here and bind to them. This way dynamic connect works.
802 * - Start sink pipeline, if not running
803 * - Then run current pipe
804 */
805static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
806 struct skl *skl)
807{
808 struct skl_module_cfg *src_mconfig;
809 struct skl_sst *ctx = skl->skl_sst;
810 int ret = 0;
811
812 src_mconfig = w->priv;
813
814 /*
815 * find which sink it is connected to, bind with the sink,
816 * if sink is not started, start sink pipe first, then start
817 * this pipe
818 */
6bd4cf85 819 ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig);
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820 if (ret)
821 return ret;
822
d93f8e55 823 /* Start source pipe last after starting all sinks */
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824 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
825 return skl_run_pipe(ctx, src_mconfig->pipe);
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826
827 return 0;
828}
829
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830static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
831 struct snd_soc_dapm_widget *w, struct skl *skl)
832{
833 struct snd_soc_dapm_path *p;
834 struct snd_soc_dapm_widget *src_w = NULL;
835 struct skl_sst *ctx = skl->skl_sst;
836
837 snd_soc_dapm_widget_for_each_source_path(w, p) {
838 src_w = p->source;
839 if (!p->connect)
840 continue;
841
842 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
843 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
844
845 /*
846 * here we will check widgets in sink pipelines, so that can
847 * be any widgets type and we are only interested if they are
848 * ones used for SKL so check that first
849 */
850 if ((p->source->priv != NULL) &&
851 is_skl_dsp_widget_type(p->source)) {
852 return p->source;
853 }
854 }
855
856 if (src_w != NULL)
857 return skl_get_src_dsp_widget(src_w, skl);
858
859 return NULL;
860}
861
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862/*
863 * in the Post-PMU event of mixer we need to do following:
864 * - Check if this pipe is running
865 * - if not, then
866 * - bind this pipeline to its source pipeline
867 * if source pipe is already running, this means it is a dynamic
868 * connection and we need to bind only to that pipe
869 * - start this pipeline
870 */
871static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
872 struct skl *skl)
873{
874 int ret = 0;
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875 struct snd_soc_dapm_widget *source, *sink;
876 struct skl_module_cfg *src_mconfig, *sink_mconfig;
877 struct skl_sst *ctx = skl->skl_sst;
878 int src_pipe_started = 0;
879
880 sink = w;
881 sink_mconfig = sink->priv;
882
883 /*
884 * If source pipe is already started, that means source is driving
885 * one more sink before this sink got connected, Since source is
886 * started, bind this sink to source and start this pipe.
887 */
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888 source = skl_get_src_dsp_widget(w, skl);
889 if (source != NULL) {
890 src_mconfig = source->priv;
891 sink_mconfig = sink->priv;
892 src_pipe_started = 1;
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893
894 /*
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895 * check pipe state, then no need to bind or start the
896 * pipe
d93f8e55 897 */
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898 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
899 src_pipe_started = 0;
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900 }
901
902 if (src_pipe_started) {
903 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
904 if (ret)
905 return ret;
906
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907 /* set module params after bind */
908 skl_tplg_set_module_bind_params(source, src_mconfig, ctx);
909 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
910
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911 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
912 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
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913 }
914
915 return ret;
916}
917
918/*
919 * in the Pre-PMD event of mixer we need to do following:
920 * - Stop the pipe
921 * - find the source connections and remove that from dapm_path_list
922 * - unbind with source pipelines if still connected
923 */
924static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
925 struct skl *skl)
926{
d93f8e55 927 struct skl_module_cfg *src_mconfig, *sink_mconfig;
ce1b5551 928 int ret = 0, i;
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929 struct skl_sst *ctx = skl->skl_sst;
930
ce1b5551 931 sink_mconfig = w->priv;
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932
933 /* Stop the pipe */
934 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
935 if (ret)
936 return ret;
937
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938 for (i = 0; i < sink_mconfig->max_in_queue; i++) {
939 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
940 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
941 if (!src_mconfig)
942 continue;
943 /*
944 * If path_found == 1, that means pmd for source
945 * pipe has not occurred, source is connected to
946 * some other sink. so its responsibility of sink
947 * to unbind itself from source.
948 */
949 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
950 if (ret < 0)
951 return ret;
d93f8e55 952
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953 ret = skl_unbind_modules(ctx,
954 src_mconfig, sink_mconfig);
d93f8e55 955 }
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956 }
957
958 return ret;
959}
960
961/*
962 * in the Post-PMD event of mixer we need to do following:
963 * - Free the mcps used
964 * - Free the mem used
965 * - Unbind the modules within the pipeline
966 * - Delete the pipeline (modules are not required to be explicitly
967 * deleted, pipeline delete is enough here
968 */
969static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
970 struct skl *skl)
971{
972 struct skl_module_cfg *mconfig = w->priv;
973 struct skl_pipe_module *w_module;
974 struct skl_module_cfg *src_module = NULL, *dst_module;
975 struct skl_sst *ctx = skl->skl_sst;
976 struct skl_pipe *s_pipe = mconfig->pipe;
d93f8e55 977
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978 if (s_pipe->state == SKL_PIPE_INVALID)
979 return -EINVAL;
980
d93f8e55 981 skl_tplg_free_pipe_mcps(skl, mconfig);
65976878 982 skl_tplg_free_pipe_mem(skl, mconfig);
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983
984 list_for_each_entry(w_module, &s_pipe->w_list, node) {
985 dst_module = w_module->w->priv;
986
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987 if (mconfig->m_state >= SKL_MODULE_INIT_DONE)
988 skl_tplg_free_pipe_mcps(skl, dst_module);
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989 if (src_module == NULL) {
990 src_module = dst_module;
991 continue;
992 }
993
7ca42f5a 994 skl_unbind_modules(ctx, src_module, dst_module);
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995 src_module = dst_module;
996 }
997
547cafa3 998 skl_delete_pipe(ctx, mconfig->pipe);
d93f8e55 999
6c5768b3 1000 return skl_tplg_unload_pipe_modules(ctx, s_pipe);
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1001}
1002
1003/*
1004 * in the Post-PMD event of PGA we need to do following:
1005 * - Free the mcps used
1006 * - Stop the pipeline
1007 * - In source pipe is connected, unbind with source pipelines
1008 */
1009static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
1010 struct skl *skl)
1011{
d93f8e55 1012 struct skl_module_cfg *src_mconfig, *sink_mconfig;
ce1b5551 1013 int ret = 0, i;
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1014 struct skl_sst *ctx = skl->skl_sst;
1015
ce1b5551 1016 src_mconfig = w->priv;
d93f8e55 1017
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1018 /* Stop the pipe since this is a mixin module */
1019 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
1020 if (ret)
1021 return ret;
1022
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1023 for (i = 0; i < src_mconfig->max_out_queue; i++) {
1024 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
1025 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
1026 if (!sink_mconfig)
1027 continue;
1028 /*
1029 * This is a connecter and if path is found that means
1030 * unbind between source and sink has not happened yet
1031 */
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1032 ret = skl_unbind_modules(ctx, src_mconfig,
1033 sink_mconfig);
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1034 }
1035 }
1036
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1037 return ret;
1038}
1039
1040/*
1041 * In modelling, we assume there will be ONLY one mixer in a pipeline. If
1042 * mixer is not required then it is treated as static mixer aka vmixer with
1043 * a hard path to source module
1044 * So we don't need to check if source is started or not as hard path puts
1045 * dependency on each other
1046 */
1047static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
1048 struct snd_kcontrol *k, int event)
1049{
1050 struct snd_soc_dapm_context *dapm = w->dapm;
1051 struct skl *skl = get_skl_ctx(dapm->dev);
1052
1053 switch (event) {
1054 case SND_SOC_DAPM_PRE_PMU:
1055 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1056
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1057 case SND_SOC_DAPM_POST_PMU:
1058 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1059
1060 case SND_SOC_DAPM_PRE_PMD:
1061 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1062
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1063 case SND_SOC_DAPM_POST_PMD:
1064 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1065 }
1066
1067 return 0;
1068}
1069
1070/*
1071 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
1072 * second one is required that is created as another pipe entity.
1073 * The mixer is responsible for pipe management and represent a pipeline
1074 * instance
1075 */
1076static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
1077 struct snd_kcontrol *k, int event)
1078{
1079 struct snd_soc_dapm_context *dapm = w->dapm;
1080 struct skl *skl = get_skl_ctx(dapm->dev);
1081
1082 switch (event) {
1083 case SND_SOC_DAPM_PRE_PMU:
1084 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1085
1086 case SND_SOC_DAPM_POST_PMU:
1087 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1088
1089 case SND_SOC_DAPM_PRE_PMD:
1090 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1091
1092 case SND_SOC_DAPM_POST_PMD:
1093 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1094 }
1095
1096 return 0;
1097}
1098
1099/*
1100 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
1101 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
1102 * the sink when it is running (two FE to one BE or one FE to two BE)
1103 * scenarios
1104 */
1105static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
1106 struct snd_kcontrol *k, int event)
1107
1108{
1109 struct snd_soc_dapm_context *dapm = w->dapm;
1110 struct skl *skl = get_skl_ctx(dapm->dev);
1111
1112 switch (event) {
1113 case SND_SOC_DAPM_PRE_PMU:
1114 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
1115
1116 case SND_SOC_DAPM_POST_PMD:
1117 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
1118 }
1119
1120 return 0;
1121}
cfb0a873 1122
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1123static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
1124 unsigned int __user *data, unsigned int size)
1125{
1126 struct soc_bytes_ext *sb =
1127 (struct soc_bytes_ext *)kcontrol->private_value;
1128 struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private;
7d9f2911
OA
1129 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1130 struct skl_module_cfg *mconfig = w->priv;
1131 struct skl *skl = get_skl_ctx(w->dapm->dev);
1132
1133 if (w->power)
1134 skl_get_module_params(skl->skl_sst, (u32 *)bc->params,
0d682104 1135 bc->size, bc->param_id, mconfig);
140adfba 1136
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1137 /* decrement size for TLV header */
1138 size -= 2 * sizeof(u32);
1139
1140 /* check size as we don't want to send kernel data */
1141 if (size > bc->max)
1142 size = bc->max;
1143
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1144 if (bc->params) {
1145 if (copy_to_user(data, &bc->param_id, sizeof(u32)))
1146 return -EFAULT;
e8bc3c99 1147 if (copy_to_user(data + 1, &size, sizeof(u32)))
140adfba 1148 return -EFAULT;
e8bc3c99 1149 if (copy_to_user(data + 2, bc->params, size))
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1150 return -EFAULT;
1151 }
1152
1153 return 0;
1154}
1155
1156#define SKL_PARAM_VENDOR_ID 0xff
1157
1158static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
1159 const unsigned int __user *data, unsigned int size)
1160{
1161 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1162 struct skl_module_cfg *mconfig = w->priv;
1163 struct soc_bytes_ext *sb =
1164 (struct soc_bytes_ext *)kcontrol->private_value;
1165 struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private;
1166 struct skl *skl = get_skl_ctx(w->dapm->dev);
1167
1168 if (ac->params) {
0d682104
D
1169 if (size > ac->max)
1170 return -EINVAL;
1171
1172 ac->size = size;
140adfba
JK
1173 /*
1174 * if the param_is is of type Vendor, firmware expects actual
1175 * parameter id and size from the control.
1176 */
1177 if (ac->param_id == SKL_PARAM_VENDOR_ID) {
1178 if (copy_from_user(ac->params, data, size))
1179 return -EFAULT;
1180 } else {
1181 if (copy_from_user(ac->params,
65b4bcb8 1182 data + 2, size))
140adfba
JK
1183 return -EFAULT;
1184 }
1185
1186 if (w->power)
1187 return skl_set_module_params(skl->skl_sst,
0d682104 1188 (u32 *)ac->params, ac->size,
140adfba
JK
1189 ac->param_id, mconfig);
1190 }
1191
1192 return 0;
1193}
1194
8871dcb9
JK
1195/*
1196 * Fill the dma id for host and link. In case of passthrough
1197 * pipeline, this will both host and link in the same
1198 * pipeline, so need to copy the link and host based on dev_type
1199 */
1200static void skl_tplg_fill_dma_id(struct skl_module_cfg *mcfg,
1201 struct skl_pipe_params *params)
1202{
1203 struct skl_pipe *pipe = mcfg->pipe;
1204
1205 if (pipe->passthru) {
1206 switch (mcfg->dev_type) {
1207 case SKL_DEVICE_HDALINK:
1208 pipe->p_params->link_dma_id = params->link_dma_id;
1209 break;
1210
1211 case SKL_DEVICE_HDAHOST:
1212 pipe->p_params->host_dma_id = params->host_dma_id;
1213 break;
1214
1215 default:
1216 break;
1217 }
1218 pipe->p_params->s_fmt = params->s_fmt;
1219 pipe->p_params->ch = params->ch;
1220 pipe->p_params->s_freq = params->s_freq;
1221 pipe->p_params->stream = params->stream;
1222
1223 } else {
1224 memcpy(pipe->p_params, params, sizeof(*params));
1225 }
1226}
1227
cfb0a873
VK
1228/*
1229 * The FE params are passed by hw_params of the DAI.
1230 * On hw_params, the params are stored in Gateway module of the FE and we
1231 * need to calculate the format in DSP module configuration, that
1232 * conversion is done here
1233 */
1234int skl_tplg_update_pipe_params(struct device *dev,
1235 struct skl_module_cfg *mconfig,
1236 struct skl_pipe_params *params)
1237{
cfb0a873
VK
1238 struct skl_module_fmt *format = NULL;
1239
8871dcb9 1240 skl_tplg_fill_dma_id(mconfig, params);
cfb0a873
VK
1241
1242 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
4cd9899f 1243 format = &mconfig->in_fmt[0];
cfb0a873 1244 else
4cd9899f 1245 format = &mconfig->out_fmt[0];
cfb0a873
VK
1246
1247 /* set the hw_params */
1248 format->s_freq = params->s_freq;
1249 format->channels = params->ch;
1250 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
1251
1252 /*
1253 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
1254 * container so update bit depth accordingly
1255 */
1256 switch (format->valid_bit_depth) {
1257 case SKL_DEPTH_16BIT:
1258 format->bit_depth = format->valid_bit_depth;
1259 break;
1260
1261 case SKL_DEPTH_24BIT:
6654f39e 1262 case SKL_DEPTH_32BIT:
cfb0a873
VK
1263 format->bit_depth = SKL_DEPTH_32BIT;
1264 break;
1265
1266 default:
1267 dev_err(dev, "Invalid bit depth %x for pipe\n",
1268 format->valid_bit_depth);
1269 return -EINVAL;
1270 }
1271
1272 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1273 mconfig->ibs = (format->s_freq / 1000) *
1274 (format->channels) *
1275 (format->bit_depth >> 3);
1276 } else {
1277 mconfig->obs = (format->s_freq / 1000) *
1278 (format->channels) *
1279 (format->bit_depth >> 3);
1280 }
1281
1282 return 0;
1283}
1284
1285/*
1286 * Query the module config for the FE DAI
1287 * This is used to find the hw_params set for that DAI and apply to FE
1288 * pipeline
1289 */
1290struct skl_module_cfg *
1291skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
1292{
1293 struct snd_soc_dapm_widget *w;
1294 struct snd_soc_dapm_path *p = NULL;
1295
1296 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1297 w = dai->playback_widget;
f0900eb2 1298 snd_soc_dapm_widget_for_each_sink_path(w, p) {
cfb0a873 1299 if (p->connect && p->sink->power &&
a28f51db 1300 !is_skl_dsp_widget_type(p->sink))
cfb0a873
VK
1301 continue;
1302
1303 if (p->sink->priv) {
1304 dev_dbg(dai->dev, "set params for %s\n",
1305 p->sink->name);
1306 return p->sink->priv;
1307 }
1308 }
1309 } else {
1310 w = dai->capture_widget;
f0900eb2 1311 snd_soc_dapm_widget_for_each_source_path(w, p) {
cfb0a873 1312 if (p->connect && p->source->power &&
a28f51db 1313 !is_skl_dsp_widget_type(p->source))
cfb0a873
VK
1314 continue;
1315
1316 if (p->source->priv) {
1317 dev_dbg(dai->dev, "set params for %s\n",
1318 p->source->name);
1319 return p->source->priv;
1320 }
1321 }
1322 }
1323
1324 return NULL;
1325}
1326
718a42b5
D
1327static struct skl_module_cfg *skl_get_mconfig_pb_cpr(
1328 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1329{
1330 struct snd_soc_dapm_path *p;
1331 struct skl_module_cfg *mconfig = NULL;
1332
1333 snd_soc_dapm_widget_for_each_source_path(w, p) {
1334 if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) {
1335 if (p->connect &&
1336 (p->sink->id == snd_soc_dapm_aif_out) &&
1337 p->source->priv) {
1338 mconfig = p->source->priv;
1339 return mconfig;
1340 }
1341 mconfig = skl_get_mconfig_pb_cpr(dai, p->source);
1342 if (mconfig)
1343 return mconfig;
1344 }
1345 }
1346 return mconfig;
1347}
1348
1349static struct skl_module_cfg *skl_get_mconfig_cap_cpr(
1350 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1351{
1352 struct snd_soc_dapm_path *p;
1353 struct skl_module_cfg *mconfig = NULL;
1354
1355 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1356 if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) {
1357 if (p->connect &&
1358 (p->source->id == snd_soc_dapm_aif_in) &&
1359 p->sink->priv) {
1360 mconfig = p->sink->priv;
1361 return mconfig;
1362 }
1363 mconfig = skl_get_mconfig_cap_cpr(dai, p->sink);
1364 if (mconfig)
1365 return mconfig;
1366 }
1367 }
1368 return mconfig;
1369}
1370
1371struct skl_module_cfg *
1372skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream)
1373{
1374 struct snd_soc_dapm_widget *w;
1375 struct skl_module_cfg *mconfig;
1376
1377 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1378 w = dai->playback_widget;
1379 mconfig = skl_get_mconfig_pb_cpr(dai, w);
1380 } else {
1381 w = dai->capture_widget;
1382 mconfig = skl_get_mconfig_cap_cpr(dai, w);
1383 }
1384 return mconfig;
1385}
1386
cfb0a873
VK
1387static u8 skl_tplg_be_link_type(int dev_type)
1388{
1389 int ret;
1390
1391 switch (dev_type) {
1392 case SKL_DEVICE_BT:
1393 ret = NHLT_LINK_SSP;
1394 break;
1395
1396 case SKL_DEVICE_DMIC:
1397 ret = NHLT_LINK_DMIC;
1398 break;
1399
1400 case SKL_DEVICE_I2S:
1401 ret = NHLT_LINK_SSP;
1402 break;
1403
1404 case SKL_DEVICE_HDALINK:
1405 ret = NHLT_LINK_HDA;
1406 break;
1407
1408 default:
1409 ret = NHLT_LINK_INVALID;
1410 break;
1411 }
1412
1413 return ret;
1414}
1415
1416/*
1417 * Fill the BE gateway parameters
1418 * The BE gateway expects a blob of parameters which are kept in the ACPI
1419 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
1420 * The port can have multiple settings so pick based on the PCM
1421 * parameters
1422 */
1423static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
1424 struct skl_module_cfg *mconfig,
1425 struct skl_pipe_params *params)
1426{
cfb0a873
VK
1427 struct nhlt_specific_cfg *cfg;
1428 struct skl *skl = get_skl_ctx(dai->dev);
1429 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
1430
8871dcb9 1431 skl_tplg_fill_dma_id(mconfig, params);
cfb0a873 1432
b30c275e
JK
1433 if (link_type == NHLT_LINK_HDA)
1434 return 0;
1435
cfb0a873
VK
1436 /* update the blob based on virtual bus_id*/
1437 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
1438 params->s_fmt, params->ch,
1439 params->s_freq, params->stream);
1440 if (cfg) {
1441 mconfig->formats_config.caps_size = cfg->size;
bc03281a 1442 mconfig->formats_config.caps = (u32 *) &cfg->caps;
cfb0a873
VK
1443 } else {
1444 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
1445 mconfig->vbus_id, link_type,
1446 params->stream);
1447 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
1448 params->ch, params->s_freq, params->s_fmt);
1449 return -EINVAL;
1450 }
1451
1452 return 0;
1453}
1454
1455static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
1456 struct snd_soc_dapm_widget *w,
1457 struct skl_pipe_params *params)
1458{
1459 struct snd_soc_dapm_path *p;
4d8adccb 1460 int ret = -EIO;
cfb0a873 1461
f0900eb2 1462 snd_soc_dapm_widget_for_each_source_path(w, p) {
cfb0a873
VK
1463 if (p->connect && is_skl_dsp_widget_type(p->source) &&
1464 p->source->priv) {
1465
9a03cb49
JK
1466 ret = skl_tplg_be_fill_pipe_params(dai,
1467 p->source->priv, params);
1468 if (ret < 0)
1469 return ret;
cfb0a873 1470 } else {
9a03cb49
JK
1471 ret = skl_tplg_be_set_src_pipe_params(dai,
1472 p->source, params);
4d8adccb
SP
1473 if (ret < 0)
1474 return ret;
cfb0a873
VK
1475 }
1476 }
1477
4d8adccb 1478 return ret;
cfb0a873
VK
1479}
1480
1481static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
1482 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
1483{
1484 struct snd_soc_dapm_path *p = NULL;
4d8adccb 1485 int ret = -EIO;
cfb0a873 1486
f0900eb2 1487 snd_soc_dapm_widget_for_each_sink_path(w, p) {
cfb0a873
VK
1488 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
1489 p->sink->priv) {
1490
9a03cb49
JK
1491 ret = skl_tplg_be_fill_pipe_params(dai,
1492 p->sink->priv, params);
1493 if (ret < 0)
1494 return ret;
cfb0a873 1495 } else {
4d8adccb 1496 ret = skl_tplg_be_set_sink_pipe_params(
cfb0a873 1497 dai, p->sink, params);
4d8adccb
SP
1498 if (ret < 0)
1499 return ret;
cfb0a873
VK
1500 }
1501 }
1502
4d8adccb 1503 return ret;
cfb0a873
VK
1504}
1505
1506/*
1507 * BE hw_params can be a source parameters (capture) or sink parameters
1508 * (playback). Based on sink and source we need to either find the source
1509 * list or the sink list and set the pipeline parameters
1510 */
1511int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1512 struct skl_pipe_params *params)
1513{
1514 struct snd_soc_dapm_widget *w;
1515
1516 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1517 w = dai->playback_widget;
1518
1519 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1520
1521 } else {
1522 w = dai->capture_widget;
1523
1524 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1525 }
1526
1527 return 0;
1528}
3af36706
VK
1529
1530static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1531 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1532 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
1533 {SKL_PGA_EVENT, skl_tplg_pga_event},
1534};
1535
140adfba
JK
1536static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = {
1537 {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get,
1538 skl_tplg_tlv_control_set},
1539};
1540
6277e832
SN
1541static int skl_tplg_fill_pipe_tkn(struct device *dev,
1542 struct skl_pipe *pipe, u32 tkn,
1543 u32 tkn_val)
3af36706 1544{
3af36706 1545
6277e832
SN
1546 switch (tkn) {
1547 case SKL_TKN_U32_PIPE_CONN_TYPE:
1548 pipe->conn_type = tkn_val;
1549 break;
1550
1551 case SKL_TKN_U32_PIPE_PRIORITY:
1552 pipe->pipe_priority = tkn_val;
1553 break;
1554
1555 case SKL_TKN_U32_PIPE_MEM_PGS:
1556 pipe->memory_pages = tkn_val;
1557 break;
1558
8a0cb236
VK
1559 case SKL_TKN_U32_PMODE:
1560 pipe->lp_mode = tkn_val;
1561 break;
1562
6277e832
SN
1563 default:
1564 dev_err(dev, "Token not handled %d\n", tkn);
1565 return -EINVAL;
3af36706 1566 }
6277e832
SN
1567
1568 return 0;
3af36706
VK
1569}
1570
1571/*
6277e832
SN
1572 * Add pipeline by parsing the relevant tokens
1573 * Return an existing pipe if the pipe already exists.
3af36706 1574 */
6277e832
SN
1575static int skl_tplg_add_pipe(struct device *dev,
1576 struct skl_module_cfg *mconfig, struct skl *skl,
1577 struct snd_soc_tplg_vendor_value_elem *tkn_elem)
3af36706
VK
1578{
1579 struct skl_pipeline *ppl;
1580 struct skl_pipe *pipe;
1581 struct skl_pipe_params *params;
1582
1583 list_for_each_entry(ppl, &skl->ppl_list, node) {
6277e832
SN
1584 if (ppl->pipe->ppl_id == tkn_elem->value) {
1585 mconfig->pipe = ppl->pipe;
1586 return EEXIST;
1587 }
3af36706
VK
1588 }
1589
1590 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
1591 if (!ppl)
6277e832 1592 return -ENOMEM;
3af36706
VK
1593
1594 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
1595 if (!pipe)
6277e832 1596 return -ENOMEM;
3af36706
VK
1597
1598 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
1599 if (!params)
6277e832 1600 return -ENOMEM;
3af36706 1601
3af36706 1602 pipe->p_params = params;
6277e832 1603 pipe->ppl_id = tkn_elem->value;
3af36706
VK
1604 INIT_LIST_HEAD(&pipe->w_list);
1605
1606 ppl->pipe = pipe;
1607 list_add(&ppl->node, &skl->ppl_list);
1608
6277e832
SN
1609 mconfig->pipe = pipe;
1610 mconfig->pipe->state = SKL_PIPE_INVALID;
1611
1612 return 0;
1613}
1614
1615static int skl_tplg_fill_pin(struct device *dev, u32 tkn,
1616 struct skl_module_pin *m_pin,
1617 int pin_index, u32 value)
1618{
1619 switch (tkn) {
1620 case SKL_TKN_U32_PIN_MOD_ID:
1621 m_pin[pin_index].id.module_id = value;
1622 break;
1623
1624 case SKL_TKN_U32_PIN_INST_ID:
1625 m_pin[pin_index].id.instance_id = value;
1626 break;
1627
1628 default:
1629 dev_err(dev, "%d Not a pin token\n", value);
1630 return -EINVAL;
1631 }
1632
1633 return 0;
1634}
1635
1636/*
1637 * Parse for pin config specific tokens to fill up the
1638 * module private data
1639 */
1640static int skl_tplg_fill_pins_info(struct device *dev,
1641 struct skl_module_cfg *mconfig,
1642 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
1643 int dir, int pin_count)
1644{
1645 int ret;
1646 struct skl_module_pin *m_pin;
1647
1648 switch (dir) {
1649 case SKL_DIR_IN:
1650 m_pin = mconfig->m_in_pin;
1651 break;
1652
1653 case SKL_DIR_OUT:
1654 m_pin = mconfig->m_out_pin;
1655 break;
1656
1657 default:
ecd286a9 1658 dev_err(dev, "Invalid direction value\n");
6277e832
SN
1659 return -EINVAL;
1660 }
1661
1662 ret = skl_tplg_fill_pin(dev, tkn_elem->token,
1663 m_pin, pin_count, tkn_elem->value);
1664
1665 if (ret < 0)
1666 return ret;
1667
1668 m_pin[pin_count].in_use = false;
1669 m_pin[pin_count].pin_state = SKL_PIN_UNBIND;
1670
1671 return 0;
3af36706
VK
1672}
1673
6277e832
SN
1674/*
1675 * Fill up input/output module config format based
1676 * on the direction
1677 */
1678static int skl_tplg_fill_fmt(struct device *dev,
1679 struct skl_module_cfg *mconfig, u32 tkn,
1680 u32 value, u32 dir, u32 pin_count)
1681{
1682 struct skl_module_fmt *dst_fmt;
1683
1684 switch (dir) {
1685 case SKL_DIR_IN:
1686 dst_fmt = mconfig->in_fmt;
1687 dst_fmt += pin_count;
1688 break;
1689
1690 case SKL_DIR_OUT:
1691 dst_fmt = mconfig->out_fmt;
1692 dst_fmt += pin_count;
1693 break;
1694
1695 default:
ecd286a9 1696 dev_err(dev, "Invalid direction value\n");
6277e832
SN
1697 return -EINVAL;
1698 }
1699
1700 switch (tkn) {
1701 case SKL_TKN_U32_FMT_CH:
1702 dst_fmt->channels = value;
1703 break;
1704
1705 case SKL_TKN_U32_FMT_FREQ:
1706 dst_fmt->s_freq = value;
1707 break;
1708
1709 case SKL_TKN_U32_FMT_BIT_DEPTH:
1710 dst_fmt->bit_depth = value;
1711 break;
1712
1713 case SKL_TKN_U32_FMT_SAMPLE_SIZE:
1714 dst_fmt->valid_bit_depth = value;
1715 break;
1716
1717 case SKL_TKN_U32_FMT_CH_CONFIG:
1718 dst_fmt->ch_cfg = value;
1719 break;
1720
1721 case SKL_TKN_U32_FMT_INTERLEAVE:
1722 dst_fmt->interleaving_style = value;
1723 break;
1724
1725 case SKL_TKN_U32_FMT_SAMPLE_TYPE:
1726 dst_fmt->sample_type = value;
1727 break;
1728
1729 case SKL_TKN_U32_FMT_CH_MAP:
1730 dst_fmt->ch_map = value;
1731 break;
1732
1733 default:
ecd286a9 1734 dev_err(dev, "Invalid token %d\n", tkn);
6277e832
SN
1735 return -EINVAL;
1736 }
1737
1738 return 0;
1739}
1740
1741static int skl_tplg_get_uuid(struct device *dev, struct skl_module_cfg *mconfig,
1742 struct snd_soc_tplg_vendor_uuid_elem *uuid_tkn)
1743{
1744 if (uuid_tkn->token == SKL_TKN_UUID)
1745 memcpy(&mconfig->guid, &uuid_tkn->uuid, 16);
1746 else {
ecd286a9 1747 dev_err(dev, "Not an UUID token tkn %d\n", uuid_tkn->token);
6277e832
SN
1748 return -EINVAL;
1749 }
1750
1751 return 0;
1752}
1753
1754static void skl_tplg_fill_pin_dynamic_val(
1755 struct skl_module_pin *mpin, u32 pin_count, u32 value)
4cd9899f
HS
1756{
1757 int i;
1758
6277e832
SN
1759 for (i = 0; i < pin_count; i++)
1760 mpin[i].is_dynamic = value;
1761}
1762
1763/*
1764 * Parse tokens to fill up the module private data
1765 */
1766static int skl_tplg_get_token(struct device *dev,
1767 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
1768 struct skl *skl, struct skl_module_cfg *mconfig)
1769{
1770 int tkn_count = 0;
1771 int ret;
1772 static int is_pipe_exists;
1773 static int pin_index, dir;
1774
1775 if (tkn_elem->token > SKL_TKN_MAX)
1776 return -EINVAL;
1777
1778 switch (tkn_elem->token) {
1779 case SKL_TKN_U8_IN_QUEUE_COUNT:
1780 mconfig->max_in_queue = tkn_elem->value;
1781 mconfig->m_in_pin = devm_kzalloc(dev, mconfig->max_in_queue *
1782 sizeof(*mconfig->m_in_pin),
1783 GFP_KERNEL);
1784 if (!mconfig->m_in_pin)
1785 return -ENOMEM;
1786
1787 break;
1788
1789 case SKL_TKN_U8_OUT_QUEUE_COUNT:
1790 mconfig->max_out_queue = tkn_elem->value;
1791 mconfig->m_out_pin = devm_kzalloc(dev, mconfig->max_out_queue *
1792 sizeof(*mconfig->m_out_pin),
1793 GFP_KERNEL);
1794
1795 if (!mconfig->m_out_pin)
1796 return -ENOMEM;
1797
1798 break;
1799
1800 case SKL_TKN_U8_DYN_IN_PIN:
1801 if (!mconfig->m_in_pin)
1802 return -ENOMEM;
1803
1804 skl_tplg_fill_pin_dynamic_val(mconfig->m_in_pin,
1805 mconfig->max_in_queue, tkn_elem->value);
1806
1807 break;
1808
1809 case SKL_TKN_U8_DYN_OUT_PIN:
1810 if (!mconfig->m_out_pin)
1811 return -ENOMEM;
1812
1813 skl_tplg_fill_pin_dynamic_val(mconfig->m_out_pin,
1814 mconfig->max_out_queue, tkn_elem->value);
1815
1816 break;
1817
1818 case SKL_TKN_U8_TIME_SLOT:
1819 mconfig->time_slot = tkn_elem->value;
1820 break;
1821
1822 case SKL_TKN_U8_CORE_ID:
1823 mconfig->core_id = tkn_elem->value;
1824
1825 case SKL_TKN_U8_MOD_TYPE:
1826 mconfig->m_type = tkn_elem->value;
1827 break;
1828
1829 case SKL_TKN_U8_DEV_TYPE:
1830 mconfig->dev_type = tkn_elem->value;
1831 break;
1832
1833 case SKL_TKN_U8_HW_CONN_TYPE:
1834 mconfig->hw_conn_type = tkn_elem->value;
1835 break;
1836
1837 case SKL_TKN_U16_MOD_INST_ID:
1838 mconfig->id.instance_id =
1839 tkn_elem->value;
1840 break;
1841
1842 case SKL_TKN_U32_MEM_PAGES:
1843 mconfig->mem_pages = tkn_elem->value;
1844 break;
1845
1846 case SKL_TKN_U32_MAX_MCPS:
1847 mconfig->mcps = tkn_elem->value;
1848 break;
1849
1850 case SKL_TKN_U32_OBS:
1851 mconfig->obs = tkn_elem->value;
1852 break;
1853
1854 case SKL_TKN_U32_IBS:
1855 mconfig->ibs = tkn_elem->value;
1856 break;
1857
1858 case SKL_TKN_U32_VBUS_ID:
1859 mconfig->vbus_id = tkn_elem->value;
1860 break;
1861
1862 case SKL_TKN_U32_PARAMS_FIXUP:
1863 mconfig->params_fixup = tkn_elem->value;
1864 break;
1865
1866 case SKL_TKN_U32_CONVERTER:
1867 mconfig->converter = tkn_elem->value;
1868 break;
1869
6bd9dcf3
VK
1870 case SKL_TKL_U32_D0I3_CAPS:
1871 mconfig->d0i3_caps = tkn_elem->value;
1872 break;
1873
6277e832
SN
1874 case SKL_TKN_U32_PIPE_ID:
1875 ret = skl_tplg_add_pipe(dev,
1876 mconfig, skl, tkn_elem);
1877
1878 if (ret < 0)
1879 return is_pipe_exists;
1880
1881 if (ret == EEXIST)
1882 is_pipe_exists = 1;
1883
1884 break;
1885
1886 case SKL_TKN_U32_PIPE_CONN_TYPE:
1887 case SKL_TKN_U32_PIPE_PRIORITY:
1888 case SKL_TKN_U32_PIPE_MEM_PGS:
8a0cb236 1889 case SKL_TKN_U32_PMODE:
6277e832
SN
1890 if (is_pipe_exists) {
1891 ret = skl_tplg_fill_pipe_tkn(dev, mconfig->pipe,
1892 tkn_elem->token, tkn_elem->value);
1893 if (ret < 0)
1894 return ret;
1895 }
1896
1897 break;
1898
1899 /*
1900 * SKL_TKN_U32_DIR_PIN_COUNT token has the value for both
1901 * direction and the pin count. The first four bits represent
1902 * direction and next four the pin count.
1903 */
1904 case SKL_TKN_U32_DIR_PIN_COUNT:
1905 dir = tkn_elem->value & SKL_IN_DIR_BIT_MASK;
1906 pin_index = (tkn_elem->value &
1907 SKL_PIN_COUNT_MASK) >> 4;
1908
1909 break;
1910
1911 case SKL_TKN_U32_FMT_CH:
1912 case SKL_TKN_U32_FMT_FREQ:
1913 case SKL_TKN_U32_FMT_BIT_DEPTH:
1914 case SKL_TKN_U32_FMT_SAMPLE_SIZE:
1915 case SKL_TKN_U32_FMT_CH_CONFIG:
1916 case SKL_TKN_U32_FMT_INTERLEAVE:
1917 case SKL_TKN_U32_FMT_SAMPLE_TYPE:
1918 case SKL_TKN_U32_FMT_CH_MAP:
1919 ret = skl_tplg_fill_fmt(dev, mconfig, tkn_elem->token,
1920 tkn_elem->value, dir, pin_index);
1921
1922 if (ret < 0)
1923 return ret;
1924
1925 break;
1926
1927 case SKL_TKN_U32_PIN_MOD_ID:
1928 case SKL_TKN_U32_PIN_INST_ID:
1929 ret = skl_tplg_fill_pins_info(dev,
1930 mconfig, tkn_elem, dir,
1931 pin_index);
1932 if (ret < 0)
1933 return ret;
1934
1935 break;
1936
1937 case SKL_TKN_U32_CAPS_SIZE:
1938 mconfig->formats_config.caps_size =
1939 tkn_elem->value;
1940
1941 break;
1942
1943 case SKL_TKN_U32_PROC_DOMAIN:
1944 mconfig->domain =
1945 tkn_elem->value;
1946
1947 break;
1948
1949 case SKL_TKN_U8_IN_PIN_TYPE:
1950 case SKL_TKN_U8_OUT_PIN_TYPE:
1951 case SKL_TKN_U8_CONN_TYPE:
1952 break;
1953
1954 default:
1955 dev_err(dev, "Token %d not handled\n",
1956 tkn_elem->token);
1957 return -EINVAL;
4cd9899f 1958 }
6277e832
SN
1959
1960 tkn_count++;
1961
1962 return tkn_count;
1963}
1964
1965/*
1966 * Parse the vendor array for specific tokens to construct
1967 * module private data
1968 */
1969static int skl_tplg_get_tokens(struct device *dev,
1970 char *pvt_data, struct skl *skl,
1971 struct skl_module_cfg *mconfig, int block_size)
1972{
1973 struct snd_soc_tplg_vendor_array *array;
1974 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
1975 int tkn_count = 0, ret;
1976 int off = 0, tuple_size = 0;
1977
1978 if (block_size <= 0)
1979 return -EINVAL;
1980
1981 while (tuple_size < block_size) {
1982 array = (struct snd_soc_tplg_vendor_array *)(pvt_data + off);
1983
1984 off += array->size;
1985
1986 switch (array->type) {
1987 case SND_SOC_TPLG_TUPLE_TYPE_STRING:
ecd286a9 1988 dev_warn(dev, "no string tokens expected for skl tplg\n");
6277e832
SN
1989 continue;
1990
1991 case SND_SOC_TPLG_TUPLE_TYPE_UUID:
1992 ret = skl_tplg_get_uuid(dev, mconfig, array->uuid);
1993 if (ret < 0)
1994 return ret;
1995
1996 tuple_size += sizeof(*array->uuid);
1997
1998 continue;
1999
2000 default:
2001 tkn_elem = array->value;
2002 tkn_count = 0;
2003 break;
2004 }
2005
2006 while (tkn_count <= (array->num_elems - 1)) {
2007 ret = skl_tplg_get_token(dev, tkn_elem,
2008 skl, mconfig);
2009
2010 if (ret < 0)
2011 return ret;
2012
2013 tkn_count = tkn_count + ret;
2014 tkn_elem++;
2015 }
2016
2017 tuple_size += tkn_count * sizeof(*tkn_elem);
2018 }
2019
2020 return 0;
2021}
2022
2023/*
2024 * Every data block is preceded by a descriptor to read the number
2025 * of data blocks, they type of the block and it's size
2026 */
2027static int skl_tplg_get_desc_blocks(struct device *dev,
2028 struct snd_soc_tplg_vendor_array *array)
2029{
2030 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
2031
2032 tkn_elem = array->value;
2033
2034 switch (tkn_elem->token) {
2035 case SKL_TKN_U8_NUM_BLOCKS:
2036 case SKL_TKN_U8_BLOCK_TYPE:
2037 case SKL_TKN_U16_BLOCK_SIZE:
2038 return tkn_elem->value;
2039
2040 default:
ecd286a9 2041 dev_err(dev, "Invalid descriptor token %d\n", tkn_elem->token);
6277e832
SN
2042 break;
2043 }
2044
2045 return -EINVAL;
2046}
2047
2048/*
2049 * Parse the private data for the token and corresponding value.
2050 * The private data can have multiple data blocks. So, a data block
2051 * is preceded by a descriptor for number of blocks and a descriptor
2052 * for the type and size of the suceeding data block.
2053 */
2054static int skl_tplg_get_pvt_data(struct snd_soc_tplg_dapm_widget *tplg_w,
2055 struct skl *skl, struct device *dev,
2056 struct skl_module_cfg *mconfig)
2057{
2058 struct snd_soc_tplg_vendor_array *array;
2059 int num_blocks, block_size = 0, block_type, off = 0;
2060 char *data;
2061 int ret;
2062
2063 /* Read the NUM_DATA_BLOCKS descriptor */
2064 array = (struct snd_soc_tplg_vendor_array *)tplg_w->priv.data;
2065 ret = skl_tplg_get_desc_blocks(dev, array);
2066 if (ret < 0)
2067 return ret;
2068 num_blocks = ret;
2069
2070 off += array->size;
2071 array = (struct snd_soc_tplg_vendor_array *)(tplg_w->priv.data + off);
2072
2073 /* Read the BLOCK_TYPE and BLOCK_SIZE descriptor */
2074 while (num_blocks > 0) {
2075 ret = skl_tplg_get_desc_blocks(dev, array);
2076
2077 if (ret < 0)
2078 return ret;
2079 block_type = ret;
2080 off += array->size;
2081
2082 array = (struct snd_soc_tplg_vendor_array *)
2083 (tplg_w->priv.data + off);
2084
2085 ret = skl_tplg_get_desc_blocks(dev, array);
2086
2087 if (ret < 0)
2088 return ret;
2089 block_size = ret;
2090 off += array->size;
2091
2092 array = (struct snd_soc_tplg_vendor_array *)
2093 (tplg_w->priv.data + off);
2094
2095 data = (tplg_w->priv.data + off);
2096
2097 if (block_type == SKL_TYPE_TUPLE) {
2098 ret = skl_tplg_get_tokens(dev, data,
2099 skl, mconfig, block_size);
2100
2101 if (ret < 0)
2102 return ret;
2103
2104 --num_blocks;
2105 } else {
2106 if (mconfig->formats_config.caps_size > 0)
2107 memcpy(mconfig->formats_config.caps, data,
2108 mconfig->formats_config.caps_size);
2109 --num_blocks;
2110 }
2111 }
2112
2113 return 0;
4cd9899f
HS
2114}
2115
fe3f4442
D
2116static void skl_clear_pin_config(struct snd_soc_platform *platform,
2117 struct snd_soc_dapm_widget *w)
2118{
2119 int i;
2120 struct skl_module_cfg *mconfig;
2121 struct skl_pipe *pipe;
2122
2123 if (!strncmp(w->dapm->component->name, platform->component.name,
2124 strlen(platform->component.name))) {
2125 mconfig = w->priv;
2126 pipe = mconfig->pipe;
2127 for (i = 0; i < mconfig->max_in_queue; i++) {
2128 mconfig->m_in_pin[i].in_use = false;
2129 mconfig->m_in_pin[i].pin_state = SKL_PIN_UNBIND;
2130 }
2131 for (i = 0; i < mconfig->max_out_queue; i++) {
2132 mconfig->m_out_pin[i].in_use = false;
2133 mconfig->m_out_pin[i].pin_state = SKL_PIN_UNBIND;
2134 }
2135 pipe->state = SKL_PIPE_INVALID;
2136 mconfig->m_state = SKL_MODULE_UNINIT;
2137 }
2138}
2139
2140void skl_cleanup_resources(struct skl *skl)
2141{
2142 struct skl_sst *ctx = skl->skl_sst;
2143 struct snd_soc_platform *soc_platform = skl->platform;
2144 struct snd_soc_dapm_widget *w;
2145 struct snd_soc_card *card;
2146
2147 if (soc_platform == NULL)
2148 return;
2149
2150 card = soc_platform->component.card;
2151 if (!card || !card->instantiated)
2152 return;
2153
2154 skl->resource.mem = 0;
2155 skl->resource.mcps = 0;
2156
2157 list_for_each_entry(w, &card->widgets, list) {
2158 if (is_skl_dsp_widget_type(w) && (w->priv != NULL))
2159 skl_clear_pin_config(soc_platform, w);
2160 }
2161
2162 skl_clear_module_cnt(ctx->dsp);
2163}
2164
3af36706
VK
2165/*
2166 * Topology core widget load callback
2167 *
2168 * This is used to save the private data for each widget which gives
2169 * information to the driver about module and pipeline parameters which DSP
2170 * FW expects like ids, resource values, formats etc
2171 */
2172static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
b663a8c5
JK
2173 struct snd_soc_dapm_widget *w,
2174 struct snd_soc_tplg_dapm_widget *tplg_w)
3af36706
VK
2175{
2176 int ret;
2177 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
2178 struct skl *skl = ebus_to_skl(ebus);
2179 struct hdac_bus *bus = ebus_to_hbus(ebus);
2180 struct skl_module_cfg *mconfig;
3af36706
VK
2181
2182 if (!tplg_w->priv.size)
2183 goto bind_event;
2184
2185 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
2186
2187 if (!mconfig)
2188 return -ENOMEM;
2189
2190 w->priv = mconfig;
09305da9 2191
b7c50555
VK
2192 /*
2193 * module binary can be loaded later, so set it to query when
2194 * module is load for a use case
2195 */
2196 mconfig->id.module_id = -1;
3af36706 2197
6277e832
SN
2198 /* Parse private data for tuples */
2199 ret = skl_tplg_get_pvt_data(tplg_w, skl, bus->dev, mconfig);
2200 if (ret < 0)
2201 return ret;
3af36706
VK
2202bind_event:
2203 if (tplg_w->event_type == 0) {
3373f716 2204 dev_dbg(bus->dev, "ASoC: No event handler required\n");
3af36706
VK
2205 return 0;
2206 }
2207
2208 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
b663a8c5
JK
2209 ARRAY_SIZE(skl_tplg_widget_ops),
2210 tplg_w->event_type);
3af36706
VK
2211
2212 if (ret) {
2213 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
2214 __func__, tplg_w->event_type);
2215 return -EINVAL;
2216 }
2217
2218 return 0;
2219}
2220
140adfba
JK
2221static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be,
2222 struct snd_soc_tplg_bytes_control *bc)
2223{
2224 struct skl_algo_data *ac;
2225 struct skl_dfw_algo_data *dfw_ac =
2226 (struct skl_dfw_algo_data *)bc->priv.data;
2227
2228 ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL);
2229 if (!ac)
2230 return -ENOMEM;
2231
2232 /* Fill private data */
2233 ac->max = dfw_ac->max;
2234 ac->param_id = dfw_ac->param_id;
2235 ac->set_params = dfw_ac->set_params;
0d682104 2236 ac->size = dfw_ac->max;
140adfba
JK
2237
2238 if (ac->max) {
2239 ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL);
2240 if (!ac->params)
2241 return -ENOMEM;
2242
edd7ea2d 2243 memcpy(ac->params, dfw_ac->params, ac->max);
140adfba
JK
2244 }
2245
2246 be->dobj.private = ac;
2247 return 0;
2248}
2249
2250static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
2251 struct snd_kcontrol_new *kctl,
2252 struct snd_soc_tplg_ctl_hdr *hdr)
2253{
2254 struct soc_bytes_ext *sb;
2255 struct snd_soc_tplg_bytes_control *tplg_bc;
2256 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
2257 struct hdac_bus *bus = ebus_to_hbus(ebus);
2258
2259 switch (hdr->ops.info) {
2260 case SND_SOC_TPLG_CTL_BYTES:
2261 tplg_bc = container_of(hdr,
2262 struct snd_soc_tplg_bytes_control, hdr);
2263 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
2264 sb = (struct soc_bytes_ext *)kctl->private_value;
2265 if (tplg_bc->priv.size)
2266 return skl_init_algo_data(
2267 bus->dev, sb, tplg_bc);
2268 }
2269 break;
2270
2271 default:
2272 dev_warn(bus->dev, "Control load not supported %d:%d:%d\n",
2273 hdr->ops.get, hdr->ops.put, hdr->ops.info);
2274 break;
2275 }
2276
2277 return 0;
2278}
2279
541070ce
SN
2280static int skl_tplg_fill_str_mfest_tkn(struct device *dev,
2281 struct snd_soc_tplg_vendor_string_elem *str_elem,
2282 struct skl_dfw_manifest *minfo)
2283{
2284 int tkn_count = 0;
2285 static int ref_count;
2286
2287 switch (str_elem->token) {
2288 case SKL_TKN_STR_LIB_NAME:
2289 if (ref_count > minfo->lib_count - 1) {
2290 ref_count = 0;
2291 return -EINVAL;
2292 }
2293
2294 strncpy(minfo->lib[ref_count].name, str_elem->string,
2295 ARRAY_SIZE(minfo->lib[ref_count].name));
2296 ref_count++;
2297 tkn_count++;
2298 break;
2299
2300 default:
ecd286a9 2301 dev_err(dev, "Not a string token %d\n", str_elem->token);
541070ce
SN
2302 break;
2303 }
2304
2305 return tkn_count;
2306}
2307
2308static int skl_tplg_get_str_tkn(struct device *dev,
2309 struct snd_soc_tplg_vendor_array *array,
2310 struct skl_dfw_manifest *minfo)
2311{
2312 int tkn_count = 0, ret;
2313 struct snd_soc_tplg_vendor_string_elem *str_elem;
2314
2315 str_elem = (struct snd_soc_tplg_vendor_string_elem *)array->value;
2316 while (tkn_count < array->num_elems) {
2317 ret = skl_tplg_fill_str_mfest_tkn(dev, str_elem, minfo);
2318 str_elem++;
2319
2320 if (ret < 0)
2321 return ret;
2322
2323 tkn_count = tkn_count + ret;
2324 }
2325
2326 return tkn_count;
2327}
2328
2329static int skl_tplg_get_int_tkn(struct device *dev,
2330 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2331 struct skl_dfw_manifest *minfo)
2332{
2333 int tkn_count = 0;
2334
2335 switch (tkn_elem->token) {
2336 case SKL_TKN_U32_LIB_COUNT:
2337 minfo->lib_count = tkn_elem->value;
2338 tkn_count++;
2339 break;
2340
2341 default:
ecd286a9 2342 dev_err(dev, "Not a manifest token %d\n", tkn_elem->token);
541070ce
SN
2343 return -EINVAL;
2344 }
2345
2346 return tkn_count;
2347}
2348
2349/*
2350 * Fill the manifest structure by parsing the tokens based on the
2351 * type.
2352 */
2353static int skl_tplg_get_manifest_tkn(struct device *dev,
2354 char *pvt_data, struct skl_dfw_manifest *minfo,
2355 int block_size)
2356{
2357 int tkn_count = 0, ret;
2358 int off = 0, tuple_size = 0;
2359 struct snd_soc_tplg_vendor_array *array;
2360 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
2361
2362 if (block_size <= 0)
2363 return -EINVAL;
2364
2365 while (tuple_size < block_size) {
2366 array = (struct snd_soc_tplg_vendor_array *)(pvt_data + off);
2367 off += array->size;
2368 switch (array->type) {
2369 case SND_SOC_TPLG_TUPLE_TYPE_STRING:
2370 ret = skl_tplg_get_str_tkn(dev, array, minfo);
2371
2372 if (ret < 0)
2373 return ret;
2374 tkn_count += ret;
2375
2376 tuple_size += tkn_count *
2377 sizeof(struct snd_soc_tplg_vendor_string_elem);
2378 continue;
2379
2380 case SND_SOC_TPLG_TUPLE_TYPE_UUID:
ecd286a9 2381 dev_warn(dev, "no uuid tokens for skl tplf manifest\n");
541070ce
SN
2382 continue;
2383
2384 default:
2385 tkn_elem = array->value;
2386 tkn_count = 0;
2387 break;
2388 }
2389
2390 while (tkn_count <= array->num_elems - 1) {
2391 ret = skl_tplg_get_int_tkn(dev,
2392 tkn_elem, minfo);
2393 if (ret < 0)
2394 return ret;
2395
2396 tkn_count = tkn_count + ret;
2397 tkn_elem++;
2398 tuple_size += tkn_count *
2399 sizeof(struct snd_soc_tplg_vendor_value_elem);
2400 break;
2401 }
2402 tkn_count = 0;
2403 }
2404
2405 return 0;
2406}
2407
2408/*
2409 * Parse manifest private data for tokens. The private data block is
2410 * preceded by descriptors for type and size of data block.
2411 */
2412static int skl_tplg_get_manifest_data(struct snd_soc_tplg_manifest *manifest,
2413 struct device *dev, struct skl_dfw_manifest *minfo)
2414{
2415 struct snd_soc_tplg_vendor_array *array;
2416 int num_blocks, block_size = 0, block_type, off = 0;
2417 char *data;
2418 int ret;
2419
2420 /* Read the NUM_DATA_BLOCKS descriptor */
2421 array = (struct snd_soc_tplg_vendor_array *)manifest->priv.data;
2422 ret = skl_tplg_get_desc_blocks(dev, array);
2423 if (ret < 0)
2424 return ret;
2425 num_blocks = ret;
2426
2427 off += array->size;
2428 array = (struct snd_soc_tplg_vendor_array *)
2429 (manifest->priv.data + off);
2430
2431 /* Read the BLOCK_TYPE and BLOCK_SIZE descriptor */
2432 while (num_blocks > 0) {
2433 ret = skl_tplg_get_desc_blocks(dev, array);
2434
2435 if (ret < 0)
2436 return ret;
2437 block_type = ret;
2438 off += array->size;
2439
2440 array = (struct snd_soc_tplg_vendor_array *)
2441 (manifest->priv.data + off);
2442
2443 ret = skl_tplg_get_desc_blocks(dev, array);
2444
2445 if (ret < 0)
2446 return ret;
2447 block_size = ret;
2448 off += array->size;
2449
2450 array = (struct snd_soc_tplg_vendor_array *)
2451 (manifest->priv.data + off);
2452
2453 data = (manifest->priv.data + off);
2454
2455 if (block_type == SKL_TYPE_TUPLE) {
2456 ret = skl_tplg_get_manifest_tkn(dev, data, minfo,
2457 block_size);
2458
2459 if (ret < 0)
2460 return ret;
2461
2462 --num_blocks;
2463 } else {
2464 return -EINVAL;
2465 }
2466 }
2467
2468 return 0;
2469}
2470
15ecaba9
K
2471static int skl_manifest_load(struct snd_soc_component *cmpnt,
2472 struct snd_soc_tplg_manifest *manifest)
2473{
2474 struct skl_dfw_manifest *minfo;
2475 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
2476 struct hdac_bus *bus = ebus_to_hbus(ebus);
2477 struct skl *skl = ebus_to_skl(ebus);
2478 int ret = 0;
2479
c15ad605
VK
2480 /* proceed only if we have private data defined */
2481 if (manifest->priv.size == 0)
2482 return 0;
2483
15ecaba9 2484 minfo = &skl->skl_sst->manifest;
541070ce
SN
2485
2486 skl_tplg_get_manifest_data(manifest, bus->dev, minfo);
15ecaba9
K
2487
2488 if (minfo->lib_count > HDA_MAX_LIB) {
2489 dev_err(bus->dev, "Exceeding max Library count. Got:%d\n",
2490 minfo->lib_count);
2491 ret = -EINVAL;
2492 }
2493
2494 return ret;
2495}
2496
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VK
2497static struct snd_soc_tplg_ops skl_tplg_ops = {
2498 .widget_load = skl_tplg_widget_load,
140adfba
JK
2499 .control_load = skl_tplg_control_load,
2500 .bytes_ext_ops = skl_tlv_ops,
2501 .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops),
15ecaba9 2502 .manifest = skl_manifest_load,
3af36706
VK
2503};
2504
287af4f9
JK
2505/*
2506 * A pipe can have multiple modules, each of them will be a DAPM widget as
2507 * well. While managing a pipeline we need to get the list of all the
2508 * widgets in a pipelines, so this helper - skl_tplg_create_pipe_widget_list()
2509 * helps to get the SKL type widgets in that pipeline
2510 */
2511static int skl_tplg_create_pipe_widget_list(struct snd_soc_platform *platform)
2512{
2513 struct snd_soc_dapm_widget *w;
2514 struct skl_module_cfg *mcfg = NULL;
2515 struct skl_pipe_module *p_module = NULL;
2516 struct skl_pipe *pipe;
2517
2518 list_for_each_entry(w, &platform->component.card->widgets, list) {
2519 if (is_skl_dsp_widget_type(w) && w->priv != NULL) {
2520 mcfg = w->priv;
2521 pipe = mcfg->pipe;
2522
2523 p_module = devm_kzalloc(platform->dev,
2524 sizeof(*p_module), GFP_KERNEL);
2525 if (!p_module)
2526 return -ENOMEM;
2527
2528 p_module->w = w;
2529 list_add_tail(&p_module->node, &pipe->w_list);
2530 }
2531 }
2532
2533 return 0;
2534}
2535
f0aa94fa
JK
2536static void skl_tplg_set_pipe_type(struct skl *skl, struct skl_pipe *pipe)
2537{
2538 struct skl_pipe_module *w_module;
2539 struct snd_soc_dapm_widget *w;
2540 struct skl_module_cfg *mconfig;
2541 bool host_found = false, link_found = false;
2542
2543 list_for_each_entry(w_module, &pipe->w_list, node) {
2544 w = w_module->w;
2545 mconfig = w->priv;
2546
2547 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
2548 host_found = true;
2549 else if (mconfig->dev_type != SKL_DEVICE_NONE)
2550 link_found = true;
2551 }
2552
2553 if (host_found && link_found)
2554 pipe->passthru = true;
2555 else
2556 pipe->passthru = false;
2557}
2558
3af36706
VK
2559/* This will be read from topology manifest, currently defined here */
2560#define SKL_MAX_MCPS 30000000
2561#define SKL_FW_MAX_MEM 1000000
2562
2563/*
2564 * SKL topology init routine
2565 */
2566int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
2567{
2568 int ret;
2569 const struct firmware *fw;
2570 struct hdac_bus *bus = ebus_to_hbus(ebus);
2571 struct skl *skl = ebus_to_skl(ebus);
f0aa94fa 2572 struct skl_pipeline *ppl;
3af36706 2573
4b235c43 2574 ret = request_firmware(&fw, skl->tplg_name, bus->dev);
3af36706 2575 if (ret < 0) {
b663a8c5 2576 dev_err(bus->dev, "tplg fw %s load failed with %d\n",
4b235c43
VK
2577 skl->tplg_name, ret);
2578 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
2579 if (ret < 0) {
2580 dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n",
2581 "dfw_sst.bin", ret);
2582 return ret;
2583 }
3af36706
VK
2584 }
2585
2586 /*
2587 * The complete tplg for SKL is loaded as index 0, we don't use
2588 * any other index
2589 */
b663a8c5
JK
2590 ret = snd_soc_tplg_component_load(&platform->component,
2591 &skl_tplg_ops, fw, 0);
3af36706
VK
2592 if (ret < 0) {
2593 dev_err(bus->dev, "tplg component load failed%d\n", ret);
c14a82c7 2594 release_firmware(fw);
3af36706
VK
2595 return -EINVAL;
2596 }
2597
2598 skl->resource.max_mcps = SKL_MAX_MCPS;
2599 skl->resource.max_mem = SKL_FW_MAX_MEM;
2600
d8018361 2601 skl->tplg = fw;
287af4f9
JK
2602 ret = skl_tplg_create_pipe_widget_list(platform);
2603 if (ret < 0)
2604 return ret;
d8018361 2605
f0aa94fa
JK
2606 list_for_each_entry(ppl, &skl->ppl_list, node)
2607 skl_tplg_set_pipe_type(skl, ppl->pipe);
d8018361 2608
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VK
2609 return 0;
2610}