]> git.proxmox.com Git - mirror_ubuntu-focal-kernel.git/blame - sound/soc/intel/skylake/skl-topology.c
projects / mirror_ubuntu-focal-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge remote-tracking branch 'asoc/topic/pcm512x' into asoc-next
[mirror_ubuntu-focal-kernel.git] / sound / soc / intel / skylake / skl-topology.c
CommitLineData
e4e2d2f4
JK		 1/*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/firmware.h>
22#include <sound/soc.h>
23#include <sound/soc-topology.h>
6277e832 24#include <uapi/sound/snd_sst_tokens.h>
e4e2d2f4
JK		 25#include "skl-sst-dsp.h"
26#include "skl-sst-ipc.h"
27#include "skl-topology.h"
28#include "skl.h"
29#include "skl-tplg-interface.h"
6c5768b3
D		 30#include "../common/sst-dsp.h"
31#include "../common/sst-dsp-priv.h"
e4e2d2f4 32
f7590d4f
JK		 33#define SKL_CH_FIXUP_MASK (1 << 0)
34#define SKL_RATE_FIXUP_MASK (1 << 1)
35#define SKL_FMT_FIXUP_MASK (1 << 2)
6277e832
SN		 36#define SKL_IN_DIR_BIT_MASK BIT(0)
37#define SKL_PIN_COUNT_MASK GENMASK(7, 4)
f7590d4f 38
7a1b749b
D		 39static const int mic_mono_list[] = {
400, 1, 2, 3,
41};
42static const int mic_stereo_list[][SKL_CH_STEREO] = {
43{0, 1}, {0, 2}, {0, 3}, {1, 2}, {1, 3}, {2, 3},
44};
45static const int mic_trio_list[][SKL_CH_TRIO] = {
46{0, 1, 2}, {0, 1, 3}, {0, 2, 3}, {1, 2, 3},
47};
48static const int mic_quatro_list[][SKL_CH_QUATRO] = {
49{0, 1, 2, 3},
50};
51
f6fa56e2
RB		 52#define CHECK_HW_PARAMS(ch, freq, bps, prm_ch, prm_freq, prm_bps) \
53 ((ch == prm_ch) && (bps == prm_bps) && (freq == prm_freq))
54
a83e3b4c
VK		 55void skl_tplg_d0i3_get(struct skl *skl, enum d0i3_capability caps)
56{
57 struct skl_d0i3_data *d0i3 = &skl->skl_sst->d0i3;
58
59 switch (caps) {
60 case SKL_D0I3_NONE:
61 d0i3->non_d0i3++;
62 break;
63
64 case SKL_D0I3_STREAMING:
65 d0i3->streaming++;
66 break;
67
68 case SKL_D0I3_NON_STREAMING:
69 d0i3->non_streaming++;
70 break;
71 }
72}
73
74void skl_tplg_d0i3_put(struct skl *skl, enum d0i3_capability caps)
75{
76 struct skl_d0i3_data *d0i3 = &skl->skl_sst->d0i3;
77
78 switch (caps) {
79 case SKL_D0I3_NONE:
80 d0i3->non_d0i3--;
81 break;
82
83 case SKL_D0I3_STREAMING:
84 d0i3->streaming--;
85 break;
86
87 case SKL_D0I3_NON_STREAMING:
88 d0i3->non_streaming--;
89 break;
90 }
91}
92
e4e2d2f4
JK		 93/*
94 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
95 * ignore. This helpers checks if the SKL driver handles this widget type
96 */
97static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
98{
99 switch (w->id) {
100 case snd_soc_dapm_dai_link:
101 case snd_soc_dapm_dai_in:
102 case snd_soc_dapm_aif_in:
103 case snd_soc_dapm_aif_out:
104 case snd_soc_dapm_dai_out:
105 case snd_soc_dapm_switch:
106 return false;
107 default:
108 return true;
109 }
110}
111
112/*
113 * Each pipelines needs memory to be allocated. Check if we have free memory
9ba8ffef 114 * from available pool.
e4e2d2f4 115 */
9ba8ffef 116static bool skl_is_pipe_mem_avail(struct skl *skl,
e4e2d2f4
JK		 117 struct skl_module_cfg *mconfig)
118{
119 struct skl_sst *ctx = skl->skl_sst;
120
121 if (skl->resource.mem + mconfig->pipe->memory_pages >
122 skl->resource.max_mem) {
123 dev_err(ctx->dev,
124 "%s: module_id %d instance %d\n", __func__,
125 mconfig->id.module_id,
126 mconfig->id.instance_id);
127 dev_err(ctx->dev,
128 "exceeds ppl memory available %d mem %d\n",
129 skl->resource.max_mem, skl->resource.mem);
130 return false;
9ba8ffef
D		 131 } else {
132 return true;
e4e2d2f4 133 }
9ba8ffef 134}
e4e2d2f4 135
9ba8ffef
D		 136/*
137 * Add the mem to the mem pool. This is freed when pipe is deleted.
138 * Note: DSP does actual memory management we only keep track for complete
139 * pool
140 */
141static void skl_tplg_alloc_pipe_mem(struct skl *skl,
142 struct skl_module_cfg *mconfig)
143{
e4e2d2f4 144 skl->resource.mem += mconfig->pipe->memory_pages;
e4e2d2f4
JK		 145}
146
147/*
148 * Pipeline needs needs DSP CPU resources for computation, this is
149 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
150 *
151 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
9ba8ffef 152 * pipe.
e4e2d2f4 153 */
9ba8ffef
D		 154
155static bool skl_is_pipe_mcps_avail(struct skl *skl,
e4e2d2f4
JK		 156 struct skl_module_cfg *mconfig)
157{
158 struct skl_sst *ctx = skl->skl_sst;
f6fa56e2
RB		 159 u8 res_idx = mconfig->res_idx;
160 struct skl_module_res *res = &mconfig->module->resources[res_idx];
e4e2d2f4 161
f6fa56e2 162 if (skl->resource.mcps + res->cps > skl->resource.max_mcps) {
e4e2d2f4
JK		 163 dev_err(ctx->dev,
164 "%s: module_id %d instance %d\n", __func__,
165 mconfig->id.module_id, mconfig->id.instance_id);
166 dev_err(ctx->dev,
7ca42f5a 167 "exceeds ppl mcps available %d > mem %d\n",
e4e2d2f4
JK		 168 skl->resource.max_mcps, skl->resource.mcps);
169 return false;
9ba8ffef
D		 170 } else {
171 return true;
e4e2d2f4 172 }
9ba8ffef 173}
e4e2d2f4 174
9ba8ffef
D		 175static void skl_tplg_alloc_pipe_mcps(struct skl *skl,
176 struct skl_module_cfg *mconfig)
177{
f6fa56e2
RB		 178 u8 res_idx = mconfig->res_idx;
179 struct skl_module_res *res = &mconfig->module->resources[res_idx];
180
181 skl->resource.mcps += res->cps;
e4e2d2f4
JK		 182}
183
184/*
185 * Free the mcps when tearing down
186 */
187static void
188skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
189{
f6fa56e2
RB		 190 u8 res_idx = mconfig->res_idx;
191 struct skl_module_res *res = &mconfig->module->resources[res_idx];
192
f6fa56e2 193 skl->resource.mcps -= res->cps;
e4e2d2f4
JK		 194}
195
196/*
197 * Free the memory when tearing down
198 */
199static void
200skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
201{
202 skl->resource.mem -= mconfig->pipe->memory_pages;
203}
204
f7590d4f
JK		 205
206static void skl_dump_mconfig(struct skl_sst *ctx,
207 struct skl_module_cfg *mcfg)
208{
f6fa56e2
RB		 209 struct skl_module_iface *iface = &mcfg->module->formats[0];
210
f7590d4f
JK		 211 dev_dbg(ctx->dev, "Dumping config\n");
212 dev_dbg(ctx->dev, "Input Format:\n");
f6fa56e2
RB		 213 dev_dbg(ctx->dev, "channels = %d\n", iface->inputs[0].fmt.channels);
214 dev_dbg(ctx->dev, "s_freq = %d\n", iface->inputs[0].fmt.s_freq);
215 dev_dbg(ctx->dev, "ch_cfg = %d\n", iface->inputs[0].fmt.ch_cfg);
216 dev_dbg(ctx->dev, "valid bit depth = %d\n",
217 iface->inputs[0].fmt.valid_bit_depth);
f7590d4f 218 dev_dbg(ctx->dev, "Output Format:\n");
f6fa56e2
RB		 219 dev_dbg(ctx->dev, "channels = %d\n", iface->outputs[0].fmt.channels);
220 dev_dbg(ctx->dev, "s_freq = %d\n", iface->outputs[0].fmt.s_freq);
221 dev_dbg(ctx->dev, "valid bit depth = %d\n",
222 iface->outputs[0].fmt.valid_bit_depth);
223 dev_dbg(ctx->dev, "ch_cfg = %d\n", iface->outputs[0].fmt.ch_cfg);
f7590d4f
JK		 224}
225
ea5a137d
SP		 226static void skl_tplg_update_chmap(struct skl_module_fmt *fmt, int chs)
227{
228 int slot_map = 0xFFFFFFFF;
229 int start_slot = 0;
230 int i;
231
232 for (i = 0; i < chs; i++) {
233 /*
234 * For 2 channels with starting slot as 0, slot map will
235 * look like 0xFFFFFF10.
236 */
237 slot_map &= (~(0xF << (4 * i)) | (start_slot << (4 * i)));
238 start_slot++;
239 }
240 fmt->ch_map = slot_map;
241}
242
f7590d4f
JK		 243static void skl_tplg_update_params(struct skl_module_fmt *fmt,
244 struct skl_pipe_params *params, int fixup)
245{
246 if (fixup & SKL_RATE_FIXUP_MASK)
247 fmt->s_freq = params->s_freq;
ea5a137d 248 if (fixup & SKL_CH_FIXUP_MASK) {
f7590d4f 249 fmt->channels = params->ch;
ea5a137d
SP		 250 skl_tplg_update_chmap(fmt, fmt->channels);
251 }
98256f83
JK		 252 if (fixup & SKL_FMT_FIXUP_MASK) {
253 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
254
255 /*
256 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
257 * container so update bit depth accordingly
258 */
259 switch (fmt->valid_bit_depth) {
260 case SKL_DEPTH_16BIT:
261 fmt->bit_depth = fmt->valid_bit_depth;
262 break;
263
264 default:
265 fmt->bit_depth = SKL_DEPTH_32BIT;
266 break;
267 }
268 }
269
f7590d4f
JK		 270}
271
272/*
273 * A pipeline may have modules which impact the pcm parameters, like SRC,
274 * channel converter, format converter.
275 * We need to calculate the output params by applying the 'fixup'
276 * Topology will tell driver which type of fixup is to be applied by
277 * supplying the fixup mask, so based on that we calculate the output
278 *
279 * Now In FE the pcm hw_params is source/target format. Same is applicable
280 * for BE with its hw_params invoked.
281 * here based on FE, BE pipeline and direction we calculate the input and
282 * outfix and then apply that for a module
283 */
284static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
285 struct skl_pipe_params *params, bool is_fe)
286{
287 int in_fixup, out_fixup;
288 struct skl_module_fmt *in_fmt, *out_fmt;
289
4cd9899f 290 /* Fixups will be applied to pin 0 only */
f6fa56e2
RB		 291 in_fmt = &m_cfg->module->formats[0].inputs[0].fmt;
292 out_fmt = &m_cfg->module->formats[0].outputs[0].fmt;
f7590d4f
JK		 293
294 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
295 if (is_fe) {
296 in_fixup = m_cfg->params_fixup;
297 out_fixup = (~m_cfg->converter) &
298 m_cfg->params_fixup;
299 } else {
300 out_fixup = m_cfg->params_fixup;
301 in_fixup = (~m_cfg->converter) &
302 m_cfg->params_fixup;
303 }
304 } else {
305 if (is_fe) {
306 out_fixup = m_cfg->params_fixup;
307 in_fixup = (~m_cfg->converter) &
308 m_cfg->params_fixup;
309 } else {
310 in_fixup = m_cfg->params_fixup;
311 out_fixup = (~m_cfg->converter) &
312 m_cfg->params_fixup;
313 }
314 }
315
316 skl_tplg_update_params(in_fmt, params, in_fixup);
317 skl_tplg_update_params(out_fmt, params, out_fixup);
318}
319
320/*
321 * A module needs input and output buffers, which are dependent upon pcm
322 * params, so once we have calculate params, we need buffer calculation as
323 * well.
324 */
325static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
326 struct skl_module_cfg *mcfg)
327{
328 int multiplier = 1;
4cd9899f 329 struct skl_module_fmt *in_fmt, *out_fmt;
f6fa56e2 330 struct skl_module_res *res;
4cd9899f
HS		 331
332 /* Since fixups is applied to pin 0 only, ibs, obs needs
333 * change for pin 0 only
334 */
f6fa56e2
RB		 335 res = &mcfg->module->resources[0];
336 in_fmt = &mcfg->module->formats[0].inputs[0].fmt;
337 out_fmt = &mcfg->module->formats[0].outputs[0].fmt;
f7590d4f
JK		 338
339 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
340 multiplier = 5;
f0c8e1d9 341
f6fa56e2 342 res->ibs = DIV_ROUND_UP(in_fmt->s_freq, 1000) *
998d6fb5 343 in_fmt->channels * (in_fmt->bit_depth >> 3) *
f0c8e1d9
SP		 344 multiplier;
345
f6fa56e2 346 res->obs = DIV_ROUND_UP(out_fmt->s_freq, 1000) *
998d6fb5 347 out_fmt->channels * (out_fmt->bit_depth >> 3) *
f0c8e1d9 348 multiplier;
f7590d4f
JK		 349}
350
db2f586b
SV		 351static u8 skl_tplg_be_dev_type(int dev_type)
352{
353 int ret;
354
355 switch (dev_type) {
356 case SKL_DEVICE_BT:
357 ret = NHLT_DEVICE_BT;
358 break;
359
360 case SKL_DEVICE_DMIC:
361 ret = NHLT_DEVICE_DMIC;
362 break;
363
364 case SKL_DEVICE_I2S:
365 ret = NHLT_DEVICE_I2S;
366 break;
367
368 default:
369 ret = NHLT_DEVICE_INVALID;
370 break;
371 }
372
373 return ret;
374}
375
2d1419a3
JK		 376static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
377 struct skl_sst *ctx)
378{
379 struct skl_module_cfg *m_cfg = w->priv;
380 int link_type, dir;
381 u32 ch, s_freq, s_fmt;
382 struct nhlt_specific_cfg *cfg;
383 struct skl *skl = get_skl_ctx(ctx->dev);
db2f586b 384 u8 dev_type = skl_tplg_be_dev_type(m_cfg->dev_type);
f6fa56e2
RB		 385 int fmt_idx = m_cfg->fmt_idx;
386 struct skl_module_iface *m_iface = &m_cfg->module->formats[fmt_idx];
2d1419a3
JK		 387
388 /* check if we already have blob */
389 if (m_cfg->formats_config.caps_size > 0)
390 return 0;
391
c7c6c736 392 dev_dbg(ctx->dev, "Applying default cfg blob\n");
2d1419a3
JK		 393 switch (m_cfg->dev_type) {
394 case SKL_DEVICE_DMIC:
395 link_type = NHLT_LINK_DMIC;
c7c6c736 396 dir = SNDRV_PCM_STREAM_CAPTURE;
f6fa56e2
RB		 397 s_freq = m_iface->inputs[0].fmt.s_freq;
398 s_fmt = m_iface->inputs[0].fmt.bit_depth;
399 ch = m_iface->inputs[0].fmt.channels;
2d1419a3
JK		 400 break;
401
402 case SKL_DEVICE_I2S:
403 link_type = NHLT_LINK_SSP;
404 if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) {
c7c6c736 405 dir = SNDRV_PCM_STREAM_PLAYBACK;
f6fa56e2
RB		 406 s_freq = m_iface->outputs[0].fmt.s_freq;
407 s_fmt = m_iface->outputs[0].fmt.bit_depth;
408 ch = m_iface->outputs[0].fmt.channels;
c7c6c736
JK		 409 } else {
410 dir = SNDRV_PCM_STREAM_CAPTURE;
f6fa56e2
RB		 411 s_freq = m_iface->inputs[0].fmt.s_freq;
412 s_fmt = m_iface->inputs[0].fmt.bit_depth;
413 ch = m_iface->inputs[0].fmt.channels;
2d1419a3
JK		 414 }
415 break;
416
417 default:
418 return -EINVAL;
419 }
420
421 /* update the blob based on virtual bus_id and default params */
422 cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type,
db2f586b 423 s_fmt, ch, s_freq, dir, dev_type);
2d1419a3
JK		 424 if (cfg) {
425 m_cfg->formats_config.caps_size = cfg->size;
426 m_cfg->formats_config.caps = (u32 *) &cfg->caps;
427 } else {
428 dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n",
429 m_cfg->vbus_id, link_type, dir);
430 dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n",
431 ch, s_freq, s_fmt);
432 return -EIO;
433 }
434
435 return 0;
436}
437
f7590d4f
JK		 438static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
439 struct skl_sst *ctx)
440{
441 struct skl_module_cfg *m_cfg = w->priv;
442 struct skl_pipe_params *params = m_cfg->pipe->p_params;
443 int p_conn_type = m_cfg->pipe->conn_type;
444 bool is_fe;
445
446 if (!m_cfg->params_fixup)
447 return;
448
449 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
450 w->name);
451
452 skl_dump_mconfig(ctx, m_cfg);
453
454 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
455 is_fe = true;
456 else
457 is_fe = false;
458
459 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
460 skl_tplg_update_buffer_size(ctx, m_cfg);
461
462 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
463 w->name);
464
465 skl_dump_mconfig(ctx, m_cfg);
466}
467
abb74003
JK		 468/*
469 * some modules can have multiple params set from user control and
470 * need to be set after module is initialized. If set_param flag is
471 * set module params will be done after module is initialised.
472 */
473static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w,
474 struct skl_sst *ctx)
475{
476 int i, ret;
477 struct skl_module_cfg *mconfig = w->priv;
478 const struct snd_kcontrol_new *k;
479 struct soc_bytes_ext *sb;
480 struct skl_algo_data *bc;
481 struct skl_specific_cfg *sp_cfg;
482
483 if (mconfig->formats_config.caps_size > 0 &&
4ced1827 484 mconfig->formats_config.set_params == SKL_PARAM_SET) {
abb74003
JK		 485 sp_cfg = &mconfig->formats_config;
486 ret = skl_set_module_params(ctx, sp_cfg->caps,
487 sp_cfg->caps_size,
488 sp_cfg->param_id, mconfig);
489 if (ret < 0)
490 return ret;
491 }
492
493 for (i = 0; i < w->num_kcontrols; i++) {
494 k = &w->kcontrol_news[i];
495 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
496 sb = (void *) k->private_value;
497 bc = (struct skl_algo_data *)sb->dobj.private;
498
4ced1827 499 if (bc->set_params == SKL_PARAM_SET) {
abb74003 500 ret = skl_set_module_params(ctx,
0d682104 501 (u32 *)bc->params, bc->size,
abb74003
JK		 502 bc->param_id, mconfig);
503 if (ret < 0)
504 return ret;
505 }
506 }
507 }
508
509 return 0;
510}
511
512/*
513 * some module param can set from user control and this is required as
514 * when module is initailzed. if module param is required in init it is
515 * identifed by set_param flag. if set_param flag is not set, then this
516 * parameter needs to set as part of module init.
517 */
518static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w)
519{
520 const struct snd_kcontrol_new *k;
521 struct soc_bytes_ext *sb;
522 struct skl_algo_data *bc;
523 struct skl_module_cfg *mconfig = w->priv;
524 int i;
525
526 for (i = 0; i < w->num_kcontrols; i++) {
527 k = &w->kcontrol_news[i];
528 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
529 sb = (struct soc_bytes_ext *)k->private_value;
530 bc = (struct skl_algo_data *)sb->dobj.private;
531
4ced1827 532 if (bc->set_params != SKL_PARAM_INIT)
abb74003
JK		 533 continue;
534
d1a6fe41 535 mconfig->formats_config.caps = (u32 *)bc->params;
0d682104 536 mconfig->formats_config.caps_size = bc->size;
abb74003
JK		 537
538 break;
539 }
540 }
541
542 return 0;
543}
544
bb704a73
JK		 545static int skl_tplg_module_prepare(struct skl_sst *ctx, struct skl_pipe *pipe,
546 struct snd_soc_dapm_widget *w, struct skl_module_cfg *mcfg)
547{
548 switch (mcfg->dev_type) {
549 case SKL_DEVICE_HDAHOST:
550 return skl_pcm_host_dma_prepare(ctx->dev, pipe->p_params);
551
552 case SKL_DEVICE_HDALINK:
553 return skl_pcm_link_dma_prepare(ctx->dev, pipe->p_params);
554 }
555
556 return 0;
557}
558
e4e2d2f4
JK		 559/*
560 * Inside a pipe instance, we can have various modules. These modules need
561 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
562 * skl_init_module() routine, so invoke that for all modules in a pipeline
563 */
564static int
565skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
566{
567 struct skl_pipe_module *w_module;
568 struct snd_soc_dapm_widget *w;
569 struct skl_module_cfg *mconfig;
570 struct skl_sst *ctx = skl->skl_sst;
f6fa56e2 571 u8 cfg_idx;
e4e2d2f4
JK		 572 int ret = 0;
573
574 list_for_each_entry(w_module, &pipe->w_list, node) {
b26199ea 575 uuid_le *uuid_mod;
e4e2d2f4
JK		 576 w = w_module->w;
577 mconfig = w->priv;
578
b7c50555
VK		 579 /* check if module ids are populated */
580 if (mconfig->id.module_id < 0) {
a657ae7e
VK		 581 dev_err(skl->skl_sst->dev,
582 "module %pUL id not populated\n",
583 (uuid_le *)mconfig->guid);
584 return -EIO;
b7c50555
VK		 585 }
586
f6fa56e2
RB		 587 cfg_idx = mconfig->pipe->cur_config_idx;
588 mconfig->fmt_idx = mconfig->mod_cfg[cfg_idx].fmt_idx;
589 mconfig->res_idx = mconfig->mod_cfg[cfg_idx].res_idx;
590
e4e2d2f4 591 /* check resource available */
9ba8ffef 592 if (!skl_is_pipe_mcps_avail(skl, mconfig))
e4e2d2f4
JK		 593 return -ENOMEM;
594
f6fa56e2 595 if (mconfig->module->loadable && ctx->dsp->fw_ops.load_mod) {
6c5768b3
D		 596 ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
597 mconfig->id.module_id, mconfig->guid);
598 if (ret < 0)
599 return ret;
d643678b
JK		 600
601 mconfig->m_state = SKL_MODULE_LOADED;
6c5768b3
D		 602 }
603
bb704a73
JK		 604 /* prepare the DMA if the module is gateway cpr */
605 ret = skl_tplg_module_prepare(ctx, pipe, w, mconfig);
606 if (ret < 0)
607 return ret;
608
2d1419a3
JK		 609 /* update blob if blob is null for be with default value */
610 skl_tplg_update_be_blob(w, ctx);
611
f7590d4f
JK		 612 /*
613 * apply fix/conversion to module params based on
614 * FE/BE params
615 */
616 skl_tplg_update_module_params(w, ctx);
b26199ea
JK		 617 uuid_mod = (uuid_le *)mconfig->guid;
618 mconfig->id.pvt_id = skl_get_pvt_id(ctx, uuid_mod,
619 mconfig->id.instance_id);
ef2a352c
D		 620 if (mconfig->id.pvt_id < 0)
621 return ret;
abb74003 622 skl_tplg_set_module_init_data(w);
4147a6e5
PS		 623
624 ret = skl_dsp_get_core(ctx->dsp, mconfig->core_id);
625 if (ret < 0) {
626 dev_err(ctx->dev, "Failed to wake up core %d ret=%d\n",
627 mconfig->core_id, ret);
628 return ret;
629 }
630
9939a9c3 631 ret = skl_init_module(ctx, mconfig);
ef2a352c 632 if (ret < 0) {
b26199ea 633 skl_put_pvt_id(ctx, uuid_mod, &mconfig->id.pvt_id);
4147a6e5 634 goto err;
ef2a352c 635 }
260eb73a 636 skl_tplg_alloc_pipe_mcps(skl, mconfig);
abb74003 637 ret = skl_tplg_set_module_params(w, ctx);
e4e2d2f4 638 if (ret < 0)
4147a6e5 639 goto err;
e4e2d2f4
JK		 640 }
641
642 return 0;
4147a6e5
PS		 643err:
644 skl_dsp_put_core(ctx->dsp, mconfig->core_id);
645 return ret;
e4e2d2f4 646}
d93f8e55 647
6c5768b3
D		 648static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx,
649 struct skl_pipe *pipe)
650{
4147a6e5 651 int ret = 0;
6c5768b3
D		 652 struct skl_pipe_module *w_module = NULL;
653 struct skl_module_cfg *mconfig = NULL;
654
655 list_for_each_entry(w_module, &pipe->w_list, node) {
b26199ea 656 uuid_le *uuid_mod;
6c5768b3 657 mconfig = w_module->w->priv;
b26199ea 658 uuid_mod = (uuid_le *)mconfig->guid;
6c5768b3 659
f6fa56e2 660 if (mconfig->module->loadable && ctx->dsp->fw_ops.unload_mod &&
b0fab9c6
D		 661 mconfig->m_state > SKL_MODULE_UNINIT) {
662 ret = ctx->dsp->fw_ops.unload_mod(ctx->dsp,
6c5768b3 663 mconfig->id.module_id);
b0fab9c6
D		 664 if (ret < 0)
665 return -EIO;
666 }
b26199ea 667 skl_put_pvt_id(ctx, uuid_mod, &mconfig->id.pvt_id);
4147a6e5
PS		 668
669 ret = skl_dsp_put_core(ctx->dsp, mconfig->core_id);
670 if (ret < 0) {
671 /* don't return; continue with other modules */
672 dev_err(ctx->dev, "Failed to sleep core %d ret=%d\n",
673 mconfig->core_id, ret);
674 }
6c5768b3
D		 675 }
676
677 /* no modules to unload in this path, so return */
4147a6e5 678 return ret;
6c5768b3
D		 679}
680
f6fa56e2
RB		 681/*
682 * Here, we select pipe format based on the pipe type and pipe
683 * direction to determine the current config index for the pipeline.
684 * The config index is then used to select proper module resources.
685 * Intermediate pipes currently have a fixed format hence we select the
686 * 0th configuratation by default for such pipes.
687 */
688static int
689skl_tplg_get_pipe_config(struct skl *skl, struct skl_module_cfg *mconfig)
690{
691 struct skl_sst *ctx = skl->skl_sst;
692 struct skl_pipe *pipe = mconfig->pipe;
693 struct skl_pipe_params *params = pipe->p_params;
694 struct skl_path_config *pconfig = &pipe->configs[0];
695 struct skl_pipe_fmt *fmt = NULL;
696 bool in_fmt = false;
697 int i;
698
699 if (pipe->nr_cfgs == 0) {
700 pipe->cur_config_idx = 0;
701 return 0;
702 }
703
704 if (pipe->conn_type == SKL_PIPE_CONN_TYPE_NONE) {
705 dev_dbg(ctx->dev, "No conn_type detected, take 0th config\n");
706 pipe->cur_config_idx = 0;
707 pipe->memory_pages = pconfig->mem_pages;
708
709 return 0;
710 }
711
712 if ((pipe->conn_type == SKL_PIPE_CONN_TYPE_FE &&
713 pipe->direction == SNDRV_PCM_STREAM_PLAYBACK) ||
714 (pipe->conn_type == SKL_PIPE_CONN_TYPE_BE &&
715 pipe->direction == SNDRV_PCM_STREAM_CAPTURE))
716 in_fmt = true;
717
718 for (i = 0; i < pipe->nr_cfgs; i++) {
719 pconfig = &pipe->configs[i];
720 if (in_fmt)
721 fmt = &pconfig->in_fmt;
722 else
723 fmt = &pconfig->out_fmt;
724
725 if (CHECK_HW_PARAMS(params->ch, params->s_freq, params->s_fmt,
726 fmt->channels, fmt->freq, fmt->bps)) {
727 pipe->cur_config_idx = i;
728 pipe->memory_pages = pconfig->mem_pages;
729 dev_dbg(ctx->dev, "Using pipe config: %d\n", i);
730
731 return 0;
732 }
733 }
734
735 dev_err(ctx->dev, "Invalid pipe config: %d %d %d for pipe: %d\n",
736 params->ch, params->s_freq, params->s_fmt, pipe->ppl_id);
737 return -EINVAL;
738}
739
d93f8e55
VK		 740/*
741 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
742 * need create the pipeline. So we do following:
743 * - check the resources
744 * - Create the pipeline
745 * - Initialize the modules in pipeline
746 * - finally bind all modules together
747 */
748static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
749 struct skl *skl)
750{
751 int ret;
752 struct skl_module_cfg *mconfig = w->priv;
753 struct skl_pipe_module *w_module;
754 struct skl_pipe *s_pipe = mconfig->pipe;
b8c722dd 755 struct skl_module_cfg *src_module = NULL, *dst_module, *module;
d93f8e55 756 struct skl_sst *ctx = skl->skl_sst;
b8c722dd 757 struct skl_module_deferred_bind *modules;
d93f8e55 758
f6fa56e2
RB		 759 ret = skl_tplg_get_pipe_config(skl, mconfig);
760 if (ret < 0)
761 return ret;
762
d93f8e55 763 /* check resource available */
9ba8ffef 764 if (!skl_is_pipe_mcps_avail(skl, mconfig))
d93f8e55
VK		 765 return -EBUSY;
766
9ba8ffef 767 if (!skl_is_pipe_mem_avail(skl, mconfig))
d93f8e55
VK		 768 return -ENOMEM;
769
770 /*
771 * Create a list of modules for pipe.
772 * This list contains modules from source to sink
773 */
774 ret = skl_create_pipeline(ctx, mconfig->pipe);
775 if (ret < 0)
776 return ret;
777
260eb73a
D		 778 skl_tplg_alloc_pipe_mem(skl, mconfig);
779 skl_tplg_alloc_pipe_mcps(skl, mconfig);
d93f8e55
VK		 780
781 /* Init all pipe modules from source to sink */
782 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
783 if (ret < 0)
784 return ret;
785
786 /* Bind modules from source to sink */
787 list_for_each_entry(w_module, &s_pipe->w_list, node) {
788 dst_module = w_module->w->priv;
789
790 if (src_module == NULL) {
791 src_module = dst_module;
792 continue;
793 }
794
795 ret = skl_bind_modules(ctx, src_module, dst_module);
796 if (ret < 0)
797 return ret;
798
799 src_module = dst_module;
800 }
801
b8c722dd
JK		 802 /*
803 * When the destination module is initialized, check for these modules
804 * in deferred bind list. If found, bind them.
805 */
806 list_for_each_entry(w_module, &s_pipe->w_list, node) {
807 if (list_empty(&skl->bind_list))
808 break;
809
810 list_for_each_entry(modules, &skl->bind_list, node) {
811 module = w_module->w->priv;
812 if (modules->dst == module)
813 skl_bind_modules(ctx, modules->src,
814 modules->dst);
815 }
816 }
817
d93f8e55
VK		 818 return 0;
819}
820
bf3e5ef5
D		 821static int skl_fill_sink_instance_id(struct skl_sst *ctx, u32 *params,
822 int size, struct skl_module_cfg *mcfg)
5e8f0ee4 823{
5e8f0ee4
D		 824 int i, pvt_id;
825
bf3e5ef5
D		 826 if (mcfg->m_type == SKL_MODULE_TYPE_KPB) {
827 struct skl_kpb_params *kpb_params =
828 (struct skl_kpb_params *)params;
829 struct skl_mod_inst_map *inst = kpb_params->map;
5e8f0ee4 830
bf3e5ef5
D		 831 for (i = 0; i < kpb_params->num_modules; i++) {
832 pvt_id = skl_get_pvt_instance_id_map(ctx, inst->mod_id,
833 inst->inst_id);
834 if (pvt_id < 0)
835 return -EINVAL;
836
837 inst->inst_id = pvt_id;
838 inst++;
839 }
5e8f0ee4 840 }
bf3e5ef5 841
5e8f0ee4
D		 842 return 0;
843}
cc6a4044
JK		 844/*
845 * Some modules require params to be set after the module is bound to
846 * all pins connected.
847 *
848 * The module provider initializes set_param flag for such modules and we
849 * send params after binding
850 */
851static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w,
852 struct skl_module_cfg *mcfg, struct skl_sst *ctx)
853{
854 int i, ret;
855 struct skl_module_cfg *mconfig = w->priv;
856 const struct snd_kcontrol_new *k;
857 struct soc_bytes_ext *sb;
858 struct skl_algo_data *bc;
859 struct skl_specific_cfg *sp_cfg;
bf3e5ef5 860 u32 *params;
cc6a4044
JK		 861
862 /*
863 * check all out/in pins are in bind state.
864 * if so set the module param
865 */
f6fa56e2 866 for (i = 0; i < mcfg->module->max_output_pins; i++) {
cc6a4044
JK		 867 if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE)
868 return 0;
869 }
870
f6fa56e2 871 for (i = 0; i < mcfg->module->max_input_pins; i++) {
cc6a4044
JK		 872 if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE)
873 return 0;
874 }
875
876 if (mconfig->formats_config.caps_size > 0 &&
877 mconfig->formats_config.set_params == SKL_PARAM_BIND) {
878 sp_cfg = &mconfig->formats_config;
879 ret = skl_set_module_params(ctx, sp_cfg->caps,
880 sp_cfg->caps_size,
881 sp_cfg->param_id, mconfig);
882 if (ret < 0)
883 return ret;
884 }
885
886 for (i = 0; i < w->num_kcontrols; i++) {
887 k = &w->kcontrol_news[i];
888 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
889 sb = (void *) k->private_value;
890 bc = (struct skl_algo_data *)sb->dobj.private;
891
892 if (bc->set_params == SKL_PARAM_BIND) {
bf3e5ef5
D		 893 params = kzalloc(bc->max, GFP_KERNEL);
894 if (!params)
895 return -ENOMEM;
896
897 memcpy(params, bc->params, bc->max);
898 skl_fill_sink_instance_id(ctx, params, bc->max,
899 mconfig);
900
901 ret = skl_set_module_params(ctx, params,
902 bc->max, bc->param_id, mconfig);
903 kfree(params);
904
cc6a4044
JK		 905 if (ret < 0)
906 return ret;
907 }
908 }
909 }
910
911 return 0;
912}
913
b8c722dd
JK		 914
915static int skl_tplg_module_add_deferred_bind(struct skl *skl,
916 struct skl_module_cfg *src, struct skl_module_cfg *dst)
917{
918 struct skl_module_deferred_bind *m_list, *modules;
919 int i;
920
921 /* only supported for module with static pin connection */
f6fa56e2 922 for (i = 0; i < dst->module->max_input_pins; i++) {
b8c722dd
JK		 923 struct skl_module_pin *pin = &dst->m_in_pin[i];
924
925 if (pin->is_dynamic)
926 continue;
927
928 if ((pin->id.module_id == src->id.module_id) &&
929 (pin->id.instance_id == src->id.instance_id)) {
930
931 if (!list_empty(&skl->bind_list)) {
932 list_for_each_entry(modules, &skl->bind_list, node) {
933 if (modules->src == src && modules->dst == dst)
934 return 0;
935 }
936 }
937
938 m_list = kzalloc(sizeof(*m_list), GFP_KERNEL);
939 if (!m_list)
940 return -ENOMEM;
941
942 m_list->src = src;
943 m_list->dst = dst;
944
945 list_add(&m_list->node, &skl->bind_list);
946 }
947 }
948
949 return 0;
950}
951
8724ff17
JK		 952static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
953 struct skl *skl,
6bd4cf85 954 struct snd_soc_dapm_widget *src_w,
8724ff17 955 struct skl_module_cfg *src_mconfig)
d93f8e55
VK		 956{
957 struct snd_soc_dapm_path *p;
0ed95d76 958 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
8724ff17 959 struct skl_module_cfg *sink_mconfig;
d93f8e55 960 struct skl_sst *ctx = skl->skl_sst;
8724ff17 961 int ret;
d93f8e55 962
8724ff17 963 snd_soc_dapm_widget_for_each_sink_path(w, p) {
d93f8e55
VK		 964 if (!p->connect)
965 continue;
966
967 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
968 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
969
0ed95d76 970 next_sink = p->sink;
6bd4cf85
JK		 971
972 if (!is_skl_dsp_widget_type(p->sink))
973 return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig);
974
d93f8e55
VK		 975 /*
976 * here we will check widgets in sink pipelines, so that
977 * can be any widgets type and we are only interested if
978 * they are ones used for SKL so check that first
979 */
980 if ((p->sink->priv != NULL) &&
981 is_skl_dsp_widget_type(p->sink)) {
982
983 sink = p->sink;
d93f8e55
VK		 984 sink_mconfig = sink->priv;
985
b8c722dd
JK		 986 /*
987 * Modules other than PGA leaf can be connected
988 * directly or via switch to a module in another
989 * pipeline. EX: reference path
990 * when the path is enabled, the dst module that needs
991 * to be bound may not be initialized. if the module is
992 * not initialized, add these modules in the deferred
993 * bind list and when the dst module is initialised,
994 * bind this module to the dst_module in deferred list.
995 */
996 if (((src_mconfig->m_state == SKL_MODULE_INIT_DONE)
997 && (sink_mconfig->m_state == SKL_MODULE_UNINIT))) {
998
999 ret = skl_tplg_module_add_deferred_bind(skl,
1000 src_mconfig, sink_mconfig);
1001
1002 if (ret < 0)
1003 return ret;
1004
1005 }
1006
1007
cc6a4044
JK		 1008 if (src_mconfig->m_state == SKL_MODULE_UNINIT ||
1009 sink_mconfig->m_state == SKL_MODULE_UNINIT)
1010 continue;
1011
d93f8e55
VK		 1012 /* Bind source to sink, mixin is always source */
1013 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
1014 if (ret)
1015 return ret;
1016
cc6a4044
JK		 1017 /* set module params after bind */
1018 skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx);
1019 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
1020
d93f8e55
VK		 1021 /* Start sinks pipe first */
1022 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
d1730c3d
JK		 1023 if (sink_mconfig->pipe->conn_type !=
1024 SKL_PIPE_CONN_TYPE_FE)
1025 ret = skl_run_pipe(ctx,
1026 sink_mconfig->pipe);
d93f8e55
VK		 1027 if (ret)
1028 return ret;
1029 }
d93f8e55
VK		 1030 }
1031 }
1032
10a5439f 1033 if (!sink && next_sink)
6bd4cf85 1034 return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig);
8724ff17
JK		 1035
1036 return 0;
1037}
1038
1039/*
1040 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
1041 * we need to do following:
1042 * - Bind to sink pipeline
1043 * Since the sink pipes can be running and we don't get mixer event on
1044 * connect for already running mixer, we need to find the sink pipes
1045 * here and bind to them. This way dynamic connect works.
1046 * - Start sink pipeline, if not running
1047 * - Then run current pipe
1048 */
1049static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
1050 struct skl *skl)
1051{
1052 struct skl_module_cfg *src_mconfig;
1053 struct skl_sst *ctx = skl->skl_sst;
1054 int ret = 0;
1055
1056 src_mconfig = w->priv;
1057
1058 /*
1059 * find which sink it is connected to, bind with the sink,
1060 * if sink is not started, start sink pipe first, then start
1061 * this pipe
1062 */
6bd4cf85 1063 ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig);
d93f8e55
VK		 1064 if (ret)
1065 return ret;
1066
d93f8e55 1067 /* Start source pipe last after starting all sinks */
d1730c3d
JK		 1068 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
1069 return skl_run_pipe(ctx, src_mconfig->pipe);
d93f8e55
VK		 1070
1071 return 0;
1072}
1073
8724ff17
JK		 1074static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
1075 struct snd_soc_dapm_widget *w, struct skl *skl)
1076{
1077 struct snd_soc_dapm_path *p;
1078 struct snd_soc_dapm_widget *src_w = NULL;
1079 struct skl_sst *ctx = skl->skl_sst;
1080
1081 snd_soc_dapm_widget_for_each_source_path(w, p) {
1082 src_w = p->source;
1083 if (!p->connect)
1084 continue;
1085
1086 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
1087 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
1088
1089 /*
1090 * here we will check widgets in sink pipelines, so that can
1091 * be any widgets type and we are only interested if they are
1092 * ones used for SKL so check that first
1093 */
1094 if ((p->source->priv != NULL) &&
1095 is_skl_dsp_widget_type(p->source)) {
1096 return p->source;
1097 }
1098 }
1099
1100 if (src_w != NULL)
1101 return skl_get_src_dsp_widget(src_w, skl);
1102
1103 return NULL;
1104}
1105
d93f8e55
VK		 1106/*
1107 * in the Post-PMU event of mixer we need to do following:
1108 * - Check if this pipe is running
1109 * - if not, then
1110 * - bind this pipeline to its source pipeline
1111 * if source pipe is already running, this means it is a dynamic
1112 * connection and we need to bind only to that pipe
1113 * - start this pipeline
1114 */
1115static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
1116 struct skl *skl)
1117{
1118 int ret = 0;
d93f8e55
VK		 1119 struct snd_soc_dapm_widget *source, *sink;
1120 struct skl_module_cfg *src_mconfig, *sink_mconfig;
1121 struct skl_sst *ctx = skl->skl_sst;
1122 int src_pipe_started = 0;
1123
1124 sink = w;
1125 sink_mconfig = sink->priv;
1126
1127 /*
1128 * If source pipe is already started, that means source is driving
1129 * one more sink before this sink got connected, Since source is
1130 * started, bind this sink to source and start this pipe.
1131 */
8724ff17
JK		 1132 source = skl_get_src_dsp_widget(w, skl);
1133 if (source != NULL) {
1134 src_mconfig = source->priv;
1135 sink_mconfig = sink->priv;
1136 src_pipe_started = 1;
d93f8e55
VK		 1137
1138 /*
8724ff17
JK		 1139 * check pipe state, then no need to bind or start the
1140 * pipe
d93f8e55 1141 */
8724ff17
JK		 1142 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
1143 src_pipe_started = 0;
d93f8e55
VK		 1144 }
1145
1146 if (src_pipe_started) {
1147 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
1148 if (ret)
1149 return ret;
1150
cc6a4044
JK		 1151 /* set module params after bind */
1152 skl_tplg_set_module_bind_params(source, src_mconfig, ctx);
1153 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
1154
d1730c3d
JK		 1155 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
1156 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
d93f8e55
VK		 1157 }
1158
1159 return ret;
1160}
1161
1162/*
1163 * in the Pre-PMD event of mixer we need to do following:
1164 * - Stop the pipe
1165 * - find the source connections and remove that from dapm_path_list
1166 * - unbind with source pipelines if still connected
1167 */
1168static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
1169 struct skl *skl)
1170{
d93f8e55 1171 struct skl_module_cfg *src_mconfig, *sink_mconfig;
ce1b5551 1172 int ret = 0, i;
d93f8e55
VK		 1173 struct skl_sst *ctx = skl->skl_sst;
1174
ce1b5551 1175 sink_mconfig = w->priv;
d93f8e55
VK		 1176
1177 /* Stop the pipe */
1178 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
1179 if (ret)
1180 return ret;
1181
f6fa56e2 1182 for (i = 0; i < sink_mconfig->module->max_input_pins; i++) {
ce1b5551
JK		 1183 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
1184 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
1185 if (!src_mconfig)
1186 continue;
d93f8e55 1187
ce1b5551
JK		 1188 ret = skl_unbind_modules(ctx,
1189 src_mconfig, sink_mconfig);
d93f8e55 1190 }
d93f8e55
VK		 1191 }
1192
1193 return ret;
1194}
1195
1196/*
1197 * in the Post-PMD event of mixer we need to do following:
1198 * - Free the mcps used
1199 * - Free the mem used
1200 * - Unbind the modules within the pipeline
1201 * - Delete the pipeline (modules are not required to be explicitly
1202 * deleted, pipeline delete is enough here
1203 */
1204static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
1205 struct skl *skl)
1206{
1207 struct skl_module_cfg *mconfig = w->priv;
1208 struct skl_pipe_module *w_module;
1209 struct skl_module_cfg *src_module = NULL, *dst_module;
1210 struct skl_sst *ctx = skl->skl_sst;
1211 struct skl_pipe *s_pipe = mconfig->pipe;
550b349a 1212 struct skl_module_deferred_bind *modules, *tmp;
d93f8e55 1213
260eb73a
D		 1214 if (s_pipe->state == SKL_PIPE_INVALID)
1215 return -EINVAL;
1216
d93f8e55 1217 skl_tplg_free_pipe_mcps(skl, mconfig);
65976878 1218 skl_tplg_free_pipe_mem(skl, mconfig);
d93f8e55 1219
b8c722dd
JK		 1220 list_for_each_entry(w_module, &s_pipe->w_list, node) {
1221 if (list_empty(&skl->bind_list))
1222 break;
1223
1224 src_module = w_module->w->priv;
1225
550b349a 1226 list_for_each_entry_safe(modules, tmp, &skl->bind_list, node) {
b8c722dd
JK		 1227 /*
1228 * When the destination module is deleted, Unbind the
1229 * modules from deferred bind list.
1230 */
1231 if (modules->dst == src_module) {
1232 skl_unbind_modules(ctx, modules->src,
1233 modules->dst);
1234 }
1235
1236 /*
1237 * When the source module is deleted, remove this entry
1238 * from the deferred bind list.
1239 */
1240 if (modules->src == src_module) {
1241 list_del(&modules->node);
1242 modules->src = NULL;
1243 modules->dst = NULL;
1244 kfree(modules);
1245 }
1246 }
1247 }
1248
d93f8e55
VK		 1249 list_for_each_entry(w_module, &s_pipe->w_list, node) {
1250 dst_module = w_module->w->priv;
1251
260eb73a
D		 1252 if (mconfig->m_state >= SKL_MODULE_INIT_DONE)
1253 skl_tplg_free_pipe_mcps(skl, dst_module);
d93f8e55
VK		 1254 if (src_module == NULL) {
1255 src_module = dst_module;
1256 continue;
1257 }
1258
7ca42f5a 1259 skl_unbind_modules(ctx, src_module, dst_module);
d93f8e55
VK		 1260 src_module = dst_module;
1261 }
1262
547cafa3 1263 skl_delete_pipe(ctx, mconfig->pipe);
d93f8e55 1264
473a4d51
JK		 1265 list_for_each_entry(w_module, &s_pipe->w_list, node) {
1266 src_module = w_module->w->priv;
1267 src_module->m_state = SKL_MODULE_UNINIT;
1268 }
1269
6c5768b3 1270 return skl_tplg_unload_pipe_modules(ctx, s_pipe);
d93f8e55
VK		 1271}
1272
1273/*
1274 * in the Post-PMD event of PGA we need to do following:
1275 * - Free the mcps used
1276 * - Stop the pipeline
1277 * - In source pipe is connected, unbind with source pipelines
1278 */
1279static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
1280 struct skl *skl)
1281{
d93f8e55 1282 struct skl_module_cfg *src_mconfig, *sink_mconfig;
ce1b5551 1283 int ret = 0, i;
d93f8e55
VK		 1284 struct skl_sst *ctx = skl->skl_sst;
1285
ce1b5551 1286 src_mconfig = w->priv;
d93f8e55 1287
d93f8e55
VK		 1288 /* Stop the pipe since this is a mixin module */
1289 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
1290 if (ret)
1291 return ret;
1292
f6fa56e2 1293 for (i = 0; i < src_mconfig->module->max_output_pins; i++) {
ce1b5551
JK		 1294 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
1295 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
1296 if (!sink_mconfig)
1297 continue;
1298 /*
1299 * This is a connecter and if path is found that means
1300 * unbind between source and sink has not happened yet
1301 */
ce1b5551
JK		 1302 ret = skl_unbind_modules(ctx, src_mconfig,
1303 sink_mconfig);
d93f8e55
VK		 1304 }
1305 }
1306
d93f8e55
VK		 1307 return ret;
1308}
1309
d93f8e55
VK		 1310/*
1311 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
1312 * second one is required that is created as another pipe entity.
1313 * The mixer is responsible for pipe management and represent a pipeline
1314 * instance
1315 */
1316static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
1317 struct snd_kcontrol *k, int event)
1318{
1319 struct snd_soc_dapm_context *dapm = w->dapm;
1320 struct skl *skl = get_skl_ctx(dapm->dev);
1321
1322 switch (event) {
1323 case SND_SOC_DAPM_PRE_PMU:
1324 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1325
1326 case SND_SOC_DAPM_POST_PMU:
1327 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1328
1329 case SND_SOC_DAPM_PRE_PMD:
1330 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1331
1332 case SND_SOC_DAPM_POST_PMD:
1333 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1334 }
1335
1336 return 0;
1337}
1338
1339/*
1340 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
1341 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
1342 * the sink when it is running (two FE to one BE or one FE to two BE)
1343 * scenarios
1344 */
1345static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
1346 struct snd_kcontrol *k, int event)
1347
1348{
1349 struct snd_soc_dapm_context *dapm = w->dapm;
1350 struct skl *skl = get_skl_ctx(dapm->dev);
1351
1352 switch (event) {
1353 case SND_SOC_DAPM_PRE_PMU:
1354 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
1355
1356 case SND_SOC_DAPM_POST_PMD:
1357 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
1358 }
1359
1360 return 0;
1361}
cfb0a873 1362
140adfba
JK		 1363static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
1364 unsigned int __user *data, unsigned int size)
1365{
1366 struct soc_bytes_ext *sb =
1367 (struct soc_bytes_ext *)kcontrol->private_value;
1368 struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private;
7d9f2911
OA		 1369 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1370 struct skl_module_cfg *mconfig = w->priv;
1371 struct skl *skl = get_skl_ctx(w->dapm->dev);
1372
1373 if (w->power)
1374 skl_get_module_params(skl->skl_sst, (u32 *)bc->params,
0d682104 1375 bc->size, bc->param_id, mconfig);
140adfba 1376
41556f68
VK		 1377 /* decrement size for TLV header */
1378 size -= 2 * sizeof(u32);
1379
1380 /* check size as we don't want to send kernel data */
1381 if (size > bc->max)
1382 size = bc->max;
1383
140adfba
JK		 1384 if (bc->params) {
1385 if (copy_to_user(data, &bc->param_id, sizeof(u32)))
1386 return -EFAULT;
e8bc3c99 1387 if (copy_to_user(data + 1, &size, sizeof(u32)))
140adfba 1388 return -EFAULT;
e8bc3c99 1389 if (copy_to_user(data + 2, bc->params, size))
140adfba
JK		 1390 return -EFAULT;
1391 }
1392
1393 return 0;
1394}
1395
1396#define SKL_PARAM_VENDOR_ID 0xff
1397
1398static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
1399 const unsigned int __user *data, unsigned int size)
1400{
1401 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1402 struct skl_module_cfg *mconfig = w->priv;
1403 struct soc_bytes_ext *sb =
1404 (struct soc_bytes_ext *)kcontrol->private_value;
1405 struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private;
1406 struct skl *skl = get_skl_ctx(w->dapm->dev);
1407
1408 if (ac->params) {
0d682104
D		 1409 if (size > ac->max)
1410 return -EINVAL;
1411
1412 ac->size = size;
140adfba
JK		 1413 /*
1414 * if the param_is is of type Vendor, firmware expects actual
1415 * parameter id and size from the control.
1416 */
1417 if (ac->param_id == SKL_PARAM_VENDOR_ID) {
1418 if (copy_from_user(ac->params, data, size))
1419 return -EFAULT;
1420 } else {
1421 if (copy_from_user(ac->params,
65b4bcb8 1422 data + 2, size))
140adfba
JK		 1423 return -EFAULT;
1424 }
1425
1426 if (w->power)
1427 return skl_set_module_params(skl->skl_sst,
0d682104 1428 (u32 *)ac->params, ac->size,
140adfba
JK		 1429 ac->param_id, mconfig);
1430 }
1431
1432 return 0;
1433}
1434
7a1b749b
D		 1435static int skl_tplg_mic_control_get(struct snd_kcontrol *kcontrol,
1436 struct snd_ctl_elem_value *ucontrol)
1437{
1438 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1439 struct skl_module_cfg *mconfig = w->priv;
1440 struct soc_enum *ec = (struct soc_enum *)kcontrol->private_value;
1441 u32 ch_type = *((u32 *)ec->dobj.private);
1442
1443 if (mconfig->dmic_ch_type == ch_type)
1444 ucontrol->value.enumerated.item[0] =
1445 mconfig->dmic_ch_combo_index;
1446 else
1447 ucontrol->value.enumerated.item[0] = 0;
1448
1449 return 0;
1450}
1451
1452static int skl_fill_mic_sel_params(struct skl_module_cfg *mconfig,
1453 struct skl_mic_sel_config *mic_cfg, struct device *dev)
1454{
1455 struct skl_specific_cfg *sp_cfg = &mconfig->formats_config;
1456
1457 sp_cfg->caps_size = sizeof(struct skl_mic_sel_config);
1458 sp_cfg->set_params = SKL_PARAM_SET;
1459 sp_cfg->param_id = 0x00;
1460 if (!sp_cfg->caps) {
1461 sp_cfg->caps = devm_kzalloc(dev, sp_cfg->caps_size, GFP_KERNEL);
1462 if (!sp_cfg->caps)
1463 return -ENOMEM;
1464 }
1465
1466 mic_cfg->mic_switch = SKL_MIC_SEL_SWITCH;
1467 mic_cfg->flags = 0;
1468 memcpy(sp_cfg->caps, mic_cfg, sp_cfg->caps_size);
1469
1470 return 0;
1471}
1472
1473static int skl_tplg_mic_control_set(struct snd_kcontrol *kcontrol,
1474 struct snd_ctl_elem_value *ucontrol)
1475{
1476 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1477 struct skl_module_cfg *mconfig = w->priv;
1478 struct skl_mic_sel_config mic_cfg = {0};
1479 struct soc_enum *ec = (struct soc_enum *)kcontrol->private_value;
1480 u32 ch_type = *((u32 *)ec->dobj.private);
1481 const int *list;
1482 u8 in_ch, out_ch, index;
1483
1484 mconfig->dmic_ch_type = ch_type;
1485 mconfig->dmic_ch_combo_index = ucontrol->value.enumerated.item[0];
1486
1487 /* enum control index 0 is INVALID, so no channels to be set */
1488 if (mconfig->dmic_ch_combo_index == 0)
1489 return 0;
1490
1491 /* No valid channel selection map for index 0, so offset by 1 */
1492 index = mconfig->dmic_ch_combo_index - 1;
1493
1494 switch (ch_type) {
1495 case SKL_CH_MONO:
1496 if (mconfig->dmic_ch_combo_index > ARRAY_SIZE(mic_mono_list))
1497 return -EINVAL;
1498
1499 list = &mic_mono_list[index];
1500 break;
1501
1502 case SKL_CH_STEREO:
1503 if (mconfig->dmic_ch_combo_index > ARRAY_SIZE(mic_stereo_list))
1504 return -EINVAL;
1505
1506 list = mic_stereo_list[index];
1507 break;
1508
1509 case SKL_CH_TRIO:
1510 if (mconfig->dmic_ch_combo_index > ARRAY_SIZE(mic_trio_list))
1511 return -EINVAL;
1512
1513 list = mic_trio_list[index];
1514 break;
1515
1516 case SKL_CH_QUATRO:
1517 if (mconfig->dmic_ch_combo_index > ARRAY_SIZE(mic_quatro_list))
1518 return -EINVAL;
1519
1520 list = mic_quatro_list[index];
1521 break;
1522
1523 default:
1524 dev_err(w->dapm->dev,
1525 "Invalid channel %d for mic_select module\n",
1526 ch_type);
1527 return -EINVAL;
1528
1529 }
1530
1531 /* channel type enum map to number of chanels for that type */
1532 for (out_ch = 0; out_ch < ch_type; out_ch++) {
1533 in_ch = list[out_ch];
1534 mic_cfg.blob[out_ch][in_ch] = SKL_DEFAULT_MIC_SEL_GAIN;
1535 }
1536
1537 return skl_fill_mic_sel_params(mconfig, &mic_cfg, w->dapm->dev);
1538}
1539
8871dcb9
JK		 1540/*
1541 * Fill the dma id for host and link. In case of passthrough
1542 * pipeline, this will both host and link in the same
1543 * pipeline, so need to copy the link and host based on dev_type
1544 */
1545static void skl_tplg_fill_dma_id(struct skl_module_cfg *mcfg,
1546 struct skl_pipe_params *params)
1547{
1548 struct skl_pipe *pipe = mcfg->pipe;
1549
1550 if (pipe->passthru) {
1551 switch (mcfg->dev_type) {
1552 case SKL_DEVICE_HDALINK:
1553 pipe->p_params->link_dma_id = params->link_dma_id;
12c3be0e 1554 pipe->p_params->link_index = params->link_index;
7f975a38 1555 pipe->p_params->link_bps = params->link_bps;
8871dcb9
JK		 1556 break;
1557
1558 case SKL_DEVICE_HDAHOST:
1559 pipe->p_params->host_dma_id = params->host_dma_id;
7f975a38 1560 pipe->p_params->host_bps = params->host_bps;
8871dcb9
JK		 1561 break;
1562
1563 default:
1564 break;
1565 }
1566 pipe->p_params->s_fmt = params->s_fmt;
1567 pipe->p_params->ch = params->ch;
1568 pipe->p_params->s_freq = params->s_freq;
1569 pipe->p_params->stream = params->stream;
12c3be0e 1570 pipe->p_params->format = params->format;
8871dcb9
JK		 1571
1572 } else {
1573 memcpy(pipe->p_params, params, sizeof(*params));
1574 }
1575}
1576
cfb0a873
VK		 1577/*
1578 * The FE params are passed by hw_params of the DAI.
1579 * On hw_params, the params are stored in Gateway module of the FE and we
1580 * need to calculate the format in DSP module configuration, that
1581 * conversion is done here
1582 */
1583int skl_tplg_update_pipe_params(struct device *dev,
1584 struct skl_module_cfg *mconfig,
1585 struct skl_pipe_params *params)
1586{
f6fa56e2
RB		 1587 struct skl_module_res *res = &mconfig->module->resources[0];
1588 struct skl *skl = get_skl_ctx(dev);
cfb0a873 1589 struct skl_module_fmt *format = NULL;
f6fa56e2 1590 u8 cfg_idx = mconfig->pipe->cur_config_idx;
cfb0a873 1591
8871dcb9 1592 skl_tplg_fill_dma_id(mconfig, params);
f6fa56e2
RB		 1593 mconfig->fmt_idx = mconfig->mod_cfg[cfg_idx].fmt_idx;
1594 mconfig->res_idx = mconfig->mod_cfg[cfg_idx].res_idx;
1595
1596 if (skl->nr_modules)
1597 return 0;
cfb0a873
VK		 1598
1599 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
f6fa56e2 1600 format = &mconfig->module->formats[0].inputs[0].fmt;
cfb0a873 1601 else
f6fa56e2 1602 format = &mconfig->module->formats[0].outputs[0].fmt;
cfb0a873
VK		 1603
1604 /* set the hw_params */
1605 format->s_freq = params->s_freq;
1606 format->channels = params->ch;
1607 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
1608
1609 /*
1610 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
1611 * container so update bit depth accordingly
1612 */
1613 switch (format->valid_bit_depth) {
1614 case SKL_DEPTH_16BIT:
1615 format->bit_depth = format->valid_bit_depth;
1616 break;
1617
1618 case SKL_DEPTH_24BIT:
6654f39e 1619 case SKL_DEPTH_32BIT:
cfb0a873
VK		 1620 format->bit_depth = SKL_DEPTH_32BIT;
1621 break;
1622
1623 default:
1624 dev_err(dev, "Invalid bit depth %x for pipe\n",
1625 format->valid_bit_depth);
1626 return -EINVAL;
1627 }
1628
1629 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
f6fa56e2 1630 res->ibs = (format->s_freq / 1000) *
cfb0a873
VK		 1631 (format->channels) *
1632 (format->bit_depth >> 3);
1633 } else {
f6fa56e2 1634 res->obs = (format->s_freq / 1000) *
cfb0a873
VK		 1635 (format->channels) *
1636 (format->bit_depth >> 3);
1637 }
1638
1639 return 0;
1640}
1641
1642/*
1643 * Query the module config for the FE DAI
1644 * This is used to find the hw_params set for that DAI and apply to FE
1645 * pipeline
1646 */
1647struct skl_module_cfg *
1648skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
1649{
1650 struct snd_soc_dapm_widget *w;
1651 struct snd_soc_dapm_path *p = NULL;
1652
1653 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1654 w = dai->playback_widget;
f0900eb2 1655 snd_soc_dapm_widget_for_each_sink_path(w, p) {
cfb0a873 1656 if (p->connect && p->sink->power &&
a28f51db 1657 !is_skl_dsp_widget_type(p->sink))
cfb0a873
VK		 1658 continue;
1659
1660 if (p->sink->priv) {
1661 dev_dbg(dai->dev, "set params for %s\n",
1662 p->sink->name);
1663 return p->sink->priv;
1664 }
1665 }
1666 } else {
1667 w = dai->capture_widget;
f0900eb2 1668 snd_soc_dapm_widget_for_each_source_path(w, p) {
cfb0a873 1669 if (p->connect && p->source->power &&
a28f51db 1670 !is_skl_dsp_widget_type(p->source))
cfb0a873
VK		 1671 continue;
1672
1673 if (p->source->priv) {
1674 dev_dbg(dai->dev, "set params for %s\n",
1675 p->source->name);
1676 return p->source->priv;
1677 }
1678 }
1679 }
1680
1681 return NULL;
1682}
1683
718a42b5
D		 1684static struct skl_module_cfg *skl_get_mconfig_pb_cpr(
1685 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1686{
1687 struct snd_soc_dapm_path *p;
1688 struct skl_module_cfg *mconfig = NULL;
1689
1690 snd_soc_dapm_widget_for_each_source_path(w, p) {
1691 if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) {
1692 if (p->connect &&
1693 (p->sink->id == snd_soc_dapm_aif_out) &&
1694 p->source->priv) {
1695 mconfig = p->source->priv;
1696 return mconfig;
1697 }
1698 mconfig = skl_get_mconfig_pb_cpr(dai, p->source);
1699 if (mconfig)
1700 return mconfig;
1701 }
1702 }
1703 return mconfig;
1704}
1705
1706static struct skl_module_cfg *skl_get_mconfig_cap_cpr(
1707 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1708{
1709 struct snd_soc_dapm_path *p;
1710 struct skl_module_cfg *mconfig = NULL;
1711
1712 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1713 if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) {
1714 if (p->connect &&
1715 (p->source->id == snd_soc_dapm_aif_in) &&
1716 p->sink->priv) {
1717 mconfig = p->sink->priv;
1718 return mconfig;
1719 }
1720 mconfig = skl_get_mconfig_cap_cpr(dai, p->sink);
1721 if (mconfig)
1722 return mconfig;
1723 }
1724 }
1725 return mconfig;
1726}
1727
1728struct skl_module_cfg *
1729skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream)
1730{
1731 struct snd_soc_dapm_widget *w;
1732 struct skl_module_cfg *mconfig;
1733
1734 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1735 w = dai->playback_widget;
1736 mconfig = skl_get_mconfig_pb_cpr(dai, w);
1737 } else {
1738 w = dai->capture_widget;
1739 mconfig = skl_get_mconfig_cap_cpr(dai, w);
1740 }
1741 return mconfig;
1742}
1743
cfb0a873
VK		 1744static u8 skl_tplg_be_link_type(int dev_type)
1745{
1746 int ret;
1747
1748 switch (dev_type) {
1749 case SKL_DEVICE_BT:
1750 ret = NHLT_LINK_SSP;
1751 break;
1752
1753 case SKL_DEVICE_DMIC:
1754 ret = NHLT_LINK_DMIC;
1755 break;
1756
1757 case SKL_DEVICE_I2S:
1758 ret = NHLT_LINK_SSP;
1759 break;
1760
1761 case SKL_DEVICE_HDALINK:
1762 ret = NHLT_LINK_HDA;
1763 break;
1764
1765 default:
1766 ret = NHLT_LINK_INVALID;
1767 break;
1768 }
1769
1770 return ret;
1771}
1772
1773/*
1774 * Fill the BE gateway parameters
1775 * The BE gateway expects a blob of parameters which are kept in the ACPI
1776 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
1777 * The port can have multiple settings so pick based on the PCM
1778 * parameters
1779 */
1780static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
1781 struct skl_module_cfg *mconfig,
1782 struct skl_pipe_params *params)
1783{
cfb0a873
VK		 1784 struct nhlt_specific_cfg *cfg;
1785 struct skl *skl = get_skl_ctx(dai->dev);
1786 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
db2f586b 1787 u8 dev_type = skl_tplg_be_dev_type(mconfig->dev_type);
cfb0a873 1788
8871dcb9 1789 skl_tplg_fill_dma_id(mconfig, params);
cfb0a873 1790
b30c275e
JK		 1791 if (link_type == NHLT_LINK_HDA)
1792 return 0;
1793
cfb0a873
VK		 1794 /* update the blob based on virtual bus_id*/
1795 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
1796 params->s_fmt, params->ch,
db2f586b
SV		 1797 params->s_freq, params->stream,
1798 dev_type);
cfb0a873
VK		 1799 if (cfg) {
1800 mconfig->formats_config.caps_size = cfg->size;
bc03281a 1801 mconfig->formats_config.caps = (u32 *) &cfg->caps;
cfb0a873
VK		 1802 } else {
1803 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
1804 mconfig->vbus_id, link_type,
1805 params->stream);
1806 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
1807 params->ch, params->s_freq, params->s_fmt);
1808 return -EINVAL;
1809 }
1810
1811 return 0;
1812}
1813
1814static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
1815 struct snd_soc_dapm_widget *w,
1816 struct skl_pipe_params *params)
1817{
1818 struct snd_soc_dapm_path *p;
4d8adccb 1819 int ret = -EIO;
cfb0a873 1820
f0900eb2 1821 snd_soc_dapm_widget_for_each_source_path(w, p) {
cfb0a873
VK		 1822 if (p->connect && is_skl_dsp_widget_type(p->source) &&
1823 p->source->priv) {
1824
9a03cb49
JK		 1825 ret = skl_tplg_be_fill_pipe_params(dai,
1826 p->source->priv, params);
1827 if (ret < 0)
1828 return ret;
cfb0a873 1829 } else {
9a03cb49
JK		 1830 ret = skl_tplg_be_set_src_pipe_params(dai,
1831 p->source, params);
4d8adccb
SP		 1832 if (ret < 0)
1833 return ret;
cfb0a873
VK		 1834 }
1835 }
1836
4d8adccb 1837 return ret;
cfb0a873
VK		 1838}
1839
1840static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
1841 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
1842{
1843 struct snd_soc_dapm_path *p = NULL;
4d8adccb 1844 int ret = -EIO;
cfb0a873 1845
f0900eb2 1846 snd_soc_dapm_widget_for_each_sink_path(w, p) {
cfb0a873
VK		 1847 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
1848 p->sink->priv) {
1849
9a03cb49
JK		 1850 ret = skl_tplg_be_fill_pipe_params(dai,
1851 p->sink->priv, params);
1852 if (ret < 0)
1853 return ret;
cfb0a873 1854 } else {
4d8adccb 1855 ret = skl_tplg_be_set_sink_pipe_params(
cfb0a873 1856 dai, p->sink, params);
4d8adccb
SP		 1857 if (ret < 0)
1858 return ret;
cfb0a873
VK		 1859 }
1860 }
1861
4d8adccb 1862 return ret;
cfb0a873
VK		 1863}
1864
1865/*
1866 * BE hw_params can be a source parameters (capture) or sink parameters
1867 * (playback). Based on sink and source we need to either find the source
1868 * list or the sink list and set the pipeline parameters
1869 */
1870int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1871 struct skl_pipe_params *params)
1872{
1873 struct snd_soc_dapm_widget *w;
1874
1875 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1876 w = dai->playback_widget;
1877
1878 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1879
1880 } else {
1881 w = dai->capture_widget;
1882
1883 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1884 }
1885
1886 return 0;
1887}
3af36706
VK		 1888
1889static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1890 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
9a1e3507 1891 {SKL_VMIXER_EVENT, skl_tplg_mixer_event},
3af36706
VK		 1892 {SKL_PGA_EVENT, skl_tplg_pga_event},
1893};
1894
140adfba
JK		 1895static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = {
1896 {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get,
1897 skl_tplg_tlv_control_set},
1898};
1899
7a1b749b
D		 1900static const struct snd_soc_tplg_kcontrol_ops skl_tplg_kcontrol_ops[] = {
1901 {
1902 .id = SKL_CONTROL_TYPE_MIC_SELECT,
1903 .get = skl_tplg_mic_control_get,
1904 .put = skl_tplg_mic_control_set,
1905 },
1906};
1907
f6fa56e2
RB		 1908static int skl_tplg_fill_pipe_cfg(struct device *dev,
1909 struct skl_pipe *pipe, u32 tkn,
1910 u32 tkn_val, int conf_idx, int dir)
1911{
1912 struct skl_pipe_fmt *fmt;
1913 struct skl_path_config *config;
1914
1915 switch (dir) {
1916 case SKL_DIR_IN:
1917 fmt = &pipe->configs[conf_idx].in_fmt;
1918 break;
1919
1920 case SKL_DIR_OUT:
1921 fmt = &pipe->configs[conf_idx].out_fmt;
1922 break;
1923
1924 default:
1925 dev_err(dev, "Invalid direction: %d\n", dir);
1926 return -EINVAL;
1927 }
1928
1929 config = &pipe->configs[conf_idx];
1930
1931 switch (tkn) {
1932 case SKL_TKN_U32_CFG_FREQ:
1933 fmt->freq = tkn_val;
1934 break;
1935
1936 case SKL_TKN_U8_CFG_CHAN:
1937 fmt->channels = tkn_val;
1938 break;
1939
1940 case SKL_TKN_U8_CFG_BPS:
1941 fmt->bps = tkn_val;
1942 break;
1943
1944 case SKL_TKN_U32_PATH_MEM_PGS:
1945 config->mem_pages = tkn_val;
1946 break;
1947
1948 default:
1949 dev_err(dev, "Invalid token config: %d\n", tkn);
1950 return -EINVAL;
1951 }
1952
1953 return 0;
1954}
1955
6277e832
SN		 1956static int skl_tplg_fill_pipe_tkn(struct device *dev,
1957 struct skl_pipe *pipe, u32 tkn,
1958 u32 tkn_val)
3af36706 1959{
3af36706 1960
6277e832
SN		 1961 switch (tkn) {
1962 case SKL_TKN_U32_PIPE_CONN_TYPE:
1963 pipe->conn_type = tkn_val;
1964 break;
1965
1966 case SKL_TKN_U32_PIPE_PRIORITY:
1967 pipe->pipe_priority = tkn_val;
1968 break;
1969
1970 case SKL_TKN_U32_PIPE_MEM_PGS:
1971 pipe->memory_pages = tkn_val;
1972 break;
1973
8a0cb236
VK		 1974 case SKL_TKN_U32_PMODE:
1975 pipe->lp_mode = tkn_val;
1976 break;
1977
f6fa56e2
RB		 1978 case SKL_TKN_U32_PIPE_DIRECTION:
1979 pipe->direction = tkn_val;
1980 break;
1981
1982 case SKL_TKN_U32_NUM_CONFIGS:
1983 pipe->nr_cfgs = tkn_val;
1984 break;
1985
6277e832
SN		 1986 default:
1987 dev_err(dev, "Token not handled %d\n", tkn);
1988 return -EINVAL;
3af36706 1989 }
6277e832
SN		 1990
1991 return 0;
3af36706
VK		 1992}
1993
1994/*
6277e832
SN		 1995 * Add pipeline by parsing the relevant tokens
1996 * Return an existing pipe if the pipe already exists.
3af36706 1997 */
6277e832
SN		 1998static int skl_tplg_add_pipe(struct device *dev,
1999 struct skl_module_cfg *mconfig, struct skl *skl,
2000 struct snd_soc_tplg_vendor_value_elem *tkn_elem)
3af36706
VK		 2001{
2002 struct skl_pipeline *ppl;
2003 struct skl_pipe *pipe;
2004 struct skl_pipe_params *params;
2005
2006 list_for_each_entry(ppl, &skl->ppl_list, node) {
6277e832
SN		 2007 if (ppl->pipe->ppl_id == tkn_elem->value) {
2008 mconfig->pipe = ppl->pipe;
081dc8ab 2009 return -EEXIST;
6277e832 2010 }
3af36706
VK		 2011 }
2012
2013 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
2014 if (!ppl)
6277e832 2015 return -ENOMEM;
3af36706
VK		 2016
2017 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
2018 if (!pipe)
6277e832 2019 return -ENOMEM;
3af36706
VK		 2020
2021 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
2022 if (!params)
6277e832 2023 return -ENOMEM;
3af36706 2024
3af36706 2025 pipe->p_params = params;
6277e832 2026 pipe->ppl_id = tkn_elem->value;
3af36706
VK		 2027 INIT_LIST_HEAD(&pipe->w_list);
2028
2029 ppl->pipe = pipe;
2030 list_add(&ppl->node, &skl->ppl_list);
2031
6277e832
SN		 2032 mconfig->pipe = pipe;
2033 mconfig->pipe->state = SKL_PIPE_INVALID;
2034
2035 return 0;
2036}
2037
22ebd666
SP		 2038static int skl_tplg_get_uuid(struct device *dev, u8 *guid,
2039 struct snd_soc_tplg_vendor_uuid_elem *uuid_tkn)
2040{
2041 if (uuid_tkn->token == SKL_TKN_UUID) {
2042 memcpy(guid, &uuid_tkn->uuid, 16);
2043 return 0;
2044 }
2045
2046 dev_err(dev, "Not an UUID token %d\n", uuid_tkn->token);
2047
2048 return -EINVAL;
2049}
2050
2051static int skl_tplg_fill_pin(struct device *dev,
2052 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
6277e832 2053 struct skl_module_pin *m_pin,
22ebd666 2054 int pin_index)
6277e832 2055{
d9561474
SP		 2056 int ret;
2057
22ebd666 2058 switch (tkn_elem->token) {
6277e832 2059 case SKL_TKN_U32_PIN_MOD_ID:
22ebd666 2060 m_pin[pin_index].id.module_id = tkn_elem->value;
6277e832
SN		 2061 break;
2062
2063 case SKL_TKN_U32_PIN_INST_ID:
22ebd666 2064 m_pin[pin_index].id.instance_id = tkn_elem->value;
6277e832
SN		 2065 break;
2066
d9561474
SP		 2067 case SKL_TKN_UUID:
2068 ret = skl_tplg_get_uuid(dev, m_pin[pin_index].id.mod_uuid.b,
2069 (struct snd_soc_tplg_vendor_uuid_elem *)tkn_elem);
2070 if (ret < 0)
2071 return ret;
2072
6277e832
SN		 2073 break;
2074
2075 default:
22ebd666 2076 dev_err(dev, "%d Not a pin token\n", tkn_elem->token);
6277e832
SN		 2077 return -EINVAL;
2078 }
2079
2080 return 0;
2081}
2082
2083/*
2084 * Parse for pin config specific tokens to fill up the
2085 * module private data
2086 */
2087static int skl_tplg_fill_pins_info(struct device *dev,
2088 struct skl_module_cfg *mconfig,
2089 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2090 int dir, int pin_count)
2091{
2092 int ret;
2093 struct skl_module_pin *m_pin;
2094
2095 switch (dir) {
2096 case SKL_DIR_IN:
2097 m_pin = mconfig->m_in_pin;
2098 break;
2099
2100 case SKL_DIR_OUT:
2101 m_pin = mconfig->m_out_pin;
2102 break;
2103
2104 default:
ecd286a9 2105 dev_err(dev, "Invalid direction value\n");
6277e832
SN		 2106 return -EINVAL;
2107 }
2108
22ebd666 2109 ret = skl_tplg_fill_pin(dev, tkn_elem, m_pin, pin_count);
6277e832
SN		 2110 if (ret < 0)
2111 return ret;
2112
2113 m_pin[pin_count].in_use = false;
2114 m_pin[pin_count].pin_state = SKL_PIN_UNBIND;
2115
2116 return 0;
3af36706
VK		 2117}
2118
6277e832
SN		 2119/*
2120 * Fill up input/output module config format based
2121 * on the direction
2122 */
2123static int skl_tplg_fill_fmt(struct device *dev,
ca312fda
SN		 2124 struct skl_module_fmt *dst_fmt,
2125 u32 tkn, u32 value)
6277e832 2126{
6277e832
SN		 2127 switch (tkn) {
2128 case SKL_TKN_U32_FMT_CH:
2129 dst_fmt->channels = value;
2130 break;
2131
2132 case SKL_TKN_U32_FMT_FREQ:
2133 dst_fmt->s_freq = value;
2134 break;
2135
2136 case SKL_TKN_U32_FMT_BIT_DEPTH:
2137 dst_fmt->bit_depth = value;
2138 break;
2139
2140 case SKL_TKN_U32_FMT_SAMPLE_SIZE:
2141 dst_fmt->valid_bit_depth = value;
2142 break;
2143
2144 case SKL_TKN_U32_FMT_CH_CONFIG:
2145 dst_fmt->ch_cfg = value;
2146 break;
2147
2148 case SKL_TKN_U32_FMT_INTERLEAVE:
2149 dst_fmt->interleaving_style = value;
2150 break;
2151
2152 case SKL_TKN_U32_FMT_SAMPLE_TYPE:
2153 dst_fmt->sample_type = value;
2154 break;
2155
2156 case SKL_TKN_U32_FMT_CH_MAP:
2157 dst_fmt->ch_map = value;
2158 break;
2159
2160 default:
ecd286a9 2161 dev_err(dev, "Invalid token %d\n", tkn);
6277e832
SN		 2162 return -EINVAL;
2163 }
2164
2165 return 0;
2166}
2167
ca312fda 2168static int skl_tplg_widget_fill_fmt(struct device *dev,
f6fa56e2 2169 struct skl_module_iface *fmt,
ca312fda
SN		 2170 u32 tkn, u32 val, u32 dir, int fmt_idx)
2171{
2172 struct skl_module_fmt *dst_fmt;
2173
f6fa56e2
RB		 2174 if (!fmt)
2175 return -EINVAL;
2176
ca312fda
SN		 2177 switch (dir) {
2178 case SKL_DIR_IN:
f6fa56e2 2179 dst_fmt = &fmt->inputs[fmt_idx].fmt;
ca312fda
SN		 2180 break;
2181
2182 case SKL_DIR_OUT:
f6fa56e2 2183 dst_fmt = &fmt->outputs[fmt_idx].fmt;
ca312fda
SN		 2184 break;
2185
2186 default:
2187 dev_err(dev, "Invalid direction: %d\n", dir);
2188 return -EINVAL;
2189 }
2190
2191 return skl_tplg_fill_fmt(dev, dst_fmt, tkn, val);
2192}
2193
6277e832
SN		 2194static void skl_tplg_fill_pin_dynamic_val(
2195 struct skl_module_pin *mpin, u32 pin_count, u32 value)
4cd9899f
HS		 2196{
2197 int i;
2198
6277e832
SN		 2199 for (i = 0; i < pin_count; i++)
2200 mpin[i].is_dynamic = value;
2201}
2202
db6ed55d
SN		 2203/*
2204 * Resource table in the manifest has pin specific resources
2205 * like pin and pin buffer size
2206 */
2207static int skl_tplg_manifest_pin_res_tkn(struct device *dev,
2208 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2209 struct skl_module_res *res, int pin_idx, int dir)
2210{
2211 struct skl_module_pin_resources *m_pin;
2212
2213 switch (dir) {
2214 case SKL_DIR_IN:
2215 m_pin = &res->input[pin_idx];
2216 break;
2217
2218 case SKL_DIR_OUT:
2219 m_pin = &res->output[pin_idx];
2220 break;
2221
2222 default:
2223 dev_err(dev, "Invalid pin direction: %d\n", dir);
2224 return -EINVAL;
2225 }
2226
2227 switch (tkn_elem->token) {
2228 case SKL_TKN_MM_U32_RES_PIN_ID:
2229 m_pin->pin_index = tkn_elem->value;
2230 break;
2231
2232 case SKL_TKN_MM_U32_PIN_BUF:
2233 m_pin->buf_size = tkn_elem->value;
2234 break;
2235
2236 default:
2237 dev_err(dev, "Invalid token: %d\n", tkn_elem->token);
2238 return -EINVAL;
2239 }
2240
2241 return 0;
2242}
2243
2244/*
2245 * Fill module specific resources from the manifest's resource
2246 * table like CPS, DMA size, mem_pages.
2247 */
2248static int skl_tplg_fill_res_tkn(struct device *dev,
2249 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2250 struct skl_module_res *res,
2251 int pin_idx, int dir)
2252{
2253 int ret, tkn_count = 0;
2254
2255 if (!res)
2256 return -EINVAL;
2257
2258 switch (tkn_elem->token) {
2259 case SKL_TKN_MM_U32_CPS:
2260 res->cps = tkn_elem->value;
2261 break;
2262
2263 case SKL_TKN_MM_U32_DMA_SIZE:
2264 res->dma_buffer_size = tkn_elem->value;
2265 break;
2266
2267 case SKL_TKN_MM_U32_CPC:
2268 res->cpc = tkn_elem->value;
2269 break;
2270
2271 case SKL_TKN_U32_MEM_PAGES:
2272 res->is_pages = tkn_elem->value;
2273 break;
2274
2275 case SKL_TKN_U32_OBS:
2276 res->obs = tkn_elem->value;
2277 break;
2278
2279 case SKL_TKN_U32_IBS:
2280 res->ibs = tkn_elem->value;
2281 break;
2282
f6fa56e2
RB		 2283 case SKL_TKN_U32_MAX_MCPS:
2284 res->cps = tkn_elem->value;
2285 break;
2286
db6ed55d
SN		 2287 case SKL_TKN_MM_U32_RES_PIN_ID:
2288 case SKL_TKN_MM_U32_PIN_BUF:
2289 ret = skl_tplg_manifest_pin_res_tkn(dev, tkn_elem, res,
2290 pin_idx, dir);
2291 if (ret < 0)
2292 return ret;
2293 break;
2294
2295 default:
2296 dev_err(dev, "Not a res type token: %d", tkn_elem->token);
2297 return -EINVAL;
2298
2299 }
2300 tkn_count++;
2301
2302 return tkn_count;
2303}
2304
6277e832
SN		 2305/*
2306 * Parse tokens to fill up the module private data
2307 */
2308static int skl_tplg_get_token(struct device *dev,
2309 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2310 struct skl *skl, struct skl_module_cfg *mconfig)
2311{
2312 int tkn_count = 0;
2313 int ret;
2314 static int is_pipe_exists;
f6fa56e2
RB		 2315 static int pin_index, dir, conf_idx;
2316 struct skl_module_iface *iface = NULL;
2317 struct skl_module_res *res = NULL;
2318 int res_idx = mconfig->res_idx;
2319 int fmt_idx = mconfig->fmt_idx;
2320
2321 /*
2322 * If the manifest structure contains no modules, fill all
2323 * the module data to 0th index.
2324 * res_idx and fmt_idx are default set to 0.
2325 */
2326 if (skl->nr_modules == 0) {
2327 res = &mconfig->module->resources[res_idx];
2328 iface = &mconfig->module->formats[fmt_idx];
2329 }
6277e832
SN		 2330
2331 if (tkn_elem->token > SKL_TKN_MAX)
2332 return -EINVAL;
2333
2334 switch (tkn_elem->token) {
2335 case SKL_TKN_U8_IN_QUEUE_COUNT:
f6fa56e2 2336 mconfig->module->max_input_pins = tkn_elem->value;
6277e832
SN		 2337 break;
2338
2339 case SKL_TKN_U8_OUT_QUEUE_COUNT:
f6fa56e2 2340 mconfig->module->max_output_pins = tkn_elem->value;
6277e832
SN		 2341 break;
2342
2343 case SKL_TKN_U8_DYN_IN_PIN:
f6fa56e2
RB		 2344 if (!mconfig->m_in_pin)
2345 mconfig->m_in_pin = devm_kzalloc(dev, MAX_IN_QUEUE *
2346 sizeof(*mconfig->m_in_pin), GFP_KERNEL);
6277e832
SN		 2347 if (!mconfig->m_in_pin)
2348 return -ENOMEM;
2349
f6fa56e2
RB		 2350 skl_tplg_fill_pin_dynamic_val(mconfig->m_in_pin, MAX_IN_QUEUE,
2351 tkn_elem->value);
6277e832
SN		 2352 break;
2353
2354 case SKL_TKN_U8_DYN_OUT_PIN:
f6fa56e2
RB		 2355 if (!mconfig->m_out_pin)
2356 mconfig->m_out_pin = devm_kzalloc(dev, MAX_IN_QUEUE *
2357 sizeof(*mconfig->m_in_pin), GFP_KERNEL);
6277e832
SN		 2358 if (!mconfig->m_out_pin)
2359 return -ENOMEM;
2360
f6fa56e2
RB		 2361 skl_tplg_fill_pin_dynamic_val(mconfig->m_out_pin, MAX_OUT_QUEUE,
2362 tkn_elem->value);
6277e832
SN		 2363 break;
2364
2365 case SKL_TKN_U8_TIME_SLOT:
2366 mconfig->time_slot = tkn_elem->value;
2367 break;
2368
2369 case SKL_TKN_U8_CORE_ID:
2370 mconfig->core_id = tkn_elem->value;
2371
2372 case SKL_TKN_U8_MOD_TYPE:
2373 mconfig->m_type = tkn_elem->value;
2374 break;
2375
2376 case SKL_TKN_U8_DEV_TYPE:
2377 mconfig->dev_type = tkn_elem->value;
2378 break;
2379
2380 case SKL_TKN_U8_HW_CONN_TYPE:
2381 mconfig->hw_conn_type = tkn_elem->value;
2382 break;
2383
2384 case SKL_TKN_U16_MOD_INST_ID:
2385 mconfig->id.instance_id =
2386 tkn_elem->value;
2387 break;
2388
2389 case SKL_TKN_U32_MEM_PAGES:
6277e832 2390 case SKL_TKN_U32_MAX_MCPS:
6277e832 2391 case SKL_TKN_U32_OBS:
6277e832 2392 case SKL_TKN_U32_IBS:
2b79b15c 2393 ret = skl_tplg_fill_res_tkn(dev, tkn_elem, res, pin_index, dir);
f6fa56e2
RB		 2394 if (ret < 0)
2395 return ret;
2396
6277e832
SN		 2397 break;
2398
2399 case SKL_TKN_U32_VBUS_ID:
2400 mconfig->vbus_id = tkn_elem->value;
2401 break;
2402
2403 case SKL_TKN_U32_PARAMS_FIXUP:
2404 mconfig->params_fixup = tkn_elem->value;
2405 break;
2406
2407 case SKL_TKN_U32_CONVERTER:
2408 mconfig->converter = tkn_elem->value;
2409 break;
2410
c0116be3 2411 case SKL_TKN_U32_D0I3_CAPS:
6bd9dcf3
VK		 2412 mconfig->d0i3_caps = tkn_elem->value;
2413 break;
2414
6277e832
SN		 2415 case SKL_TKN_U32_PIPE_ID:
2416 ret = skl_tplg_add_pipe(dev,
2417 mconfig, skl, tkn_elem);
2418
081dc8ab
GS		 2419 if (ret < 0) {
2420 if (ret == -EEXIST) {
2421 is_pipe_exists = 1;
2422 break;
2423 }
6277e832 2424 return is_pipe_exists;
081dc8ab 2425 }
6277e832
SN		 2426
2427 break;
2428
f6fa56e2
RB		 2429 case SKL_TKN_U32_PIPE_CONFIG_ID:
2430 conf_idx = tkn_elem->value;
2431 break;
2432
6277e832
SN		 2433 case SKL_TKN_U32_PIPE_CONN_TYPE:
2434 case SKL_TKN_U32_PIPE_PRIORITY:
2435 case SKL_TKN_U32_PIPE_MEM_PGS:
8a0cb236 2436 case SKL_TKN_U32_PMODE:
f6fa56e2
RB		 2437 case SKL_TKN_U32_PIPE_DIRECTION:
2438 case SKL_TKN_U32_NUM_CONFIGS:
6277e832
SN		 2439 if (is_pipe_exists) {
2440 ret = skl_tplg_fill_pipe_tkn(dev, mconfig->pipe,
2441 tkn_elem->token, tkn_elem->value);
2442 if (ret < 0)
2443 return ret;
2444 }
2445
2446 break;
2447
f6fa56e2
RB		 2448 case SKL_TKN_U32_PATH_MEM_PGS:
2449 case SKL_TKN_U32_CFG_FREQ:
2450 case SKL_TKN_U8_CFG_CHAN:
2451 case SKL_TKN_U8_CFG_BPS:
2452 if (mconfig->pipe->nr_cfgs) {
2453 ret = skl_tplg_fill_pipe_cfg(dev, mconfig->pipe,
2454 tkn_elem->token, tkn_elem->value,
2455 conf_idx, dir);
2456 if (ret < 0)
2457 return ret;
2458 }
2459 break;
2460
2461 case SKL_TKN_CFG_MOD_RES_ID:
2462 mconfig->mod_cfg[conf_idx].res_idx = tkn_elem->value;
2463 break;
2464
2465 case SKL_TKN_CFG_MOD_FMT_ID:
2466 mconfig->mod_cfg[conf_idx].fmt_idx = tkn_elem->value;
2467 break;
2468
6277e832
SN		 2469 /*
2470 * SKL_TKN_U32_DIR_PIN_COUNT token has the value for both
2471 * direction and the pin count. The first four bits represent
2472 * direction and next four the pin count.
2473 */
2474 case SKL_TKN_U32_DIR_PIN_COUNT:
2475 dir = tkn_elem->value & SKL_IN_DIR_BIT_MASK;
2476 pin_index = (tkn_elem->value &
2477 SKL_PIN_COUNT_MASK) >> 4;
2478
2479 break;
2480
2481 case SKL_TKN_U32_FMT_CH:
2482 case SKL_TKN_U32_FMT_FREQ:
2483 case SKL_TKN_U32_FMT_BIT_DEPTH:
2484 case SKL_TKN_U32_FMT_SAMPLE_SIZE:
2485 case SKL_TKN_U32_FMT_CH_CONFIG:
2486 case SKL_TKN_U32_FMT_INTERLEAVE:
2487 case SKL_TKN_U32_FMT_SAMPLE_TYPE:
2488 case SKL_TKN_U32_FMT_CH_MAP:
f6fa56e2 2489 ret = skl_tplg_widget_fill_fmt(dev, iface, tkn_elem->token,
6277e832
SN		 2490 tkn_elem->value, dir, pin_index);
2491
2492 if (ret < 0)
2493 return ret;
2494
2495 break;
2496
2497 case SKL_TKN_U32_PIN_MOD_ID:
2498 case SKL_TKN_U32_PIN_INST_ID:
d9561474 2499 case SKL_TKN_UUID:
6277e832
SN		 2500 ret = skl_tplg_fill_pins_info(dev,
2501 mconfig, tkn_elem, dir,
2502 pin_index);
2503 if (ret < 0)
2504 return ret;
2505
2506 break;
2507
2508 case SKL_TKN_U32_CAPS_SIZE:
2509 mconfig->formats_config.caps_size =
2510 tkn_elem->value;
2511
2512 break;
2513
133e6e5c
SN		 2514 case SKL_TKN_U32_CAPS_SET_PARAMS:
2515 mconfig->formats_config.set_params =
2516 tkn_elem->value;
2517 break;
2518
2519 case SKL_TKN_U32_CAPS_PARAMS_ID:
2520 mconfig->formats_config.param_id =
2521 tkn_elem->value;
2522 break;
2523
6277e832
SN		 2524 case SKL_TKN_U32_PROC_DOMAIN:
2525 mconfig->domain =
2526 tkn_elem->value;
2527
2528 break;
2529
939df3ad
RB		 2530 case SKL_TKN_U32_DMA_BUF_SIZE:
2531 mconfig->dma_buffer_size = tkn_elem->value;
2532 break;
6277e832
SN		 2533
2534 case SKL_TKN_U8_IN_PIN_TYPE:
2535 case SKL_TKN_U8_OUT_PIN_TYPE:
2536 case SKL_TKN_U8_CONN_TYPE:
2537 break;
2538
2539 default:
2540 dev_err(dev, "Token %d not handled\n",
2541 tkn_elem->token);
2542 return -EINVAL;
4cd9899f 2543 }
6277e832
SN		 2544
2545 tkn_count++;
2546
2547 return tkn_count;
2548}
2549
2550/*
2551 * Parse the vendor array for specific tokens to construct
2552 * module private data
2553 */
2554static int skl_tplg_get_tokens(struct device *dev,
2555 char *pvt_data, struct skl *skl,
2556 struct skl_module_cfg *mconfig, int block_size)
2557{
2558 struct snd_soc_tplg_vendor_array *array;
2559 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
2560 int tkn_count = 0, ret;
2561 int off = 0, tuple_size = 0;
d9561474 2562 bool is_module_guid = true;
6277e832
SN		 2563
2564 if (block_size <= 0)
2565 return -EINVAL;
2566
2567 while (tuple_size < block_size) {
2568 array = (struct snd_soc_tplg_vendor_array *)(pvt_data + off);
2569
2570 off += array->size;
2571
2572 switch (array->type) {
2573 case SND_SOC_TPLG_TUPLE_TYPE_STRING:
ecd286a9 2574 dev_warn(dev, "no string tokens expected for skl tplg\n");
6277e832
SN		 2575 continue;
2576
2577 case SND_SOC_TPLG_TUPLE_TYPE_UUID:
d9561474
SP		 2578 if (is_module_guid) {
2579 ret = skl_tplg_get_uuid(dev, mconfig->guid,
2580 array->uuid);
2581 is_module_guid = false;
2582 } else {
2583 ret = skl_tplg_get_token(dev, array->value, skl,
2584 mconfig);
2585 }
2586
6277e832
SN		 2587 if (ret < 0)
2588 return ret;
2589
2590 tuple_size += sizeof(*array->uuid);
2591
2592 continue;
2593
2594 default:
2595 tkn_elem = array->value;
2596 tkn_count = 0;
2597 break;
2598 }
2599
2600 while (tkn_count <= (array->num_elems - 1)) {
2601 ret = skl_tplg_get_token(dev, tkn_elem,
2602 skl, mconfig);
2603
2604 if (ret < 0)
2605 return ret;
2606
2607 tkn_count = tkn_count + ret;
2608 tkn_elem++;
2609 }
2610
2611 tuple_size += tkn_count * sizeof(*tkn_elem);
2612 }
2613
133e6e5c 2614 return off;
6277e832
SN		 2615}
2616
2617/*
2618 * Every data block is preceded by a descriptor to read the number
2619 * of data blocks, they type of the block and it's size
2620 */
2621static int skl_tplg_get_desc_blocks(struct device *dev,
2622 struct snd_soc_tplg_vendor_array *array)
2623{
2624 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
2625
2626 tkn_elem = array->value;
2627
2628 switch (tkn_elem->token) {
2629 case SKL_TKN_U8_NUM_BLOCKS:
2630 case SKL_TKN_U8_BLOCK_TYPE:
2631 case SKL_TKN_U16_BLOCK_SIZE:
2632 return tkn_elem->value;
2633
2634 default:
ecd286a9 2635 dev_err(dev, "Invalid descriptor token %d\n", tkn_elem->token);
6277e832
SN		 2636 break;
2637 }
2638
2639 return -EINVAL;
2640}
2641
2642/*
2643 * Parse the private data for the token and corresponding value.
2644 * The private data can have multiple data blocks. So, a data block
2645 * is preceded by a descriptor for number of blocks and a descriptor
2646 * for the type and size of the suceeding data block.
2647 */
2648static int skl_tplg_get_pvt_data(struct snd_soc_tplg_dapm_widget *tplg_w,
2649 struct skl *skl, struct device *dev,
2650 struct skl_module_cfg *mconfig)
2651{
2652 struct snd_soc_tplg_vendor_array *array;
2653 int num_blocks, block_size = 0, block_type, off = 0;
2654 char *data;
2655 int ret;
2656
2657 /* Read the NUM_DATA_BLOCKS descriptor */
2658 array = (struct snd_soc_tplg_vendor_array *)tplg_w->priv.data;
2659 ret = skl_tplg_get_desc_blocks(dev, array);
2660 if (ret < 0)
2661 return ret;
2662 num_blocks = ret;
2663
2664 off += array->size;
6277e832
SN		 2665 /* Read the BLOCK_TYPE and BLOCK_SIZE descriptor */
2666 while (num_blocks > 0) {
133e6e5c
SN		 2667 array = (struct snd_soc_tplg_vendor_array *)
2668 (tplg_w->priv.data + off);
2669
6277e832
SN		 2670 ret = skl_tplg_get_desc_blocks(dev, array);
2671
2672 if (ret < 0)
2673 return ret;
2674 block_type = ret;
2675 off += array->size;
2676
2677 array = (struct snd_soc_tplg_vendor_array *)
2678 (tplg_w->priv.data + off);
2679
2680 ret = skl_tplg_get_desc_blocks(dev, array);
2681
2682 if (ret < 0)
2683 return ret;
2684 block_size = ret;
2685 off += array->size;
2686
2687 array = (struct snd_soc_tplg_vendor_array *)
2688 (tplg_w->priv.data + off);
2689
2690 data = (tplg_w->priv.data + off);
2691
2692 if (block_type == SKL_TYPE_TUPLE) {
2693 ret = skl_tplg_get_tokens(dev, data,
2694 skl, mconfig, block_size);
2695
2696 if (ret < 0)
2697 return ret;
2698
2699 --num_blocks;
2700 } else {
2701 if (mconfig->formats_config.caps_size > 0)
2702 memcpy(mconfig->formats_config.caps, data,
2703 mconfig->formats_config.caps_size);
2704 --num_blocks;
133e6e5c 2705 ret = mconfig->formats_config.caps_size;
6277e832 2706 }
133e6e5c 2707 off += ret;
6277e832
SN		 2708 }
2709
2710 return 0;
4cd9899f
HS		 2711}
2712
fe3f4442
D		 2713static void skl_clear_pin_config(struct snd_soc_platform *platform,
2714 struct snd_soc_dapm_widget *w)
2715{
2716 int i;
2717 struct skl_module_cfg *mconfig;
2718 struct skl_pipe *pipe;
2719
2720 if (!strncmp(w->dapm->component->name, platform->component.name,
2721 strlen(platform->component.name))) {
2722 mconfig = w->priv;
2723 pipe = mconfig->pipe;
f6fa56e2 2724 for (i = 0; i < mconfig->module->max_input_pins; i++) {
fe3f4442
D		 2725 mconfig->m_in_pin[i].in_use = false;
2726 mconfig->m_in_pin[i].pin_state = SKL_PIN_UNBIND;
2727 }
f6fa56e2 2728 for (i = 0; i < mconfig->module->max_output_pins; i++) {
fe3f4442
D		 2729 mconfig->m_out_pin[i].in_use = false;
2730 mconfig->m_out_pin[i].pin_state = SKL_PIN_UNBIND;
2731 }
2732 pipe->state = SKL_PIPE_INVALID;
2733 mconfig->m_state = SKL_MODULE_UNINIT;
2734 }
2735}
2736
2737void skl_cleanup_resources(struct skl *skl)
2738{
2739 struct skl_sst *ctx = skl->skl_sst;
2740 struct snd_soc_platform *soc_platform = skl->platform;
2741 struct snd_soc_dapm_widget *w;
2742 struct snd_soc_card *card;
2743
2744 if (soc_platform == NULL)
2745 return;
2746
2747 card = soc_platform->component.card;
2748 if (!card || !card->instantiated)
2749 return;
2750
2751 skl->resource.mem = 0;
2752 skl->resource.mcps = 0;
2753
2754 list_for_each_entry(w, &card->widgets, list) {
2755 if (is_skl_dsp_widget_type(w) && (w->priv != NULL))
2756 skl_clear_pin_config(soc_platform, w);
2757 }
2758
2759 skl_clear_module_cnt(ctx->dsp);
2760}
2761
3af36706
VK		 2762/*
2763 * Topology core widget load callback
2764 *
2765 * This is used to save the private data for each widget which gives
2766 * information to the driver about module and pipeline parameters which DSP
2767 * FW expects like ids, resource values, formats etc
2768 */
2769static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
b663a8c5
JK		 2770 struct snd_soc_dapm_widget *w,
2771 struct snd_soc_tplg_dapm_widget *tplg_w)
3af36706
VK		 2772{
2773 int ret;
2774 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
2775 struct skl *skl = ebus_to_skl(ebus);
2776 struct hdac_bus *bus = ebus_to_hbus(ebus);
2777 struct skl_module_cfg *mconfig;
3af36706
VK		 2778
2779 if (!tplg_w->priv.size)
2780 goto bind_event;
2781
2782 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
2783
2784 if (!mconfig)
2785 return -ENOMEM;
2786
f6fa56e2
RB		 2787 if (skl->nr_modules == 0) {
2788 mconfig->module = devm_kzalloc(bus->dev,
2789 sizeof(*mconfig->module), GFP_KERNEL);
2790 if (!mconfig->module)
2791 return -ENOMEM;
2792 }
2793
3af36706 2794 w->priv = mconfig;
09305da9 2795
b7c50555
VK		 2796 /*
2797 * module binary can be loaded later, so set it to query when
2798 * module is load for a use case
2799 */
2800 mconfig->id.module_id = -1;
3af36706 2801
6277e832
SN		 2802 /* Parse private data for tuples */
2803 ret = skl_tplg_get_pvt_data(tplg_w, skl, bus->dev, mconfig);
2804 if (ret < 0)
2805 return ret;
d14700a0
VK		 2806
2807 skl_debug_init_module(skl->debugfs, w, mconfig);
2808
3af36706
VK		 2809bind_event:
2810 if (tplg_w->event_type == 0) {
3373f716 2811 dev_dbg(bus->dev, "ASoC: No event handler required\n");
3af36706
VK		 2812 return 0;
2813 }
2814
2815 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
b663a8c5
JK		 2816 ARRAY_SIZE(skl_tplg_widget_ops),
2817 tplg_w->event_type);
3af36706
VK		 2818
2819 if (ret) {
2820 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
2821 __func__, tplg_w->event_type);
2822 return -EINVAL;
2823 }
2824
2825 return 0;
2826}
2827
140adfba
JK		 2828static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be,
2829 struct snd_soc_tplg_bytes_control *bc)
2830{
2831 struct skl_algo_data *ac;
2832 struct skl_dfw_algo_data *dfw_ac =
2833 (struct skl_dfw_algo_data *)bc->priv.data;
2834
2835 ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL);
2836 if (!ac)
2837 return -ENOMEM;
2838
2839 /* Fill private data */
2840 ac->max = dfw_ac->max;
2841 ac->param_id = dfw_ac->param_id;
2842 ac->set_params = dfw_ac->set_params;
0d682104 2843 ac->size = dfw_ac->max;
140adfba
JK		 2844
2845 if (ac->max) {
2846 ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL);
2847 if (!ac->params)
2848 return -ENOMEM;
2849
edd7ea2d 2850 memcpy(ac->params, dfw_ac->params, ac->max);
140adfba
JK		 2851 }
2852
2853 be->dobj.private = ac;
2854 return 0;
2855}
2856
7a1b749b
D		 2857static int skl_init_enum_data(struct device *dev, struct soc_enum *se,
2858 struct snd_soc_tplg_enum_control *ec)
2859{
2860
2861 void *data;
2862
2863 if (ec->priv.size) {
2864 data = devm_kzalloc(dev, sizeof(ec->priv.size), GFP_KERNEL);
2865 if (!data)
2866 return -ENOMEM;
2867 memcpy(data, ec->priv.data, ec->priv.size);
2868 se->dobj.private = data;
2869 }
2870
2871 return 0;
2872
2873}
2874
140adfba
JK		 2875static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
2876 struct snd_kcontrol_new *kctl,
2877 struct snd_soc_tplg_ctl_hdr *hdr)
2878{
2879 struct soc_bytes_ext *sb;
2880 struct snd_soc_tplg_bytes_control *tplg_bc;
7a1b749b 2881 struct snd_soc_tplg_enum_control *tplg_ec;
140adfba
JK		 2882 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
2883 struct hdac_bus *bus = ebus_to_hbus(ebus);
7a1b749b 2884 struct soc_enum *se;
140adfba
JK		 2885
2886 switch (hdr->ops.info) {
2887 case SND_SOC_TPLG_CTL_BYTES:
2888 tplg_bc = container_of(hdr,
2889 struct snd_soc_tplg_bytes_control, hdr);
2890 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
2891 sb = (struct soc_bytes_ext *)kctl->private_value;
2892 if (tplg_bc->priv.size)
2893 return skl_init_algo_data(
2894 bus->dev, sb, tplg_bc);
2895 }
2896 break;
2897
7a1b749b
D		 2898 case SND_SOC_TPLG_CTL_ENUM:
2899 tplg_ec = container_of(hdr,
2900 struct snd_soc_tplg_enum_control, hdr);
2901 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READWRITE) {
2902 se = (struct soc_enum *)kctl->private_value;
2903 if (tplg_ec->priv.size)
2904 return skl_init_enum_data(bus->dev, se,
2905 tplg_ec);
2906 }
2907 break;
2908
140adfba 2909 default:
4362934a 2910 dev_dbg(bus->dev, "Control load not supported %d:%d:%d\n",
140adfba
JK		 2911 hdr->ops.get, hdr->ops.put, hdr->ops.info);
2912 break;
2913 }
2914
2915 return 0;
2916}
2917
541070ce
SN		 2918static int skl_tplg_fill_str_mfest_tkn(struct device *dev,
2919 struct snd_soc_tplg_vendor_string_elem *str_elem,
eee0e16f 2920 struct skl *skl)
541070ce
SN		 2921{
2922 int tkn_count = 0;
2923 static int ref_count;
2924
2925 switch (str_elem->token) {
2926 case SKL_TKN_STR_LIB_NAME:
eee0e16f 2927 if (ref_count > skl->skl_sst->lib_count - 1) {
541070ce
SN		 2928 ref_count = 0;
2929 return -EINVAL;
2930 }
2931
eee0e16f
JK		 2932 strncpy(skl->skl_sst->lib_info[ref_count].name,
2933 str_elem->string,
2934 ARRAY_SIZE(skl->skl_sst->lib_info[ref_count].name));
541070ce 2935 ref_count++;
541070ce
SN		 2936 break;
2937
2938 default:
ecd286a9 2939 dev_err(dev, "Not a string token %d\n", str_elem->token);
541070ce
SN		 2940 break;
2941 }
db6ed55d 2942 tkn_count++;
541070ce
SN		 2943
2944 return tkn_count;
2945}
2946
2947static int skl_tplg_get_str_tkn(struct device *dev,
2948 struct snd_soc_tplg_vendor_array *array,
eee0e16f 2949 struct skl *skl)
541070ce
SN		 2950{
2951 int tkn_count = 0, ret;
2952 struct snd_soc_tplg_vendor_string_elem *str_elem;
2953
2954 str_elem = (struct snd_soc_tplg_vendor_string_elem *)array->value;
2955 while (tkn_count < array->num_elems) {
eee0e16f 2956 ret = skl_tplg_fill_str_mfest_tkn(dev, str_elem, skl);
541070ce
SN		 2957 str_elem++;
2958
2959 if (ret < 0)
2960 return ret;
2961
2962 tkn_count = tkn_count + ret;
2963 }
2964
2965 return tkn_count;
2966}
2967
db6ed55d
SN		 2968static int skl_tplg_manifest_fill_fmt(struct device *dev,
2969 struct skl_module_iface *fmt,
2970 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2971 u32 dir, int fmt_idx)
2972{
2973 struct skl_module_pin_fmt *dst_fmt;
2974 struct skl_module_fmt *mod_fmt;
2975 int ret;
2976
2977 if (!fmt)
2978 return -EINVAL;
2979
2980 switch (dir) {
2981 case SKL_DIR_IN:
2982 dst_fmt = &fmt->inputs[fmt_idx];
2983 break;
2984
2985 case SKL_DIR_OUT:
2986 dst_fmt = &fmt->outputs[fmt_idx];
2987 break;
2988
2989 default:
2990 dev_err(dev, "Invalid direction: %d\n", dir);
2991 return -EINVAL;
2992 }
2993
2994 mod_fmt = &dst_fmt->fmt;
2995
2996 switch (tkn_elem->token) {
2997 case SKL_TKN_MM_U32_INTF_PIN_ID:
2998 dst_fmt->id = tkn_elem->value;
2999 break;
3000
3001 default:
3002 ret = skl_tplg_fill_fmt(dev, mod_fmt, tkn_elem->token,
3003 tkn_elem->value);
3004 if (ret < 0)
3005 return ret;
3006 break;
3007 }
3008
3009 return 0;
3010}
3011
3012static int skl_tplg_fill_mod_info(struct device *dev,
3013 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
3014 struct skl_module *mod)
3015{
3016
3017 if (!mod)
3018 return -EINVAL;
3019
3020 switch (tkn_elem->token) {
3021 case SKL_TKN_U8_IN_PIN_TYPE:
3022 mod->input_pin_type = tkn_elem->value;
3023 break;
3024
3025 case SKL_TKN_U8_OUT_PIN_TYPE:
3026 mod->output_pin_type = tkn_elem->value;
3027 break;
3028
3029 case SKL_TKN_U8_IN_QUEUE_COUNT:
3030 mod->max_input_pins = tkn_elem->value;
3031 break;
3032
3033 case SKL_TKN_U8_OUT_QUEUE_COUNT:
3034 mod->max_output_pins = tkn_elem->value;
3035 break;
3036
3037 case SKL_TKN_MM_U8_NUM_RES:
3038 mod->nr_resources = tkn_elem->value;
3039 break;
3040
3041 case SKL_TKN_MM_U8_NUM_INTF:
3042 mod->nr_interfaces = tkn_elem->value;
3043 break;
3044
3045 default:
3046 dev_err(dev, "Invalid mod info token %d", tkn_elem->token);
3047 return -EINVAL;
3048 }
3049
3050 return 0;
3051}
3052
3053
541070ce
SN		 3054static int skl_tplg_get_int_tkn(struct device *dev,
3055 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
eee0e16f 3056 struct skl *skl)
541070ce 3057{
43762355 3058 int tkn_count = 0, ret, size;
db6ed55d
SN		 3059 static int mod_idx, res_val_idx, intf_val_idx, dir, pin_idx;
3060 struct skl_module_res *res = NULL;
3061 struct skl_module_iface *fmt = NULL;
3062 struct skl_module *mod = NULL;
43762355
PT		 3063 static struct skl_astate_param *astate_table;
3064 static int astate_cfg_idx, count;
db6ed55d
SN		 3065 int i;
3066
3067 if (skl->modules) {
3068 mod = skl->modules[mod_idx];
3069 res = &mod->resources[res_val_idx];
3070 fmt = &mod->formats[intf_val_idx];
3071 }
541070ce
SN		 3072
3073 switch (tkn_elem->token) {
3074 case SKL_TKN_U32_LIB_COUNT:
eee0e16f 3075 skl->skl_sst->lib_count = tkn_elem->value;
db6ed55d
SN		 3076 break;
3077
3078 case SKL_TKN_U8_NUM_MOD:
3079 skl->nr_modules = tkn_elem->value;
3080 skl->modules = devm_kcalloc(dev, skl->nr_modules,
3081 sizeof(*skl->modules), GFP_KERNEL);
3082 if (!skl->modules)
3083 return -ENOMEM;
3084
3085 for (i = 0; i < skl->nr_modules; i++) {
3086 skl->modules[i] = devm_kzalloc(dev,
3087 sizeof(struct skl_module), GFP_KERNEL);
3088 if (!skl->modules[i])
3089 return -ENOMEM;
3090 }
3091 break;
3092
3093 case SKL_TKN_MM_U8_MOD_IDX:
3094 mod_idx = tkn_elem->value;
3095 break;
3096
43762355
PT		 3097 case SKL_TKN_U32_ASTATE_COUNT:
3098 if (astate_table != NULL) {
3099 dev_err(dev, "More than one entry for A-State count");
3100 return -EINVAL;
3101 }
3102
3103 if (tkn_elem->value > SKL_MAX_ASTATE_CFG) {
3104 dev_err(dev, "Invalid A-State count %d\n",
3105 tkn_elem->value);
3106 return -EINVAL;
3107 }
3108
3109 size = tkn_elem->value * sizeof(struct skl_astate_param) +
3110 sizeof(count);
3111 skl->cfg.astate_cfg = devm_kzalloc(dev, size, GFP_KERNEL);
3112 if (!skl->cfg.astate_cfg)
3113 return -ENOMEM;
3114
3115 astate_table = skl->cfg.astate_cfg->astate_table;
3116 count = skl->cfg.astate_cfg->count = tkn_elem->value;
3117 break;
3118
3119 case SKL_TKN_U32_ASTATE_IDX:
3120 if (tkn_elem->value >= count) {
3121 dev_err(dev, "Invalid A-State index %d\n",
3122 tkn_elem->value);
3123 return -EINVAL;
3124 }
3125
3126 astate_cfg_idx = tkn_elem->value;
3127 break;
3128
3129 case SKL_TKN_U32_ASTATE_KCPS:
3130 astate_table[astate_cfg_idx].kcps = tkn_elem->value;
3131 break;
3132
3133 case SKL_TKN_U32_ASTATE_CLK_SRC:
3134 astate_table[astate_cfg_idx].clk_src = tkn_elem->value;
3135 break;
3136
db6ed55d
SN		 3137 case SKL_TKN_U8_IN_PIN_TYPE:
3138 case SKL_TKN_U8_OUT_PIN_TYPE:
3139 case SKL_TKN_U8_IN_QUEUE_COUNT:
3140 case SKL_TKN_U8_OUT_QUEUE_COUNT:
3141 case SKL_TKN_MM_U8_NUM_RES:
3142 case SKL_TKN_MM_U8_NUM_INTF:
3143 ret = skl_tplg_fill_mod_info(dev, tkn_elem, mod);
3144 if (ret < 0)
3145 return ret;
3146 break;
3147
3148 case SKL_TKN_U32_DIR_PIN_COUNT:
3149 dir = tkn_elem->value & SKL_IN_DIR_BIT_MASK;
3150 pin_idx = (tkn_elem->value & SKL_PIN_COUNT_MASK) >> 4;
3151 break;
3152
3153 case SKL_TKN_MM_U32_RES_ID:
3154 if (!res)
3155 return -EINVAL;
3156
3157 res->id = tkn_elem->value;
3158 res_val_idx = tkn_elem->value;
3159 break;
3160
3161 case SKL_TKN_MM_U32_FMT_ID:
3162 if (!fmt)
3163 return -EINVAL;
3164
3165 fmt->fmt_idx = tkn_elem->value;
3166 intf_val_idx = tkn_elem->value;
3167 break;
3168
3169 case SKL_TKN_MM_U32_CPS:
3170 case SKL_TKN_MM_U32_DMA_SIZE:
3171 case SKL_TKN_MM_U32_CPC:
3172 case SKL_TKN_U32_MEM_PAGES:
3173 case SKL_TKN_U32_OBS:
3174 case SKL_TKN_U32_IBS:
3175 case SKL_TKN_MM_U32_RES_PIN_ID:
3176 case SKL_TKN_MM_U32_PIN_BUF:
3177 ret = skl_tplg_fill_res_tkn(dev, tkn_elem, res, pin_idx, dir);
3178 if (ret < 0)
3179 return ret;
3180
3181 break;
3182
3183 case SKL_TKN_MM_U32_NUM_IN_FMT:
3184 if (!fmt)
3185 return -EINVAL;
3186
3187 res->nr_input_pins = tkn_elem->value;
3188 break;
3189
3190 case SKL_TKN_MM_U32_NUM_OUT_FMT:
3191 if (!fmt)
3192 return -EINVAL;
3193
3194 res->nr_output_pins = tkn_elem->value;
3195 break;
3196
3197 case SKL_TKN_U32_FMT_CH:
3198 case SKL_TKN_U32_FMT_FREQ:
3199 case SKL_TKN_U32_FMT_BIT_DEPTH:
3200 case SKL_TKN_U32_FMT_SAMPLE_SIZE:
3201 case SKL_TKN_U32_FMT_CH_CONFIG:
3202 case SKL_TKN_U32_FMT_INTERLEAVE:
3203 case SKL_TKN_U32_FMT_SAMPLE_TYPE:
3204 case SKL_TKN_U32_FMT_CH_MAP:
3205 case SKL_TKN_MM_U32_INTF_PIN_ID:
3206 ret = skl_tplg_manifest_fill_fmt(dev, fmt, tkn_elem,
3207 dir, pin_idx);
3208 if (ret < 0)
3209 return ret;
541070ce
SN		 3210 break;
3211
3212 default:
ecd286a9 3213 dev_err(dev, "Not a manifest token %d\n", tkn_elem->token);
541070ce
SN		 3214 return -EINVAL;
3215 }
db6ed55d 3216 tkn_count++;
541070ce
SN		 3217
3218 return tkn_count;
3219}
3220
db6ed55d
SN		 3221static int skl_tplg_get_manifest_uuid(struct device *dev,
3222 struct skl *skl,
3223 struct snd_soc_tplg_vendor_uuid_elem *uuid_tkn)
3224{
3225 static int ref_count;
3226 struct skl_module *mod;
3227
3228 if (uuid_tkn->token == SKL_TKN_UUID) {
3229 mod = skl->modules[ref_count];
3230 memcpy(&mod->uuid, &uuid_tkn->uuid, sizeof(uuid_tkn->uuid));
3231 ref_count++;
3232 } else {
3233 dev_err(dev, "Not an UUID token tkn %d\n", uuid_tkn->token);
3234 return -EINVAL;
3235 }
3236
3237 return 0;
3238}
3239
541070ce
SN		 3240/*
3241 * Fill the manifest structure by parsing the tokens based on the
3242 * type.
3243 */
3244static int skl_tplg_get_manifest_tkn(struct device *dev,
eee0e16f 3245 char *pvt_data, struct skl *skl,
541070ce
SN		 3246 int block_size)
3247{
3248 int tkn_count = 0, ret;
3249 int off = 0, tuple_size = 0;
3250 struct snd_soc_tplg_vendor_array *array;
3251 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
3252
3253 if (block_size <= 0)
3254 return -EINVAL;
3255
3256 while (tuple_size < block_size) {
3257 array = (struct snd_soc_tplg_vendor_array *)(pvt_data + off);
3258 off += array->size;
3259 switch (array->type) {
3260 case SND_SOC_TPLG_TUPLE_TYPE_STRING:
eee0e16f 3261 ret = skl_tplg_get_str_tkn(dev, array, skl);
541070ce
SN		 3262
3263 if (ret < 0)
3264 return ret;
0a716776 3265 tkn_count = ret;
541070ce
SN		 3266
3267 tuple_size += tkn_count *
3268 sizeof(struct snd_soc_tplg_vendor_string_elem);
3269 continue;
3270
3271 case SND_SOC_TPLG_TUPLE_TYPE_UUID:
db6ed55d
SN		 3272 ret = skl_tplg_get_manifest_uuid(dev, skl, array->uuid);
3273 if (ret < 0)
3274 return ret;
3275
3276 tuple_size += sizeof(*array->uuid);
541070ce
SN		 3277 continue;
3278
3279 default:
3280 tkn_elem = array->value;
3281 tkn_count = 0;
3282 break;
3283 }
3284
3285 while (tkn_count <= array->num_elems - 1) {
3286 ret = skl_tplg_get_int_tkn(dev,
eee0e16f 3287 tkn_elem, skl);
541070ce
SN		 3288 if (ret < 0)
3289 return ret;
3290
3291 tkn_count = tkn_count + ret;
3292 tkn_elem++;
541070ce 3293 }
9fc129f6 3294 tuple_size += (tkn_count * sizeof(*tkn_elem));
541070ce
SN		 3295 tkn_count = 0;
3296 }
3297
9fc129f6 3298 return off;
541070ce
SN		 3299}
3300
3301/*
3302 * Parse manifest private data for tokens. The private data block is
3303 * preceded by descriptors for type and size of data block.
3304 */
3305static int skl_tplg_get_manifest_data(struct snd_soc_tplg_manifest *manifest,
eee0e16f 3306 struct device *dev, struct skl *skl)
541070ce
SN		 3307{
3308 struct snd_soc_tplg_vendor_array *array;
3309 int num_blocks, block_size = 0, block_type, off = 0;
3310 char *data;
3311 int ret;
3312
3313 /* Read the NUM_DATA_BLOCKS descriptor */
3314 array = (struct snd_soc_tplg_vendor_array *)manifest->priv.data;
3315 ret = skl_tplg_get_desc_blocks(dev, array);
3316 if (ret < 0)
3317 return ret;
3318 num_blocks = ret;
3319
3320 off += array->size;
541070ce
SN		 3321 /* Read the BLOCK_TYPE and BLOCK_SIZE descriptor */
3322 while (num_blocks > 0) {
9fc129f6
SN		 3323 array = (struct snd_soc_tplg_vendor_array *)
3324 (manifest->priv.data + off);
541070ce
SN		 3325 ret = skl_tplg_get_desc_blocks(dev, array);
3326
3327 if (ret < 0)
3328 return ret;
3329 block_type = ret;
3330 off += array->size;
3331
3332 array = (struct snd_soc_tplg_vendor_array *)
3333 (manifest->priv.data + off);
3334
3335 ret = skl_tplg_get_desc_blocks(dev, array);
3336
3337 if (ret < 0)
3338 return ret;
3339 block_size = ret;
3340 off += array->size;
3341
3342 array = (struct snd_soc_tplg_vendor_array *)
3343 (manifest->priv.data + off);
3344
3345 data = (manifest->priv.data + off);
3346
3347 if (block_type == SKL_TYPE_TUPLE) {
eee0e16f 3348 ret = skl_tplg_get_manifest_tkn(dev, data, skl,
541070ce
SN		 3349 block_size);
3350
3351 if (ret < 0)
3352 return ret;
3353
3354 --num_blocks;
3355 } else {
3356 return -EINVAL;
3357 }
9fc129f6 3358 off += ret;
541070ce
SN		 3359 }
3360
3361 return 0;
3362}
3363
15ecaba9
K		 3364static int skl_manifest_load(struct snd_soc_component *cmpnt,
3365 struct snd_soc_tplg_manifest *manifest)
3366{
15ecaba9
K		 3367 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
3368 struct hdac_bus *bus = ebus_to_hbus(ebus);
3369 struct skl *skl = ebus_to_skl(ebus);
15ecaba9 3370
c15ad605
VK		 3371 /* proceed only if we have private data defined */
3372 if (manifest->priv.size == 0)
3373 return 0;
3374
eee0e16f 3375 skl_tplg_get_manifest_data(manifest, bus->dev, skl);
15ecaba9 3376
eee0e16f 3377 if (skl->skl_sst->lib_count > SKL_MAX_LIB) {
15ecaba9 3378 dev_err(bus->dev, "Exceeding max Library count. Got:%d\n",
eee0e16f
JK		 3379 skl->skl_sst->lib_count);
3380 return -EINVAL;
15ecaba9
K		 3381 }
3382
eee0e16f 3383 return 0;
15ecaba9
K		 3384}
3385
3af36706
VK		 3386static struct snd_soc_tplg_ops skl_tplg_ops = {
3387 .widget_load = skl_tplg_widget_load,
140adfba
JK		 3388 .control_load = skl_tplg_control_load,
3389 .bytes_ext_ops = skl_tlv_ops,
3390 .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops),
7a1b749b
D		 3391 .io_ops = skl_tplg_kcontrol_ops,
3392 .io_ops_count = ARRAY_SIZE(skl_tplg_kcontrol_ops),
15ecaba9 3393 .manifest = skl_manifest_load,
606e21fd 3394 .dai_load = skl_dai_load,
3af36706
VK		 3395};
3396
287af4f9
JK		 3397/*
3398 * A pipe can have multiple modules, each of them will be a DAPM widget as
3399 * well. While managing a pipeline we need to get the list of all the
3400 * widgets in a pipelines, so this helper - skl_tplg_create_pipe_widget_list()
3401 * helps to get the SKL type widgets in that pipeline
3402 */
3403static int skl_tplg_create_pipe_widget_list(struct snd_soc_platform *platform)
3404{
3405 struct snd_soc_dapm_widget *w;
3406 struct skl_module_cfg *mcfg = NULL;
3407 struct skl_pipe_module *p_module = NULL;
3408 struct skl_pipe *pipe;
3409
3410 list_for_each_entry(w, &platform->component.card->widgets, list) {
3411 if (is_skl_dsp_widget_type(w) && w->priv != NULL) {
3412 mcfg = w->priv;
3413 pipe = mcfg->pipe;
3414
3415 p_module = devm_kzalloc(platform->dev,
3416 sizeof(*p_module), GFP_KERNEL);
3417 if (!p_module)
3418 return -ENOMEM;
3419
3420 p_module->w = w;
3421 list_add_tail(&p_module->node, &pipe->w_list);
3422 }
3423 }
3424
3425 return 0;
3426}
3427
f0aa94fa
JK		 3428static void skl_tplg_set_pipe_type(struct skl *skl, struct skl_pipe *pipe)
3429{
3430 struct skl_pipe_module *w_module;
3431 struct snd_soc_dapm_widget *w;
3432 struct skl_module_cfg *mconfig;
3433 bool host_found = false, link_found = false;
3434
3435 list_for_each_entry(w_module, &pipe->w_list, node) {
3436 w = w_module->w;
3437 mconfig = w->priv;
3438
3439 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
3440 host_found = true;
3441 else if (mconfig->dev_type != SKL_DEVICE_NONE)
3442 link_found = true;
3443 }
3444
3445 if (host_found && link_found)
3446 pipe->passthru = true;
3447 else
3448 pipe->passthru = false;
3449}
3450
3af36706
VK		 3451/* This will be read from topology manifest, currently defined here */
3452#define SKL_MAX_MCPS 30000000
3453#define SKL_FW_MAX_MEM 1000000
3454
3455/*
3456 * SKL topology init routine
3457 */
3458int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
3459{
3460 int ret;
3461 const struct firmware *fw;
3462 struct hdac_bus *bus = ebus_to_hbus(ebus);
3463 struct skl *skl = ebus_to_skl(ebus);
f0aa94fa 3464 struct skl_pipeline *ppl;
3af36706 3465
4b235c43 3466 ret = request_firmware(&fw, skl->tplg_name, bus->dev);
3af36706 3467 if (ret < 0) {
19de7179 3468 dev_info(bus->dev, "tplg fw %s load failed with %d, falling back to dfw_sst.bin",
4b235c43
VK		 3469 skl->tplg_name, ret);
3470 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
3471 if (ret < 0) {
3472 dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n",
3473 "dfw_sst.bin", ret);
3474 return ret;
3475 }
3af36706
VK		 3476 }
3477
3478 /*
3479 * The complete tplg for SKL is loaded as index 0, we don't use
3480 * any other index
3481 */
b663a8c5
JK		 3482 ret = snd_soc_tplg_component_load(&platform->component,
3483 &skl_tplg_ops, fw, 0);
3af36706
VK		 3484 if (ret < 0) {
3485 dev_err(bus->dev, "tplg component load failed%d\n", ret);
c14a82c7 3486 release_firmware(fw);
3af36706
VK		 3487 return -EINVAL;
3488 }
3489
3490 skl->resource.max_mcps = SKL_MAX_MCPS;
3491 skl->resource.max_mem = SKL_FW_MAX_MEM;
3492
d8018361 3493 skl->tplg = fw;
287af4f9
JK		 3494 ret = skl_tplg_create_pipe_widget_list(platform);
3495 if (ret < 0)
3496 return ret;
d8018361 3497
f0aa94fa
JK		 3498 list_for_each_entry(ppl, &skl->ppl_list, node)
3499 skl_tplg_set_pipe_type(skl, ppl->pipe);
d8018361 3500
3af36706
VK		 3501 return 0;
3502}
Ubuntu Focal Linux kernel mirror