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Commit | Line | Data |
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2e74796a JN |
1 | /* |
2 | * omap-pcm.c -- ALSA PCM interface for the OMAP SoC | |
3 | * | |
4 | * Copyright (C) 2008 Nokia Corporation | |
5 | * | |
7ec41ee5 | 6 | * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com> |
1c7687b9 | 7 | * Peter Ujfalusi <peter.ujfalusi@ti.com> |
2e74796a JN |
8 | * |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * version 2 as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
21 | * 02110-1301 USA | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/dma-mapping.h> | |
5a0e3ad6 | 26 | #include <linux/slab.h> |
da155d5b | 27 | #include <linux/module.h> |
2e74796a JN |
28 | #include <sound/core.h> |
29 | #include <sound/pcm.h> | |
30 | #include <sound/pcm_params.h> | |
31 | #include <sound/soc.h> | |
32 | ||
7d7e1eba | 33 | #include <plat/cpu.h> |
ce491cf8 | 34 | #include <plat/dma.h> |
2e74796a JN |
35 | #include "omap-pcm.h" |
36 | ||
37 | static const struct snd_pcm_hardware omap_pcm_hardware = { | |
38 | .info = SNDRV_PCM_INFO_MMAP | | |
39 | SNDRV_PCM_INFO_MMAP_VALID | | |
40 | SNDRV_PCM_INFO_INTERLEAVED | | |
41 | SNDRV_PCM_INFO_PAUSE | | |
b4173824 PU |
42 | SNDRV_PCM_INFO_RESUME | |
43 | SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, | |
e17dd32f MLC |
44 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
45 | SNDRV_PCM_FMTBIT_S32_LE, | |
2e74796a JN |
46 | .period_bytes_min = 32, |
47 | .period_bytes_max = 64 * 1024, | |
48 | .periods_min = 2, | |
49 | .periods_max = 255, | |
50 | .buffer_bytes_max = 128 * 1024, | |
51 | }; | |
52 | ||
53 | struct omap_runtime_data { | |
54 | spinlock_t lock; | |
55 | struct omap_pcm_dma_data *dma_data; | |
56 | int dma_ch; | |
57 | int period_index; | |
58 | }; | |
59 | ||
60 | static void omap_pcm_dma_irq(int ch, u16 stat, void *data) | |
61 | { | |
62 | struct snd_pcm_substream *substream = data; | |
63 | struct snd_pcm_runtime *runtime = substream->runtime; | |
64 | struct omap_runtime_data *prtd = runtime->private_data; | |
65 | unsigned long flags; | |
66 | ||
b5442a75 | 67 | if ((cpu_is_omap1510())) { |
2e74796a | 68 | /* |
64844a6a JK |
69 | * OMAP1510 doesn't fully support DMA progress counter |
70 | * and there is no software emulation implemented yet, | |
b5442a75 | 71 | * so have to maintain our own progress counters |
64844a6a | 72 | * that can be used by omap_pcm_pointer() instead. |
2e74796a JN |
73 | */ |
74 | spin_lock_irqsave(&prtd->lock, flags); | |
471e3dec JK |
75 | if ((stat == OMAP_DMA_LAST_IRQ) && |
76 | (prtd->period_index == runtime->periods - 1)) { | |
77 | /* we are in sync, do nothing */ | |
78 | spin_unlock_irqrestore(&prtd->lock, flags); | |
79 | return; | |
80 | } | |
2e74796a | 81 | if (prtd->period_index >= 0) { |
471e3dec JK |
82 | if (stat & OMAP_DMA_BLOCK_IRQ) { |
83 | /* end of buffer reached, loop back */ | |
84 | prtd->period_index = 0; | |
85 | } else if (stat & OMAP_DMA_LAST_IRQ) { | |
86 | /* update the counter for the last period */ | |
87 | prtd->period_index = runtime->periods - 1; | |
88 | } else if (++prtd->period_index >= runtime->periods) { | |
89 | /* end of buffer missed? loop back */ | |
2e74796a | 90 | prtd->period_index = 0; |
2e74796a JN |
91 | } |
92 | } | |
93 | spin_unlock_irqrestore(&prtd->lock, flags); | |
94 | } | |
95 | ||
96 | snd_pcm_period_elapsed(substream); | |
97 | } | |
98 | ||
99 | /* this may get called several times by oss emulation */ | |
100 | static int omap_pcm_hw_params(struct snd_pcm_substream *substream, | |
101 | struct snd_pcm_hw_params *params) | |
102 | { | |
103 | struct snd_pcm_runtime *runtime = substream->runtime; | |
104 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
105 | struct omap_runtime_data *prtd = runtime->private_data; | |
5f712b2b | 106 | struct omap_pcm_dma_data *dma_data; |
f0fba2ad | 107 | |
2e74796a JN |
108 | int err = 0; |
109 | ||
f0fba2ad | 110 | dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); |
5f712b2b | 111 | |
1b4246a1 JS |
112 | /* return if this is a bufferless transfer e.g. |
113 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
2e74796a | 114 | if (!dma_data) |
1b4246a1 | 115 | return 0; |
2e74796a JN |
116 | |
117 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); | |
118 | runtime->dma_bytes = params_buffer_bytes(params); | |
119 | ||
120 | if (prtd->dma_data) | |
121 | return 0; | |
122 | prtd->dma_data = dma_data; | |
123 | err = omap_request_dma(dma_data->dma_req, dma_data->name, | |
124 | omap_pcm_dma_irq, substream, &prtd->dma_ch); | |
64844a6a | 125 | if (!err) { |
2e74796a JN |
126 | /* |
127 | * Link channel with itself so DMA doesn't need any | |
128 | * reprogramming while looping the buffer | |
129 | */ | |
130 | omap_dma_link_lch(prtd->dma_ch, prtd->dma_ch); | |
131 | } | |
132 | ||
133 | return err; | |
134 | } | |
135 | ||
136 | static int omap_pcm_hw_free(struct snd_pcm_substream *substream) | |
137 | { | |
138 | struct snd_pcm_runtime *runtime = substream->runtime; | |
139 | struct omap_runtime_data *prtd = runtime->private_data; | |
140 | ||
141 | if (prtd->dma_data == NULL) | |
142 | return 0; | |
143 | ||
64844a6a | 144 | omap_dma_unlink_lch(prtd->dma_ch, prtd->dma_ch); |
2e74796a JN |
145 | omap_free_dma(prtd->dma_ch); |
146 | prtd->dma_data = NULL; | |
147 | ||
148 | snd_pcm_set_runtime_buffer(substream, NULL); | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
153 | static int omap_pcm_prepare(struct snd_pcm_substream *substream) | |
154 | { | |
155 | struct snd_pcm_runtime *runtime = substream->runtime; | |
156 | struct omap_runtime_data *prtd = runtime->private_data; | |
157 | struct omap_pcm_dma_data *dma_data = prtd->dma_data; | |
158 | struct omap_dma_channel_params dma_params; | |
e17dd32f | 159 | int bytes; |
2e74796a | 160 | |
1b4246a1 JS |
161 | /* return if this is a bufferless transfer e.g. |
162 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
163 | if (!prtd->dma_data) | |
164 | return 0; | |
165 | ||
2e74796a | 166 | memset(&dma_params, 0, sizeof(dma_params)); |
e17dd32f | 167 | dma_params.data_type = dma_data->data_type; |
2e74796a | 168 | dma_params.trigger = dma_data->dma_req; |
caebc0cb | 169 | dma_params.sync_mode = dma_data->sync_mode; |
2e74796a JN |
170 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
171 | dma_params.src_amode = OMAP_DMA_AMODE_POST_INC; | |
172 | dma_params.dst_amode = OMAP_DMA_AMODE_CONSTANT; | |
173 | dma_params.src_or_dst_synch = OMAP_DMA_DST_SYNC; | |
174 | dma_params.src_start = runtime->dma_addr; | |
175 | dma_params.dst_start = dma_data->port_addr; | |
9d37484c | 176 | dma_params.dst_port = OMAP_DMA_PORT_MPUI; |
e17dd32f | 177 | dma_params.dst_fi = dma_data->packet_size; |
2e74796a JN |
178 | } else { |
179 | dma_params.src_amode = OMAP_DMA_AMODE_CONSTANT; | |
180 | dma_params.dst_amode = OMAP_DMA_AMODE_POST_INC; | |
181 | dma_params.src_or_dst_synch = OMAP_DMA_SRC_SYNC; | |
182 | dma_params.src_start = dma_data->port_addr; | |
183 | dma_params.dst_start = runtime->dma_addr; | |
9d37484c | 184 | dma_params.src_port = OMAP_DMA_PORT_MPUI; |
e17dd32f | 185 | dma_params.src_fi = dma_data->packet_size; |
2e74796a JN |
186 | } |
187 | /* | |
188 | * Set DMA transfer frame size equal to ALSA period size and frame | |
189 | * count as no. of ALSA periods. Then with DMA frame interrupt enabled, | |
190 | * we can transfer the whole ALSA buffer with single DMA transfer but | |
191 | * still can get an interrupt at each period bounary | |
192 | */ | |
e17dd32f MLC |
193 | bytes = snd_pcm_lib_period_bytes(substream); |
194 | dma_params.elem_count = bytes >> dma_data->data_type; | |
2e74796a JN |
195 | dma_params.frame_count = runtime->periods; |
196 | omap_set_dma_params(prtd->dma_ch, &dma_params); | |
197 | ||
b5442a75 | 198 | if ((cpu_is_omap1510())) |
471e3dec JK |
199 | omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ | |
200 | OMAP_DMA_LAST_IRQ | OMAP_DMA_BLOCK_IRQ); | |
b4173824 | 201 | else if (!substream->runtime->no_period_wakeup) |
471e3dec | 202 | omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ); |
b1b6cffe PU |
203 | else { |
204 | /* | |
205 | * No period wakeup: | |
206 | * we need to disable BLOCK_IRQ, which is enabled by the omap | |
207 | * dma core at request dma time. | |
208 | */ | |
209 | omap_disable_dma_irq(prtd->dma_ch, OMAP_DMA_BLOCK_IRQ); | |
210 | } | |
2e74796a | 211 | |
4d187fb8 JK |
212 | if (!(cpu_class_is_omap1())) { |
213 | omap_set_dma_src_burst_mode(prtd->dma_ch, | |
214 | OMAP_DMA_DATA_BURST_16); | |
215 | omap_set_dma_dest_burst_mode(prtd->dma_ch, | |
216 | OMAP_DMA_DATA_BURST_16); | |
217 | } | |
9599d485 | 218 | |
2e74796a JN |
219 | return 0; |
220 | } | |
221 | ||
222 | static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd) | |
223 | { | |
224 | struct snd_pcm_runtime *runtime = substream->runtime; | |
225 | struct omap_runtime_data *prtd = runtime->private_data; | |
caebc0cb | 226 | struct omap_pcm_dma_data *dma_data = prtd->dma_data; |
21dff434 | 227 | unsigned long flags; |
2e74796a JN |
228 | int ret = 0; |
229 | ||
21dff434 | 230 | spin_lock_irqsave(&prtd->lock, flags); |
2e74796a JN |
231 | switch (cmd) { |
232 | case SNDRV_PCM_TRIGGER_START: | |
233 | case SNDRV_PCM_TRIGGER_RESUME: | |
234 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
235 | prtd->period_index = 0; | |
caebc0cb EV |
236 | /* Configure McBSP internal buffer usage */ |
237 | if (dma_data->set_threshold) | |
238 | dma_data->set_threshold(substream); | |
239 | ||
2e74796a JN |
240 | omap_start_dma(prtd->dma_ch); |
241 | break; | |
242 | ||
243 | case SNDRV_PCM_TRIGGER_STOP: | |
244 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
245 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
246 | prtd->period_index = -1; | |
247 | omap_stop_dma(prtd->dma_ch); | |
248 | break; | |
249 | default: | |
250 | ret = -EINVAL; | |
251 | } | |
21dff434 | 252 | spin_unlock_irqrestore(&prtd->lock, flags); |
2e74796a JN |
253 | |
254 | return ret; | |
255 | } | |
256 | ||
257 | static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream) | |
258 | { | |
259 | struct snd_pcm_runtime *runtime = substream->runtime; | |
260 | struct omap_runtime_data *prtd = runtime->private_data; | |
261 | dma_addr_t ptr; | |
262 | snd_pcm_uframes_t offset; | |
263 | ||
b5442a75 JK |
264 | if (cpu_is_omap1510()) { |
265 | offset = prtd->period_index * runtime->period_size; | |
266 | } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { | |
2e74796a | 267 | ptr = omap_get_dma_dst_pos(prtd->dma_ch); |
1bdd7419 | 268 | offset = bytes_to_frames(runtime, ptr - runtime->dma_addr); |
b5442a75 | 269 | } else { |
1bdd7419 JK |
270 | ptr = omap_get_dma_src_pos(prtd->dma_ch); |
271 | offset = bytes_to_frames(runtime, ptr - runtime->dma_addr); | |
b5442a75 | 272 | } |
2e74796a | 273 | |
2e74796a JN |
274 | if (offset >= runtime->buffer_size) |
275 | offset = 0; | |
276 | ||
277 | return offset; | |
278 | } | |
279 | ||
280 | static int omap_pcm_open(struct snd_pcm_substream *substream) | |
281 | { | |
282 | struct snd_pcm_runtime *runtime = substream->runtime; | |
283 | struct omap_runtime_data *prtd; | |
284 | int ret; | |
285 | ||
286 | snd_soc_set_runtime_hwparams(substream, &omap_pcm_hardware); | |
287 | ||
288 | /* Ensure that buffer size is a multiple of period size */ | |
289 | ret = snd_pcm_hw_constraint_integer(runtime, | |
290 | SNDRV_PCM_HW_PARAM_PERIODS); | |
291 | if (ret < 0) | |
292 | goto out; | |
293 | ||
19b3f316 | 294 | prtd = kzalloc(sizeof(*prtd), GFP_KERNEL); |
2e74796a JN |
295 | if (prtd == NULL) { |
296 | ret = -ENOMEM; | |
297 | goto out; | |
298 | } | |
299 | spin_lock_init(&prtd->lock); | |
300 | runtime->private_data = prtd; | |
301 | ||
302 | out: | |
303 | return ret; | |
304 | } | |
305 | ||
306 | static int omap_pcm_close(struct snd_pcm_substream *substream) | |
307 | { | |
308 | struct snd_pcm_runtime *runtime = substream->runtime; | |
309 | ||
310 | kfree(runtime->private_data); | |
311 | return 0; | |
312 | } | |
313 | ||
314 | static int omap_pcm_mmap(struct snd_pcm_substream *substream, | |
315 | struct vm_area_struct *vma) | |
316 | { | |
317 | struct snd_pcm_runtime *runtime = substream->runtime; | |
318 | ||
319 | return dma_mmap_writecombine(substream->pcm->card->dev, vma, | |
320 | runtime->dma_area, | |
321 | runtime->dma_addr, | |
322 | runtime->dma_bytes); | |
323 | } | |
324 | ||
b2a19d02 | 325 | static struct snd_pcm_ops omap_pcm_ops = { |
2e74796a JN |
326 | .open = omap_pcm_open, |
327 | .close = omap_pcm_close, | |
328 | .ioctl = snd_pcm_lib_ioctl, | |
329 | .hw_params = omap_pcm_hw_params, | |
330 | .hw_free = omap_pcm_hw_free, | |
331 | .prepare = omap_pcm_prepare, | |
332 | .trigger = omap_pcm_trigger, | |
333 | .pointer = omap_pcm_pointer, | |
334 | .mmap = omap_pcm_mmap, | |
335 | }; | |
336 | ||
a152ff24 | 337 | static u64 omap_pcm_dmamask = DMA_BIT_MASK(64); |
2e74796a JN |
338 | |
339 | static int omap_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, | |
340 | int stream) | |
341 | { | |
342 | struct snd_pcm_substream *substream = pcm->streams[stream].substream; | |
343 | struct snd_dma_buffer *buf = &substream->dma_buffer; | |
344 | size_t size = omap_pcm_hardware.buffer_bytes_max; | |
345 | ||
346 | buf->dev.type = SNDRV_DMA_TYPE_DEV; | |
347 | buf->dev.dev = pcm->card->dev; | |
348 | buf->private_data = NULL; | |
349 | buf->area = dma_alloc_writecombine(pcm->card->dev, size, | |
350 | &buf->addr, GFP_KERNEL); | |
351 | if (!buf->area) | |
352 | return -ENOMEM; | |
353 | ||
354 | buf->bytes = size; | |
355 | return 0; | |
356 | } | |
357 | ||
358 | static void omap_pcm_free_dma_buffers(struct snd_pcm *pcm) | |
359 | { | |
360 | struct snd_pcm_substream *substream; | |
361 | struct snd_dma_buffer *buf; | |
362 | int stream; | |
363 | ||
364 | for (stream = 0; stream < 2; stream++) { | |
365 | substream = pcm->streams[stream].substream; | |
366 | if (!substream) | |
367 | continue; | |
368 | ||
369 | buf = &substream->dma_buffer; | |
370 | if (!buf->area) | |
371 | continue; | |
372 | ||
373 | dma_free_writecombine(pcm->card->dev, buf->bytes, | |
374 | buf->area, buf->addr); | |
375 | buf->area = NULL; | |
376 | } | |
377 | } | |
378 | ||
552d1ef6 | 379 | static int omap_pcm_new(struct snd_soc_pcm_runtime *rtd) |
2e74796a | 380 | { |
552d1ef6 | 381 | struct snd_card *card = rtd->card->snd_card; |
552d1ef6 | 382 | struct snd_pcm *pcm = rtd->pcm; |
2e74796a JN |
383 | int ret = 0; |
384 | ||
385 | if (!card->dev->dma_mask) | |
386 | card->dev->dma_mask = &omap_pcm_dmamask; | |
387 | if (!card->dev->coherent_dma_mask) | |
a152ff24 | 388 | card->dev->coherent_dma_mask = DMA_BIT_MASK(64); |
2e74796a | 389 | |
25e9e756 | 390 | if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { |
2e74796a JN |
391 | ret = omap_pcm_preallocate_dma_buffer(pcm, |
392 | SNDRV_PCM_STREAM_PLAYBACK); | |
393 | if (ret) | |
394 | goto out; | |
395 | } | |
396 | ||
25e9e756 | 397 | if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { |
2e74796a JN |
398 | ret = omap_pcm_preallocate_dma_buffer(pcm, |
399 | SNDRV_PCM_STREAM_CAPTURE); | |
400 | if (ret) | |
401 | goto out; | |
402 | } | |
403 | ||
404 | out: | |
fad9365b OM |
405 | /* free preallocated buffers in case of error */ |
406 | if (ret) | |
407 | omap_pcm_free_dma_buffers(pcm); | |
408 | ||
2e74796a JN |
409 | return ret; |
410 | } | |
411 | ||
f0fba2ad LG |
412 | static struct snd_soc_platform_driver omap_soc_platform = { |
413 | .ops = &omap_pcm_ops, | |
2e74796a JN |
414 | .pcm_new = omap_pcm_new, |
415 | .pcm_free = omap_pcm_free_dma_buffers, | |
416 | }; | |
2e74796a | 417 | |
f0fba2ad LG |
418 | static __devinit int omap_pcm_probe(struct platform_device *pdev) |
419 | { | |
420 | return snd_soc_register_platform(&pdev->dev, | |
421 | &omap_soc_platform); | |
422 | } | |
423 | ||
424 | static int __devexit omap_pcm_remove(struct platform_device *pdev) | |
425 | { | |
426 | snd_soc_unregister_platform(&pdev->dev); | |
427 | return 0; | |
428 | } | |
429 | ||
430 | static struct platform_driver omap_pcm_driver = { | |
431 | .driver = { | |
432 | .name = "omap-pcm-audio", | |
433 | .owner = THIS_MODULE, | |
434 | }, | |
435 | ||
436 | .probe = omap_pcm_probe, | |
437 | .remove = __devexit_p(omap_pcm_remove), | |
438 | }; | |
439 | ||
beda5bf5 | 440 | module_platform_driver(omap_pcm_driver); |
958e792c | 441 | |
7ec41ee5 | 442 | MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>"); |
2e74796a JN |
443 | MODULE_DESCRIPTION("OMAP PCM DMA module"); |
444 | MODULE_LICENSE("GPL"); | |
5e70b7fc | 445 | MODULE_ALIAS("platform:omap-pcm-audio"); |