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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
75b41027 LG |
2 | /* |
3 | * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip. | |
4 | * | |
5 | * Author: Nicolas Pitre | |
6 | * Created: Dec 02, 2004 | |
7 | * Copyright: MontaVista Software Inc. | |
75b41027 LG |
8 | */ |
9 | ||
10 | #include <linux/init.h> | |
23019a73 | 11 | #include <linux/io.h> |
75b41027 LG |
12 | #include <linux/module.h> |
13 | #include <linux/platform_device.h> | |
d65a1458 | 14 | #include <linux/dmaengine.h> |
58ceb57e | 15 | #include <linux/dma/pxa-dma.h> |
75b41027 | 16 | |
1c8bc7b3 | 17 | #include <sound/ac97/controller.h> |
75b41027 | 18 | #include <sound/core.h> |
75b41027 | 19 | #include <sound/ac97_codec.h> |
75b41027 | 20 | #include <sound/soc.h> |
9c636342 | 21 | #include <sound/pxa2xx-lib.h> |
d65a1458 | 22 | #include <sound/dmaengine_pcm.h> |
75b41027 | 23 | |
a09e64fb | 24 | #include <mach/hardware.h> |
1f017a99 | 25 | #include <mach/regs-ac97.h> |
4ac0478f | 26 | #include <mach/audio.h> |
75b41027 | 27 | |
1c8bc7b3 | 28 | static void pxa2xx_ac97_warm_reset(struct ac97_controller *adrv) |
75b41027 | 29 | { |
6f8acad6 | 30 | pxa2xx_ac97_try_warm_reset(); |
75b41027 | 31 | |
6f8acad6 | 32 | pxa2xx_ac97_finish_reset(); |
75b41027 LG |
33 | } |
34 | ||
1c8bc7b3 | 35 | static void pxa2xx_ac97_cold_reset(struct ac97_controller *adrv) |
75b41027 | 36 | { |
6f8acad6 | 37 | pxa2xx_ac97_try_cold_reset(); |
7a22323b | 38 | |
6f8acad6 RJ |
39 | pxa2xx_ac97_finish_reset(); |
40 | } | |
41 | ||
1c8bc7b3 RJ |
42 | static int pxa2xx_ac97_read_actrl(struct ac97_controller *adrv, int slot, |
43 | unsigned short reg) | |
6f8acad6 | 44 | { |
1c8bc7b3 | 45 | return pxa2xx_ac97_read(slot, reg); |
6f8acad6 RJ |
46 | } |
47 | ||
1c8bc7b3 RJ |
48 | static int pxa2xx_ac97_write_actrl(struct ac97_controller *adrv, int slot, |
49 | unsigned short reg, unsigned short val) | |
6f8acad6 | 50 | { |
1c8bc7b3 | 51 | return pxa2xx_ac97_write(slot, reg, val); |
75b41027 LG |
52 | } |
53 | ||
1c8bc7b3 RJ |
54 | static struct ac97_controller_ops pxa2xx_ac97_ops = { |
55 | .read = pxa2xx_ac97_read_actrl, | |
56 | .write = pxa2xx_ac97_write_actrl, | |
75b41027 LG |
57 | .warm_reset = pxa2xx_ac97_warm_reset, |
58 | .reset = pxa2xx_ac97_cold_reset, | |
59 | }; | |
60 | ||
d65a1458 DM |
61 | static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_in = { |
62 | .addr = __PREG(PCDR), | |
63 | .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, | |
8f54061d | 64 | .chan_name = "pcm_pcm_stereo_in", |
d65a1458 | 65 | .maxburst = 32, |
58ceb57e DM |
66 | }; |
67 | ||
d65a1458 DM |
68 | static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_out = { |
69 | .addr = __PREG(PCDR), | |
70 | .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, | |
8f54061d | 71 | .chan_name = "pcm_pcm_stereo_out", |
d65a1458 | 72 | .maxburst = 32, |
75b41027 LG |
73 | }; |
74 | ||
d65a1458 DM |
75 | static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_aux_mono_out = { |
76 | .addr = __PREG(MODR), | |
77 | .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES, | |
8f54061d | 78 | .chan_name = "pcm_aux_mono_out", |
d65a1458 | 79 | .maxburst = 16, |
75b41027 LG |
80 | }; |
81 | ||
d65a1458 DM |
82 | static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_aux_mono_in = { |
83 | .addr = __PREG(MODR), | |
84 | .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES, | |
8f54061d | 85 | .chan_name = "pcm_aux_mono_in", |
d65a1458 | 86 | .maxburst = 16, |
75b41027 LG |
87 | }; |
88 | ||
d65a1458 DM |
89 | static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_mic_mono_in = { |
90 | .addr = __PREG(MCDR), | |
91 | .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES, | |
8f54061d | 92 | .chan_name = "pcm_aux_mic_mono", |
d65a1458 | 93 | .maxburst = 16, |
75b41027 LG |
94 | }; |
95 | ||
58ceb57e DM |
96 | static int pxa2xx_ac97_hifi_startup(struct snd_pcm_substream *substream, |
97 | struct snd_soc_dai *cpu_dai) | |
75b41027 | 98 | { |
d65a1458 | 99 | struct snd_dmaengine_dai_dma_data *dma_data; |
75b41027 LG |
100 | |
101 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
5f712b2b | 102 | dma_data = &pxa2xx_ac97_pcm_stereo_out; |
75b41027 | 103 | else |
5f712b2b DM |
104 | dma_data = &pxa2xx_ac97_pcm_stereo_in; |
105 | ||
106 | snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data); | |
75b41027 LG |
107 | |
108 | return 0; | |
109 | } | |
110 | ||
58ceb57e DM |
111 | static int pxa2xx_ac97_aux_startup(struct snd_pcm_substream *substream, |
112 | struct snd_soc_dai *cpu_dai) | |
75b41027 | 113 | { |
d65a1458 | 114 | struct snd_dmaengine_dai_dma_data *dma_data; |
75b41027 LG |
115 | |
116 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
5f712b2b | 117 | dma_data = &pxa2xx_ac97_pcm_aux_mono_out; |
75b41027 | 118 | else |
5f712b2b DM |
119 | dma_data = &pxa2xx_ac97_pcm_aux_mono_in; |
120 | ||
121 | snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data); | |
75b41027 LG |
122 | |
123 | return 0; | |
124 | } | |
125 | ||
58ceb57e DM |
126 | static int pxa2xx_ac97_mic_startup(struct snd_pcm_substream *substream, |
127 | struct snd_soc_dai *cpu_dai) | |
75b41027 | 128 | { |
75b41027 LG |
129 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
130 | return -ENODEV; | |
291aaff0 CG |
131 | snd_soc_dai_set_dma_data(cpu_dai, substream, |
132 | &pxa2xx_ac97_pcm_mic_mono_in); | |
75b41027 LG |
133 | |
134 | return 0; | |
135 | } | |
136 | ||
596ce32b LG |
137 | #define PXA2XX_AC97_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ |
138 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ | |
139 | SNDRV_PCM_RATE_48000) | |
140 | ||
85e7652d | 141 | static const struct snd_soc_dai_ops pxa_ac97_hifi_dai_ops = { |
58ceb57e | 142 | .startup = pxa2xx_ac97_hifi_startup, |
6335d055 EM |
143 | }; |
144 | ||
85e7652d | 145 | static const struct snd_soc_dai_ops pxa_ac97_aux_dai_ops = { |
58ceb57e | 146 | .startup = pxa2xx_ac97_aux_startup, |
852fd9e5 MB |
147 | }; |
148 | ||
85e7652d | 149 | static const struct snd_soc_dai_ops pxa_ac97_mic_dai_ops = { |
58ceb57e | 150 | .startup = pxa2xx_ac97_mic_startup, |
852fd9e5 MB |
151 | }; |
152 | ||
75b41027 LG |
153 | /* |
154 | * There is only 1 physical AC97 interface for pxa2xx, but it | |
155 | * has extra fifo's that can be used for aux DACs and ADCs. | |
156 | */ | |
a3874196 | 157 | static struct snd_soc_dai_driver pxa_ac97_dai_driver[] = { |
75b41027 LG |
158 | { |
159 | .name = "pxa2xx-ac97", | |
bc263214 | 160 | .bus_control = true, |
75b41027 LG |
161 | .playback = { |
162 | .stream_name = "AC97 Playback", | |
163 | .channels_min = 2, | |
596ce32b LG |
164 | .channels_max = 2, |
165 | .rates = PXA2XX_AC97_RATES, | |
166 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | |
75b41027 LG |
167 | .capture = { |
168 | .stream_name = "AC97 Capture", | |
169 | .channels_min = 2, | |
596ce32b LG |
170 | .channels_max = 2, |
171 | .rates = PXA2XX_AC97_RATES, | |
172 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | |
852fd9e5 | 173 | .ops = &pxa_ac97_hifi_dai_ops, |
75b41027 LG |
174 | }, |
175 | { | |
176 | .name = "pxa2xx-ac97-aux", | |
bc263214 | 177 | .bus_control = true, |
75b41027 LG |
178 | .playback = { |
179 | .stream_name = "AC97 Aux Playback", | |
180 | .channels_min = 1, | |
596ce32b LG |
181 | .channels_max = 1, |
182 | .rates = PXA2XX_AC97_RATES, | |
183 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | |
75b41027 LG |
184 | .capture = { |
185 | .stream_name = "AC97 Aux Capture", | |
186 | .channels_min = 1, | |
596ce32b LG |
187 | .channels_max = 1, |
188 | .rates = PXA2XX_AC97_RATES, | |
189 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | |
852fd9e5 | 190 | .ops = &pxa_ac97_aux_dai_ops, |
75b41027 LG |
191 | }, |
192 | { | |
193 | .name = "pxa2xx-ac97-mic", | |
bc263214 | 194 | .bus_control = true, |
75b41027 LG |
195 | .capture = { |
196 | .stream_name = "AC97 Mic Capture", | |
197 | .channels_min = 1, | |
596ce32b LG |
198 | .channels_max = 1, |
199 | .rates = PXA2XX_AC97_RATES, | |
200 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | |
852fd9e5 | 201 | .ops = &pxa_ac97_mic_dai_ops, |
596ce32b | 202 | }, |
75b41027 LG |
203 | }; |
204 | ||
ad53232c KM |
205 | static const struct snd_soc_component_driver pxa_ac97_component = { |
206 | .name = "pxa-ac97", | |
d767d3ce DM |
207 | .ops = &pxa2xx_pcm_ops, |
208 | .pcm_new = pxa2xx_soc_pcm_new, | |
209 | .pcm_free = pxa2xx_pcm_free_dma_buffers, | |
ad53232c KM |
210 | }; |
211 | ||
a4519526 RJ |
212 | #ifdef CONFIG_OF |
213 | static const struct of_device_id pxa2xx_ac97_dt_ids[] = { | |
214 | { .compatible = "marvell,pxa250-ac97", }, | |
215 | { .compatible = "marvell,pxa270-ac97", }, | |
216 | { .compatible = "marvell,pxa300-ac97", }, | |
217 | { } | |
218 | }; | |
219 | MODULE_DEVICE_TABLE(of, pxa2xx_ac97_dt_ids); | |
220 | ||
221 | #endif | |
222 | ||
570f6fe1 | 223 | static int pxa2xx_ac97_dev_probe(struct platform_device *pdev) |
3f4b783c | 224 | { |
7685e016 | 225 | int ret; |
1c8bc7b3 RJ |
226 | struct ac97_controller *ctrl; |
227 | pxa2xx_audio_ops_t *pdata = pdev->dev.platform_data; | |
228 | void **codecs_pdata; | |
7685e016 | 229 | |
f0fba2ad | 230 | if (pdev->id != -1) { |
4ac0478f MV |
231 | dev_err(&pdev->dev, "PXA2xx has only one AC97 port.\n"); |
232 | return -ENXIO; | |
233 | } | |
234 | ||
f62aa9b6 DB |
235 | ret = pxa2xx_ac97_hw_probe(pdev); |
236 | if (ret) { | |
237 | dev_err(&pdev->dev, "PXA2xx AC97 hw probe error (%d)\n", ret); | |
238 | return ret; | |
239 | } | |
240 | ||
1c8bc7b3 RJ |
241 | codecs_pdata = pdata ? pdata->codec_pdata : NULL; |
242 | ctrl = snd_ac97_controller_register(&pxa2xx_ac97_ops, &pdev->dev, | |
243 | AC97_SLOTS_AVAILABLE_ALL, | |
244 | codecs_pdata); | |
245 | if (IS_ERR(ctrl)) | |
246 | return PTR_ERR(ctrl); | |
b047e1cc | 247 | |
1c8bc7b3 | 248 | platform_set_drvdata(pdev, ctrl); |
6b849bcf MB |
249 | /* Punt most of the init to the SoC probe; we may need the machine |
250 | * driver to do interesting things with the clocking to get us up | |
251 | * and running. | |
252 | */ | |
ad53232c KM |
253 | return snd_soc_register_component(&pdev->dev, &pxa_ac97_component, |
254 | pxa_ac97_dai_driver, ARRAY_SIZE(pxa_ac97_dai_driver)); | |
3f4b783c | 255 | } |
6b849bcf | 256 | |
570f6fe1 | 257 | static int pxa2xx_ac97_dev_remove(struct platform_device *pdev) |
6b849bcf | 258 | { |
1c8bc7b3 RJ |
259 | struct ac97_controller *ctrl = platform_get_drvdata(pdev); |
260 | ||
ad53232c | 261 | snd_soc_unregister_component(&pdev->dev); |
1c8bc7b3 | 262 | snd_ac97_controller_unregister(ctrl); |
f62aa9b6 | 263 | pxa2xx_ac97_hw_remove(pdev); |
6b849bcf MB |
264 | return 0; |
265 | } | |
266 | ||
f62aa9b6 DB |
267 | #ifdef CONFIG_PM_SLEEP |
268 | static int pxa2xx_ac97_dev_suspend(struct device *dev) | |
269 | { | |
270 | return pxa2xx_ac97_hw_suspend(); | |
271 | } | |
272 | ||
273 | static int pxa2xx_ac97_dev_resume(struct device *dev) | |
274 | { | |
275 | return pxa2xx_ac97_hw_resume(); | |
276 | } | |
277 | ||
278 | static SIMPLE_DEV_PM_OPS(pxa2xx_ac97_pm_ops, | |
279 | pxa2xx_ac97_dev_suspend, pxa2xx_ac97_dev_resume); | |
280 | #endif | |
281 | ||
6b849bcf MB |
282 | static struct platform_driver pxa2xx_ac97_driver = { |
283 | .probe = pxa2xx_ac97_dev_probe, | |
570f6fe1 | 284 | .remove = pxa2xx_ac97_dev_remove, |
6b849bcf MB |
285 | .driver = { |
286 | .name = "pxa2xx-ac97", | |
f62aa9b6 DB |
287 | #ifdef CONFIG_PM_SLEEP |
288 | .pm = &pxa2xx_ac97_pm_ops, | |
289 | #endif | |
a4519526 | 290 | .of_match_table = of_match_ptr(pxa2xx_ac97_dt_ids), |
6b849bcf MB |
291 | }, |
292 | }; | |
293 | ||
2f702a19 | 294 | module_platform_driver(pxa2xx_ac97_driver); |
3f4b783c | 295 | |
75b41027 LG |
296 | MODULE_AUTHOR("Nicolas Pitre"); |
297 | MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip"); | |
298 | MODULE_LICENSE("GPL"); | |
e5b7d71a | 299 | MODULE_ALIAS("platform:pxa2xx-ac97"); |