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c1b2db4d SN |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // | |
3 | // ALSA SoC Audio Layer - Samsung I2S Controller driver | |
4 | // | |
5 | // Copyright (c) 2010 Samsung Electronics Co. Ltd. | |
6 | // Jaswinder Singh <jassisinghbrar@gmail.com> | |
1c7ac018 | 7 | |
074b89bb | 8 | #include <dt-bindings/sound/samsung-i2s.h> |
1c7ac018 JB |
9 | #include <linux/delay.h> |
10 | #include <linux/slab.h> | |
11 | #include <linux/clk.h> | |
074b89bb | 12 | #include <linux/clk-provider.h> |
1c7ac018 | 13 | #include <linux/io.h> |
da155d5b | 14 | #include <linux/module.h> |
40476f61 | 15 | #include <linux/of.h> |
2f7b5d14 | 16 | #include <linux/of_device.h> |
40476f61 | 17 | #include <linux/of_gpio.h> |
c5cf4dbc | 18 | #include <linux/pm_runtime.h> |
1c7ac018 | 19 | |
1c7ac018 | 20 | #include <sound/soc.h> |
0378b6ac | 21 | #include <sound/pcm_params.h> |
1c7ac018 | 22 | |
436d42c6 | 23 | #include <linux/platform_data/asoc-s3c.h> |
1c7ac018 JB |
24 | |
25 | #include "dma.h" | |
61100f40 | 26 | #include "idma.h" |
1c7ac018 | 27 | #include "i2s.h" |
172a453d | 28 | #include "i2s-regs.h" |
1c7ac018 JB |
29 | |
30 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | |
31 | ||
a404b72d SN |
32 | #define SAMSUNG_I2S_ID_PRIMARY 1 |
33 | #define SAMSUNG_I2S_ID_SECONDARY 2 | |
34 | ||
a5a56871 PV |
35 | struct samsung_i2s_variant_regs { |
36 | unsigned int bfs_off; | |
37 | unsigned int rfs_off; | |
38 | unsigned int sdf_off; | |
39 | unsigned int txr_off; | |
40 | unsigned int rclksrc_off; | |
41 | unsigned int mss_off; | |
42 | unsigned int cdclkcon_off; | |
43 | unsigned int lrp_off; | |
44 | unsigned int bfs_mask; | |
45 | unsigned int rfs_mask; | |
46 | unsigned int ftx0cnt_off; | |
47 | }; | |
48 | ||
40476f61 | 49 | struct samsung_i2s_dai_data { |
7da493e9 | 50 | u32 quirks; |
4720c2fe | 51 | unsigned int pcm_rates; |
a5a56871 | 52 | const struct samsung_i2s_variant_regs *i2s_variant_regs; |
40476f61 PV |
53 | }; |
54 | ||
1c7ac018 JB |
55 | struct i2s_dai { |
56 | /* Platform device for this DAI */ | |
57 | struct platform_device *pdev; | |
e2e16fa6 | 58 | |
9f9f8a5b | 59 | /* Frame clock */ |
1c7ac018 JB |
60 | unsigned frmclk; |
61 | /* | |
9f9f8a5b | 62 | * Specifically requested RCLK, BCLK by machine driver. |
1c7ac018 JB |
63 | * 0 indicates CPU driver is free to choose any value. |
64 | */ | |
65 | unsigned rfs, bfs; | |
1c7ac018 JB |
66 | /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ |
67 | struct i2s_dai *pri_dai; | |
68 | /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ | |
69 | struct i2s_dai *sec_dai; | |
9f9f8a5b SN |
70 | |
71 | #define DAI_OPENED (1 << 0) /* DAI is opened */ | |
72 | #define DAI_MANAGER (1 << 1) /* DAI is the manager */ | |
1c7ac018 | 73 | unsigned mode; |
a404b72d | 74 | |
1c7ac018 | 75 | /* Driver for this DAI */ |
a404b72d SN |
76 | struct snd_soc_dai_driver *drv; |
77 | ||
1c7ac018 | 78 | /* DMA parameters */ |
69e7a69a SN |
79 | struct snd_dmaengine_dai_dma_data dma_playback; |
80 | struct snd_dmaengine_dai_dma_data dma_capture; | |
81 | struct snd_dmaengine_dai_dma_data idma_playback; | |
9bdca822 | 82 | dma_filter_fn filter; |
f3670536 | 83 | |
89d2e831 | 84 | struct samsung_i2s_priv *priv; |
1c7ac018 JB |
85 | }; |
86 | ||
a404b72d SN |
87 | struct samsung_i2s_priv { |
88 | struct platform_device *pdev; | |
7196c64c | 89 | struct platform_device *pdev_sec; |
a404b72d | 90 | |
9f9f8a5b | 91 | /* Lock for cross interface checks */ |
defc67c6 SN |
92 | spinlock_t pcm_lock; |
93 | ||
a404b72d SN |
94 | /* CPU DAIs and their corresponding drivers */ |
95 | struct i2s_dai *dai; | |
96 | struct snd_soc_dai_driver *dai_drv; | |
97 | int num_dais; | |
89d2e831 | 98 | |
b5d015e6 SN |
99 | /* The I2S controller's core clock */ |
100 | struct clk *clk; | |
101 | ||
3b0fa51f SN |
102 | /* Clock for generating I2S signals */ |
103 | struct clk *op_clk; | |
104 | ||
105 | /* Rate of RCLK source clock */ | |
106 | unsigned long rclk_srcrate; | |
107 | ||
81bcbf2c SN |
108 | /* Cache of selected I2S registers for system suspend */ |
109 | u32 suspend_i2smod; | |
110 | u32 suspend_i2scon; | |
111 | u32 suspend_i2spsr; | |
112 | ||
5bfaeddc | 113 | const struct samsung_i2s_variant_regs *variant_regs; |
5944170f | 114 | u32 quirks; |
5bfaeddc | 115 | |
89d2e831 SN |
116 | /* The clock provider's data */ |
117 | struct clk *clk_table[3]; | |
118 | struct clk_onecell_data clk_data; | |
f29eec79 SN |
119 | |
120 | /* Spinlock protecting member fields below */ | |
121 | spinlock_t lock; | |
122 | ||
123 | /* Memory mapped SFR region */ | |
124 | void __iomem *addr; | |
125 | ||
126 | /* A flag indicating the I2S slave mode operation */ | |
127 | bool slave_mode; | |
a404b72d SN |
128 | }; |
129 | ||
a404b72d | 130 | /* Returns true if this is the 'overlay' stereo DAI */ |
1c7ac018 JB |
131 | static inline bool is_secondary(struct i2s_dai *i2s) |
132 | { | |
a404b72d | 133 | return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY; |
1c7ac018 JB |
134 | } |
135 | ||
1c7ac018 JB |
136 | /* If this interface of the controller is transmitting data */ |
137 | static inline bool tx_active(struct i2s_dai *i2s) | |
138 | { | |
139 | u32 active; | |
140 | ||
141 | if (!i2s) | |
142 | return false; | |
143 | ||
e2e16fa6 | 144 | active = readl(i2s->priv->addr + I2SCON); |
1c7ac018 JB |
145 | |
146 | if (is_secondary(i2s)) | |
147 | active &= CON_TXSDMA_ACTIVE; | |
148 | else | |
149 | active &= CON_TXDMA_ACTIVE; | |
150 | ||
151 | return active ? true : false; | |
152 | } | |
153 | ||
dcd60fc3 SN |
154 | /* Return pointer to the other DAI */ |
155 | static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s) | |
156 | { | |
157 | return i2s->pri_dai ? : i2s->sec_dai; | |
158 | } | |
159 | ||
1c7ac018 JB |
160 | /* If the other interface of the controller is transmitting data */ |
161 | static inline bool other_tx_active(struct i2s_dai *i2s) | |
162 | { | |
dcd60fc3 | 163 | struct i2s_dai *other = get_other_dai(i2s); |
1c7ac018 JB |
164 | |
165 | return tx_active(other); | |
166 | } | |
167 | ||
168 | /* If any interface of the controller is transmitting data */ | |
169 | static inline bool any_tx_active(struct i2s_dai *i2s) | |
170 | { | |
171 | return tx_active(i2s) || other_tx_active(i2s); | |
172 | } | |
173 | ||
174 | /* If this interface of the controller is receiving data */ | |
175 | static inline bool rx_active(struct i2s_dai *i2s) | |
176 | { | |
177 | u32 active; | |
178 | ||
179 | if (!i2s) | |
180 | return false; | |
181 | ||
e2e16fa6 | 182 | active = readl(i2s->priv->addr + I2SCON) & CON_RXDMA_ACTIVE; |
1c7ac018 JB |
183 | |
184 | return active ? true : false; | |
185 | } | |
186 | ||
187 | /* If the other interface of the controller is receiving data */ | |
188 | static inline bool other_rx_active(struct i2s_dai *i2s) | |
189 | { | |
dcd60fc3 | 190 | struct i2s_dai *other = get_other_dai(i2s); |
1c7ac018 JB |
191 | |
192 | return rx_active(other); | |
193 | } | |
194 | ||
195 | /* If any interface of the controller is receiving data */ | |
196 | static inline bool any_rx_active(struct i2s_dai *i2s) | |
197 | { | |
198 | return rx_active(i2s) || other_rx_active(i2s); | |
199 | } | |
200 | ||
201 | /* If the other DAI is transmitting or receiving data */ | |
202 | static inline bool other_active(struct i2s_dai *i2s) | |
203 | { | |
204 | return other_rx_active(i2s) || other_tx_active(i2s); | |
205 | } | |
206 | ||
207 | /* If this DAI is transmitting or receiving data */ | |
208 | static inline bool this_active(struct i2s_dai *i2s) | |
209 | { | |
210 | return tx_active(i2s) || rx_active(i2s); | |
211 | } | |
212 | ||
213 | /* If the controller is active anyway */ | |
214 | static inline bool any_active(struct i2s_dai *i2s) | |
215 | { | |
216 | return this_active(i2s) || other_active(i2s); | |
217 | } | |
218 | ||
219 | static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) | |
220 | { | |
a404b72d SN |
221 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
222 | ||
223 | return &priv->dai[dai->id - 1]; | |
1c7ac018 JB |
224 | } |
225 | ||
226 | static inline bool is_opened(struct i2s_dai *i2s) | |
227 | { | |
228 | if (i2s && (i2s->mode & DAI_OPENED)) | |
229 | return true; | |
230 | else | |
231 | return false; | |
232 | } | |
233 | ||
234 | static inline bool is_manager(struct i2s_dai *i2s) | |
235 | { | |
236 | if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) | |
237 | return true; | |
238 | else | |
239 | return false; | |
240 | } | |
241 | ||
242 | /* Read RCLK of I2S (in multiples of LRCLK) */ | |
243 | static inline unsigned get_rfs(struct i2s_dai *i2s) | |
244 | { | |
e2e16fa6 | 245 | struct samsung_i2s_priv *priv = i2s->priv; |
4ca0c0d4 | 246 | u32 rfs; |
e2e16fa6 | 247 | |
5bfaeddc SN |
248 | rfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->rfs_off; |
249 | rfs &= priv->variant_regs->rfs_mask; | |
1c7ac018 JB |
250 | |
251 | switch (rfs) { | |
a5a56871 PV |
252 | case 7: return 192; |
253 | case 6: return 96; | |
254 | case 5: return 128; | |
255 | case 4: return 64; | |
1c7ac018 JB |
256 | case 3: return 768; |
257 | case 2: return 384; | |
258 | case 1: return 512; | |
259 | default: return 256; | |
260 | } | |
261 | } | |
262 | ||
263 | /* Write RCLK of I2S (in multiples of LRCLK) */ | |
264 | static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) | |
265 | { | |
e2e16fa6 SN |
266 | struct samsung_i2s_priv *priv = i2s->priv; |
267 | u32 mod = readl(priv->addr + I2SMOD); | |
5bfaeddc | 268 | int rfs_shift = priv->variant_regs->rfs_off; |
1c7ac018 | 269 | |
5bfaeddc | 270 | mod &= ~(priv->variant_regs->rfs_mask << rfs_shift); |
1c7ac018 JB |
271 | |
272 | switch (rfs) { | |
a5a56871 PV |
273 | case 192: |
274 | mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift); | |
275 | break; | |
276 | case 96: | |
277 | mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift); | |
278 | break; | |
279 | case 128: | |
280 | mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift); | |
281 | break; | |
282 | case 64: | |
283 | mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift); | |
284 | break; | |
1c7ac018 | 285 | case 768: |
b60be4aa | 286 | mod |= (MOD_RCLK_768FS << rfs_shift); |
1c7ac018 JB |
287 | break; |
288 | case 512: | |
b60be4aa | 289 | mod |= (MOD_RCLK_512FS << rfs_shift); |
1c7ac018 JB |
290 | break; |
291 | case 384: | |
b60be4aa | 292 | mod |= (MOD_RCLK_384FS << rfs_shift); |
1c7ac018 JB |
293 | break; |
294 | default: | |
b60be4aa | 295 | mod |= (MOD_RCLK_256FS << rfs_shift); |
1c7ac018 JB |
296 | break; |
297 | } | |
298 | ||
e2e16fa6 | 299 | writel(mod, priv->addr + I2SMOD); |
1c7ac018 JB |
300 | } |
301 | ||
9f9f8a5b | 302 | /* Read bit-clock of I2S (in multiples of LRCLK) */ |
1c7ac018 JB |
303 | static inline unsigned get_bfs(struct i2s_dai *i2s) |
304 | { | |
e2e16fa6 | 305 | struct samsung_i2s_priv *priv = i2s->priv; |
4ca0c0d4 | 306 | u32 bfs; |
e2e16fa6 | 307 | |
5bfaeddc SN |
308 | bfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->bfs_off; |
309 | bfs &= priv->variant_regs->bfs_mask; | |
1c7ac018 JB |
310 | |
311 | switch (bfs) { | |
4ca0c0d4 PV |
312 | case 8: return 256; |
313 | case 7: return 192; | |
314 | case 6: return 128; | |
315 | case 5: return 96; | |
316 | case 4: return 64; | |
1c7ac018 JB |
317 | case 3: return 24; |
318 | case 2: return 16; | |
319 | case 1: return 48; | |
320 | default: return 32; | |
321 | } | |
322 | } | |
323 | ||
9f9f8a5b | 324 | /* Write bit-clock of I2S (in multiples of LRCLK) */ |
1c7ac018 JB |
325 | static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) |
326 | { | |
e2e16fa6 SN |
327 | struct samsung_i2s_priv *priv = i2s->priv; |
328 | u32 mod = readl(priv->addr + I2SMOD); | |
5944170f | 329 | int tdm = priv->quirks & QUIRK_SUPPORTS_TDM; |
5bfaeddc | 330 | int bfs_shift = priv->variant_regs->bfs_off; |
4ca0c0d4 PV |
331 | |
332 | /* Non-TDM I2S controllers do not support BCLK > 48 * FS */ | |
333 | if (!tdm && bfs > 48) { | |
334 | dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n"); | |
335 | return; | |
336 | } | |
1c7ac018 | 337 | |
5bfaeddc | 338 | mod &= ~(priv->variant_regs->bfs_mask << bfs_shift); |
a5a56871 | 339 | |
1c7ac018 JB |
340 | switch (bfs) { |
341 | case 48: | |
b60be4aa | 342 | mod |= (MOD_BCLK_48FS << bfs_shift); |
1c7ac018 JB |
343 | break; |
344 | case 32: | |
b60be4aa | 345 | mod |= (MOD_BCLK_32FS << bfs_shift); |
1c7ac018 JB |
346 | break; |
347 | case 24: | |
b60be4aa | 348 | mod |= (MOD_BCLK_24FS << bfs_shift); |
1c7ac018 JB |
349 | break; |
350 | case 16: | |
b60be4aa | 351 | mod |= (MOD_BCLK_16FS << bfs_shift); |
1c7ac018 | 352 | break; |
4ca0c0d4 PV |
353 | case 64: |
354 | mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift); | |
355 | break; | |
356 | case 96: | |
357 | mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift); | |
358 | break; | |
359 | case 128: | |
360 | mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift); | |
361 | break; | |
362 | case 192: | |
363 | mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift); | |
364 | break; | |
365 | case 256: | |
366 | mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift); | |
1c7ac018 JB |
367 | break; |
368 | default: | |
369 | dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); | |
370 | return; | |
371 | } | |
372 | ||
e2e16fa6 | 373 | writel(mod, priv->addr + I2SMOD); |
1c7ac018 JB |
374 | } |
375 | ||
9f9f8a5b | 376 | /* Sample size */ |
1c7ac018 JB |
377 | static inline int get_blc(struct i2s_dai *i2s) |
378 | { | |
e2e16fa6 | 379 | int blc = readl(i2s->priv->addr + I2SMOD); |
1c7ac018 JB |
380 | |
381 | blc = (blc >> 13) & 0x3; | |
382 | ||
383 | switch (blc) { | |
384 | case 2: return 24; | |
385 | case 1: return 8; | |
386 | default: return 16; | |
387 | } | |
388 | } | |
389 | ||
9f9f8a5b | 390 | /* TX channel control */ |
1c7ac018 JB |
391 | static void i2s_txctrl(struct i2s_dai *i2s, int on) |
392 | { | |
e2e16fa6 SN |
393 | struct samsung_i2s_priv *priv = i2s->priv; |
394 | void __iomem *addr = priv->addr; | |
5bfaeddc | 395 | int txr_off = priv->variant_regs->txr_off; |
1c7ac018 | 396 | u32 con = readl(addr + I2SCON); |
a5a56871 | 397 | u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); |
1c7ac018 JB |
398 | |
399 | if (on) { | |
400 | con |= CON_ACTIVE; | |
401 | con &= ~CON_TXCH_PAUSE; | |
402 | ||
403 | if (is_secondary(i2s)) { | |
404 | con |= CON_TXSDMA_ACTIVE; | |
405 | con &= ~CON_TXSDMA_PAUSE; | |
406 | } else { | |
407 | con |= CON_TXDMA_ACTIVE; | |
408 | con &= ~CON_TXDMA_PAUSE; | |
409 | } | |
410 | ||
411 | if (any_rx_active(i2s)) | |
a5a56871 | 412 | mod |= 2 << txr_off; |
1c7ac018 | 413 | else |
a5a56871 | 414 | mod |= 0 << txr_off; |
1c7ac018 JB |
415 | } else { |
416 | if (is_secondary(i2s)) { | |
417 | con |= CON_TXSDMA_PAUSE; | |
418 | con &= ~CON_TXSDMA_ACTIVE; | |
419 | } else { | |
420 | con |= CON_TXDMA_PAUSE; | |
421 | con &= ~CON_TXDMA_ACTIVE; | |
422 | } | |
423 | ||
424 | if (other_tx_active(i2s)) { | |
425 | writel(con, addr + I2SCON); | |
426 | return; | |
427 | } | |
428 | ||
429 | con |= CON_TXCH_PAUSE; | |
430 | ||
431 | if (any_rx_active(i2s)) | |
a5a56871 | 432 | mod |= 1 << txr_off; |
1c7ac018 JB |
433 | else |
434 | con &= ~CON_ACTIVE; | |
435 | } | |
436 | ||
437 | writel(mod, addr + I2SMOD); | |
438 | writel(con, addr + I2SCON); | |
439 | } | |
440 | ||
441 | /* RX Channel Control */ | |
442 | static void i2s_rxctrl(struct i2s_dai *i2s, int on) | |
443 | { | |
e2e16fa6 SN |
444 | struct samsung_i2s_priv *priv = i2s->priv; |
445 | void __iomem *addr = priv->addr; | |
5bfaeddc | 446 | int txr_off = priv->variant_regs->txr_off; |
1c7ac018 | 447 | u32 con = readl(addr + I2SCON); |
a5a56871 | 448 | u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); |
1c7ac018 JB |
449 | |
450 | if (on) { | |
451 | con |= CON_RXDMA_ACTIVE | CON_ACTIVE; | |
452 | con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); | |
453 | ||
454 | if (any_tx_active(i2s)) | |
a5a56871 | 455 | mod |= 2 << txr_off; |
1c7ac018 | 456 | else |
a5a56871 | 457 | mod |= 1 << txr_off; |
1c7ac018 JB |
458 | } else { |
459 | con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; | |
460 | con &= ~CON_RXDMA_ACTIVE; | |
461 | ||
462 | if (any_tx_active(i2s)) | |
a5a56871 | 463 | mod |= 0 << txr_off; |
1c7ac018 JB |
464 | else |
465 | con &= ~CON_ACTIVE; | |
466 | } | |
467 | ||
468 | writel(mod, addr + I2SMOD); | |
469 | writel(con, addr + I2SCON); | |
470 | } | |
471 | ||
472 | /* Flush FIFO of an interface */ | |
473 | static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) | |
474 | { | |
475 | void __iomem *fic; | |
476 | u32 val; | |
477 | ||
478 | if (!i2s) | |
479 | return; | |
480 | ||
481 | if (is_secondary(i2s)) | |
e2e16fa6 | 482 | fic = i2s->priv->addr + I2SFICS; |
1c7ac018 | 483 | else |
e2e16fa6 | 484 | fic = i2s->priv->addr + I2SFIC; |
1c7ac018 JB |
485 | |
486 | /* Flush the FIFO */ | |
487 | writel(readl(fic) | flush, fic); | |
488 | ||
489 | /* Be patient */ | |
490 | val = msecs_to_loops(1) / 1000; /* 1 usec */ | |
491 | while (--val) | |
492 | cpu_relax(); | |
493 | ||
494 | writel(readl(fic) & ~flush, fic); | |
495 | } | |
496 | ||
3b0fa51f SN |
497 | static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs, |
498 | int dir) | |
1c7ac018 | 499 | { |
3b0fa51f | 500 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
1c7ac018 | 501 | struct i2s_dai *i2s = to_info(dai); |
dcd60fc3 | 502 | struct i2s_dai *other = get_other_dai(i2s); |
5bfaeddc | 503 | const struct samsung_i2s_variant_regs *i2s_regs = priv->variant_regs; |
a5a56871 PV |
504 | unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off; |
505 | unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off; | |
ce8bcdbb | 506 | u32 mod, mask, val = 0; |
316fa9e0 | 507 | unsigned long flags; |
dc938ddb MS |
508 | int ret = 0; |
509 | ||
510 | pm_runtime_get_sync(dai->dev); | |
ce8bcdbb | 511 | |
9d7939c9 | 512 | spin_lock_irqsave(&priv->lock, flags); |
e2e16fa6 | 513 | mod = readl(priv->addr + I2SMOD); |
9d7939c9 | 514 | spin_unlock_irqrestore(&priv->lock, flags); |
1c7ac018 JB |
515 | |
516 | switch (clk_id) { | |
c86d50f9 | 517 | case SAMSUNG_I2S_OPCLK: |
ce8bcdbb | 518 | mask = MOD_OPCLK_MASK; |
45ae70e8 | 519 | val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK; |
c86d50f9 | 520 | break; |
1c7ac018 | 521 | case SAMSUNG_I2S_CDCLK: |
ce8bcdbb | 522 | mask = 1 << i2s_regs->cdclkcon_off; |
1c7ac018 JB |
523 | /* Shouldn't matter in GATING(CLOCK_IN) mode */ |
524 | if (dir == SND_SOC_CLOCK_IN) | |
525 | rfs = 0; | |
526 | ||
133c2681 | 527 | if ((rfs && other && other->rfs && (other->rfs != rfs)) || |
1c7ac018 JB |
528 | (any_active(i2s) && |
529 | (((dir == SND_SOC_CLOCK_IN) | |
a5a56871 | 530 | && !(mod & cdcon_mask)) || |
1c7ac018 | 531 | ((dir == SND_SOC_CLOCK_OUT) |
a5a56871 | 532 | && (mod & cdcon_mask))))) { |
1c7ac018 JB |
533 | dev_err(&i2s->pdev->dev, |
534 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
dc938ddb MS |
535 | ret = -EAGAIN; |
536 | goto err; | |
1c7ac018 JB |
537 | } |
538 | ||
539 | if (dir == SND_SOC_CLOCK_IN) | |
ce8bcdbb | 540 | val = 1 << i2s_regs->cdclkcon_off; |
1c7ac018 JB |
541 | |
542 | i2s->rfs = rfs; | |
543 | break; | |
544 | ||
545 | case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ | |
546 | case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ | |
ce8bcdbb SN |
547 | mask = 1 << i2s_regs->rclksrc_off; |
548 | ||
5944170f | 549 | if ((priv->quirks & QUIRK_NO_MUXPSR) |
1c7ac018 JB |
550 | || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) |
551 | clk_id = 0; | |
552 | else | |
553 | clk_id = 1; | |
554 | ||
555 | if (!any_active(i2s)) { | |
3b0fa51f | 556 | if (priv->op_clk && !IS_ERR(priv->op_clk)) { |
a5a56871 PV |
557 | if ((clk_id && !(mod & rsrc_mask)) || |
558 | (!clk_id && (mod & rsrc_mask))) { | |
3b0fa51f SN |
559 | clk_disable_unprepare(priv->op_clk); |
560 | clk_put(priv->op_clk); | |
1c7ac018 | 561 | } else { |
3b0fa51f SN |
562 | priv->rclk_srcrate = |
563 | clk_get_rate(priv->op_clk); | |
dc938ddb | 564 | goto done; |
1c7ac018 JB |
565 | } |
566 | } | |
567 | ||
1974a042 | 568 | if (clk_id) |
3b0fa51f | 569 | priv->op_clk = clk_get(&i2s->pdev->dev, |
1974a042 PV |
570 | "i2s_opclk1"); |
571 | else | |
3b0fa51f | 572 | priv->op_clk = clk_get(&i2s->pdev->dev, |
1974a042 | 573 | "i2s_opclk0"); |
a6aba536 | 574 | |
3b0fa51f SN |
575 | if (WARN_ON(IS_ERR(priv->op_clk))) { |
576 | ret = PTR_ERR(priv->op_clk); | |
577 | priv->op_clk = NULL; | |
dc938ddb MS |
578 | goto err; |
579 | } | |
a6aba536 | 580 | |
3b0fa51f | 581 | ret = clk_prepare_enable(priv->op_clk); |
6431a7e3 | 582 | if (ret) { |
3b0fa51f SN |
583 | clk_put(priv->op_clk); |
584 | priv->op_clk = NULL; | |
f5c97c7b | 585 | goto err; |
6431a7e3 | 586 | } |
3b0fa51f | 587 | priv->rclk_srcrate = clk_get_rate(priv->op_clk); |
1c7ac018 | 588 | |
a5a56871 PV |
589 | } else if ((!clk_id && (mod & rsrc_mask)) |
590 | || (clk_id && !(mod & rsrc_mask))) { | |
1c7ac018 JB |
591 | dev_err(&i2s->pdev->dev, |
592 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
dc938ddb MS |
593 | ret = -EAGAIN; |
594 | goto err; | |
1c7ac018 JB |
595 | } else { |
596 | /* Call can't be on the active DAI */ | |
dc938ddb | 597 | goto done; |
1c7ac018 JB |
598 | } |
599 | ||
ce8bcdbb SN |
600 | if (clk_id == 1) |
601 | val = 1 << i2s_regs->rclksrc_off; | |
b2de1d20 | 602 | break; |
1c7ac018 JB |
603 | default: |
604 | dev_err(&i2s->pdev->dev, "We don't serve that!\n"); | |
dc938ddb MS |
605 | ret = -EINVAL; |
606 | goto err; | |
1c7ac018 JB |
607 | } |
608 | ||
9d7939c9 | 609 | spin_lock_irqsave(&priv->lock, flags); |
e2e16fa6 | 610 | mod = readl(priv->addr + I2SMOD); |
ce8bcdbb | 611 | mod = (mod & ~mask) | val; |
e2e16fa6 | 612 | writel(mod, priv->addr + I2SMOD); |
9d7939c9 | 613 | spin_unlock_irqrestore(&priv->lock, flags); |
dc938ddb MS |
614 | done: |
615 | pm_runtime_put(dai->dev); | |
1c7ac018 JB |
616 | |
617 | return 0; | |
dc938ddb MS |
618 | err: |
619 | pm_runtime_put(dai->dev); | |
620 | return ret; | |
1c7ac018 JB |
621 | } |
622 | ||
89d2e831 | 623 | static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
1c7ac018 | 624 | { |
89d2e831 | 625 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
1c7ac018 | 626 | struct i2s_dai *i2s = to_info(dai); |
a5a56871 | 627 | int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave; |
ce8bcdbb | 628 | u32 mod, tmp = 0; |
316fa9e0 | 629 | unsigned long flags; |
1c7ac018 | 630 | |
5bfaeddc SN |
631 | lrp_shift = priv->variant_regs->lrp_off; |
632 | sdf_shift = priv->variant_regs->sdf_off; | |
633 | mod_slave = 1 << priv->variant_regs->mss_off; | |
4ca0c0d4 | 634 | |
b60be4aa PV |
635 | sdf_mask = MOD_SDF_MASK << sdf_shift; |
636 | lrp_rlow = MOD_LR_RLOW << lrp_shift; | |
637 | ||
1c7ac018 JB |
638 | /* Format is priority */ |
639 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
640 | case SND_SOC_DAIFMT_RIGHT_J: | |
b60be4aa PV |
641 | tmp |= lrp_rlow; |
642 | tmp |= (MOD_SDF_MSB << sdf_shift); | |
1c7ac018 JB |
643 | break; |
644 | case SND_SOC_DAIFMT_LEFT_J: | |
b60be4aa PV |
645 | tmp |= lrp_rlow; |
646 | tmp |= (MOD_SDF_LSB << sdf_shift); | |
1c7ac018 JB |
647 | break; |
648 | case SND_SOC_DAIFMT_I2S: | |
b60be4aa | 649 | tmp |= (MOD_SDF_IIS << sdf_shift); |
1c7ac018 JB |
650 | break; |
651 | default: | |
652 | dev_err(&i2s->pdev->dev, "Format not supported\n"); | |
653 | return -EINVAL; | |
654 | } | |
655 | ||
656 | /* | |
657 | * INV flag is relative to the FORMAT flag - if set it simply | |
658 | * flips the polarity specified by the Standard | |
659 | */ | |
660 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
661 | case SND_SOC_DAIFMT_NB_NF: | |
662 | break; | |
663 | case SND_SOC_DAIFMT_NB_IF: | |
b60be4aa PV |
664 | if (tmp & lrp_rlow) |
665 | tmp &= ~lrp_rlow; | |
1c7ac018 | 666 | else |
b60be4aa | 667 | tmp |= lrp_rlow; |
1c7ac018 JB |
668 | break; |
669 | default: | |
670 | dev_err(&i2s->pdev->dev, "Polarity not supported\n"); | |
671 | return -EINVAL; | |
672 | } | |
673 | ||
674 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
675 | case SND_SOC_DAIFMT_CBM_CFM: | |
a5a56871 | 676 | tmp |= mod_slave; |
1c7ac018 JB |
677 | break; |
678 | case SND_SOC_DAIFMT_CBS_CFS: | |
647d04f8 SN |
679 | /* |
680 | * Set default source clock in Master mode, only when the | |
681 | * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any | |
682 | * clock configuration assigned in DT is not overwritten. | |
683 | */ | |
3b0fa51f | 684 | if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL) |
1c7ac018 JB |
685 | i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, |
686 | 0, SND_SOC_CLOCK_IN); | |
687 | break; | |
688 | default: | |
689 | dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); | |
690 | return -EINVAL; | |
691 | } | |
692 | ||
dc938ddb | 693 | pm_runtime_get_sync(dai->dev); |
9d7939c9 | 694 | spin_lock_irqsave(&priv->lock, flags); |
e2e16fa6 | 695 | mod = readl(priv->addr + I2SMOD); |
b60be4aa PV |
696 | /* |
697 | * Don't change the I2S mode if any controller is active on this | |
698 | * channel. | |
699 | */ | |
1c7ac018 | 700 | if (any_active(i2s) && |
a5a56871 | 701 | ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) { |
9d7939c9 | 702 | spin_unlock_irqrestore(&priv->lock, flags); |
dc938ddb | 703 | pm_runtime_put(dai->dev); |
1c7ac018 JB |
704 | dev_err(&i2s->pdev->dev, |
705 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
706 | return -EAGAIN; | |
707 | } | |
708 | ||
a5a56871 | 709 | mod &= ~(sdf_mask | lrp_rlow | mod_slave); |
1c7ac018 | 710 | mod |= tmp; |
e2e16fa6 | 711 | writel(mod, priv->addr + I2SMOD); |
f29eec79 | 712 | priv->slave_mode = (mod & mod_slave); |
9d7939c9 | 713 | spin_unlock_irqrestore(&priv->lock, flags); |
dc938ddb | 714 | pm_runtime_put(dai->dev); |
1c7ac018 JB |
715 | |
716 | return 0; | |
717 | } | |
718 | ||
719 | static int i2s_hw_params(struct snd_pcm_substream *substream, | |
720 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | |
721 | { | |
89d2e831 | 722 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
1c7ac018 | 723 | struct i2s_dai *i2s = to_info(dai); |
ce8bcdbb | 724 | u32 mod, mask = 0, val = 0; |
860b454c | 725 | struct clk *rclksrc; |
316fa9e0 | 726 | unsigned long flags; |
1c7ac018 | 727 | |
dc938ddb MS |
728 | WARN_ON(!pm_runtime_active(dai->dev)); |
729 | ||
1c7ac018 | 730 | if (!is_secondary(i2s)) |
ce8bcdbb | 731 | mask |= (MOD_DC2_EN | MOD_DC1_EN); |
1c7ac018 JB |
732 | |
733 | switch (params_channels(params)) { | |
734 | case 6: | |
ce8bcdbb | 735 | val |= MOD_DC2_EN; |
9f9f8a5b | 736 | /* Fall through */ |
1c7ac018 | 737 | case 4: |
ce8bcdbb | 738 | val |= MOD_DC1_EN; |
1c7ac018 JB |
739 | break; |
740 | case 2: | |
588fb705 | 741 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
69e7a69a | 742 | i2s->dma_playback.addr_width = 4; |
588fb705 | 743 | else |
69e7a69a | 744 | i2s->dma_capture.addr_width = 4; |
588fb705 SP |
745 | break; |
746 | case 1: | |
747 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
69e7a69a | 748 | i2s->dma_playback.addr_width = 2; |
588fb705 | 749 | else |
69e7a69a | 750 | i2s->dma_capture.addr_width = 2; |
588fb705 | 751 | |
1c7ac018 JB |
752 | break; |
753 | default: | |
754 | dev_err(&i2s->pdev->dev, "%d channels not supported\n", | |
755 | params_channels(params)); | |
756 | return -EINVAL; | |
757 | } | |
758 | ||
759 | if (is_secondary(i2s)) | |
ce8bcdbb | 760 | mask |= MOD_BLCS_MASK; |
1c7ac018 | 761 | else |
ce8bcdbb | 762 | mask |= MOD_BLCP_MASK; |
1c7ac018 JB |
763 | |
764 | if (is_manager(i2s)) | |
ce8bcdbb | 765 | mask |= MOD_BLC_MASK; |
1c7ac018 | 766 | |
88ce1465 TB |
767 | switch (params_width(params)) { |
768 | case 8: | |
1c7ac018 | 769 | if (is_secondary(i2s)) |
ce8bcdbb | 770 | val |= MOD_BLCS_8BIT; |
1c7ac018 | 771 | else |
ce8bcdbb | 772 | val |= MOD_BLCP_8BIT; |
1c7ac018 | 773 | if (is_manager(i2s)) |
ce8bcdbb | 774 | val |= MOD_BLC_8BIT; |
1c7ac018 | 775 | break; |
88ce1465 | 776 | case 16: |
1c7ac018 | 777 | if (is_secondary(i2s)) |
ce8bcdbb | 778 | val |= MOD_BLCS_16BIT; |
1c7ac018 | 779 | else |
ce8bcdbb | 780 | val |= MOD_BLCP_16BIT; |
1c7ac018 | 781 | if (is_manager(i2s)) |
ce8bcdbb | 782 | val |= MOD_BLC_16BIT; |
1c7ac018 | 783 | break; |
88ce1465 | 784 | case 24: |
1c7ac018 | 785 | if (is_secondary(i2s)) |
ce8bcdbb | 786 | val |= MOD_BLCS_24BIT; |
1c7ac018 | 787 | else |
ce8bcdbb | 788 | val |= MOD_BLCP_24BIT; |
1c7ac018 | 789 | if (is_manager(i2s)) |
ce8bcdbb | 790 | val |= MOD_BLC_24BIT; |
1c7ac018 JB |
791 | break; |
792 | default: | |
793 | dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", | |
794 | params_format(params)); | |
795 | return -EINVAL; | |
796 | } | |
ce8bcdbb | 797 | |
9d7939c9 | 798 | spin_lock_irqsave(&priv->lock, flags); |
e2e16fa6 | 799 | mod = readl(priv->addr + I2SMOD); |
ce8bcdbb | 800 | mod = (mod & ~mask) | val; |
e2e16fa6 | 801 | writel(mod, priv->addr + I2SMOD); |
9d7939c9 | 802 | spin_unlock_irqrestore(&priv->lock, flags); |
1c7ac018 | 803 | |
69e7a69a | 804 | snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); |
d37bdf73 | 805 | |
1c7ac018 JB |
806 | i2s->frmclk = params_rate(params); |
807 | ||
89d2e831 | 808 | rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC]; |
860b454c | 809 | if (rclksrc && !IS_ERR(rclksrc)) |
3b0fa51f | 810 | priv->rclk_srcrate = clk_get_rate(rclksrc); |
860b454c | 811 | |
1c7ac018 JB |
812 | return 0; |
813 | } | |
814 | ||
9f9f8a5b | 815 | /* We set constraints on the substream according to the version of I2S */ |
1c7ac018 JB |
816 | static int i2s_startup(struct snd_pcm_substream *substream, |
817 | struct snd_soc_dai *dai) | |
818 | { | |
5944170f | 819 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
1c7ac018 | 820 | struct i2s_dai *i2s = to_info(dai); |
dcd60fc3 | 821 | struct i2s_dai *other = get_other_dai(i2s); |
1c7ac018 JB |
822 | unsigned long flags; |
823 | ||
dc938ddb MS |
824 | pm_runtime_get_sync(dai->dev); |
825 | ||
defc67c6 | 826 | spin_lock_irqsave(&priv->pcm_lock, flags); |
1c7ac018 JB |
827 | |
828 | i2s->mode |= DAI_OPENED; | |
829 | ||
830 | if (is_manager(other)) | |
831 | i2s->mode &= ~DAI_MANAGER; | |
832 | else | |
833 | i2s->mode |= DAI_MANAGER; | |
834 | ||
5944170f | 835 | if (!any_active(i2s) && (priv->quirks & QUIRK_NEED_RSTCLR)) |
e2e16fa6 | 836 | writel(CON_RSTCLR, i2s->priv->addr + I2SCON); |
2d77828d | 837 | |
defc67c6 | 838 | spin_unlock_irqrestore(&priv->pcm_lock, flags); |
1c7ac018 JB |
839 | |
840 | return 0; | |
841 | } | |
842 | ||
843 | static void i2s_shutdown(struct snd_pcm_substream *substream, | |
844 | struct snd_soc_dai *dai) | |
845 | { | |
defc67c6 | 846 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
1c7ac018 | 847 | struct i2s_dai *i2s = to_info(dai); |
dcd60fc3 | 848 | struct i2s_dai *other = get_other_dai(i2s); |
1c7ac018 JB |
849 | unsigned long flags; |
850 | ||
defc67c6 | 851 | spin_lock_irqsave(&priv->pcm_lock, flags); |
1c7ac018 JB |
852 | |
853 | i2s->mode &= ~DAI_OPENED; | |
854 | i2s->mode &= ~DAI_MANAGER; | |
855 | ||
074b89bb | 856 | if (is_opened(other)) |
1c7ac018 | 857 | other->mode |= DAI_MANAGER; |
074b89bb | 858 | |
1c7ac018 JB |
859 | /* Reset any constraint on RFS and BFS */ |
860 | i2s->rfs = 0; | |
861 | i2s->bfs = 0; | |
862 | ||
defc67c6 | 863 | spin_unlock_irqrestore(&priv->pcm_lock, flags); |
dc938ddb MS |
864 | |
865 | pm_runtime_put(dai->dev); | |
1c7ac018 JB |
866 | } |
867 | ||
868 | static int config_setup(struct i2s_dai *i2s) | |
869 | { | |
3b0fa51f | 870 | struct samsung_i2s_priv *priv = i2s->priv; |
dcd60fc3 | 871 | struct i2s_dai *other = get_other_dai(i2s); |
1c7ac018 JB |
872 | unsigned rfs, bfs, blc; |
873 | u32 psr; | |
874 | ||
875 | blc = get_blc(i2s); | |
876 | ||
877 | bfs = i2s->bfs; | |
878 | ||
879 | if (!bfs && other) | |
880 | bfs = other->bfs; | |
881 | ||
882 | /* Select least possible multiple(2) if no constraint set */ | |
883 | if (!bfs) | |
884 | bfs = blc * 2; | |
885 | ||
886 | rfs = i2s->rfs; | |
887 | ||
888 | if (!rfs && other) | |
889 | rfs = other->rfs; | |
890 | ||
891 | if ((rfs == 256 || rfs == 512) && (blc == 24)) { | |
892 | dev_err(&i2s->pdev->dev, | |
893 | "%d-RFS not supported for 24-blc\n", rfs); | |
894 | return -EINVAL; | |
895 | } | |
896 | ||
897 | if (!rfs) { | |
898 | if (bfs == 16 || bfs == 32) | |
899 | rfs = 256; | |
900 | else | |
901 | rfs = 384; | |
902 | } | |
903 | ||
904 | /* If already setup and running */ | |
905 | if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { | |
906 | dev_err(&i2s->pdev->dev, | |
907 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
908 | return -EAGAIN; | |
909 | } | |
910 | ||
1c7ac018 JB |
911 | set_bfs(i2s, bfs); |
912 | set_rfs(i2s, rfs); | |
913 | ||
77010010 | 914 | /* Don't bother with PSR in Slave mode */ |
f29eec79 | 915 | if (priv->slave_mode) |
77010010 PV |
916 | return 0; |
917 | ||
5944170f | 918 | if (!(priv->quirks & QUIRK_NO_MUXPSR)) { |
3b0fa51f | 919 | psr = priv->rclk_srcrate / i2s->frmclk / rfs; |
e2e16fa6 | 920 | writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR); |
1c7ac018 JB |
921 | dev_dbg(&i2s->pdev->dev, |
922 | "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", | |
3b0fa51f | 923 | priv->rclk_srcrate, psr, rfs, bfs); |
1c7ac018 JB |
924 | } |
925 | ||
926 | return 0; | |
927 | } | |
928 | ||
929 | static int i2s_trigger(struct snd_pcm_substream *substream, | |
930 | int cmd, struct snd_soc_dai *dai) | |
931 | { | |
9d7939c9 | 932 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
1c7ac018 JB |
933 | int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); |
934 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
7de6b6bc | 935 | struct i2s_dai *i2s = to_info(asoc_rtd_to_cpu(rtd, 0)); |
1c7ac018 JB |
936 | unsigned long flags; |
937 | ||
938 | switch (cmd) { | |
939 | case SNDRV_PCM_TRIGGER_START: | |
940 | case SNDRV_PCM_TRIGGER_RESUME: | |
941 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
dc938ddb | 942 | pm_runtime_get_sync(dai->dev); |
9d7939c9 | 943 | spin_lock_irqsave(&priv->lock, flags); |
1c7ac018 | 944 | |
1c7ac018 | 945 | if (config_setup(i2s)) { |
9d7939c9 | 946 | spin_unlock_irqrestore(&priv->lock, flags); |
1c7ac018 JB |
947 | return -EINVAL; |
948 | } | |
949 | ||
950 | if (capture) | |
951 | i2s_rxctrl(i2s, 1); | |
952 | else | |
953 | i2s_txctrl(i2s, 1); | |
954 | ||
9d7939c9 | 955 | spin_unlock_irqrestore(&priv->lock, flags); |
1c7ac018 JB |
956 | break; |
957 | case SNDRV_PCM_TRIGGER_STOP: | |
958 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
959 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
9d7939c9 | 960 | spin_lock_irqsave(&priv->lock, flags); |
1c7ac018 | 961 | |
c90887fe | 962 | if (capture) { |
1c7ac018 | 963 | i2s_rxctrl(i2s, 0); |
775bc971 | 964 | i2s_fifo(i2s, FIC_RXFLUSH); |
c90887fe JB |
965 | } else { |
966 | i2s_txctrl(i2s, 0); | |
775bc971 | 967 | i2s_fifo(i2s, FIC_TXFLUSH); |
c90887fe | 968 | } |
775bc971 | 969 | |
9d7939c9 | 970 | spin_unlock_irqrestore(&priv->lock, flags); |
dc938ddb | 971 | pm_runtime_put(dai->dev); |
1c7ac018 JB |
972 | break; |
973 | } | |
974 | ||
975 | return 0; | |
976 | } | |
977 | ||
978 | static int i2s_set_clkdiv(struct snd_soc_dai *dai, | |
979 | int div_id, int div) | |
980 | { | |
981 | struct i2s_dai *i2s = to_info(dai); | |
dcd60fc3 | 982 | struct i2s_dai *other = get_other_dai(i2s); |
1c7ac018 JB |
983 | |
984 | switch (div_id) { | |
985 | case SAMSUNG_I2S_DIV_BCLK: | |
dc938ddb | 986 | pm_runtime_get_sync(dai->dev); |
1c7ac018 JB |
987 | if ((any_active(i2s) && div && (get_bfs(i2s) != div)) |
988 | || (other && other->bfs && (other->bfs != div))) { | |
dc938ddb | 989 | pm_runtime_put(dai->dev); |
1c7ac018 JB |
990 | dev_err(&i2s->pdev->dev, |
991 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
992 | return -EAGAIN; | |
993 | } | |
994 | i2s->bfs = div; | |
dc938ddb | 995 | pm_runtime_put(dai->dev); |
1c7ac018 JB |
996 | break; |
997 | default: | |
998 | dev_err(&i2s->pdev->dev, | |
999 | "Invalid clock divider(%d)\n", div_id); | |
1000 | return -EINVAL; | |
1001 | } | |
1002 | ||
1003 | return 0; | |
1004 | } | |
1005 | ||
1006 | static snd_pcm_sframes_t | |
1007 | i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) | |
1008 | { | |
e2e16fa6 | 1009 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
1c7ac018 | 1010 | struct i2s_dai *i2s = to_info(dai); |
e2e16fa6 | 1011 | u32 reg = readl(priv->addr + I2SFIC); |
1c7ac018 JB |
1012 | snd_pcm_sframes_t delay; |
1013 | ||
dc938ddb MS |
1014 | WARN_ON(!pm_runtime_active(dai->dev)); |
1015 | ||
1c7ac018 JB |
1016 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) |
1017 | delay = FIC_RXCOUNT(reg); | |
1018 | else if (is_secondary(i2s)) | |
e2e16fa6 | 1019 | delay = FICS_TXCOUNT(readl(priv->addr + I2SFICS)); |
1c7ac018 | 1020 | else |
5bfaeddc | 1021 | delay = (reg >> priv->variant_regs->ftx0cnt_off) & 0x7f; |
1c7ac018 JB |
1022 | |
1023 | return delay; | |
1024 | } | |
1025 | ||
1026 | #ifdef CONFIG_PM | |
21385a4f | 1027 | static int i2s_suspend(struct snd_soc_component *component) |
1c7ac018 | 1028 | { |
21385a4f | 1029 | return pm_runtime_force_suspend(component->dev); |
1c7ac018 JB |
1030 | } |
1031 | ||
21385a4f | 1032 | static int i2s_resume(struct snd_soc_component *component) |
1c7ac018 | 1033 | { |
21385a4f | 1034 | return pm_runtime_force_resume(component->dev); |
1c7ac018 JB |
1035 | } |
1036 | #else | |
1037 | #define i2s_suspend NULL | |
1038 | #define i2s_resume NULL | |
1039 | #endif | |
1040 | ||
1041 | static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) | |
1042 | { | |
e2e16fa6 | 1043 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
1c7ac018 | 1044 | struct i2s_dai *i2s = to_info(dai); |
dcd60fc3 | 1045 | struct i2s_dai *other = get_other_dai(i2s); |
ce8bcdbb | 1046 | unsigned long flags; |
1c7ac018 | 1047 | |
dc938ddb MS |
1048 | pm_runtime_get_sync(dai->dev); |
1049 | ||
9f9f8a5b SN |
1050 | if (is_secondary(i2s)) { |
1051 | /* If this is probe on the secondary DAI */ | |
eb540d39 | 1052 | snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, NULL); |
872c26bd | 1053 | } else { |
69e7a69a | 1054 | snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, |
eb540d39 | 1055 | &i2s->dma_capture); |
511e3033 | 1056 | |
5944170f | 1057 | if (priv->quirks & QUIRK_NEED_RSTCLR) |
e2e16fa6 | 1058 | writel(CON_RSTCLR, priv->addr + I2SCON); |
1c7ac018 | 1059 | |
5944170f | 1060 | if (priv->quirks & QUIRK_SUPPORTS_IDMA) |
e2e16fa6 | 1061 | idma_reg_addr_init(priv->addr, |
eb540d39 | 1062 | other->idma_playback.addr); |
872c26bd | 1063 | } |
61100f40 | 1064 | |
1c7ac018 JB |
1065 | /* Reset any constraint on RFS and BFS */ |
1066 | i2s->rfs = 0; | |
1067 | i2s->bfs = 0; | |
ce8bcdbb | 1068 | |
9d7939c9 | 1069 | spin_lock_irqsave(&priv->lock, flags); |
1c7ac018 JB |
1070 | i2s_txctrl(i2s, 0); |
1071 | i2s_rxctrl(i2s, 0); | |
1072 | i2s_fifo(i2s, FIC_TXFLUSH); | |
1073 | i2s_fifo(other, FIC_TXFLUSH); | |
1074 | i2s_fifo(i2s, FIC_RXFLUSH); | |
9d7939c9 | 1075 | spin_unlock_irqrestore(&priv->lock, flags); |
1c7ac018 JB |
1076 | |
1077 | /* Gate CDCLK by default */ | |
1078 | if (!is_opened(other)) | |
1079 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
1080 | 0, SND_SOC_CLOCK_IN); | |
dc938ddb | 1081 | pm_runtime_put(dai->dev); |
1c7ac018 JB |
1082 | |
1083 | return 0; | |
1084 | } | |
1085 | ||
1086 | static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) | |
1087 | { | |
e2e16fa6 | 1088 | struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); |
a404b72d | 1089 | struct i2s_dai *i2s = to_info(dai); |
5faf071d | 1090 | unsigned long flags; |
1c7ac018 | 1091 | |
dc938ddb MS |
1092 | pm_runtime_get_sync(dai->dev); |
1093 | ||
c92f1d0e | 1094 | if (!is_secondary(i2s)) { |
5944170f | 1095 | if (priv->quirks & QUIRK_NEED_RSTCLR) { |
9d7939c9 | 1096 | spin_lock_irqsave(&priv->lock, flags); |
e2e16fa6 | 1097 | writel(0, priv->addr + I2SCON); |
9d7939c9 | 1098 | spin_unlock_irqrestore(&priv->lock, flags); |
ce8bcdbb | 1099 | } |
1c7ac018 JB |
1100 | } |
1101 | ||
dc938ddb MS |
1102 | pm_runtime_put(dai->dev); |
1103 | ||
1c7ac018 JB |
1104 | return 0; |
1105 | } | |
1106 | ||
85e7652d | 1107 | static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { |
1c7ac018 JB |
1108 | .trigger = i2s_trigger, |
1109 | .hw_params = i2s_hw_params, | |
1110 | .set_fmt = i2s_set_fmt, | |
1111 | .set_clkdiv = i2s_set_clkdiv, | |
1112 | .set_sysclk = i2s_set_sysclk, | |
1113 | .startup = i2s_startup, | |
1114 | .shutdown = i2s_shutdown, | |
1115 | .delay = i2s_delay, | |
1116 | }; | |
1117 | ||
64aba9bc SN |
1118 | static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = { |
1119 | /* Backend DAI */ | |
1120 | SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0), | |
1121 | SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0), | |
1122 | ||
1123 | /* Playback Mixer */ | |
1124 | SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1125 | }; | |
1126 | ||
1127 | static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = { | |
42e4cedd SN |
1128 | { "Playback Mixer", NULL, "Primary Playback" }, |
1129 | { "Playback Mixer", NULL, "Secondary Playback" }, | |
64aba9bc SN |
1130 | |
1131 | { "Mixer DAI TX", NULL, "Playback Mixer" }, | |
42e4cedd | 1132 | { "Primary Capture", NULL, "Mixer DAI RX" }, |
64aba9bc SN |
1133 | }; |
1134 | ||
4b828535 | 1135 | static const struct snd_soc_component_driver samsung_i2s_component = { |
64aba9bc SN |
1136 | .name = "samsung-i2s", |
1137 | ||
1138 | .dapm_widgets = samsung_i2s_widgets, | |
1139 | .num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets), | |
1140 | ||
1141 | .dapm_routes = samsung_i2s_dapm_routes, | |
1142 | .num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes), | |
21385a4f KM |
1143 | |
1144 | .suspend = i2s_suspend, | |
1145 | .resume = i2s_resume, | |
4b828535 KM |
1146 | }; |
1147 | ||
c5ba6192 SN |
1148 | #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \ |
1149 | SNDRV_PCM_FMTBIT_S24_LE) | |
1c7ac018 | 1150 | |
a404b72d SN |
1151 | static int i2s_alloc_dais(struct samsung_i2s_priv *priv, |
1152 | const struct samsung_i2s_dai_data *i2s_dai_data, | |
1153 | int num_dais) | |
1c7ac018 | 1154 | { |
a404b72d | 1155 | static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" }; |
42e4cedd SN |
1156 | static const char *stream_names[] = { "Primary Playback", |
1157 | "Secondary Playback" }; | |
a404b72d SN |
1158 | struct snd_soc_dai_driver *dai_drv; |
1159 | struct i2s_dai *dai; | |
1160 | int i; | |
1161 | ||
1162 | priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais, | |
1163 | sizeof(*dai), GFP_KERNEL); | |
1164 | if (!priv->dai) | |
1165 | return -ENOMEM; | |
1166 | ||
1167 | priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais, | |
1168 | sizeof(*dai_drv), GFP_KERNEL); | |
1169 | if (!priv->dai_drv) | |
1170 | return -ENOMEM; | |
1171 | ||
1172 | for (i = 0; i < num_dais; i++) { | |
1173 | dai_drv = &priv->dai_drv[i]; | |
1174 | ||
1175 | dai_drv->probe = samsung_i2s_dai_probe; | |
1176 | dai_drv->remove = samsung_i2s_dai_remove; | |
a404b72d SN |
1177 | |
1178 | dai_drv->symmetric_rates = 1; | |
1179 | dai_drv->ops = &samsung_i2s_dai_ops; | |
1180 | ||
1181 | dai_drv->playback.channels_min = 1; | |
1182 | dai_drv->playback.channels_max = 2; | |
1183 | dai_drv->playback.rates = i2s_dai_data->pcm_rates; | |
1184 | dai_drv->playback.formats = SAMSUNG_I2S_FMTS; | |
64aba9bc | 1185 | dai_drv->playback.stream_name = stream_names[i]; |
a404b72d SN |
1186 | |
1187 | dai_drv->id = i + 1; | |
1188 | dai_drv->name = dai_names[i]; | |
1189 | ||
1190 | priv->dai[i].drv = &priv->dai_drv[i]; | |
1191 | priv->dai[i].pdev = priv->pdev; | |
c6f9b1eb | 1192 | } |
a404b72d SN |
1193 | |
1194 | /* Initialize capture only for the primary DAI */ | |
1195 | dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1]; | |
1196 | ||
1197 | dai_drv->capture.channels_min = 1; | |
1198 | dai_drv->capture.channels_max = 2; | |
1199 | dai_drv->capture.rates = i2s_dai_data->pcm_rates; | |
1200 | dai_drv->capture.formats = SAMSUNG_I2S_FMTS; | |
42e4cedd | 1201 | dai_drv->capture.stream_name = "Primary Capture"; |
a404b72d SN |
1202 | |
1203 | return 0; | |
1c7ac018 JB |
1204 | } |
1205 | ||
641d334b | 1206 | #ifdef CONFIG_PM |
5b1d3c34 C |
1207 | static int i2s_runtime_suspend(struct device *dev) |
1208 | { | |
b5d015e6 | 1209 | struct samsung_i2s_priv *priv = dev_get_drvdata(dev); |
5b1d3c34 | 1210 | |
e2e16fa6 SN |
1211 | priv->suspend_i2smod = readl(priv->addr + I2SMOD); |
1212 | priv->suspend_i2scon = readl(priv->addr + I2SCON); | |
1213 | priv->suspend_i2spsr = readl(priv->addr + I2SPSR); | |
e7e52dfc | 1214 | |
3b0fa51f SN |
1215 | if (priv->op_clk) |
1216 | clk_disable_unprepare(priv->op_clk); | |
b5d015e6 | 1217 | clk_disable_unprepare(priv->clk); |
5b1d3c34 C |
1218 | |
1219 | return 0; | |
1220 | } | |
1221 | ||
1222 | static int i2s_runtime_resume(struct device *dev) | |
1223 | { | |
b5d015e6 | 1224 | struct samsung_i2s_priv *priv = dev_get_drvdata(dev); |
f5c97c7b | 1225 | int ret; |
5b1d3c34 | 1226 | |
b5d015e6 | 1227 | ret = clk_prepare_enable(priv->clk); |
f5c97c7b AY |
1228 | if (ret) |
1229 | return ret; | |
1230 | ||
3b0fa51f SN |
1231 | if (priv->op_clk) { |
1232 | ret = clk_prepare_enable(priv->op_clk); | |
f5c97c7b | 1233 | if (ret) { |
b5d015e6 | 1234 | clk_disable_unprepare(priv->clk); |
f5c97c7b AY |
1235 | return ret; |
1236 | } | |
1237 | } | |
5b1d3c34 | 1238 | |
e2e16fa6 SN |
1239 | writel(priv->suspend_i2scon, priv->addr + I2SCON); |
1240 | writel(priv->suspend_i2smod, priv->addr + I2SMOD); | |
1241 | writel(priv->suspend_i2spsr, priv->addr + I2SPSR); | |
5b1d3c34 C |
1242 | |
1243 | return 0; | |
1244 | } | |
641d334b | 1245 | #endif /* CONFIG_PM */ |
5b1d3c34 | 1246 | |
89d2e831 | 1247 | static void i2s_unregister_clocks(struct samsung_i2s_priv *priv) |
074b89bb SN |
1248 | { |
1249 | int i; | |
1250 | ||
89d2e831 SN |
1251 | for (i = 0; i < priv->clk_data.clk_num; i++) { |
1252 | if (!IS_ERR(priv->clk_table[i])) | |
1253 | clk_unregister(priv->clk_table[i]); | |
074b89bb SN |
1254 | } |
1255 | } | |
1256 | ||
89d2e831 | 1257 | static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv) |
074b89bb | 1258 | { |
89d2e831 SN |
1259 | of_clk_del_provider(priv->pdev->dev.of_node); |
1260 | i2s_unregister_clocks(priv); | |
074b89bb SN |
1261 | } |
1262 | ||
89d2e831 SN |
1263 | |
1264 | static int i2s_register_clock_provider(struct samsung_i2s_priv *priv) | |
074b89bb | 1265 | { |
a404b72d | 1266 | |
aa274c5c | 1267 | const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" }; |
074b89bb SN |
1268 | const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" }; |
1269 | const char *p_names[2] = { NULL }; | |
89d2e831 | 1270 | struct device *dev = &priv->pdev->dev; |
5bfaeddc | 1271 | const struct samsung_i2s_variant_regs *reg_info = priv->variant_regs; |
aa274c5c | 1272 | const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)]; |
074b89bb SN |
1273 | struct clk *rclksrc; |
1274 | int ret, i; | |
1275 | ||
1276 | /* Register the clock provider only if it's expected in the DTB */ | |
1277 | if (!of_find_property(dev->of_node, "#clock-cells", NULL)) | |
1278 | return 0; | |
1279 | ||
1280 | /* Get the RCLKSRC mux clock parent clock names */ | |
1281 | for (i = 0; i < ARRAY_SIZE(p_names); i++) { | |
1282 | rclksrc = clk_get(dev, clk_name[i]); | |
1283 | if (IS_ERR(rclksrc)) | |
1284 | continue; | |
1285 | p_names[i] = __clk_get_name(rclksrc); | |
1286 | clk_put(rclksrc); | |
1287 | } | |
1288 | ||
aa274c5c SN |
1289 | for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) { |
1290 | i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s", | |
1291 | dev_name(dev), i2s_clk_desc[i]); | |
1292 | if (!i2s_clk_name[i]) | |
1293 | return -ENOMEM; | |
1294 | } | |
1295 | ||
5944170f | 1296 | if (!(priv->quirks & QUIRK_NO_MUXPSR)) { |
074b89bb | 1297 | /* Activate the prescaler */ |
e2e16fa6 SN |
1298 | u32 val = readl(priv->addr + I2SPSR); |
1299 | writel(val | PSR_PSREN, priv->addr + I2SPSR); | |
074b89bb | 1300 | |
89d2e831 | 1301 | priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev, |
aa274c5c SN |
1302 | i2s_clk_name[CLK_I2S_RCLK_SRC], p_names, |
1303 | ARRAY_SIZE(p_names), | |
074b89bb | 1304 | CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, |
e2e16fa6 | 1305 | priv->addr + I2SMOD, reg_info->rclksrc_off, |
9d7939c9 | 1306 | 1, 0, &priv->lock); |
074b89bb | 1307 | |
89d2e831 | 1308 | priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev, |
aa274c5c SN |
1309 | i2s_clk_name[CLK_I2S_RCLK_PSR], |
1310 | i2s_clk_name[CLK_I2S_RCLK_SRC], | |
074b89bb | 1311 | CLK_SET_RATE_PARENT, |
9d7939c9 | 1312 | priv->addr + I2SPSR, 8, 6, 0, &priv->lock); |
074b89bb | 1313 | |
aa274c5c | 1314 | p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR]; |
89d2e831 | 1315 | priv->clk_data.clk_num = 2; |
074b89bb | 1316 | } |
074b89bb | 1317 | |
89d2e831 | 1318 | priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, |
aa274c5c SN |
1319 | i2s_clk_name[CLK_I2S_CDCLK], p_names[0], |
1320 | CLK_SET_RATE_PARENT, | |
e2e16fa6 | 1321 | priv->addr + I2SMOD, reg_info->cdclkcon_off, |
9d7939c9 | 1322 | CLK_GATE_SET_TO_DISABLE, &priv->lock); |
074b89bb | 1323 | |
89d2e831 SN |
1324 | priv->clk_data.clk_num += 1; |
1325 | priv->clk_data.clks = priv->clk_table; | |
074b89bb SN |
1326 | |
1327 | ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, | |
89d2e831 | 1328 | &priv->clk_data); |
074b89bb SN |
1329 | if (ret < 0) { |
1330 | dev_err(dev, "failed to add clock provider: %d\n", ret); | |
89d2e831 | 1331 | i2s_unregister_clocks(priv); |
074b89bb SN |
1332 | } |
1333 | ||
1334 | return ret; | |
1335 | } | |
1336 | ||
7196c64c SN |
1337 | /* Create platform device for the secondary PCM */ |
1338 | static int i2s_create_secondary_device(struct samsung_i2s_priv *priv) | |
1339 | { | |
c6bebefa SN |
1340 | struct platform_device *pdev_sec; |
1341 | const char *devname; | |
7196c64c SN |
1342 | int ret; |
1343 | ||
c6bebefa SN |
1344 | devname = devm_kasprintf(&priv->pdev->dev, GFP_KERNEL, "%s-sec", |
1345 | dev_name(&priv->pdev->dev)); | |
1346 | if (!devname) | |
7196c64c SN |
1347 | return -ENOMEM; |
1348 | ||
c6bebefa SN |
1349 | pdev_sec = platform_device_alloc(devname, -1); |
1350 | if (!pdev_sec) | |
1351 | return -ENOMEM; | |
1352 | ||
1353 | pdev_sec->driver_override = kstrdup("samsung-i2s", GFP_KERNEL); | |
1354 | ||
1355 | ret = platform_device_add(pdev_sec); | |
7196c64c | 1356 | if (ret < 0) { |
c6bebefa | 1357 | platform_device_put(pdev_sec); |
7196c64c SN |
1358 | return ret; |
1359 | } | |
1360 | ||
c6bebefa SN |
1361 | ret = device_attach(&pdev_sec->dev); |
1362 | if (ret <= 0) { | |
1363 | platform_device_unregister(priv->pdev_sec); | |
1364 | dev_info(&pdev_sec->dev, "device_attach() failed\n"); | |
1365 | return ret; | |
1366 | } | |
1367 | ||
1368 | priv->pdev_sec = pdev_sec; | |
7196c64c SN |
1369 | |
1370 | return 0; | |
1371 | } | |
1372 | ||
1373 | static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv) | |
1374 | { | |
022c4156 SN |
1375 | platform_device_unregister(priv->pdev_sec); |
1376 | priv->pdev_sec = NULL; | |
7196c64c | 1377 | } |
022c4156 | 1378 | |
fdca21ad | 1379 | static int samsung_i2s_probe(struct platform_device *pdev) |
1c7ac018 | 1380 | { |
1c7ac018 | 1381 | struct i2s_dai *pri_dai, *sec_dai = NULL; |
40476f61 | 1382 | struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; |
6e434122 | 1383 | u32 regs_base, idma_addr = 0; |
40476f61 | 1384 | struct device_node *np = pdev->dev.of_node; |
7da493e9 | 1385 | const struct samsung_i2s_dai_data *i2s_dai_data; |
c6bebefa | 1386 | const struct platform_device_id *id; |
a404b72d | 1387 | struct samsung_i2s_priv *priv; |
c6bebefa SN |
1388 | struct resource *res; |
1389 | int num_dais, ret; | |
1c7ac018 | 1390 | |
c6bebefa | 1391 | if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { |
2f7b5d14 | 1392 | i2s_dai_data = of_device_get_match_data(&pdev->dev); |
c6bebefa SN |
1393 | } else { |
1394 | id = platform_get_device_id(pdev); | |
7c62eebb | 1395 | |
c6bebefa SN |
1396 | /* Nothing to do if it is the secondary device probe */ |
1397 | if (!id) | |
1398 | return 0; | |
1399 | ||
1400 | i2s_dai_data = (struct samsung_i2s_dai_data *)id->driver_data; | |
1401 | } | |
7196c64c | 1402 | |
a404b72d SN |
1403 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); |
1404 | if (!priv) | |
40476f61 | 1405 | return -ENOMEM; |
1c7ac018 | 1406 | |
6e434122 SN |
1407 | if (np) { |
1408 | priv->quirks = i2s_dai_data->quirks; | |
1409 | } else { | |
1410 | if (!i2s_pdata) { | |
1411 | dev_err(&pdev->dev, "Missing platform data\n"); | |
1412 | return -EINVAL; | |
1413 | } | |
1414 | priv->quirks = i2s_pdata->type.quirks; | |
1415 | } | |
1416 | ||
1417 | num_dais = (priv->quirks & QUIRK_SEC_DAI) ? 2 : 1; | |
a404b72d | 1418 | priv->pdev = pdev; |
5944170f | 1419 | priv->variant_regs = i2s_dai_data->i2s_variant_regs; |
a404b72d SN |
1420 | |
1421 | ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais); | |
1422 | if (ret < 0) | |
1423 | return ret; | |
1424 | ||
1425 | pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1]; | |
1426 | ||
9d7939c9 | 1427 | spin_lock_init(&priv->lock); |
defc67c6 | 1428 | spin_lock_init(&priv->pcm_lock); |
f3670536 | 1429 | |
40476f61 | 1430 | if (!np) { |
69e7a69a SN |
1431 | pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback; |
1432 | pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture; | |
9bdca822 | 1433 | pri_dai->filter = i2s_pdata->dma_filter; |
b9a1a743 | 1434 | |
409c69be | 1435 | idma_addr = i2s_pdata->type.idma_addr; |
40476f61 | 1436 | } else { |
40476f61 PV |
1437 | if (of_property_read_u32(np, "samsung,idma-addr", |
1438 | &idma_addr)) { | |
6e434122 | 1439 | if (priv->quirks & QUIRK_SUPPORTS_IDMA) { |
b0759736 | 1440 | dev_info(&pdev->dev, "idma address is not"\ |
40476f61 | 1441 | "specified"); |
40476f61 PV |
1442 | } |
1443 | } | |
1444 | } | |
1c7ac018 JB |
1445 | |
1446 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
e2e16fa6 SN |
1447 | priv->addr = devm_ioremap_resource(&pdev->dev, res); |
1448 | if (IS_ERR(priv->addr)) | |
1449 | return PTR_ERR(priv->addr); | |
1c7ac018 | 1450 | |
1c7ac018 JB |
1451 | regs_base = res->start; |
1452 | ||
b5d015e6 SN |
1453 | priv->clk = devm_clk_get(&pdev->dev, "iis"); |
1454 | if (IS_ERR(priv->clk)) { | |
0ec2ba80 | 1455 | dev_err(&pdev->dev, "Failed to get iis clock\n"); |
b5d015e6 | 1456 | return PTR_ERR(priv->clk); |
0ec2ba80 | 1457 | } |
c92f1d0e | 1458 | |
b5d015e6 | 1459 | ret = clk_prepare_enable(priv->clk); |
c92f1d0e SN |
1460 | if (ret != 0) { |
1461 | dev_err(&pdev->dev, "failed to enable clock: %d\n", ret); | |
1462 | return ret; | |
1463 | } | |
69e7a69a SN |
1464 | pri_dai->dma_playback.addr = regs_base + I2STXD; |
1465 | pri_dai->dma_capture.addr = regs_base + I2SRXD; | |
b8ab0ccc SN |
1466 | pri_dai->dma_playback.chan_name = "tx"; |
1467 | pri_dai->dma_capture.chan_name = "rx"; | |
69e7a69a SN |
1468 | pri_dai->dma_playback.addr_width = 4; |
1469 | pri_dai->dma_capture.addr_width = 4; | |
89d2e831 | 1470 | pri_dai->priv = priv; |
1c7ac018 | 1471 | |
6e434122 | 1472 | if (priv->quirks & QUIRK_PRI_6CHAN) |
a404b72d | 1473 | pri_dai->drv->playback.channels_max = 6; |
1c7ac018 | 1474 | |
73f5dfc6 | 1475 | ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter, |
0f928c19 | 1476 | "tx", "rx", NULL); |
73f5dfc6 MS |
1477 | if (ret < 0) |
1478 | goto err_disable_clk; | |
1479 | ||
6e434122 | 1480 | if (priv->quirks & QUIRK_SEC_DAI) { |
a404b72d | 1481 | sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1]; |
7e5d8706 | 1482 | |
69e7a69a | 1483 | sec_dai->dma_playback.addr = regs_base + I2STXDS; |
b8ab0ccc | 1484 | sec_dai->dma_playback.chan_name = "tx-sec"; |
40476f61 | 1485 | |
9bdca822 | 1486 | if (!np) { |
69e7a69a | 1487 | sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec; |
9bdca822 AB |
1488 | sec_dai->filter = i2s_pdata->dma_filter; |
1489 | } | |
40476f61 | 1490 | |
69e7a69a | 1491 | sec_dai->dma_playback.addr_width = 4; |
69e7a69a | 1492 | sec_dai->idma_playback.addr = idma_addr; |
1c7ac018 | 1493 | sec_dai->pri_dai = pri_dai; |
89d2e831 | 1494 | sec_dai->priv = priv; |
1c7ac018 | 1495 | pri_dai->sec_dai = sec_dai; |
be2c92eb | 1496 | |
7196c64c SN |
1497 | ret = i2s_create_secondary_device(priv); |
1498 | if (ret < 0) | |
1499 | goto err_disable_clk; | |
1500 | ||
1501 | ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev, | |
1502 | sec_dai->filter, "tx-sec", NULL, | |
1503 | &pdev->dev); | |
be2c92eb | 1504 | if (ret < 0) |
022c4156 | 1505 | goto err_del_sec; |
be2c92eb | 1506 | |
1c7ac018 JB |
1507 | } |
1508 | ||
0429ffef MB |
1509 | if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { |
1510 | dev_err(&pdev->dev, "Unable to configure gpio\n"); | |
fd61576f | 1511 | ret = -EINVAL; |
022c4156 | 1512 | goto err_del_sec; |
1c7ac018 JB |
1513 | } |
1514 | ||
a404b72d SN |
1515 | dev_set_drvdata(&pdev->dev, priv); |
1516 | ||
1517 | ret = devm_snd_soc_register_component(&pdev->dev, | |
1518 | &samsung_i2s_component, | |
1519 | priv->dai_drv, num_dais); | |
1520 | if (ret < 0) | |
022c4156 | 1521 | goto err_del_sec; |
1c7ac018 | 1522 | |
dc938ddb | 1523 | pm_runtime_set_active(&pdev->dev); |
c5cf4dbc MB |
1524 | pm_runtime_enable(&pdev->dev); |
1525 | ||
89d2e831 | 1526 | ret = i2s_register_clock_provider(priv); |
48279c53 SN |
1527 | if (ret < 0) |
1528 | goto err_disable_pm; | |
1529 | ||
3b0fa51f | 1530 | priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]); |
48279c53 SN |
1531 | |
1532 | return 0; | |
a08485d8 | 1533 | |
48279c53 | 1534 | err_disable_pm: |
2b960386 | 1535 | pm_runtime_disable(&pdev->dev); |
022c4156 SN |
1536 | err_del_sec: |
1537 | i2s_delete_secondary_device(priv); | |
fd61576f | 1538 | err_disable_clk: |
b5d015e6 | 1539 | clk_disable_unprepare(priv->clk); |
2b960386 | 1540 | return ret; |
1c7ac018 JB |
1541 | } |
1542 | ||
fdca21ad | 1543 | static int samsung_i2s_remove(struct platform_device *pdev) |
1c7ac018 | 1544 | { |
a404b72d | 1545 | struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev); |
1c7ac018 | 1546 | |
7196c64c SN |
1547 | /* The secondary device has no driver data assigned */ |
1548 | if (!priv) | |
1549 | return 0; | |
1550 | ||
dc938ddb | 1551 | pm_runtime_get_sync(&pdev->dev); |
be2c92eb | 1552 | pm_runtime_disable(&pdev->dev); |
c92f1d0e | 1553 | |
89d2e831 | 1554 | i2s_unregister_clock_provider(priv); |
022c4156 | 1555 | i2s_delete_secondary_device(priv); |
b5d015e6 | 1556 | clk_disable_unprepare(priv->clk); |
022c4156 | 1557 | |
dc938ddb | 1558 | pm_runtime_put_noidle(&pdev->dev); |
1c7ac018 | 1559 | |
1c7ac018 JB |
1560 | return 0; |
1561 | } | |
1562 | ||
a5a56871 PV |
1563 | static const struct samsung_i2s_variant_regs i2sv3_regs = { |
1564 | .bfs_off = 1, | |
1565 | .rfs_off = 3, | |
1566 | .sdf_off = 5, | |
1567 | .txr_off = 8, | |
1568 | .rclksrc_off = 10, | |
1569 | .mss_off = 11, | |
1570 | .cdclkcon_off = 12, | |
1571 | .lrp_off = 7, | |
1572 | .bfs_mask = 0x3, | |
1573 | .rfs_mask = 0x3, | |
1574 | .ftx0cnt_off = 8, | |
1575 | }; | |
1576 | ||
1577 | static const struct samsung_i2s_variant_regs i2sv6_regs = { | |
1578 | .bfs_off = 0, | |
1579 | .rfs_off = 4, | |
1580 | .sdf_off = 6, | |
1581 | .txr_off = 8, | |
1582 | .rclksrc_off = 10, | |
1583 | .mss_off = 11, | |
1584 | .cdclkcon_off = 12, | |
1585 | .lrp_off = 15, | |
1586 | .bfs_mask = 0xf, | |
1587 | .rfs_mask = 0x3, | |
1588 | .ftx0cnt_off = 8, | |
1589 | }; | |
1590 | ||
1591 | static const struct samsung_i2s_variant_regs i2sv7_regs = { | |
1592 | .bfs_off = 0, | |
1593 | .rfs_off = 4, | |
1594 | .sdf_off = 7, | |
1595 | .txr_off = 9, | |
1596 | .rclksrc_off = 11, | |
1597 | .mss_off = 12, | |
1598 | .cdclkcon_off = 22, | |
1599 | .lrp_off = 15, | |
1600 | .bfs_mask = 0xf, | |
1601 | .rfs_mask = 0x7, | |
1602 | .ftx0cnt_off = 0, | |
1603 | }; | |
1604 | ||
1605 | static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = { | |
1606 | .bfs_off = 0, | |
1607 | .rfs_off = 3, | |
1608 | .sdf_off = 6, | |
1609 | .txr_off = 8, | |
1610 | .rclksrc_off = 10, | |
1611 | .mss_off = 11, | |
1612 | .cdclkcon_off = 12, | |
1613 | .lrp_off = 15, | |
1614 | .bfs_mask = 0x7, | |
1615 | .rfs_mask = 0x7, | |
1616 | .ftx0cnt_off = 8, | |
1617 | }; | |
1618 | ||
7da493e9 | 1619 | static const struct samsung_i2s_dai_data i2sv3_dai_type = { |
7da493e9 | 1620 | .quirks = QUIRK_NO_MUXPSR, |
4720c2fe | 1621 | .pcm_rates = SNDRV_PCM_RATE_8000_96000, |
a5a56871 | 1622 | .i2s_variant_regs = &i2sv3_regs, |
7da493e9 PV |
1623 | }; |
1624 | ||
1625 | static const struct samsung_i2s_dai_data i2sv5_dai_type = { | |
b0759736 PV |
1626 | .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | |
1627 | QUIRK_SUPPORTS_IDMA, | |
4720c2fe | 1628 | .pcm_rates = SNDRV_PCM_RATE_8000_96000, |
a5a56871 | 1629 | .i2s_variant_regs = &i2sv3_regs, |
7da493e9 PV |
1630 | }; |
1631 | ||
4ca0c0d4 | 1632 | static const struct samsung_i2s_dai_data i2sv6_dai_type = { |
4ca0c0d4 | 1633 | .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | |
b0759736 | 1634 | QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA, |
4720c2fe | 1635 | .pcm_rates = SNDRV_PCM_RATE_8000_96000, |
a5a56871 PV |
1636 | .i2s_variant_regs = &i2sv6_regs, |
1637 | }; | |
1638 | ||
1639 | static const struct samsung_i2s_dai_data i2sv7_dai_type = { | |
a5a56871 PV |
1640 | .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | |
1641 | QUIRK_SUPPORTS_TDM, | |
4720c2fe | 1642 | .pcm_rates = SNDRV_PCM_RATE_8000_192000, |
a5a56871 PV |
1643 | .i2s_variant_regs = &i2sv7_regs, |
1644 | }; | |
1645 | ||
1646 | static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = { | |
a5a56871 | 1647 | .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR, |
4720c2fe | 1648 | .pcm_rates = SNDRV_PCM_RATE_8000_96000, |
a5a56871 | 1649 | .i2s_variant_regs = &i2sv5_i2s1_regs, |
4ca0c0d4 PV |
1650 | }; |
1651 | ||
eb8ca0fa | 1652 | static const struct platform_device_id samsung_i2s_driver_ids[] = { |
7c62eebb PV |
1653 | { |
1654 | .name = "samsung-i2s", | |
3f024980 | 1655 | .driver_data = (kernel_ulong_t)&i2sv3_dai_type, |
7c62eebb PV |
1656 | }, |
1657 | {}, | |
1658 | }; | |
2af19558 | 1659 | MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); |
7c62eebb | 1660 | |
40476f61 | 1661 | #ifdef CONFIG_OF |
40476f61 | 1662 | static const struct of_device_id exynos_i2s_match[] = { |
7da493e9 PV |
1663 | { |
1664 | .compatible = "samsung,s3c6410-i2s", | |
1665 | .data = &i2sv3_dai_type, | |
1666 | }, { | |
1667 | .compatible = "samsung,s5pv210-i2s", | |
1668 | .data = &i2sv5_dai_type, | |
4ca0c0d4 PV |
1669 | }, { |
1670 | .compatible = "samsung,exynos5420-i2s", | |
1671 | .data = &i2sv6_dai_type, | |
a5a56871 PV |
1672 | }, { |
1673 | .compatible = "samsung,exynos7-i2s", | |
1674 | .data = &i2sv7_dai_type, | |
1675 | }, { | |
1676 | .compatible = "samsung,exynos7-i2s1", | |
1677 | .data = &i2sv5_dai_type_i2s1, | |
40476f61 PV |
1678 | }, |
1679 | {}, | |
1680 | }; | |
1681 | MODULE_DEVICE_TABLE(of, exynos_i2s_match); | |
1682 | #endif | |
1683 | ||
5b1d3c34 C |
1684 | static const struct dev_pm_ops samsung_i2s_pm = { |
1685 | SET_RUNTIME_PM_OPS(i2s_runtime_suspend, | |
1686 | i2s_runtime_resume, NULL) | |
e7e52dfc MS |
1687 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
1688 | pm_runtime_force_resume) | |
5b1d3c34 C |
1689 | }; |
1690 | ||
1c7ac018 JB |
1691 | static struct platform_driver samsung_i2s_driver = { |
1692 | .probe = samsung_i2s_probe, | |
fdca21ad | 1693 | .remove = samsung_i2s_remove, |
7c62eebb | 1694 | .id_table = samsung_i2s_driver_ids, |
1c7ac018 JB |
1695 | .driver = { |
1696 | .name = "samsung-i2s", | |
40476f61 | 1697 | .of_match_table = of_match_ptr(exynos_i2s_match), |
5b1d3c34 | 1698 | .pm = &samsung_i2s_pm, |
1c7ac018 JB |
1699 | }, |
1700 | }; | |
1701 | ||
e00c3f55 | 1702 | module_platform_driver(samsung_i2s_driver); |
1c7ac018 JB |
1703 | |
1704 | /* Module information */ | |
df8ad335 | 1705 | MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); |
1c7ac018 JB |
1706 | MODULE_DESCRIPTION("Samsung I2S Interface"); |
1707 | MODULE_ALIAS("platform:samsung-i2s"); | |
1708 | MODULE_LICENSE("GPL"); |