[mirror_ubuntu-jammy-kernel.git] / sound / soc / samsung / idma.c

// SPDX-License-Identifier: GPL-2.0+
//
// idma.c - I2S0 internal DMA driver
//
// Copyright (c) 2011 Samsung Electronics Co., Ltd.
//		http://www.samsung.com

#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>

#include "i2s.h"
#include "idma.h"
#include "i2s-regs.h"

#define ST_RUNNING		(1<<0)
#define ST_OPENED		(1<<1)

static const struct snd_pcm_hardware idma_hardware = {
	.info = SNDRV_PCM_INFO_INTERLEAVED |
		    SNDRV_PCM_INFO_BLOCK_TRANSFER |
		    SNDRV_PCM_INFO_MMAP |
		    SNDRV_PCM_INFO_MMAP_VALID |
		    SNDRV_PCM_INFO_PAUSE |
		    SNDRV_PCM_INFO_RESUME,
	.buffer_bytes_max = MAX_IDMA_BUFFER,
	.period_bytes_min = 128,
	.period_bytes_max = MAX_IDMA_PERIOD,
	.periods_min = 1,
	.periods_max = 2,
};

struct idma_ctrl {
	spinlock_t	lock;
	int		state;
	dma_addr_t	start;
	dma_addr_t	pos;
	dma_addr_t	end;
	dma_addr_t	period;
	dma_addr_t	periodsz;
	void		*token;
	void		(*cb)(void *dt, int bytes_xfer);
};

static struct idma_info {
	spinlock_t	lock;
	void		 __iomem  *regs;
	dma_addr_t	lp_tx_addr;
} idma;

static int idma_irq;

static void idma_getpos(dma_addr_t *src)
{
	*src = idma.lp_tx_addr +
		(readl(idma.regs + I2STRNCNT) & 0xffffff) * 4;
}

static int idma_enqueue(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct idma_ctrl *prtd = substream->runtime->private_data;
	u32 val;

	spin_lock(&prtd->lock);
	prtd->token = (void *) substream;
	spin_unlock(&prtd->lock);

	/* Internal DMA Level0 Interrupt Address */
	val = idma.lp_tx_addr + prtd->periodsz;
	writel(val, idma.regs + I2SLVL0ADDR);

	/* Start address0 of I2S internal DMA operation. */
	val = idma.lp_tx_addr;
	writel(val, idma.regs + I2SSTR0);

	/*
	 * Transfer block size for I2S internal DMA.
	 * Should decide transfer size before start dma operation
	 */
	val = readl(idma.regs + I2SSIZE);
	val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT);
	val |= (((runtime->dma_bytes >> 2) &
			I2SSIZE_TRNMSK) << I2SSIZE_SHIFT);
	writel(val, idma.regs + I2SSIZE);

	val = readl(idma.regs + I2SAHB);
	val |= AHB_INTENLVL0;
	writel(val, idma.regs + I2SAHB);

	return 0;
}

static void idma_setcallbk(struct snd_pcm_substream *substream,
				void (*cb)(void *, int))
{
	struct idma_ctrl *prtd = substream->runtime->private_data;

	spin_lock(&prtd->lock);
	prtd->cb = cb;
	spin_unlock(&prtd->lock);
}

static void idma_control(int op)
{
	u32 val = readl(idma.regs + I2SAHB);

	spin_lock(&idma.lock);

	switch (op) {
	case LPAM_DMA_START:
		val |= (AHB_INTENLVL0 | AHB_DMAEN);
		break;
	case LPAM_DMA_STOP:
		val &= ~(AHB_INTENLVL0 | AHB_DMAEN);
		break;
	default:
		spin_unlock(&idma.lock);
		return;
	}

	writel(val, idma.regs + I2SAHB);
	spin_unlock(&idma.lock);
}

static void idma_done(void *id, int bytes_xfer)
{
	struct snd_pcm_substream *substream = id;
	struct idma_ctrl *prtd = substream->runtime->private_data;

	if (prtd && (prtd->state & ST_RUNNING))
		snd_pcm_period_elapsed(substream);
}

static int idma_hw_params(struct snd_soc_component *component,
			  struct snd_pcm_substream *substream,
			  struct snd_pcm_hw_params *params)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct idma_ctrl *prtd = substream->runtime->private_data;
	u32 mod = readl(idma.regs + I2SMOD);
	u32 ahb = readl(idma.regs + I2SAHB);

	ahb |= (AHB_DMARLD | AHB_INTMASK);
	mod |= MOD_TXS_IDMA;
	writel(ahb, idma.regs + I2SAHB);
	writel(mod, idma.regs + I2SMOD);

	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	runtime->dma_bytes = params_buffer_bytes(params);

	prtd->start = prtd->pos = runtime->dma_addr;
	prtd->period = params_periods(params);
	prtd->periodsz = params_period_bytes(params);
	prtd->end = runtime->dma_addr + runtime->dma_bytes;

	idma_setcallbk(substream, idma_done);

	return 0;
}

static int idma_hw_free(struct snd_soc_component *component,
			struct snd_pcm_substream *substream)
{
	snd_pcm_set_runtime_buffer(substream, NULL);

	return 0;
}

static int idma_prepare(struct snd_soc_component *component,
			struct snd_pcm_substream *substream)
{
	struct idma_ctrl *prtd = substream->runtime->private_data;

	prtd->pos = prtd->start;

	/* flush the DMA channel */
	idma_control(LPAM_DMA_STOP);
	idma_enqueue(substream);

	return 0;
}

static int idma_trigger(struct snd_soc_component *component,
			struct snd_pcm_substream *substream, int cmd)
{
	struct idma_ctrl *prtd = substream->runtime->private_data;
	int ret = 0;

	spin_lock(&prtd->lock);

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_RESUME:
	case SNDRV_PCM_TRIGGER_START:
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
		prtd->state |= ST_RUNNING;
		idma_control(LPAM_DMA_START);
		break;

	case SNDRV_PCM_TRIGGER_SUSPEND:
	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
		prtd->state &= ~ST_RUNNING;
		idma_control(LPAM_DMA_STOP);
		break;

	default:
		ret = -EINVAL;
		break;
	}

	spin_unlock(&prtd->lock);

	return ret;
}

static snd_pcm_uframes_t
idma_pointer(struct snd_soc_component *component,
	     struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct idma_ctrl *prtd = runtime->private_data;
	dma_addr_t src;
	unsigned long res;

	spin_lock(&prtd->lock);

	idma_getpos(&src);
	res = src - prtd->start;

	spin_unlock(&prtd->lock);

	return bytes_to_frames(substream->runtime, res);
}

static int idma_mmap(struct snd_soc_component *component,
		     struct snd_pcm_substream *substream,
	struct vm_area_struct *vma)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	unsigned long size, offset;
	int ret;

	/* From snd_pcm_lib_mmap_iomem */
	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
	size = vma->vm_end - vma->vm_start;
	offset = vma->vm_pgoff << PAGE_SHIFT;
	ret = io_remap_pfn_range(vma, vma->vm_start,
			(runtime->dma_addr + offset) >> PAGE_SHIFT,
			size, vma->vm_page_prot);

	return ret;
}

static irqreturn_t iis_irq(int irqno, void *dev_id)
{
	struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id;
	u32 iisahb, val, addr;

	iisahb  = readl(idma.regs + I2SAHB);

	val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0;

	if (val) {
		iisahb |= val;
		writel(iisahb, idma.regs + I2SAHB);

		addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr;
		addr += prtd->periodsz;
		addr %= (u32)(prtd->end - prtd->start);
		addr += idma.lp_tx_addr;

		writel(addr, idma.regs + I2SLVL0ADDR);

		if (prtd->cb)
			prtd->cb(prtd->token, prtd->period);
	}

	return IRQ_HANDLED;
}

static int idma_open(struct snd_soc_component *component,
		     struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct idma_ctrl *prtd;
	int ret;

	snd_soc_set_runtime_hwparams(substream, &idma_hardware);

	prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL);
	if (prtd == NULL)
		return -ENOMEM;

	ret = request_irq(idma_irq, iis_irq, 0, "i2s", prtd);
	if (ret < 0) {
		pr_err("fail to claim i2s irq , ret = %d\n", ret);
		kfree(prtd);
		return ret;
	}

	spin_lock_init(&prtd->lock);

	runtime->private_data = prtd;

	return 0;
}

static int idma_close(struct snd_soc_component *component,
		      struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct idma_ctrl *prtd = runtime->private_data;

	free_irq(idma_irq, prtd);

	if (!prtd)
		pr_err("idma_close called with prtd == NULL\n");

	kfree(prtd);

	return 0;
}

static void idma_free(struct snd_soc_component *component,
		      struct snd_pcm *pcm)
{
	struct snd_pcm_substream *substream;
	struct snd_dma_buffer *buf;

	substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
	if (!substream)
		return;

	buf = &substream->dma_buffer;
	if (!buf->area)
		return;

	iounmap((void __iomem *)buf->area);

	buf->area = NULL;
	buf->addr = 0;
}

static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream)
{
	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
	struct snd_dma_buffer *buf = &substream->dma_buffer;

	buf->dev.dev = pcm->card->dev;
	buf->private_data = NULL;

	/* Assign PCM buffer pointers */
	buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS;
	buf->addr = idma.lp_tx_addr;
	buf->bytes = idma_hardware.buffer_bytes_max;
	buf->area = (unsigned char * __force)ioremap(buf->addr, buf->bytes);
	if (!buf->area)
		return -ENOMEM;

	return 0;
}

static int idma_new(struct snd_soc_component *component,
		    struct snd_soc_pcm_runtime *rtd)
{
	struct snd_card *card = rtd->card->snd_card;
	struct snd_pcm *pcm = rtd->pcm;
	int ret;

	ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
	if (ret)
		return ret;

	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
		ret = preallocate_idma_buffer(pcm,
				SNDRV_PCM_STREAM_PLAYBACK);
	}

	return ret;
}

void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr)
{
	spin_lock_init(&idma.lock);
	idma.regs = regs;
	idma.lp_tx_addr = addr;
}
EXPORT_SYMBOL_GPL(idma_reg_addr_init);

static const struct snd_soc_component_driver asoc_idma_platform = {
	.open		= idma_open,
	.close		= idma_close,
	.trigger	= idma_trigger,
	.pointer	= idma_pointer,
	.mmap		= idma_mmap,
	.hw_params	= idma_hw_params,
	.hw_free	= idma_hw_free,
	.prepare	= idma_prepare,
	.pcm_construct	= idma_new,
	.pcm_destruct	= idma_free,
};

static int asoc_idma_platform_probe(struct platform_device *pdev)
{
	idma_irq = platform_get_irq(pdev, 0);
	if (idma_irq < 0)
		return idma_irq;

	return devm_snd_soc_register_component(&pdev->dev, &asoc_idma_platform,
					       NULL, 0);
}

static struct platform_driver asoc_idma_driver = {
	.driver = {
		.name = "samsung-idma",
	},

	.probe = asoc_idma_platform_probe,
};

module_platform_driver(asoc_idma_driver);

MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
MODULE_DESCRIPTION("Samsung ASoC IDMA Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
1d3279c4 SN	1	// SPDX-License-Identifier: GPL-2.0+
	2	//
	3	// idma.c - I2S0 internal DMA driver
	4	//
	5	// Copyright (c) 2011 Samsung Electronics Co., Ltd.
	6	// http://www.samsung.com
	7
f09aecd5 SK	8	#include <linux/interrupt.h>
	9	#include <linux/platform_device.h>
	10	#include <linux/dma-mapping.h>
	11	#include <linux/slab.h>
da155d5b	12	#include <linux/module.h>
f09aecd5 SK	13	#include <sound/pcm.h>
	14	#include <sound/pcm_params.h>
	15	#include <sound/soc.h>
	16
	17	#include "i2s.h"
	18	#include "idma.h"
f09aecd5 SK	19	#include "i2s-regs.h"
	20
	21	#define ST_RUNNING (1<<0)
	22	#define ST_OPENED (1<<1)
	23
	24	static const struct snd_pcm_hardware idma_hardware = {
	25	.info = SNDRV_PCM_INFO_INTERLEAVED \|
	26	SNDRV_PCM_INFO_BLOCK_TRANSFER \|
	27	SNDRV_PCM_INFO_MMAP \|
	28	SNDRV_PCM_INFO_MMAP_VALID \|
	29	SNDRV_PCM_INFO_PAUSE \|
	30	SNDRV_PCM_INFO_RESUME,
f09aecd5 SK	31	.buffer_bytes_max = MAX_IDMA_BUFFER,
	32	.period_bytes_min = 128,
	33	.period_bytes_max = MAX_IDMA_PERIOD,
	34	.periods_min = 1,
	35	.periods_max = 2,
	36	};
	37
	38	struct idma_ctrl {
	39	spinlock_t lock;
	40	int state;
	41	dma_addr_t start;
	42	dma_addr_t pos;
	43	dma_addr_t end;
	44	dma_addr_t period;
	45	dma_addr_t periodsz;
	46	void *token;
	47	void (cb)(void dt, int bytes_xfer);
	48	};
	49
	50	static struct idma_info {
	51	spinlock_t lock;
	52	void __iomem *regs;
	53	dma_addr_t lp_tx_addr;
	54	} idma;
	55
cb00e3a1 AB	56	static int idma_irq;
cb00e3a1 AB	57
f09aecd5 SK	58	static void idma_getpos(dma_addr_t *src)
	59	{
	60	*src = idma.lp_tx_addr +
	61	(readl(idma.regs + I2STRNCNT) & 0xffffff) * 4;
	62	}
	63
	64	static int idma_enqueue(struct snd_pcm_substream *substream)
	65	{
	66	struct snd_pcm_runtime *runtime = substream->runtime;
	67	struct idma_ctrl *prtd = substream->runtime->private_data;
	68	u32 val;
	69
	70	spin_lock(&prtd->lock);
	71	prtd->token = (void *) substream;
	72	spin_unlock(&prtd->lock);
	73
	74	/* Internal DMA Level0 Interrupt Address */
	75	val = idma.lp_tx_addr + prtd->periodsz;
	76	writel(val, idma.regs + I2SLVL0ADDR);
	77
	78	/* Start address0 of I2S internal DMA operation. */
	79	val = idma.lp_tx_addr;
	80	writel(val, idma.regs + I2SSTR0);
	81
	82	/*
	83	* Transfer block size for I2S internal DMA.
	84	* Should decide transfer size before start dma operation
	85	*/
	86	val = readl(idma.regs + I2SSIZE);
	87	val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT);
	88	val \|= (((runtime->dma_bytes >> 2) &
	89	I2SSIZE_TRNMSK) << I2SSIZE_SHIFT);
	90	writel(val, idma.regs + I2SSIZE);
	91
	92	val = readl(idma.regs + I2SAHB);
	93	val \|= AHB_INTENLVL0;
	94	writel(val, idma.regs + I2SAHB);
	95
	96	return 0;
	97	}
	98
	99	static void idma_setcallbk(struct snd_pcm_substream *substream,
	100	void (cb)(void , int))
	101	{
	102	struct idma_ctrl *prtd = substream->runtime->private_data;
	103
	104	spin_lock(&prtd->lock);
	105	prtd->cb = cb;
	106	spin_unlock(&prtd->lock);
	107	}
	108
	109	static void idma_control(int op)
	110	{
	111	u32 val = readl(idma.regs + I2SAHB);
	112
	113	spin_lock(&idma.lock);
	114
	115	switch (op) {
	116	case LPAM_DMA_START:
	117	val \|= (AHB_INTENLVL0 \| AHB_DMAEN);
	118	break;
	119	case LPAM_DMA_STOP:
	120	val &= ~(AHB_INTENLVL0 \| AHB_DMAEN);
	121	break;
122	default:
123	spin_unlock(&idma.lock);
124	return;
125	}
126
127	writel(val, idma.regs + I2SAHB);
128	spin_unlock(&idma.lock);
129	}
130
131	static void idma_done(void *id, int bytes_xfer)
132	{
133	struct snd_pcm_substream *substream = id;
134	struct idma_ctrl *prtd = substream->runtime->private_data;
135
136	if (prtd && (prtd->state & ST_RUNNING))
137	snd_pcm_period_elapsed(substream);
138	}
139
ba40ab62 KM	140	static int idma_hw_params(struct snd_soc_component *component,
	141	struct snd_pcm_substream *substream,
	142	struct snd_pcm_hw_params *params)
f09aecd5 SK	143	{
	144	struct snd_pcm_runtime *runtime = substream->runtime;
	145	struct idma_ctrl *prtd = substream->runtime->private_data;
	146	u32 mod = readl(idma.regs + I2SMOD);
	147	u32 ahb = readl(idma.regs + I2SAHB);
	148
	149	ahb \|= (AHB_DMARLD \| AHB_INTMASK);
	150	mod \|= MOD_TXS_IDMA;
	151	writel(ahb, idma.regs + I2SAHB);
	152	writel(mod, idma.regs + I2SMOD);
	153
	154	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	155	runtime->dma_bytes = params_buffer_bytes(params);
	156
	157	prtd->start = prtd->pos = runtime->dma_addr;
	158	prtd->period = params_periods(params);
	159	prtd->periodsz = params_period_bytes(params);
	160	prtd->end = runtime->dma_addr + runtime->dma_bytes;
	161
	162	idma_setcallbk(substream, idma_done);
	163
	164	return 0;
	165	}
	166
ba40ab62 KM	167	static int idma_hw_free(struct snd_soc_component *component,
ba40ab62 KM	168	struct snd_pcm_substream *substream)
f09aecd5 SK	169	{
	170	snd_pcm_set_runtime_buffer(substream, NULL);
	171
	172	return 0;
	173	}
	174
ba40ab62 KM	175	static int idma_prepare(struct snd_soc_component *component,
ba40ab62 KM	176	struct snd_pcm_substream *substream)
f09aecd5 SK	177	{
	178	struct idma_ctrl *prtd = substream->runtime->private_data;
	179
	180	prtd->pos = prtd->start;
	181
	182	/* flush the DMA channel */
	183	idma_control(LPAM_DMA_STOP);
	184	idma_enqueue(substream);
	185
	186	return 0;
	187	}
	188
ba40ab62 KM	189	static int idma_trigger(struct snd_soc_component *component,
ba40ab62 KM	190	struct snd_pcm_substream *substream, int cmd)
f09aecd5 SK	191	{
	192	struct idma_ctrl *prtd = substream->runtime->private_data;
	193	int ret = 0;
	194
	195	spin_lock(&prtd->lock);
	196
	197	switch (cmd) {
	198	case SNDRV_PCM_TRIGGER_RESUME:
	199	case SNDRV_PCM_TRIGGER_START:
	200	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	201	prtd->state \|= ST_RUNNING;
	202	idma_control(LPAM_DMA_START);
	203	break;
	204
	205	case SNDRV_PCM_TRIGGER_SUSPEND:
	206	case SNDRV_PCM_TRIGGER_STOP:
	207	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	208	prtd->state &= ~ST_RUNNING;
	209	idma_control(LPAM_DMA_STOP);
	210	break;
	211
	212	default:
	213	ret = -EINVAL;
	214	break;
	215	}
	216
	217	spin_unlock(&prtd->lock);
	218
	219	return ret;
	220	}
	221
	222	static snd_pcm_uframes_t
ba40ab62 KM	223	idma_pointer(struct snd_soc_component *component,
ba40ab62 KM	224	struct snd_pcm_substream *substream)
f09aecd5 SK	225	{
	226	struct snd_pcm_runtime *runtime = substream->runtime;
	227	struct idma_ctrl *prtd = runtime->private_data;
	228	dma_addr_t src;
	229	unsigned long res;
	230
	231	spin_lock(&prtd->lock);
	232
	233	idma_getpos(&src);
	234	res = src - prtd->start;
	235
	236	spin_unlock(&prtd->lock);
	237
	238	return bytes_to_frames(substream->runtime, res);
	239	}
	240
ba40ab62 KM	241	static int idma_mmap(struct snd_soc_component *component,
ba40ab62 KM	242	struct snd_pcm_substream *substream,
f09aecd5 SK	243	struct vm_area_struct *vma)
	244	{
	245	struct snd_pcm_runtime *runtime = substream->runtime;
	246	unsigned long size, offset;
	247	int ret;
	248
	249	/* From snd_pcm_lib_mmap_iomem */
	250	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
f09aecd5 SK	251	size = vma->vm_end - vma->vm_start;
	252	offset = vma->vm_pgoff << PAGE_SHIFT;
	253	ret = io_remap_pfn_range(vma, vma->vm_start,
	254	(runtime->dma_addr + offset) >> PAGE_SHIFT,
	255	size, vma->vm_page_prot);
	256
	257	return ret;
	258	}
	259
	260	static irqreturn_t iis_irq(int irqno, void *dev_id)
	261	{
	262	struct idma_ctrl prtd = (struct idma_ctrl )dev_id;
41adf905	263	u32 iisahb, val, addr;
f09aecd5 SK	264
f09aecd5 SK	265	iisahb = readl(idma.regs + I2SAHB);
f09aecd5 SK	266
	267	val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0;
	268
	269	if (val) {
	270	iisahb \|= val;
	271	writel(iisahb, idma.regs + I2SAHB);
	272
	273	addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr;
	274	addr += prtd->periodsz;
1aa91b6d	275	addr %= (u32)(prtd->end - prtd->start);
f09aecd5 SK	276	addr += idma.lp_tx_addr;
	277
	278	writel(addr, idma.regs + I2SLVL0ADDR);
	279
	280	if (prtd->cb)
	281	prtd->cb(prtd->token, prtd->period);
	282	}
	283
	284	return IRQ_HANDLED;
	285	}
	286
ba40ab62 KM	287	static int idma_open(struct snd_soc_component *component,
ba40ab62 KM	288	struct snd_pcm_substream *substream)
f09aecd5 SK	289	{
	290	struct snd_pcm_runtime *runtime = substream->runtime;
	291	struct idma_ctrl *prtd;
	292	int ret;
	293
	294	snd_soc_set_runtime_hwparams(substream, &idma_hardware);
	295
	296	prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL);
	297	if (prtd == NULL)
	298	return -ENOMEM;
	299
cb00e3a1	300	ret = request_irq(idma_irq, iis_irq, 0, "i2s", prtd);
f09aecd5 SK	301	if (ret < 0) {
	302	pr_err("fail to claim i2s irq , ret = %d\n", ret);
	303	kfree(prtd);
	304	return ret;
	305	}
	306
	307	spin_lock_init(&prtd->lock);
	308
	309	runtime->private_data = prtd;
	310
	311	return 0;
	312	}
	313
ba40ab62 KM	314	static int idma_close(struct snd_soc_component *component,
ba40ab62 KM	315	struct snd_pcm_substream *substream)
f09aecd5 SK	316	{
	317	struct snd_pcm_runtime *runtime = substream->runtime;
	318	struct idma_ctrl *prtd = runtime->private_data;
	319
cb00e3a1	320	free_irq(idma_irq, prtd);
f09aecd5 SK	321
	322	if (!prtd)
	323	pr_err("idma_close called with prtd == NULL\n");
	324
	325	kfree(prtd);
	326
	327	return 0;
	328	}
	329
ba40ab62 KM	330	static void idma_free(struct snd_soc_component *component,
ba40ab62 KM	331	struct snd_pcm *pcm)
f09aecd5 SK	332	{
	333	struct snd_pcm_substream *substream;
	334	struct snd_dma_buffer *buf;
	335
	336	substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
	337	if (!substream)
	338	return;
	339
	340	buf = &substream->dma_buffer;
	341	if (!buf->area)
	342	return;
	343
e8a70c25	344	iounmap((void __iomem *)buf->area);
f09aecd5 SK	345
	346	buf->area = NULL;
	347	buf->addr = 0;
	348	}
	349
	350	static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream)
	351	{
	352	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
	353	struct snd_dma_buffer *buf = &substream->dma_buffer;
	354
	355	buf->dev.dev = pcm->card->dev;
	356	buf->private_data = NULL;
	357
	358	/* Assign PCM buffer pointers */
	359	buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS;
	360	buf->addr = idma.lp_tx_addr;
	361	buf->bytes = idma_hardware.buffer_bytes_max;
e8a70c25	362	buf->area = (unsigned char * __force)ioremap(buf->addr, buf->bytes);
576a3b39 JJ	363	if (!buf->area)
576a3b39 JJ	364	return -ENOMEM;
f09aecd5 SK	365
	366	return 0;
	367	}
	368
ba40ab62 KM	369	static int idma_new(struct snd_soc_component *component,
ba40ab62 KM	370	struct snd_soc_pcm_runtime *rtd)
f09aecd5 SK	371	{
f09aecd5 SK	372	struct snd_card *card = rtd->card->snd_card;
f09aecd5	373	struct snd_pcm *pcm = rtd->pcm;
c9bd5e69	374	int ret;
f09aecd5	375
c9bd5e69 RK	376	ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
	377	if (ret)
	378	return ret;
f09aecd5	379
25e9e756	380	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
f09aecd5 SK	381	ret = preallocate_idma_buffer(pcm,
f09aecd5 SK	382	SNDRV_PCM_STREAM_PLAYBACK);
b2ed1b0b	383	}
f09aecd5 SK	384
	385	return ret;
	386	}
	387
9b8f5695	388	void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr)
f09aecd5 SK	389	{
	390	spin_lock_init(&idma.lock);
	391	idma.regs = regs;
	392	idma.lp_tx_addr = addr;
	393	}
0930c33a	394	EXPORT_SYMBOL_GPL(idma_reg_addr_init);
f09aecd5	395
17d619da	396	static const struct snd_soc_component_driver asoc_idma_platform = {
ba40ab62 KM	397	.open = idma_open,
ba40ab62 KM	398	.close = idma_close,
ba40ab62 KM	399	.trigger = idma_trigger,
	400	.pointer = idma_pointer,
	401	.mmap = idma_mmap,
	402	.hw_params = idma_hw_params,
	403	.hw_free = idma_hw_free,
	404	.prepare = idma_prepare,
	405	.pcm_construct = idma_new,
	406	.pcm_destruct = idma_free,
f09aecd5 SK	407	};
f09aecd5 SK	408
fdca21ad	409	static int asoc_idma_platform_probe(struct platform_device *pdev)
f09aecd5	410	{
cb00e3a1 AB	411	idma_irq = platform_get_irq(pdev, 0);
	412	if (idma_irq < 0)
	413	return idma_irq;
	414
17d619da KM	415	return devm_snd_soc_register_component(&pdev->dev, &asoc_idma_platform,
17d619da KM	416	NULL, 0);
f09aecd5 SK	417	}
	418
	419	static struct platform_driver asoc_idma_driver = {
	420	.driver = {
	421	.name = "samsung-idma",
f09aecd5 SK	422	},
	423
	424	.probe = asoc_idma_platform_probe,
f09aecd5 SK	425	};
f09aecd5 SK	426
e00c3f55	427	module_platform_driver(asoc_idma_driver);
f09aecd5 SK	428
	429	MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
	430	MODULE_DESCRIPTION("Samsung ASoC IDMA Driver");
	431	MODULE_LICENSE("GPL");