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5033f43c | 1 | /* sound/soc/samsung/s3c2412-i2s.c |
49646dfa BD |
2 | * |
3 | * ALSA Soc Audio Layer - S3C2412 I2S driver | |
4 | * | |
5 | * Copyright (c) 2006 Wolfson Microelectronics PLC. | |
6 | * Graeme Gregory graeme.gregory@wolfsonmicro.com | |
7 | * linux@wolfsonmicro.com | |
8 | * | |
9 | * Copyright (c) 2007, 2004-2005 Simtec Electronics | |
10 | * http://armlinux.simtec.co.uk/ | |
11 | * Ben Dooks <ben@simtec.co.uk> | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify it | |
14 | * under the terms of the GNU General Public License as published by the | |
15 | * Free Software Foundation; either version 2 of the License, or (at your | |
16 | * option) any later version. | |
17 | */ | |
18 | ||
49646dfa | 19 | #include <linux/delay.h> |
ec976d6e | 20 | #include <linux/gpio.h> |
49646dfa | 21 | #include <linux/clk.h> |
8150bc88 | 22 | #include <linux/io.h> |
da155d5b | 23 | #include <linux/module.h> |
49646dfa | 24 | |
49646dfa | 25 | #include <sound/soc.h> |
0378b6ac | 26 | #include <sound/pcm_params.h> |
49646dfa | 27 | |
a09e64fb | 28 | #include <mach/dma.h> |
abffae64 SK |
29 | #include <mach/gpio-samsung.h> |
30 | #include <plat/gpio-cfg.h> | |
49646dfa | 31 | |
4b640cf3 | 32 | #include "dma.h" |
d07e7ce9 | 33 | #include "regs-i2s-v2.h" |
49646dfa BD |
34 | #include "s3c2412-i2s.h" |
35 | ||
71e5222c | 36 | static struct s3c_dma_client s3c2412_dma_client_out = { |
49646dfa BD |
37 | .name = "I2S PCM Stereo out" |
38 | }; | |
39 | ||
71e5222c | 40 | static struct s3c_dma_client s3c2412_dma_client_in = { |
49646dfa BD |
41 | .name = "I2S PCM Stereo in" |
42 | }; | |
43 | ||
faa31776 | 44 | static struct s3c_dma_params s3c2412_i2s_pcm_stereo_out = { |
49646dfa BD |
45 | .client = &s3c2412_dma_client_out, |
46 | .channel = DMACH_I2S_OUT, | |
47 | .dma_addr = S3C2410_PA_IIS + S3C2412_IISTXD, | |
48 | .dma_size = 4, | |
49 | }; | |
50 | ||
faa31776 | 51 | static struct s3c_dma_params s3c2412_i2s_pcm_stereo_in = { |
49646dfa BD |
52 | .client = &s3c2412_dma_client_in, |
53 | .channel = DMACH_I2S_IN, | |
54 | .dma_addr = S3C2410_PA_IIS + S3C2412_IISRXD, | |
55 | .dma_size = 4, | |
56 | }; | |
57 | ||
dc85447b | 58 | static struct s3c_i2sv2_info s3c2412_i2s; |
49646dfa | 59 | |
f0fba2ad | 60 | static int s3c2412_i2s_probe(struct snd_soc_dai *dai) |
49646dfa | 61 | { |
dc85447b | 62 | int ret; |
49646dfa | 63 | |
ee7d4767 | 64 | pr_debug("Entered %s\n", __func__); |
49646dfa | 65 | |
f0fba2ad | 66 | ret = s3c_i2sv2_probe(dai, &s3c2412_i2s, S3C2410_PA_IIS); |
dc85447b BD |
67 | if (ret) |
68 | return ret; | |
49646dfa | 69 | |
dc85447b BD |
70 | s3c2412_i2s.dma_capture = &s3c2412_i2s_pcm_stereo_in; |
71 | s3c2412_i2s.dma_playback = &s3c2412_i2s_pcm_stereo_out; | |
49646dfa | 72 | |
f0fba2ad | 73 | s3c2412_i2s.iis_cclk = clk_get(dai->dev, "i2sclk"); |
7803e329 | 74 | if (IS_ERR(s3c2412_i2s.iis_cclk)) { |
008bec39 | 75 | pr_err("failed to get i2sclk clock\n"); |
49646dfa | 76 | iounmap(s3c2412_i2s.regs); |
7803e329 | 77 | return PTR_ERR(s3c2412_i2s.iis_cclk); |
49646dfa BD |
78 | } |
79 | ||
dc85447b | 80 | /* Set MPLL as the source for IIS CLK */ |
49646dfa | 81 | |
dc85447b | 82 | clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll")); |
49646dfa BD |
83 | clk_enable(s3c2412_i2s.iis_cclk); |
84 | ||
dc85447b | 85 | s3c2412_i2s.iis_cclk = s3c2412_i2s.iis_pclk; |
49646dfa | 86 | |
601787c2 SN |
87 | /* Configure the I2S pins (GPE0...GPE4) in correct mode */ |
88 | s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), | |
89 | S3C_GPIO_PULL_NONE); | |
49646dfa | 90 | |
6cab2d3d BD |
91 | return 0; |
92 | } | |
93 | ||
f0fba2ad LG |
94 | static int s3c2412_i2s_remove(struct snd_soc_dai *dai) |
95 | { | |
96 | clk_disable(s3c2412_i2s.iis_cclk); | |
97 | clk_put(s3c2412_i2s.iis_cclk); | |
98 | iounmap(s3c2412_i2s.regs); | |
99 | ||
100 | return 0; | |
101 | } | |
102 | ||
9c9b1257 JB |
103 | static int s3c2412_i2s_hw_params(struct snd_pcm_substream *substream, |
104 | struct snd_pcm_hw_params *params, | |
105 | struct snd_soc_dai *cpu_dai) | |
106 | { | |
f0fba2ad | 107 | struct s3c_i2sv2_info *i2s = snd_soc_dai_get_drvdata(cpu_dai); |
fd23b7de | 108 | struct s3c_dma_params *dma_data; |
9c9b1257 JB |
109 | u32 iismod; |
110 | ||
111 | pr_debug("Entered %s\n", __func__); | |
112 | ||
113 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
fd23b7de | 114 | dma_data = i2s->dma_playback; |
9c9b1257 | 115 | else |
fd23b7de DM |
116 | dma_data = i2s->dma_capture; |
117 | ||
118 | snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data); | |
9c9b1257 JB |
119 | |
120 | iismod = readl(i2s->regs + S3C2412_IISMOD); | |
121 | pr_debug("%s: r: IISMOD: %x\n", __func__, iismod); | |
122 | ||
88ce1465 TB |
123 | switch (params_width(params)) { |
124 | case 8: | |
9c9b1257 JB |
125 | iismod |= S3C2412_IISMOD_8BIT; |
126 | break; | |
88ce1465 | 127 | case 16: |
9c9b1257 JB |
128 | iismod &= ~S3C2412_IISMOD_8BIT; |
129 | break; | |
130 | } | |
131 | ||
132 | writel(iismod, i2s->regs + S3C2412_IISMOD); | |
133 | pr_debug("%s: w: IISMOD: %x\n", __func__, iismod); | |
134 | ||
135 | return 0; | |
136 | } | |
137 | ||
49646dfa BD |
138 | #define S3C2412_I2S_RATES \ |
139 | (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ | |
140 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ | |
141 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | |
142 | ||
85e7652d | 143 | static const struct snd_soc_dai_ops s3c2412_i2s_dai_ops = { |
9c9b1257 | 144 | .hw_params = s3c2412_i2s_hw_params, |
6335d055 EM |
145 | }; |
146 | ||
f0fba2ad | 147 | static struct snd_soc_dai_driver s3c2412_i2s_dai = { |
dc85447b | 148 | .probe = s3c2412_i2s_probe, |
f0fba2ad | 149 | .remove = s3c2412_i2s_remove, |
49646dfa BD |
150 | .playback = { |
151 | .channels_min = 2, | |
152 | .channels_max = 2, | |
153 | .rates = S3C2412_I2S_RATES, | |
154 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE, | |
155 | }, | |
156 | .capture = { | |
157 | .channels_min = 2, | |
158 | .channels_max = 2, | |
159 | .rates = S3C2412_I2S_RATES, | |
160 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE, | |
161 | }, | |
6335d055 | 162 | .ops = &s3c2412_i2s_dai_ops, |
49646dfa | 163 | }; |
f0fba2ad | 164 | |
eca3b01d KM |
165 | static const struct snd_soc_component_driver s3c2412_i2s_component = { |
166 | .name = "s3c2412-i2s", | |
167 | }; | |
168 | ||
fdca21ad | 169 | static int s3c2412_iis_dev_probe(struct platform_device *pdev) |
f0fba2ad | 170 | { |
a08485d8 PV |
171 | int ret = 0; |
172 | ||
eca3b01d KM |
173 | ret = s3c_i2sv2_register_component(&pdev->dev, -1, |
174 | &s3c2412_i2s_component, | |
175 | &s3c2412_i2s_dai); | |
a08485d8 PV |
176 | if (ret) { |
177 | pr_err("failed to register the dai\n"); | |
178 | return ret; | |
179 | } | |
180 | ||
06b10ff9 | 181 | ret = samsung_asoc_dma_platform_register(&pdev->dev); |
7253e354 | 182 | if (ret) |
a08485d8 | 183 | pr_err("failed to register the DMA: %d\n", ret); |
a08485d8 | 184 | |
a08485d8 | 185 | return ret; |
f0fba2ad LG |
186 | } |
187 | ||
f0fba2ad LG |
188 | static struct platform_driver s3c2412_iis_driver = { |
189 | .probe = s3c2412_iis_dev_probe, | |
f0fba2ad LG |
190 | .driver = { |
191 | .name = "s3c2412-iis", | |
192 | .owner = THIS_MODULE, | |
193 | }, | |
194 | }; | |
49646dfa | 195 | |
e00c3f55 | 196 | module_platform_driver(s3c2412_iis_driver); |
3f4b783c | 197 | |
49646dfa BD |
198 | /* Module information */ |
199 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); | |
200 | MODULE_DESCRIPTION("S3C2412 I2S SoC Interface"); | |
201 | MODULE_LICENSE("GPL"); | |
960d0697 | 202 | MODULE_ALIAS("platform:s3c2412-iis"); |