[mirror_ubuntu-bionic-kernel.git] / sound / soc / samsung / spdif.c

/* sound/soc/samsung/spdif.c
 *
 * ALSA SoC Audio Layer - Samsung S/PDIF Controller driver
 *
 * Copyright (c) 2010 Samsung Electronics Co. Ltd
 *		http://www.samsung.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/clk.h>
#include <linux/io.h>
#include <linux/module.h>

#include <sound/soc.h>
#include <sound/pcm_params.h>

#include <linux/platform_data/asoc-s3c.h>

#include "dma.h"
#include "spdif.h"

/* Registers */
#define CLKCON				0x00
#define CON				0x04
#define BSTAS				0x08
#define CSTAS				0x0C
#define DATA_OUTBUF			0x10
#define DCNT				0x14
#define BSTAS_S				0x18
#define DCNT_S				0x1C

#define CLKCTL_MASK			0x7
#define CLKCTL_MCLK_EXT			(0x1 << 2)
#define CLKCTL_PWR_ON			(0x1 << 0)

#define CON_MASK			0x3ffffff
#define CON_FIFO_TH_SHIFT		19
#define CON_FIFO_TH_MASK		(0x7 << 19)
#define CON_USERDATA_23RDBIT		(0x1 << 12)

#define CON_SW_RESET			(0x1 << 5)

#define CON_MCLKDIV_MASK		(0x3 << 3)
#define CON_MCLKDIV_256FS		(0x0 << 3)
#define CON_MCLKDIV_384FS		(0x1 << 3)
#define CON_MCLKDIV_512FS		(0x2 << 3)

#define CON_PCM_MASK			(0x3 << 1)
#define CON_PCM_16BIT			(0x0 << 1)
#define CON_PCM_20BIT			(0x1 << 1)
#define CON_PCM_24BIT			(0x2 << 1)

#define CON_PCM_DATA			(0x1 << 0)

#define CSTAS_MASK			0x3fffffff
#define CSTAS_SAMP_FREQ_MASK		(0xF << 24)
#define CSTAS_SAMP_FREQ_44		(0x0 << 24)
#define CSTAS_SAMP_FREQ_48		(0x2 << 24)
#define CSTAS_SAMP_FREQ_32		(0x3 << 24)
#define CSTAS_SAMP_FREQ_96		(0xA << 24)

#define CSTAS_CATEGORY_MASK		(0xFF << 8)
#define CSTAS_CATEGORY_CODE_CDP		(0x01 << 8)

#define CSTAS_NO_COPYRIGHT		(0x1 << 2)

/**
 * struct samsung_spdif_info - Samsung S/PDIF Controller information
 * @lock: Spin lock for S/PDIF.
 * @dev: The parent device passed to use from the probe.
 * @regs: The pointer to the device register block.
 * @clk_rate: Current clock rate for calcurate ratio.
 * @pclk: The peri-clock pointer for spdif master operation.
 * @sclk: The source clock pointer for making sync signals.
 * @save_clkcon: Backup clkcon reg. in suspend.
 * @save_con: Backup con reg. in suspend.
 * @save_cstas: Backup cstas reg. in suspend.
 * @dma_playback: DMA information for playback channel.
 */
struct samsung_spdif_info {
	spinlock_t	lock;
	struct device	*dev;
	void __iomem	*regs;
	unsigned long	clk_rate;
	struct clk	*pclk;
	struct clk	*sclk;
	u32		saved_clkcon;
	u32		saved_con;
	u32		saved_cstas;
	struct snd_dmaengine_dai_dma_data *dma_playback;
};

static struct snd_dmaengine_dai_dma_data spdif_stereo_out;
static struct samsung_spdif_info spdif_info;

static inline struct samsung_spdif_info *to_info(struct snd_soc_dai *cpu_dai)
{
	return snd_soc_dai_get_drvdata(cpu_dai);
}

static void spdif_snd_txctrl(struct samsung_spdif_info *spdif, int on)
{
	void __iomem *regs = spdif->regs;
	u32 clkcon;

	dev_dbg(spdif->dev, "Entered %s\n", __func__);

	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
	if (on)
		writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON);
	else
		writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
}

static int spdif_set_sysclk(struct snd_soc_dai *cpu_dai,
				int clk_id, unsigned int freq, int dir)
{
	struct samsung_spdif_info *spdif = to_info(cpu_dai);
	u32 clkcon;

	dev_dbg(spdif->dev, "Entered %s\n", __func__);

	clkcon = readl(spdif->regs + CLKCON);

	if (clk_id == SND_SOC_SPDIF_INT_MCLK)
		clkcon &= ~CLKCTL_MCLK_EXT;
	else
		clkcon |= CLKCTL_MCLK_EXT;

	writel(clkcon, spdif->regs + CLKCON);

	spdif->clk_rate = freq;

	return 0;
}

static int spdif_trigger(struct snd_pcm_substream *substream, int cmd,
				struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
	unsigned long flags;

	dev_dbg(spdif->dev, "Entered %s\n", __func__);

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
	case SNDRV_PCM_TRIGGER_RESUME:
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
		spin_lock_irqsave(&spdif->lock, flags);
		spdif_snd_txctrl(spdif, 1);
		spin_unlock_irqrestore(&spdif->lock, flags);
		break;
	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_SUSPEND:
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
		spin_lock_irqsave(&spdif->lock, flags);
		spdif_snd_txctrl(spdif, 0);
		spin_unlock_irqrestore(&spdif->lock, flags);
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static int spdif_sysclk_ratios[] = {
	512, 384, 256,
};

static int spdif_hw_params(struct snd_pcm_substream *substream,
				struct snd_pcm_hw_params *params,
				struct snd_soc_dai *socdai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
	void __iomem *regs = spdif->regs;
	struct snd_dmaengine_dai_dma_data *dma_data;
	u32 con, clkcon, cstas;
	unsigned long flags;
	int i, ratio;

	dev_dbg(spdif->dev, "Entered %s\n", __func__);

	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
		dma_data = spdif->dma_playback;
	else {
		dev_err(spdif->dev, "Capture is not supported\n");
		return -EINVAL;
	}

	snd_soc_dai_set_dma_data(rtd->cpu_dai, substream, dma_data);

	spin_lock_irqsave(&spdif->lock, flags);

	con = readl(regs + CON) & CON_MASK;
	cstas = readl(regs + CSTAS) & CSTAS_MASK;
	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;

	con &= ~CON_FIFO_TH_MASK;
	con |= (0x7 << CON_FIFO_TH_SHIFT);
	con |= CON_USERDATA_23RDBIT;
	con |= CON_PCM_DATA;

	con &= ~CON_PCM_MASK;
	switch (params_width(params)) {
	case 16:
		con |= CON_PCM_16BIT;
		break;
	default:
		dev_err(spdif->dev, "Unsupported data size.\n");
		goto err;
	}

	ratio = spdif->clk_rate / params_rate(params);
	for (i = 0; i < ARRAY_SIZE(spdif_sysclk_ratios); i++)
		if (ratio == spdif_sysclk_ratios[i])
			break;
	if (i == ARRAY_SIZE(spdif_sysclk_ratios)) {
		dev_err(spdif->dev, "Invalid clock ratio %ld/%d\n",
				spdif->clk_rate, params_rate(params));
		goto err;
	}

	con &= ~CON_MCLKDIV_MASK;
	switch (ratio) {
	case 256:
		con |= CON_MCLKDIV_256FS;
		break;
	case 384:
		con |= CON_MCLKDIV_384FS;
		break;
	case 512:
		con |= CON_MCLKDIV_512FS;
		break;
	}

	cstas &= ~CSTAS_SAMP_FREQ_MASK;
	switch (params_rate(params)) {
	case 44100:
		cstas |= CSTAS_SAMP_FREQ_44;
		break;
	case 48000:
		cstas |= CSTAS_SAMP_FREQ_48;
		break;
	case 32000:
		cstas |= CSTAS_SAMP_FREQ_32;
		break;
	case 96000:
		cstas |= CSTAS_SAMP_FREQ_96;
		break;
	default:
		dev_err(spdif->dev, "Invalid sampling rate %d\n",
				params_rate(params));
		goto err;
	}

	cstas &= ~CSTAS_CATEGORY_MASK;
	cstas |= CSTAS_CATEGORY_CODE_CDP;
	cstas |= CSTAS_NO_COPYRIGHT;

	writel(con, regs + CON);
	writel(cstas, regs + CSTAS);
	writel(clkcon, regs + CLKCON);

	spin_unlock_irqrestore(&spdif->lock, flags);

	return 0;
err:
	spin_unlock_irqrestore(&spdif->lock, flags);
	return -EINVAL;
}

static void spdif_shutdown(struct snd_pcm_substream *substream,
				struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
	void __iomem *regs = spdif->regs;
	u32 con, clkcon;

	dev_dbg(spdif->dev, "Entered %s\n", __func__);

	con = readl(regs + CON) & CON_MASK;
	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;

	writel(con | CON_SW_RESET, regs + CON);
	cpu_relax();

	writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
}

#ifdef CONFIG_PM
static int spdif_suspend(struct snd_soc_dai *cpu_dai)
{
	struct samsung_spdif_info *spdif = to_info(cpu_dai);
	u32 con = spdif->saved_con;

	dev_dbg(spdif->dev, "Entered %s\n", __func__);

	spdif->saved_clkcon = readl(spdif->regs	+ CLKCON) & CLKCTL_MASK;
	spdif->saved_con = readl(spdif->regs + CON) & CON_MASK;
	spdif->saved_cstas = readl(spdif->regs + CSTAS) & CSTAS_MASK;

	writel(con | CON_SW_RESET, spdif->regs + CON);
	cpu_relax();

	return 0;
}

static int spdif_resume(struct snd_soc_dai *cpu_dai)
{
	struct samsung_spdif_info *spdif = to_info(cpu_dai);

	dev_dbg(spdif->dev, "Entered %s\n", __func__);

	writel(spdif->saved_clkcon, spdif->regs	+ CLKCON);
	writel(spdif->saved_con, spdif->regs + CON);
	writel(spdif->saved_cstas, spdif->regs + CSTAS);

	return 0;
}
#else
#define spdif_suspend NULL
#define spdif_resume NULL
#endif

static const struct snd_soc_dai_ops spdif_dai_ops = {
	.set_sysclk	= spdif_set_sysclk,
	.trigger	= spdif_trigger,
	.hw_params	= spdif_hw_params,
	.shutdown	= spdif_shutdown,
};

static struct snd_soc_dai_driver samsung_spdif_dai = {
	.name = "samsung-spdif",
	.playback = {
		.stream_name = "S/PDIF Playback",
		.channels_min = 2,
		.channels_max = 2,
		.rates = (SNDRV_PCM_RATE_32000 |
				SNDRV_PCM_RATE_44100 |
				SNDRV_PCM_RATE_48000 |
				SNDRV_PCM_RATE_96000),
		.formats = SNDRV_PCM_FMTBIT_S16_LE, },
	.ops = &spdif_dai_ops,
	.suspend = spdif_suspend,
	.resume = spdif_resume,
};

static const struct snd_soc_component_driver samsung_spdif_component = {
	.name		= "samsung-spdif",
};

static int spdif_probe(struct platform_device *pdev)
{
	struct s3c_audio_pdata *spdif_pdata;
	struct resource *mem_res;
	struct samsung_spdif_info *spdif;
	dma_filter_fn filter;
	int ret;

	spdif_pdata = pdev->dev.platform_data;

	dev_dbg(&pdev->dev, "Entered %s\n", __func__);

	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!mem_res) {
		dev_err(&pdev->dev, "Unable to get register resource.\n");
		return -ENXIO;
	}

	if (spdif_pdata && spdif_pdata->cfg_gpio
			&& spdif_pdata->cfg_gpio(pdev)) {
		dev_err(&pdev->dev, "Unable to configure GPIO pins\n");
		return -EINVAL;
	}

	spdif = &spdif_info;
	spdif->dev = &pdev->dev;

	spin_lock_init(&spdif->lock);

	spdif->pclk = devm_clk_get(&pdev->dev, "spdif");
	if (IS_ERR(spdif->pclk)) {
		dev_err(&pdev->dev, "failed to get peri-clock\n");
		ret = -ENOENT;
		goto err0;
	}
	clk_prepare_enable(spdif->pclk);

	spdif->sclk = devm_clk_get(&pdev->dev, "sclk_spdif");
	if (IS_ERR(spdif->sclk)) {
		dev_err(&pdev->dev, "failed to get internal source clock\n");
		ret = -ENOENT;
		goto err1;
	}
	clk_prepare_enable(spdif->sclk);

	/* Request S/PDIF Register's memory region */
	if (!request_mem_region(mem_res->start,
				resource_size(mem_res), "samsung-spdif")) {
		dev_err(&pdev->dev, "Unable to request register region\n");
		ret = -EBUSY;
		goto err2;
	}

	spdif->regs = ioremap(mem_res->start, 0x100);
	if (spdif->regs == NULL) {
		dev_err(&pdev->dev, "Cannot ioremap registers\n");
		ret = -ENXIO;
		goto err3;
	}

	dev_set_drvdata(&pdev->dev, spdif);

	ret = devm_snd_soc_register_component(&pdev->dev,
			&samsung_spdif_component, &samsung_spdif_dai, 1);
	if (ret != 0) {
		dev_err(&pdev->dev, "fail to register dai\n");
		goto err4;
	}

	spdif_stereo_out.addr_width = 2;
	spdif_stereo_out.addr = mem_res->start + DATA_OUTBUF;
	filter = NULL;
	if (spdif_pdata) {
		spdif_stereo_out.filter_data = spdif_pdata->dma_playback;
		filter = spdif_pdata->dma_filter;
	}

	spdif->dma_playback = &spdif_stereo_out;

	ret = samsung_asoc_dma_platform_register(&pdev->dev, filter,
						 NULL, NULL);
	if (ret) {
		dev_err(&pdev->dev, "failed to register DMA: %d\n", ret);
		goto err4;
	}

	return 0;
err4:
	iounmap(spdif->regs);
err3:
	release_mem_region(mem_res->start, resource_size(mem_res));
err2:
	clk_disable_unprepare(spdif->sclk);
err1:
	clk_disable_unprepare(spdif->pclk);
err0:
	return ret;
}

static int spdif_remove(struct platform_device *pdev)
{
	struct samsung_spdif_info *spdif = &spdif_info;
	struct resource *mem_res;

	iounmap(spdif->regs);

	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (mem_res)
		release_mem_region(mem_res->start, resource_size(mem_res));

	clk_disable_unprepare(spdif->sclk);
	clk_disable_unprepare(spdif->pclk);

	return 0;
}

static struct platform_driver samsung_spdif_driver = {
	.probe	= spdif_probe,
	.remove	= spdif_remove,
	.driver	= {
		.name	= "samsung-spdif",
	},
};

module_platform_driver(samsung_spdif_driver);

MODULE_AUTHOR("Seungwhan Youn, <sw.youn@samsung.com>");
MODULE_DESCRIPTION("Samsung S/PDIF Controller Driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:samsung-spdif");
Commit	Line	Data
5033f43c	1	/* sound/soc/samsung/spdif.c
fc127ccc SY	2	*
	3	* ALSA SoC Audio Layer - Samsung S/PDIF Controller driver
	4	*
	5	* Copyright (c) 2010 Samsung Electronics Co. Ltd
	6	* http://www.samsung.com/
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/clk.h>
	14	#include <linux/io.h>
da155d5b	15	#include <linux/module.h>
fc127ccc	16
fc127ccc	17	#include <sound/soc.h>
0378b6ac	18	#include <sound/pcm_params.h>
fc127ccc	19
436d42c6	20	#include <linux/platform_data/asoc-s3c.h>
fc127ccc	21
4b640cf3	22	#include "dma.h"
fc127ccc SY	23	#include "spdif.h"
	24
	25	/* Registers */
	26	#define CLKCON 0x00
	27	#define CON 0x04
	28	#define BSTAS 0x08
	29	#define CSTAS 0x0C
	30	#define DATA_OUTBUF 0x10
	31	#define DCNT 0x14
	32	#define BSTAS_S 0x18
	33	#define DCNT_S 0x1C
	34
	35	#define CLKCTL_MASK 0x7
	36	#define CLKCTL_MCLK_EXT (0x1 << 2)
	37	#define CLKCTL_PWR_ON (0x1 << 0)
	38
	39	#define CON_MASK 0x3ffffff
	40	#define CON_FIFO_TH_SHIFT 19
	41	#define CON_FIFO_TH_MASK (0x7 << 19)
	42	#define CON_USERDATA_23RDBIT (0x1 << 12)
	43
	44	#define CON_SW_RESET (0x1 << 5)
	45
	46	#define CON_MCLKDIV_MASK (0x3 << 3)
	47	#define CON_MCLKDIV_256FS (0x0 << 3)
	48	#define CON_MCLKDIV_384FS (0x1 << 3)
	49	#define CON_MCLKDIV_512FS (0x2 << 3)
	50
	51	#define CON_PCM_MASK (0x3 << 1)
	52	#define CON_PCM_16BIT (0x0 << 1)
	53	#define CON_PCM_20BIT (0x1 << 1)
	54	#define CON_PCM_24BIT (0x2 << 1)
	55
	56	#define CON_PCM_DATA (0x1 << 0)
	57
	58	#define CSTAS_MASK 0x3fffffff
	59	#define CSTAS_SAMP_FREQ_MASK (0xF << 24)
	60	#define CSTAS_SAMP_FREQ_44 (0x0 << 24)
	61	#define CSTAS_SAMP_FREQ_48 (0x2 << 24)
	62	#define CSTAS_SAMP_FREQ_32 (0x3 << 24)
	63	#define CSTAS_SAMP_FREQ_96 (0xA << 24)
	64
	65	#define CSTAS_CATEGORY_MASK (0xFF << 8)
	66	#define CSTAS_CATEGORY_CODE_CDP (0x01 << 8)
	67
	68	#define CSTAS_NO_COPYRIGHT (0x1 << 2)
	69
	70	/**
	71	* struct samsung_spdif_info - Samsung S/PDIF Controller information
	72	* @lock: Spin lock for S/PDIF.
	73	* @dev: The parent device passed to use from the probe.
	74	* @regs: The pointer to the device register block.
	75	* @clk_rate: Current clock rate for calcurate ratio.
	76	* @pclk: The peri-clock pointer for spdif master operation.
	77	* @sclk: The source clock pointer for making sync signals.
	78	* @save_clkcon: Backup clkcon reg. in suspend.
	79	* @save_con: Backup con reg. in suspend.
	80	* @save_cstas: Backup cstas reg. in suspend.
	81	* @dma_playback: DMA information for playback channel.
	82	*/
	83	struct samsung_spdif_info {
	84	spinlock_t lock;
	85	struct device *dev;
	86	void __iomem *regs;
87	unsigned long clk_rate;
88	struct clk *pclk;
89	struct clk *sclk;
90	u32 saved_clkcon;
91	u32 saved_con;
92	u32 saved_cstas;
2b658345	93	struct snd_dmaengine_dai_dma_data *dma_playback;
fc127ccc SY	94	};
fc127ccc SY	95
2b658345	96	static struct snd_dmaengine_dai_dma_data spdif_stereo_out;
fc127ccc SY	97	static struct samsung_spdif_info spdif_info;
	98
	99	static inline struct samsung_spdif_info to_info(struct snd_soc_dai cpu_dai)
	100	{
	101	return snd_soc_dai_get_drvdata(cpu_dai);
	102	}
	103
	104	static void spdif_snd_txctrl(struct samsung_spdif_info *spdif, int on)
	105	{
	106	void __iomem *regs = spdif->regs;
	107	u32 clkcon;
	108
	109	dev_dbg(spdif->dev, "Entered %s\n", __func__);
	110
	111	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
	112	if (on)
	113	writel(clkcon \| CLKCTL_PWR_ON, regs + CLKCON);
	114	else
	115	writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
	116	}
	117
	118	static int spdif_set_sysclk(struct snd_soc_dai *cpu_dai,
	119	int clk_id, unsigned int freq, int dir)
	120	{
	121	struct samsung_spdif_info *spdif = to_info(cpu_dai);
	122	u32 clkcon;
	123
	124	dev_dbg(spdif->dev, "Entered %s\n", __func__);
	125
	126	clkcon = readl(spdif->regs + CLKCON);
	127
	128	if (clk_id == SND_SOC_SPDIF_INT_MCLK)
	129	clkcon &= ~CLKCTL_MCLK_EXT;
	130	else
	131	clkcon \|= CLKCTL_MCLK_EXT;
	132
	133	writel(clkcon, spdif->regs + CLKCON);
	134
	135	spdif->clk_rate = freq;
	136
	137	return 0;
	138	}
	139
	140	static int spdif_trigger(struct snd_pcm_substream *substream, int cmd,
	141	struct snd_soc_dai *dai)
	142	{
	143	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	144	struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
	145	unsigned long flags;
	146
	147	dev_dbg(spdif->dev, "Entered %s\n", __func__);
	148
	149	switch (cmd) {
	150	case SNDRV_PCM_TRIGGER_START:
	151	case SNDRV_PCM_TRIGGER_RESUME:
	152	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	153	spin_lock_irqsave(&spdif->lock, flags);
	154	spdif_snd_txctrl(spdif, 1);
	155	spin_unlock_irqrestore(&spdif->lock, flags);
	156	break;
	157	case SNDRV_PCM_TRIGGER_STOP:
	158	case SNDRV_PCM_TRIGGER_SUSPEND:
	159	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	160	spin_lock_irqsave(&spdif->lock, flags);
161	spdif_snd_txctrl(spdif, 0);
162	spin_unlock_irqrestore(&spdif->lock, flags);
163	break;
164	default:
165	return -EINVAL;
166	}
167
168	return 0;
169	}
170
171	static int spdif_sysclk_ratios[] = {
172	512, 384, 256,
173	};
174
175	static int spdif_hw_params(struct snd_pcm_substream *substream,
176	struct snd_pcm_hw_params *params,
177	struct snd_soc_dai *socdai)
178	{
179	struct snd_soc_pcm_runtime *rtd = substream->private_data;
180	struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
181	void __iomem *regs = spdif->regs;
2b658345	182	struct snd_dmaengine_dai_dma_data *dma_data;
fc127ccc SY	183	u32 con, clkcon, cstas;
	184	unsigned long flags;
	185	int i, ratio;
	186
	187	dev_dbg(spdif->dev, "Entered %s\n", __func__);
	188
	189	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
	190	dma_data = spdif->dma_playback;
	191	else {
	192	dev_err(spdif->dev, "Capture is not supported\n");
	193	return -EINVAL;
	194	}
	195
	196	snd_soc_dai_set_dma_data(rtd->cpu_dai, substream, dma_data);
	197
	198	spin_lock_irqsave(&spdif->lock, flags);
	199
	200	con = readl(regs + CON) & CON_MASK;
	201	cstas = readl(regs + CSTAS) & CSTAS_MASK;
	202	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
	203
	204	con &= ~CON_FIFO_TH_MASK;
	205	con \|= (0x7 << CON_FIFO_TH_SHIFT);
	206	con \|= CON_USERDATA_23RDBIT;
	207	con \|= CON_PCM_DATA;
	208
	209	con &= ~CON_PCM_MASK;
88ce1465 TB	210	switch (params_width(params)) {
88ce1465 TB	211	case 16:
fc127ccc SY	212	con \|= CON_PCM_16BIT;
	213	break;
	214	default:
	215	dev_err(spdif->dev, "Unsupported data size.\n");
	216	goto err;
	217	}
	218
	219	ratio = spdif->clk_rate / params_rate(params);
	220	for (i = 0; i < ARRAY_SIZE(spdif_sysclk_ratios); i++)
	221	if (ratio == spdif_sysclk_ratios[i])
	222	break;
	223	if (i == ARRAY_SIZE(spdif_sysclk_ratios)) {
	224	dev_err(spdif->dev, "Invalid clock ratio %ld/%d\n",
	225	spdif->clk_rate, params_rate(params));
	226	goto err;
	227	}
	228
	229	con &= ~CON_MCLKDIV_MASK;
	230	switch (ratio) {
	231	case 256:
	232	con \|= CON_MCLKDIV_256FS;
	233	break;
	234	case 384:
	235	con \|= CON_MCLKDIV_384FS;
	236	break;
	237	case 512:
	238	con \|= CON_MCLKDIV_512FS;
	239	break;
	240	}
	241
	242	cstas &= ~CSTAS_SAMP_FREQ_MASK;
	243	switch (params_rate(params)) {
	244	case 44100:
	245	cstas \|= CSTAS_SAMP_FREQ_44;
	246	break;
	247	case 48000:
	248	cstas \|= CSTAS_SAMP_FREQ_48;
	249	break;
	250	case 32000:
	251	cstas \|= CSTAS_SAMP_FREQ_32;
	252	break;
	253	case 96000:
	254	cstas \|= CSTAS_SAMP_FREQ_96;
	255	break;
	256	default:
	257	dev_err(spdif->dev, "Invalid sampling rate %d\n",
	258	params_rate(params));
	259	goto err;
	260	}
	261
	262	cstas &= ~CSTAS_CATEGORY_MASK;
	263	cstas \|= CSTAS_CATEGORY_CODE_CDP;
	264	cstas \|= CSTAS_NO_COPYRIGHT;
	265
	266	writel(con, regs + CON);
	267	writel(cstas, regs + CSTAS);
	268	writel(clkcon, regs + CLKCON);
	269
	270	spin_unlock_irqrestore(&spdif->lock, flags);
	271
	272	return 0;
	273	err:
	274	spin_unlock_irqrestore(&spdif->lock, flags);
	275	return -EINVAL;
276	}
277
278	static void spdif_shutdown(struct snd_pcm_substream *substream,
279	struct snd_soc_dai *dai)
280	{
281	struct snd_soc_pcm_runtime *rtd = substream->private_data;
282	struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
283	void __iomem *regs = spdif->regs;
284	u32 con, clkcon;
285
286	dev_dbg(spdif->dev, "Entered %s\n", __func__);
287
288	con = readl(regs + CON) & CON_MASK;
289	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
290
291	writel(con \| CON_SW_RESET, regs + CON);
292	cpu_relax();
293
294	writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
295	}
296
297	#ifdef CONFIG_PM
298	static int spdif_suspend(struct snd_soc_dai *cpu_dai)
299	{
300	struct samsung_spdif_info *spdif = to_info(cpu_dai);
301	u32 con = spdif->saved_con;
302
303	dev_dbg(spdif->dev, "Entered %s\n", __func__);
304
305	spdif->saved_clkcon = readl(spdif->regs + CLKCON) & CLKCTL_MASK;
306	spdif->saved_con = readl(spdif->regs + CON) & CON_MASK;
307	spdif->saved_cstas = readl(spdif->regs + CSTAS) & CSTAS_MASK;
308
309	writel(con \| CON_SW_RESET, spdif->regs + CON);
310	cpu_relax();
311
312	return 0;
313	}
314
315	static int spdif_resume(struct snd_soc_dai *cpu_dai)
316	{
317	struct samsung_spdif_info *spdif = to_info(cpu_dai);
318
319	dev_dbg(spdif->dev, "Entered %s\n", __func__);
320
321	writel(spdif->saved_clkcon, spdif->regs + CLKCON);
322	writel(spdif->saved_con, spdif->regs + CON);
323	writel(spdif->saved_cstas, spdif->regs + CSTAS);
324
325	return 0;
326	}
327	#else
328	#define spdif_suspend NULL
329	#define spdif_resume NULL
330	#endif
331
85e7652d	332	static const struct snd_soc_dai_ops spdif_dai_ops = {
fc127ccc SY	333	.set_sysclk = spdif_set_sysclk,
	334	.trigger = spdif_trigger,
	335	.hw_params = spdif_hw_params,
	336	.shutdown = spdif_shutdown,
	337	};
	338
bc6bd90e	339	static struct snd_soc_dai_driver samsung_spdif_dai = {
fc127ccc SY	340	.name = "samsung-spdif",
	341	.playback = {
	342	.stream_name = "S/PDIF Playback",
	343	.channels_min = 2,
	344	.channels_max = 2,
	345	.rates = (SNDRV_PCM_RATE_32000 \|
	346	SNDRV_PCM_RATE_44100 \|
	347	SNDRV_PCM_RATE_48000 \|
	348	SNDRV_PCM_RATE_96000),
	349	.formats = SNDRV_PCM_FMTBIT_S16_LE, },
	350	.ops = &spdif_dai_ops,
	351	.suspend = spdif_suspend,
	352	.resume = spdif_resume,
	353	};
	354
c3764d8b KM	355	static const struct snd_soc_component_driver samsung_spdif_component = {
	356	.name = "samsung-spdif",
	357	};
	358
fdca21ad	359	static int spdif_probe(struct platform_device *pdev)
fc127ccc SY	360	{
fc127ccc SY	361	struct s3c_audio_pdata *spdif_pdata;
b9a1a743	362	struct resource *mem_res;
fc127ccc	363	struct samsung_spdif_info *spdif;
9bdca822	364	dma_filter_fn filter;
fc127ccc SY	365	int ret;
	366
	367	spdif_pdata = pdev->dev.platform_data;
	368
	369	dev_dbg(&pdev->dev, "Entered %s\n", __func__);
	370
fc127ccc SY	371	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	372	if (!mem_res) {
	373	dev_err(&pdev->dev, "Unable to get register resource.\n");
	374	return -ENXIO;
	375	}
	376
	377	if (spdif_pdata && spdif_pdata->cfg_gpio
	378	&& spdif_pdata->cfg_gpio(pdev)) {
	379	dev_err(&pdev->dev, "Unable to configure GPIO pins\n");
	380	return -EINVAL;
	381	}
	382
	383	spdif = &spdif_info;
	384	spdif->dev = &pdev->dev;
	385
	386	spin_lock_init(&spdif->lock);
	387
7497185f	388	spdif->pclk = devm_clk_get(&pdev->dev, "spdif");
fc127ccc SY	389	if (IS_ERR(spdif->pclk)) {
	390	dev_err(&pdev->dev, "failed to get peri-clock\n");
	391	ret = -ENOENT;
	392	goto err0;
	393	}
9d01e9b2	394	clk_prepare_enable(spdif->pclk);
fc127ccc	395
7497185f	396	spdif->sclk = devm_clk_get(&pdev->dev, "sclk_spdif");
fc127ccc SY	397	if (IS_ERR(spdif->sclk)) {
	398	dev_err(&pdev->dev, "failed to get internal source clock\n");
	399	ret = -ENOENT;
	400	goto err1;
	401	}
9d01e9b2	402	clk_prepare_enable(spdif->sclk);
fc127ccc SY	403
	404	/* Request S/PDIF Register's memory region */
	405	if (!request_mem_region(mem_res->start,
	406	resource_size(mem_res), "samsung-spdif")) {
	407	dev_err(&pdev->dev, "Unable to request register region\n");
	408	ret = -EBUSY;
	409	goto err2;
	410	}
	411
	412	spdif->regs = ioremap(mem_res->start, 0x100);
	413	if (spdif->regs == NULL) {
	414	dev_err(&pdev->dev, "Cannot ioremap registers\n");
	415	ret = -ENXIO;
	416	goto err3;
	417	}
	418
	419	dev_set_drvdata(&pdev->dev, spdif);
	420
7253e354 TB	421	ret = devm_snd_soc_register_component(&pdev->dev,
7253e354 TB	422	&samsung_spdif_component, &samsung_spdif_dai, 1);
fc127ccc SY	423	if (ret != 0) {
	424	dev_err(&pdev->dev, "fail to register dai\n");
	425	goto err4;
	426	}
	427
2b658345 SN	428	spdif_stereo_out.addr_width = 2;
2b658345 SN	429	spdif_stereo_out.addr = mem_res->start + DATA_OUTBUF;
9bdca822 AB	430	filter = NULL;
9bdca822 AB	431	if (spdif_pdata) {
2b658345	432	spdif_stereo_out.filter_data = spdif_pdata->dma_playback;
9bdca822 AB	433	filter = spdif_pdata->dma_filter;
9bdca822 AB	434	}
fc127ccc SY	435
	436	spdif->dma_playback = &spdif_stereo_out;
	437
42a74e77 SN	438	ret = samsung_asoc_dma_platform_register(&pdev->dev, filter,
42a74e77 SN	439	NULL, NULL);
a08485d8 PV	440	if (ret) {
a08485d8 PV	441	dev_err(&pdev->dev, "failed to register DMA: %d\n", ret);
7253e354	442	goto err4;
a08485d8	443	}
fc127ccc	444
a08485d8	445	return 0;
fc127ccc SY	446	err4:
	447	iounmap(spdif->regs);
	448	err3:
	449	release_mem_region(mem_res->start, resource_size(mem_res));
	450	err2:
9d01e9b2	451	clk_disable_unprepare(spdif->sclk);
fc127ccc	452	err1:
9d01e9b2	453	clk_disable_unprepare(spdif->pclk);
fc127ccc SY	454	err0:
	455	return ret;
	456	}
	457
fdca21ad	458	static int spdif_remove(struct platform_device *pdev)
fc127ccc SY	459	{
	460	struct samsung_spdif_info *spdif = &spdif_info;
	461	struct resource *mem_res;
	462
fc127ccc SY	463	iounmap(spdif->regs);
	464
	465	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	466	if (mem_res)
	467	release_mem_region(mem_res->start, resource_size(mem_res));
	468
9d01e9b2	469	clk_disable_unprepare(spdif->sclk);
9d01e9b2	470	clk_disable_unprepare(spdif->pclk);
fc127ccc SY	471
	472	return 0;
	473	}
	474
	475	static struct platform_driver samsung_spdif_driver = {
	476	.probe = spdif_probe,
fdca21ad	477	.remove = spdif_remove,
fc127ccc SY	478	.driver = {
fc127ccc SY	479	.name = "samsung-spdif",
fc127ccc SY	480	},
	481	};
	482
e00c3f55	483	module_platform_driver(samsung_spdif_driver);
fc127ccc SY	484
	485	MODULE_AUTHOR("Seungwhan Youn, <sw.youn@samsung.com>");
	486	MODULE_DESCRIPTION("Samsung S/PDIF Controller Driver");
	487	MODULE_LICENSE("GPL");
	488	MODULE_ALIAS("platform:samsung-spdif");