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aef3b06a ML |
1 | /* |
2 | * SH7760 ("camelot") DMABRG audio DMA unit support | |
3 | * | |
4 | * Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net> | |
5 | * licensed under the terms outlined in the file COPYING at the root | |
6 | * of the linux kernel sources. | |
7 | * | |
8 | * The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which | |
9 | * trigger an interrupt when one half of the programmed transfer size | |
10 | * has been xmitted. | |
11 | * | |
12 | * FIXME: little-endian only for now | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
5a0e3ad6 | 16 | #include <linux/gfp.h> |
aef3b06a ML |
17 | #include <linux/init.h> |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/dma-mapping.h> | |
aef3b06a ML |
20 | #include <sound/core.h> |
21 | #include <sound/pcm.h> | |
22 | #include <sound/pcm_params.h> | |
23 | #include <sound/soc.h> | |
24 | #include <asm/dmabrg.h> | |
25 | ||
26 | ||
27 | /* registers and bits */ | |
28 | #define BRGATXSAR 0x00 | |
29 | #define BRGARXDAR 0x04 | |
30 | #define BRGATXTCR 0x08 | |
31 | #define BRGARXTCR 0x0C | |
32 | #define BRGACR 0x10 | |
33 | #define BRGATXTCNT 0x14 | |
34 | #define BRGARXTCNT 0x18 | |
35 | ||
36 | #define ACR_RAR (1 << 18) | |
37 | #define ACR_RDS (1 << 17) | |
38 | #define ACR_RDE (1 << 16) | |
39 | #define ACR_TAR (1 << 2) | |
40 | #define ACR_TDS (1 << 1) | |
41 | #define ACR_TDE (1 << 0) | |
42 | ||
43 | /* receiver/transmitter data alignment */ | |
44 | #define ACR_RAM_NONE (0 << 24) | |
45 | #define ACR_RAM_4BYTE (1 << 24) | |
46 | #define ACR_RAM_2WORD (2 << 24) | |
47 | #define ACR_TAM_NONE (0 << 8) | |
48 | #define ACR_TAM_4BYTE (1 << 8) | |
49 | #define ACR_TAM_2WORD (2 << 8) | |
50 | ||
51 | ||
52 | struct camelot_pcm { | |
53 | unsigned long mmio; /* DMABRG audio channel control reg MMIO */ | |
54 | unsigned int txid; /* ID of first DMABRG IRQ for this unit */ | |
55 | ||
56 | struct snd_pcm_substream *tx_ss; | |
57 | unsigned long tx_period_size; | |
58 | unsigned int tx_period; | |
59 | ||
60 | struct snd_pcm_substream *rx_ss; | |
61 | unsigned long rx_period_size; | |
62 | unsigned int rx_period; | |
63 | ||
64 | } cam_pcm_data[2] = { | |
65 | { | |
66 | .mmio = 0xFE3C0040, | |
67 | .txid = DMABRGIRQ_A0TXF, | |
68 | }, | |
69 | { | |
70 | .mmio = 0xFE3C0060, | |
71 | .txid = DMABRGIRQ_A1TXF, | |
72 | }, | |
73 | }; | |
74 | ||
75 | #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x))) | |
76 | ||
77 | /* | |
78 | * set a minimum of 16kb per period, to avoid interrupt-"storm" and | |
79 | * resulting skipping. In general, the bigger the minimum size, the | |
80 | * better for overall system performance. (The SH7760 is a puny CPU | |
81 | * with a slow SDRAM interface and poor internal bus bandwidth, | |
82 | * *especially* when the LCDC is active). The minimum for the DMAC | |
83 | * is 8 bytes; 16kbytes are enough to get skip-free playback of a | |
84 | * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain | |
85 | * reasonable responsiveness in MPlayer. | |
86 | */ | |
87 | #define DMABRG_PERIOD_MIN 16 * 1024 | |
88 | #define DMABRG_PERIOD_MAX 0x03fffffc | |
89 | #define DMABRG_PREALLOC_BUFFER 32 * 1024 | |
90 | #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024 | |
91 | ||
92 | /* support everything the SSI supports */ | |
93 | #define DMABRG_RATES \ | |
94 | SNDRV_PCM_RATE_8000_192000 | |
95 | ||
96 | #define DMABRG_FMTS \ | |
97 | (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \ | |
98 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \ | |
99 | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \ | |
100 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \ | |
101 | SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE) | |
102 | ||
103 | static struct snd_pcm_hardware camelot_pcm_hardware = { | |
104 | .info = (SNDRV_PCM_INFO_MMAP | | |
105 | SNDRV_PCM_INFO_INTERLEAVED | | |
106 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
2008f137 TI |
107 | SNDRV_PCM_INFO_MMAP_VALID | |
108 | SNDRV_PCM_INFO_BATCH), | |
aef3b06a ML |
109 | .formats = DMABRG_FMTS, |
110 | .rates = DMABRG_RATES, | |
111 | .rate_min = 8000, | |
112 | .rate_max = 192000, | |
113 | .channels_min = 2, | |
114 | .channels_max = 8, /* max of the SSI */ | |
115 | .buffer_bytes_max = DMABRG_PERIOD_MAX, | |
116 | .period_bytes_min = DMABRG_PERIOD_MIN, | |
117 | .period_bytes_max = DMABRG_PERIOD_MAX / 2, | |
118 | .periods_min = 2, | |
119 | .periods_max = 2, | |
120 | .fifo_size = 128, | |
121 | }; | |
122 | ||
123 | static void camelot_txdma(void *data) | |
124 | { | |
125 | struct camelot_pcm *cam = data; | |
126 | cam->tx_period ^= 1; | |
127 | snd_pcm_period_elapsed(cam->tx_ss); | |
128 | } | |
129 | ||
130 | static void camelot_rxdma(void *data) | |
131 | { | |
132 | struct camelot_pcm *cam = data; | |
133 | cam->rx_period ^= 1; | |
134 | snd_pcm_period_elapsed(cam->rx_ss); | |
135 | } | |
136 | ||
137 | static int camelot_pcm_open(struct snd_pcm_substream *substream) | |
138 | { | |
139 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 140 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
141 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
142 | int ret, dmairq; | |
143 | ||
144 | snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware); | |
145 | ||
146 | /* DMABRG buffer half/full events */ | |
147 | dmairq = (recv) ? cam->txid + 2 : cam->txid; | |
148 | if (recv) { | |
149 | cam->rx_ss = substream; | |
150 | ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam); | |
151 | if (unlikely(ret)) { | |
152 | pr_debug("audio unit %d irqs already taken!\n", | |
f0fba2ad | 153 | rtd->cpu_dai->id); |
aef3b06a ML |
154 | return -EBUSY; |
155 | } | |
156 | (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam); | |
157 | } else { | |
158 | cam->tx_ss = substream; | |
159 | ret = dmabrg_request_irq(dmairq, camelot_txdma, cam); | |
160 | if (unlikely(ret)) { | |
161 | pr_debug("audio unit %d irqs already taken!\n", | |
f0fba2ad | 162 | rtd->cpu_dai->id); |
aef3b06a ML |
163 | return -EBUSY; |
164 | } | |
165 | (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam); | |
166 | } | |
167 | return 0; | |
168 | } | |
169 | ||
170 | static int camelot_pcm_close(struct snd_pcm_substream *substream) | |
171 | { | |
172 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 173 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
174 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
175 | int dmairq; | |
176 | ||
177 | dmairq = (recv) ? cam->txid + 2 : cam->txid; | |
178 | ||
179 | if (recv) | |
180 | cam->rx_ss = NULL; | |
181 | else | |
182 | cam->tx_ss = NULL; | |
183 | ||
184 | dmabrg_free_irq(dmairq + 1); | |
185 | dmabrg_free_irq(dmairq); | |
186 | ||
187 | return 0; | |
188 | } | |
189 | ||
190 | static int camelot_hw_params(struct snd_pcm_substream *substream, | |
191 | struct snd_pcm_hw_params *hw_params) | |
192 | { | |
193 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 194 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
195 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
196 | int ret; | |
197 | ||
198 | ret = snd_pcm_lib_malloc_pages(substream, | |
199 | params_buffer_bytes(hw_params)); | |
200 | if (ret < 0) | |
201 | return ret; | |
202 | ||
203 | if (recv) { | |
204 | cam->rx_period_size = params_period_bytes(hw_params); | |
205 | cam->rx_period = 0; | |
206 | } else { | |
207 | cam->tx_period_size = params_period_bytes(hw_params); | |
208 | cam->tx_period = 0; | |
209 | } | |
210 | return 0; | |
211 | } | |
212 | ||
213 | static int camelot_hw_free(struct snd_pcm_substream *substream) | |
214 | { | |
215 | return snd_pcm_lib_free_pages(substream); | |
216 | } | |
217 | ||
218 | static int camelot_prepare(struct snd_pcm_substream *substream) | |
219 | { | |
220 | struct snd_pcm_runtime *runtime = substream->runtime; | |
221 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 222 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
223 | |
224 | pr_debug("PCM data: addr 0x%08ulx len %d\n", | |
225 | (u32)runtime->dma_addr, runtime->dma_bytes); | |
226 | ||
227 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
228 | BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area; | |
229 | BRGREG(BRGATXTCR) = runtime->dma_bytes; | |
230 | } else { | |
231 | BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area; | |
232 | BRGREG(BRGARXTCR) = runtime->dma_bytes; | |
233 | } | |
234 | ||
235 | return 0; | |
236 | } | |
237 | ||
238 | static inline void dmabrg_play_dma_start(struct camelot_pcm *cam) | |
239 | { | |
240 | unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); | |
241 | /* start DMABRG engine: XFER start, auto-addr-reload */ | |
242 | BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD; | |
243 | } | |
244 | ||
245 | static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam) | |
246 | { | |
247 | unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); | |
248 | /* forcibly terminate data transmission */ | |
249 | BRGREG(BRGACR) = acr | ACR_TDS; | |
250 | } | |
251 | ||
252 | static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam) | |
253 | { | |
254 | unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); | |
255 | /* start DMABRG engine: recv start, auto-reload */ | |
256 | BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD; | |
257 | } | |
258 | ||
259 | static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam) | |
260 | { | |
261 | unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); | |
262 | /* forcibly terminate data receiver */ | |
263 | BRGREG(BRGACR) = acr | ACR_RDS; | |
264 | } | |
265 | ||
266 | static int camelot_trigger(struct snd_pcm_substream *substream, int cmd) | |
267 | { | |
268 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 269 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
270 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
271 | ||
272 | switch (cmd) { | |
273 | case SNDRV_PCM_TRIGGER_START: | |
274 | if (recv) | |
275 | dmabrg_rec_dma_start(cam); | |
276 | else | |
277 | dmabrg_play_dma_start(cam); | |
278 | break; | |
279 | case SNDRV_PCM_TRIGGER_STOP: | |
280 | if (recv) | |
281 | dmabrg_rec_dma_stop(cam); | |
282 | else | |
283 | dmabrg_play_dma_stop(cam); | |
284 | break; | |
285 | default: | |
286 | return -EINVAL; | |
287 | } | |
288 | ||
289 | return 0; | |
290 | } | |
291 | ||
292 | static snd_pcm_uframes_t camelot_pos(struct snd_pcm_substream *substream) | |
293 | { | |
294 | struct snd_pcm_runtime *runtime = substream->runtime; | |
295 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 296 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
297 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
298 | unsigned long pos; | |
299 | ||
300 | /* cannot use the DMABRG pointer register: under load, by the | |
301 | * time ALSA comes around to read the register, it is already | |
302 | * far ahead (or worse, already done with the fragment) of the | |
303 | * position at the time the IRQ was triggered, which results in | |
304 | * fast-playback sound in my test application (ScummVM) | |
305 | */ | |
306 | if (recv) | |
307 | pos = cam->rx_period ? cam->rx_period_size : 0; | |
308 | else | |
309 | pos = cam->tx_period ? cam->tx_period_size : 0; | |
310 | ||
311 | return bytes_to_frames(runtime, pos); | |
312 | } | |
313 | ||
314 | static struct snd_pcm_ops camelot_pcm_ops = { | |
315 | .open = camelot_pcm_open, | |
316 | .close = camelot_pcm_close, | |
317 | .ioctl = snd_pcm_lib_ioctl, | |
318 | .hw_params = camelot_hw_params, | |
319 | .hw_free = camelot_hw_free, | |
320 | .prepare = camelot_prepare, | |
321 | .trigger = camelot_trigger, | |
322 | .pointer = camelot_pos, | |
323 | }; | |
324 | ||
325 | static void camelot_pcm_free(struct snd_pcm *pcm) | |
326 | { | |
327 | snd_pcm_lib_preallocate_free_for_all(pcm); | |
328 | } | |
329 | ||
552d1ef6 | 330 | static int camelot_pcm_new(struct snd_soc_pcm_runtime *rtd) |
aef3b06a | 331 | { |
552d1ef6 LG |
332 | struct snd_pcm *pcm = rtd->pcm; |
333 | ||
aef3b06a ML |
334 | /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel |
335 | * in MMAP mode (i.e. aplay -M) | |
336 | */ | |
337 | snd_pcm_lib_preallocate_pages_for_all(pcm, | |
338 | SNDRV_DMA_TYPE_CONTINUOUS, | |
339 | snd_dma_continuous_data(GFP_KERNEL), | |
340 | DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX); | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
f0fba2ad | 345 | static struct snd_soc_platform sh7760_soc_platform = { |
aef3b06a ML |
346 | .pcm_ops = &camelot_pcm_ops, |
347 | .pcm_new = camelot_pcm_new, | |
348 | .pcm_free = camelot_pcm_free, | |
349 | }; | |
aef3b06a | 350 | |
f0fba2ad | 351 | static int __devinit sh7760_soc_platform_probe(struct platform_device *pdev) |
958e792c | 352 | { |
f0fba2ad | 353 | return snd_soc_register_platform(&pdev->dev, &sh7760_soc_platform); |
958e792c | 354 | } |
958e792c | 355 | |
f0fba2ad | 356 | static int __devexit sh7760_soc_platform_remove(struct platform_device *pdev) |
958e792c | 357 | { |
f0fba2ad LG |
358 | snd_soc_unregister_platform(&pdev->dev); |
359 | return 0; | |
360 | } | |
361 | ||
362 | static struct platform_driver sh7760_pcm_driver = { | |
363 | .driver = { | |
364 | .name = "sh7760-pcm-audio", | |
365 | .owner = THIS_MODULE, | |
366 | }, | |
367 | ||
368 | .probe = sh7760_soc_platform_probe, | |
369 | .remove = __devexit_p(sh7760_soc_platform_remove), | |
370 | }; | |
371 | ||
cb5e8738 | 372 | module_platform_driver(sh7760_pcm_driver); |
958e792c | 373 | |
aef3b06a ML |
374 | MODULE_LICENSE("GPL"); |
375 | MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver"); | |
376 | MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>"); |