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aef3b06a ML |
1 | /* |
2 | * SH7760 ("camelot") DMABRG audio DMA unit support | |
3 | * | |
4 | * Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net> | |
5 | * licensed under the terms outlined in the file COPYING at the root | |
6 | * of the linux kernel sources. | |
7 | * | |
8 | * The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which | |
9 | * trigger an interrupt when one half of the programmed transfer size | |
10 | * has been xmitted. | |
11 | * | |
12 | * FIXME: little-endian only for now | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
5a0e3ad6 | 16 | #include <linux/gfp.h> |
aef3b06a ML |
17 | #include <linux/init.h> |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/dma-mapping.h> | |
aef3b06a ML |
20 | #include <sound/core.h> |
21 | #include <sound/pcm.h> | |
22 | #include <sound/pcm_params.h> | |
23 | #include <sound/soc.h> | |
24 | #include <asm/dmabrg.h> | |
25 | ||
26 | ||
27 | /* registers and bits */ | |
28 | #define BRGATXSAR 0x00 | |
29 | #define BRGARXDAR 0x04 | |
30 | #define BRGATXTCR 0x08 | |
31 | #define BRGARXTCR 0x0C | |
32 | #define BRGACR 0x10 | |
33 | #define BRGATXTCNT 0x14 | |
34 | #define BRGARXTCNT 0x18 | |
35 | ||
36 | #define ACR_RAR (1 << 18) | |
37 | #define ACR_RDS (1 << 17) | |
38 | #define ACR_RDE (1 << 16) | |
39 | #define ACR_TAR (1 << 2) | |
40 | #define ACR_TDS (1 << 1) | |
41 | #define ACR_TDE (1 << 0) | |
42 | ||
43 | /* receiver/transmitter data alignment */ | |
44 | #define ACR_RAM_NONE (0 << 24) | |
45 | #define ACR_RAM_4BYTE (1 << 24) | |
46 | #define ACR_RAM_2WORD (2 << 24) | |
47 | #define ACR_TAM_NONE (0 << 8) | |
48 | #define ACR_TAM_4BYTE (1 << 8) | |
49 | #define ACR_TAM_2WORD (2 << 8) | |
50 | ||
51 | ||
52 | struct camelot_pcm { | |
53 | unsigned long mmio; /* DMABRG audio channel control reg MMIO */ | |
54 | unsigned int txid; /* ID of first DMABRG IRQ for this unit */ | |
55 | ||
56 | struct snd_pcm_substream *tx_ss; | |
57 | unsigned long tx_period_size; | |
58 | unsigned int tx_period; | |
59 | ||
60 | struct snd_pcm_substream *rx_ss; | |
61 | unsigned long rx_period_size; | |
62 | unsigned int rx_period; | |
63 | ||
64 | } cam_pcm_data[2] = { | |
65 | { | |
66 | .mmio = 0xFE3C0040, | |
67 | .txid = DMABRGIRQ_A0TXF, | |
68 | }, | |
69 | { | |
70 | .mmio = 0xFE3C0060, | |
71 | .txid = DMABRGIRQ_A1TXF, | |
72 | }, | |
73 | }; | |
74 | ||
75 | #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x))) | |
76 | ||
77 | /* | |
78 | * set a minimum of 16kb per period, to avoid interrupt-"storm" and | |
79 | * resulting skipping. In general, the bigger the minimum size, the | |
80 | * better for overall system performance. (The SH7760 is a puny CPU | |
81 | * with a slow SDRAM interface and poor internal bus bandwidth, | |
82 | * *especially* when the LCDC is active). The minimum for the DMAC | |
83 | * is 8 bytes; 16kbytes are enough to get skip-free playback of a | |
84 | * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain | |
85 | * reasonable responsiveness in MPlayer. | |
86 | */ | |
87 | #define DMABRG_PERIOD_MIN 16 * 1024 | |
88 | #define DMABRG_PERIOD_MAX 0x03fffffc | |
89 | #define DMABRG_PREALLOC_BUFFER 32 * 1024 | |
90 | #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024 | |
91 | ||
5c2e035e | 92 | static const struct snd_pcm_hardware camelot_pcm_hardware = { |
aef3b06a ML |
93 | .info = (SNDRV_PCM_INFO_MMAP | |
94 | SNDRV_PCM_INFO_INTERLEAVED | | |
95 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
2008f137 TI |
96 | SNDRV_PCM_INFO_MMAP_VALID | |
97 | SNDRV_PCM_INFO_BATCH), | |
aef3b06a ML |
98 | .buffer_bytes_max = DMABRG_PERIOD_MAX, |
99 | .period_bytes_min = DMABRG_PERIOD_MIN, | |
100 | .period_bytes_max = DMABRG_PERIOD_MAX / 2, | |
101 | .periods_min = 2, | |
102 | .periods_max = 2, | |
103 | .fifo_size = 128, | |
104 | }; | |
105 | ||
106 | static void camelot_txdma(void *data) | |
107 | { | |
108 | struct camelot_pcm *cam = data; | |
109 | cam->tx_period ^= 1; | |
110 | snd_pcm_period_elapsed(cam->tx_ss); | |
111 | } | |
112 | ||
113 | static void camelot_rxdma(void *data) | |
114 | { | |
115 | struct camelot_pcm *cam = data; | |
116 | cam->rx_period ^= 1; | |
117 | snd_pcm_period_elapsed(cam->rx_ss); | |
118 | } | |
119 | ||
120 | static int camelot_pcm_open(struct snd_pcm_substream *substream) | |
121 | { | |
122 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 123 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
124 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
125 | int ret, dmairq; | |
126 | ||
127 | snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware); | |
128 | ||
129 | /* DMABRG buffer half/full events */ | |
130 | dmairq = (recv) ? cam->txid + 2 : cam->txid; | |
131 | if (recv) { | |
132 | cam->rx_ss = substream; | |
133 | ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam); | |
134 | if (unlikely(ret)) { | |
135 | pr_debug("audio unit %d irqs already taken!\n", | |
f0fba2ad | 136 | rtd->cpu_dai->id); |
aef3b06a ML |
137 | return -EBUSY; |
138 | } | |
139 | (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam); | |
140 | } else { | |
141 | cam->tx_ss = substream; | |
142 | ret = dmabrg_request_irq(dmairq, camelot_txdma, cam); | |
143 | if (unlikely(ret)) { | |
144 | pr_debug("audio unit %d irqs already taken!\n", | |
f0fba2ad | 145 | rtd->cpu_dai->id); |
aef3b06a ML |
146 | return -EBUSY; |
147 | } | |
148 | (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam); | |
149 | } | |
150 | return 0; | |
151 | } | |
152 | ||
153 | static int camelot_pcm_close(struct snd_pcm_substream *substream) | |
154 | { | |
155 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 156 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
157 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
158 | int dmairq; | |
159 | ||
160 | dmairq = (recv) ? cam->txid + 2 : cam->txid; | |
161 | ||
162 | if (recv) | |
163 | cam->rx_ss = NULL; | |
164 | else | |
165 | cam->tx_ss = NULL; | |
166 | ||
167 | dmabrg_free_irq(dmairq + 1); | |
168 | dmabrg_free_irq(dmairq); | |
169 | ||
170 | return 0; | |
171 | } | |
172 | ||
173 | static int camelot_hw_params(struct snd_pcm_substream *substream, | |
174 | struct snd_pcm_hw_params *hw_params) | |
175 | { | |
176 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 177 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
178 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
179 | int ret; | |
180 | ||
181 | ret = snd_pcm_lib_malloc_pages(substream, | |
182 | params_buffer_bytes(hw_params)); | |
183 | if (ret < 0) | |
184 | return ret; | |
185 | ||
186 | if (recv) { | |
187 | cam->rx_period_size = params_period_bytes(hw_params); | |
188 | cam->rx_period = 0; | |
189 | } else { | |
190 | cam->tx_period_size = params_period_bytes(hw_params); | |
191 | cam->tx_period = 0; | |
192 | } | |
193 | return 0; | |
194 | } | |
195 | ||
196 | static int camelot_hw_free(struct snd_pcm_substream *substream) | |
197 | { | |
198 | return snd_pcm_lib_free_pages(substream); | |
199 | } | |
200 | ||
201 | static int camelot_prepare(struct snd_pcm_substream *substream) | |
202 | { | |
203 | struct snd_pcm_runtime *runtime = substream->runtime; | |
204 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 205 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
206 | |
207 | pr_debug("PCM data: addr 0x%08ulx len %d\n", | |
208 | (u32)runtime->dma_addr, runtime->dma_bytes); | |
209 | ||
210 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
211 | BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area; | |
212 | BRGREG(BRGATXTCR) = runtime->dma_bytes; | |
213 | } else { | |
214 | BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area; | |
215 | BRGREG(BRGARXTCR) = runtime->dma_bytes; | |
216 | } | |
217 | ||
218 | return 0; | |
219 | } | |
220 | ||
221 | static inline void dmabrg_play_dma_start(struct camelot_pcm *cam) | |
222 | { | |
223 | unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); | |
224 | /* start DMABRG engine: XFER start, auto-addr-reload */ | |
225 | BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD; | |
226 | } | |
227 | ||
228 | static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam) | |
229 | { | |
230 | unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); | |
231 | /* forcibly terminate data transmission */ | |
232 | BRGREG(BRGACR) = acr | ACR_TDS; | |
233 | } | |
234 | ||
235 | static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam) | |
236 | { | |
237 | unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); | |
238 | /* start DMABRG engine: recv start, auto-reload */ | |
239 | BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD; | |
240 | } | |
241 | ||
242 | static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam) | |
243 | { | |
244 | unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); | |
245 | /* forcibly terminate data receiver */ | |
246 | BRGREG(BRGACR) = acr | ACR_RDS; | |
247 | } | |
248 | ||
249 | static int camelot_trigger(struct snd_pcm_substream *substream, int cmd) | |
250 | { | |
251 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 252 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
253 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
254 | ||
255 | switch (cmd) { | |
256 | case SNDRV_PCM_TRIGGER_START: | |
257 | if (recv) | |
258 | dmabrg_rec_dma_start(cam); | |
259 | else | |
260 | dmabrg_play_dma_start(cam); | |
261 | break; | |
262 | case SNDRV_PCM_TRIGGER_STOP: | |
263 | if (recv) | |
264 | dmabrg_rec_dma_stop(cam); | |
265 | else | |
266 | dmabrg_play_dma_stop(cam); | |
267 | break; | |
268 | default: | |
269 | return -EINVAL; | |
270 | } | |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
275 | static snd_pcm_uframes_t camelot_pos(struct snd_pcm_substream *substream) | |
276 | { | |
277 | struct snd_pcm_runtime *runtime = substream->runtime; | |
278 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 279 | struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; |
aef3b06a ML |
280 | int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; |
281 | unsigned long pos; | |
282 | ||
283 | /* cannot use the DMABRG pointer register: under load, by the | |
284 | * time ALSA comes around to read the register, it is already | |
285 | * far ahead (or worse, already done with the fragment) of the | |
286 | * position at the time the IRQ was triggered, which results in | |
287 | * fast-playback sound in my test application (ScummVM) | |
288 | */ | |
289 | if (recv) | |
290 | pos = cam->rx_period ? cam->rx_period_size : 0; | |
291 | else | |
292 | pos = cam->tx_period ? cam->tx_period_size : 0; | |
293 | ||
294 | return bytes_to_frames(runtime, pos); | |
295 | } | |
296 | ||
b23bd34c | 297 | static const struct snd_pcm_ops camelot_pcm_ops = { |
aef3b06a ML |
298 | .open = camelot_pcm_open, |
299 | .close = camelot_pcm_close, | |
300 | .ioctl = snd_pcm_lib_ioctl, | |
301 | .hw_params = camelot_hw_params, | |
302 | .hw_free = camelot_hw_free, | |
303 | .prepare = camelot_prepare, | |
304 | .trigger = camelot_trigger, | |
305 | .pointer = camelot_pos, | |
306 | }; | |
307 | ||
552d1ef6 | 308 | static int camelot_pcm_new(struct snd_soc_pcm_runtime *rtd) |
aef3b06a | 309 | { |
552d1ef6 LG |
310 | struct snd_pcm *pcm = rtd->pcm; |
311 | ||
aef3b06a ML |
312 | /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel |
313 | * in MMAP mode (i.e. aplay -M) | |
314 | */ | |
315 | snd_pcm_lib_preallocate_pages_for_all(pcm, | |
316 | SNDRV_DMA_TYPE_CONTINUOUS, | |
317 | snd_dma_continuous_data(GFP_KERNEL), | |
318 | DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX); | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
51772554 | 323 | static const struct snd_soc_platform_driver sh7760_soc_platform = { |
417a1178 | 324 | .ops = &camelot_pcm_ops, |
aef3b06a | 325 | .pcm_new = camelot_pcm_new, |
aef3b06a | 326 | }; |
aef3b06a | 327 | |
bb5eb6ec | 328 | static int sh7760_soc_platform_probe(struct platform_device *pdev) |
958e792c | 329 | { |
e8de871e | 330 | return devm_snd_soc_register_platform(&pdev->dev, &sh7760_soc_platform); |
f0fba2ad LG |
331 | } |
332 | ||
333 | static struct platform_driver sh7760_pcm_driver = { | |
334 | .driver = { | |
335 | .name = "sh7760-pcm-audio", | |
f0fba2ad LG |
336 | }, |
337 | ||
338 | .probe = sh7760_soc_platform_probe, | |
f0fba2ad LG |
339 | }; |
340 | ||
cb5e8738 | 341 | module_platform_driver(sh7760_pcm_driver); |
958e792c | 342 | |
aef3b06a ML |
343 | MODULE_LICENSE("GPL"); |
344 | MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver"); | |
345 | MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>"); |