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ASoC: Move name_prefix from CODEC to component
[mirror_ubuntu-bionic-kernel.git] / sound / soc / soc-cache.c
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1/*
2 * soc-cache.c -- ASoC register cache helpers
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <sound/soc.h>
d81a6d71 15#include <linux/export.h>
f90fb3f7 16#include <linux/slab.h>
17a52fd6 17
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18#include <trace/events/asoc.h>
19
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20static bool snd_soc_set_cache_val(void *base, unsigned int idx,
21 unsigned int val, unsigned int word_size)
22{
23 switch (word_size) {
24 case 1: {
25 u8 *cache = base;
26 if (cache[idx] == val)
27 return true;
28 cache[idx] = val;
29 break;
30 }
31 case 2: {
32 u16 *cache = base;
33 if (cache[idx] == val)
34 return true;
35 cache[idx] = val;
36 break;
37 }
38 default:
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39 WARN(1, "Invalid word_size %d\n", word_size);
40 break;
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41 }
42 return false;
43}
44
45static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
46 unsigned int word_size)
47{
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48 if (!base)
49 return -1;
50
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51 switch (word_size) {
52 case 1: {
53 const u8 *cache = base;
54 return cache[idx];
55 }
56 case 2: {
57 const u16 *cache = base;
58 return cache[idx];
59 }
60 default:
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61 WARN(1, "Invalid word_size %d\n", word_size);
62 break;
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63 }
64 /* unreachable */
65 return -1;
66}
67
f90fb3f7 68int snd_soc_cache_init(struct snd_soc_codec *codec)
7a30a3db 69{
b012aa61 70 const struct snd_soc_codec_driver *codec_drv = codec->driver;
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71 size_t reg_size;
72
73 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
b012aa61 74
b59dce53 75 if (!reg_size)
b5fc40d3 76 return 0;
b59dce53 77
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78 mutex_init(&codec->cache_rw_mutex);
79
80 dev_dbg(codec->dev, "ASoC: Initializing cache for %s codec\n",
81 codec->name);
82
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83 if (codec_drv->reg_cache_default)
84 codec->reg_cache = kmemdup(codec_drv->reg_cache_default,
a94ed234 85 reg_size, GFP_KERNEL);
7a30a3db 86 else
a94ed234 87 codec->reg_cache = kzalloc(reg_size, GFP_KERNEL);
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88 if (!codec->reg_cache)
89 return -ENOMEM;
90
91 return 0;
92}
93
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94/*
95 * NOTE: keep in mind that this function might be called
96 * multiple times.
97 */
98int snd_soc_cache_exit(struct snd_soc_codec *codec)
99{
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100 dev_dbg(codec->dev, "ASoC: Destroying cache for %s codec\n",
101 codec->name);
931f27c6 102
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103 kfree(codec->reg_cache);
104 codec->reg_cache = NULL;
105 return 0;
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106}
107
108/**
109 * snd_soc_cache_read: Fetch the value of a given register from the cache.
110 *
111 * @codec: CODEC to configure.
112 * @reg: The register index.
113 * @value: The value to be returned.
114 */
115int snd_soc_cache_read(struct snd_soc_codec *codec,
116 unsigned int reg, unsigned int *value)
117{
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118 if (!value)
119 return -EINVAL;
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120
121 mutex_lock(&codec->cache_rw_mutex);
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122 if (!ZERO_OR_NULL_PTR(codec->reg_cache))
123 *value = snd_soc_get_cache_val(codec->reg_cache, reg,
124 codec->driver->reg_word_size);
7a30a3db 125 mutex_unlock(&codec->cache_rw_mutex);
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126
127 return 0;
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128}
129EXPORT_SYMBOL_GPL(snd_soc_cache_read);
130
131/**
132 * snd_soc_cache_write: Set the value of a given register in the cache.
133 *
134 * @codec: CODEC to configure.
135 * @reg: The register index.
136 * @value: The new register value.
137 */
138int snd_soc_cache_write(struct snd_soc_codec *codec,
139 unsigned int reg, unsigned int value)
140{
f90fb3f7 141 mutex_lock(&codec->cache_rw_mutex);
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142 if (!ZERO_OR_NULL_PTR(codec->reg_cache))
143 snd_soc_set_cache_val(codec->reg_cache, reg, value,
144 codec->driver->reg_word_size);
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145 mutex_unlock(&codec->cache_rw_mutex);
146
147 return 0;
148}
149EXPORT_SYMBOL_GPL(snd_soc_cache_write);
150
151static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
152{
153 int i;
7a30a3db 154 int ret;
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155 const struct snd_soc_codec_driver *codec_drv;
156 unsigned int val;
7a30a3db 157
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158 codec_drv = codec->driver;
159 for (i = 0; i < codec_drv->reg_cache_size; ++i) {
160 ret = snd_soc_cache_read(codec, i, &val);
161 if (ret)
162 return ret;
163 if (codec_drv->reg_cache_default)
164 if (snd_soc_get_cache_val(codec_drv->reg_cache_default,
165 i, codec_drv->reg_word_size) == val)
166 continue;
7a30a3db 167
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168 ret = snd_soc_write(codec, i, val);
169 if (ret)
170 return ret;
171 dev_dbg(codec->dev, "ASoC: Synced register %#x, value = %#x\n",
172 i, val);
173 }
174 return 0;
7a30a3db 175}
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176
177/**
178 * snd_soc_cache_sync: Sync the register cache with the hardware.
179 *
180 * @codec: CODEC to configure.
181 *
182 * Any registers that should not be synced should be marked as
183 * volatile. In general drivers can choose not to use the provided
184 * syncing functionality if they so require.
185 */
186int snd_soc_cache_sync(struct snd_soc_codec *codec)
187{
f90fb3f7 188 const char *name = "flat";
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189 int ret;
190
f90fb3f7 191 if (!codec->cache_sync)
7a30a3db 192 return 0;
c358e640 193
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194 dev_dbg(codec->dev, "ASoC: Syncing cache for %s codec\n",
195 codec->name);
46fdaa3b 196 trace_snd_soc_cache_sync(codec, name, "start");
f90fb3f7 197 ret = snd_soc_flat_cache_sync(codec);
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198 if (!ret)
199 codec->cache_sync = 0;
200 trace_snd_soc_cache_sync(codec, name, "end");
201 return ret;
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202}
203EXPORT_SYMBOL_GPL(snd_soc_cache_sync);