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17a52fd6 MB |
1 | /* |
2 | * soc-cache.c -- ASoC register cache helpers | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
13 | ||
7084a42b | 14 | #include <linux/i2c.h> |
27ded041 | 15 | #include <linux/spi/spi.h> |
17a52fd6 | 16 | #include <sound/soc.h> |
cc28fb8e | 17 | #include <linux/bitmap.h> |
a7f387d5 | 18 | #include <linux/rbtree.h> |
d81a6d71 | 19 | #include <linux/export.h> |
17a52fd6 | 20 | |
c358e640 DP |
21 | #include <trace/events/asoc.h> |
22 | ||
1321e883 DP |
23 | static bool snd_soc_set_cache_val(void *base, unsigned int idx, |
24 | unsigned int val, unsigned int word_size) | |
25 | { | |
26 | switch (word_size) { | |
27 | case 1: { | |
28 | u8 *cache = base; | |
29 | if (cache[idx] == val) | |
30 | return true; | |
31 | cache[idx] = val; | |
32 | break; | |
33 | } | |
34 | case 2: { | |
35 | u16 *cache = base; | |
36 | if (cache[idx] == val) | |
37 | return true; | |
38 | cache[idx] = val; | |
39 | break; | |
40 | } | |
41 | default: | |
42 | BUG(); | |
43 | } | |
44 | return false; | |
45 | } | |
46 | ||
47 | static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx, | |
48 | unsigned int word_size) | |
49 | { | |
fd137e2b MB |
50 | if (!base) |
51 | return -1; | |
52 | ||
1321e883 DP |
53 | switch (word_size) { |
54 | case 1: { | |
55 | const u8 *cache = base; | |
56 | return cache[idx]; | |
57 | } | |
58 | case 2: { | |
59 | const u16 *cache = base; | |
60 | return cache[idx]; | |
61 | } | |
62 | default: | |
63 | BUG(); | |
64 | } | |
65 | /* unreachable */ | |
66 | return -1; | |
67 | } | |
68 | ||
7a30a3db DP |
69 | static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec) |
70 | { | |
71 | int i; | |
7a33d4ce | 72 | int ret; |
001ae4c0 | 73 | const struct snd_soc_codec_driver *codec_drv; |
7a30a3db DP |
74 | unsigned int val; |
75 | ||
76 | codec_drv = codec->driver; | |
77 | for (i = 0; i < codec_drv->reg_cache_size; ++i) { | |
7a33d4ce DP |
78 | ret = snd_soc_cache_read(codec, i, &val); |
79 | if (ret) | |
80 | return ret; | |
b012aa61 LPC |
81 | if (codec_drv->reg_cache_default) |
82 | if (snd_soc_get_cache_val(codec_drv->reg_cache_default, | |
1321e883 DP |
83 | i, codec_drv->reg_word_size) == val) |
84 | continue; | |
6c5b756a LPC |
85 | |
86 | WARN_ON(!snd_soc_codec_writable_register(codec, i)); | |
87 | ||
7a33d4ce DP |
88 | ret = snd_soc_write(codec, i, val); |
89 | if (ret) | |
90 | return ret; | |
204b62c6 | 91 | dev_dbg(codec->dev, "ASoC: Synced register %#x, value = %#x\n", |
7a30a3db DP |
92 | i, val); |
93 | } | |
94 | return 0; | |
95 | } | |
96 | ||
97 | static int snd_soc_flat_cache_write(struct snd_soc_codec *codec, | |
98 | unsigned int reg, unsigned int value) | |
99 | { | |
1321e883 DP |
100 | snd_soc_set_cache_val(codec->reg_cache, reg, value, |
101 | codec->driver->reg_word_size); | |
7a30a3db DP |
102 | return 0; |
103 | } | |
104 | ||
105 | static int snd_soc_flat_cache_read(struct snd_soc_codec *codec, | |
106 | unsigned int reg, unsigned int *value) | |
107 | { | |
1321e883 DP |
108 | *value = snd_soc_get_cache_val(codec->reg_cache, reg, |
109 | codec->driver->reg_word_size); | |
7a30a3db DP |
110 | return 0; |
111 | } | |
112 | ||
113 | static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec) | |
114 | { | |
115 | if (!codec->reg_cache) | |
116 | return 0; | |
117 | kfree(codec->reg_cache); | |
118 | codec->reg_cache = NULL; | |
119 | return 0; | |
120 | } | |
121 | ||
122 | static int snd_soc_flat_cache_init(struct snd_soc_codec *codec) | |
123 | { | |
b012aa61 | 124 | const struct snd_soc_codec_driver *codec_drv = codec->driver; |
a94ed234 LPC |
125 | size_t reg_size; |
126 | ||
127 | reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size; | |
b012aa61 LPC |
128 | |
129 | if (codec_drv->reg_cache_default) | |
130 | codec->reg_cache = kmemdup(codec_drv->reg_cache_default, | |
a94ed234 | 131 | reg_size, GFP_KERNEL); |
7a30a3db | 132 | else |
a94ed234 | 133 | codec->reg_cache = kzalloc(reg_size, GFP_KERNEL); |
7a30a3db DP |
134 | if (!codec->reg_cache) |
135 | return -ENOMEM; | |
136 | ||
137 | return 0; | |
138 | } | |
139 | ||
140 | /* an array of all supported compression types */ | |
141 | static const struct snd_soc_cache_ops cache_types[] = { | |
be4fcddd | 142 | /* Flat *must* be the first entry for fallback */ |
7a30a3db | 143 | { |
df0701bb | 144 | .id = SND_SOC_FLAT_COMPRESSION, |
0d735eaa | 145 | .name = "flat", |
7a30a3db DP |
146 | .init = snd_soc_flat_cache_init, |
147 | .exit = snd_soc_flat_cache_exit, | |
148 | .read = snd_soc_flat_cache_read, | |
149 | .write = snd_soc_flat_cache_write, | |
150 | .sync = snd_soc_flat_cache_sync | |
cc28fb8e | 151 | }, |
7a30a3db DP |
152 | }; |
153 | ||
154 | int snd_soc_cache_init(struct snd_soc_codec *codec) | |
155 | { | |
156 | int i; | |
157 | ||
158 | for (i = 0; i < ARRAY_SIZE(cache_types); ++i) | |
23bbce34 | 159 | if (cache_types[i].id == codec->compress_type) |
7a30a3db | 160 | break; |
be4fcddd MB |
161 | |
162 | /* Fall back to flat compression */ | |
7a30a3db | 163 | if (i == ARRAY_SIZE(cache_types)) { |
204b62c6 | 164 | dev_warn(codec->dev, "ASoC: Could not match compress type: %d\n", |
be4fcddd MB |
165 | codec->compress_type); |
166 | i = 0; | |
7a30a3db DP |
167 | } |
168 | ||
169 | mutex_init(&codec->cache_rw_mutex); | |
170 | codec->cache_ops = &cache_types[i]; | |
171 | ||
0d735eaa DP |
172 | if (codec->cache_ops->init) { |
173 | if (codec->cache_ops->name) | |
204b62c6 | 174 | dev_dbg(codec->dev, "ASoC: Initializing %s cache for %s codec\n", |
0d735eaa | 175 | codec->cache_ops->name, codec->name); |
7a30a3db | 176 | return codec->cache_ops->init(codec); |
0d735eaa | 177 | } |
acd61451 | 178 | return -ENOSYS; |
7a30a3db DP |
179 | } |
180 | ||
181 | /* | |
182 | * NOTE: keep in mind that this function might be called | |
183 | * multiple times. | |
184 | */ | |
185 | int snd_soc_cache_exit(struct snd_soc_codec *codec) | |
186 | { | |
0d735eaa DP |
187 | if (codec->cache_ops && codec->cache_ops->exit) { |
188 | if (codec->cache_ops->name) | |
204b62c6 | 189 | dev_dbg(codec->dev, "ASoC: Destroying %s cache for %s codec\n", |
0d735eaa | 190 | codec->cache_ops->name, codec->name); |
7a30a3db | 191 | return codec->cache_ops->exit(codec); |
0d735eaa | 192 | } |
acd61451 | 193 | return -ENOSYS; |
7a30a3db DP |
194 | } |
195 | ||
196 | /** | |
197 | * snd_soc_cache_read: Fetch the value of a given register from the cache. | |
198 | * | |
199 | * @codec: CODEC to configure. | |
200 | * @reg: The register index. | |
201 | * @value: The value to be returned. | |
202 | */ | |
203 | int snd_soc_cache_read(struct snd_soc_codec *codec, | |
204 | unsigned int reg, unsigned int *value) | |
205 | { | |
206 | int ret; | |
207 | ||
208 | mutex_lock(&codec->cache_rw_mutex); | |
209 | ||
210 | if (value && codec->cache_ops && codec->cache_ops->read) { | |
211 | ret = codec->cache_ops->read(codec, reg, value); | |
212 | mutex_unlock(&codec->cache_rw_mutex); | |
213 | return ret; | |
214 | } | |
215 | ||
216 | mutex_unlock(&codec->cache_rw_mutex); | |
acd61451 | 217 | return -ENOSYS; |
7a30a3db DP |
218 | } |
219 | EXPORT_SYMBOL_GPL(snd_soc_cache_read); | |
220 | ||
221 | /** | |
222 | * snd_soc_cache_write: Set the value of a given register in the cache. | |
223 | * | |
224 | * @codec: CODEC to configure. | |
225 | * @reg: The register index. | |
226 | * @value: The new register value. | |
227 | */ | |
228 | int snd_soc_cache_write(struct snd_soc_codec *codec, | |
229 | unsigned int reg, unsigned int value) | |
230 | { | |
231 | int ret; | |
232 | ||
233 | mutex_lock(&codec->cache_rw_mutex); | |
234 | ||
235 | if (codec->cache_ops && codec->cache_ops->write) { | |
236 | ret = codec->cache_ops->write(codec, reg, value); | |
237 | mutex_unlock(&codec->cache_rw_mutex); | |
238 | return ret; | |
239 | } | |
240 | ||
241 | mutex_unlock(&codec->cache_rw_mutex); | |
acd61451 | 242 | return -ENOSYS; |
7a30a3db DP |
243 | } |
244 | EXPORT_SYMBOL_GPL(snd_soc_cache_write); | |
245 | ||
246 | /** | |
247 | * snd_soc_cache_sync: Sync the register cache with the hardware. | |
248 | * | |
249 | * @codec: CODEC to configure. | |
250 | * | |
251 | * Any registers that should not be synced should be marked as | |
252 | * volatile. In general drivers can choose not to use the provided | |
253 | * syncing functionality if they so require. | |
254 | */ | |
255 | int snd_soc_cache_sync(struct snd_soc_codec *codec) | |
256 | { | |
257 | int ret; | |
c358e640 | 258 | const char *name; |
7a30a3db DP |
259 | |
260 | if (!codec->cache_sync) { | |
261 | return 0; | |
262 | } | |
263 | ||
46fdaa3b | 264 | if (!codec->cache_ops || !codec->cache_ops->sync) |
acd61451 | 265 | return -ENOSYS; |
46fdaa3b | 266 | |
c358e640 DP |
267 | if (codec->cache_ops->name) |
268 | name = codec->cache_ops->name; | |
269 | else | |
270 | name = "unknown"; | |
271 | ||
46fdaa3b | 272 | if (codec->cache_ops->name) |
204b62c6 | 273 | dev_dbg(codec->dev, "ASoC: Syncing %s cache for %s codec\n", |
46fdaa3b DC |
274 | codec->cache_ops->name, codec->name); |
275 | trace_snd_soc_cache_sync(codec, name, "start"); | |
276 | ret = codec->cache_ops->sync(codec); | |
277 | if (!ret) | |
278 | codec->cache_sync = 0; | |
279 | trace_snd_soc_cache_sync(codec, name, "end"); | |
280 | return ret; | |
7a30a3db DP |
281 | } |
282 | EXPORT_SYMBOL_GPL(snd_soc_cache_sync); |