]>
Commit | Line | Data |
---|---|---|
1356a607 KM |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // Copyright (C) 2013, Analog Devices Inc. | |
4 | // Author: Lars-Peter Clausen <lars@metafoo.de> | |
5 | ||
28c4468b LPC |
6 | #include <linux/module.h> |
7 | #include <linux/init.h> | |
8 | #include <linux/dmaengine.h> | |
9 | #include <linux/slab.h> | |
10 | #include <sound/pcm.h> | |
11 | #include <sound/pcm_params.h> | |
12 | #include <sound/soc.h> | |
13 | #include <linux/dma-mapping.h> | |
14 | #include <linux/of.h> | |
28c4468b LPC |
15 | |
16 | #include <sound/dmaengine_pcm.h> | |
17 | ||
acde50a7 LPC |
18 | /* |
19 | * The platforms dmaengine driver does not support reporting the amount of | |
20 | * bytes that are still left to transfer. | |
21 | */ | |
22 | #define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(31) | |
23 | ||
c0de42bf LPC |
24 | static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm, |
25 | struct snd_pcm_substream *substream) | |
26 | { | |
27 | if (!pcm->chan[substream->stream]) | |
28 | return NULL; | |
29 | ||
30 | return pcm->chan[substream->stream]->device->dev; | |
31 | } | |
32 | ||
28c4468b LPC |
33 | /** |
34 | * snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback | |
35 | * @substream: PCM substream | |
36 | * @params: hw_params | |
37 | * @slave_config: DMA slave config to prepare | |
38 | * | |
39 | * This function can be used as a generic prepare_slave_config callback for | |
40 | * platforms which make use of the snd_dmaengine_dai_dma_data struct for their | |
41 | * DAI DMA data. Internally the function will first call | |
42 | * snd_hwparams_to_dma_slave_config to fill in the slave config based on the | |
43 | * hw_params, followed by snd_dmaengine_set_config_from_dai_data to fill in the | |
44 | * remaining fields based on the DAI DMA data. | |
45 | */ | |
46 | int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, | |
47 | struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config) | |
48 | { | |
0ceef681 | 49 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
28c4468b LPC |
50 | struct snd_dmaengine_dai_dma_data *dma_data; |
51 | int ret; | |
52 | ||
6e1276a5 BL |
53 | if (rtd->num_cpus > 1) { |
54 | dev_err(rtd->dev, | |
55 | "%s doesn't support Multi CPU yet\n", __func__); | |
56 | return -EINVAL; | |
57 | } | |
58 | ||
c2233a26 | 59 | dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream); |
28c4468b LPC |
60 | |
61 | ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config); | |
62 | if (ret) | |
63 | return ret; | |
64 | ||
65 | snd_dmaengine_pcm_set_config_from_dai_data(substream, dma_data, | |
66 | slave_config); | |
67 | ||
68 | return 0; | |
69 | } | |
70 | EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_prepare_slave_config); | |
71 | ||
ece23171 KM |
72 | static int dmaengine_pcm_hw_params(struct snd_soc_component *component, |
73 | struct snd_pcm_substream *substream, | |
74 | struct snd_pcm_hw_params *params) | |
28c4468b | 75 | { |
be7ee5f3 | 76 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
28c4468b | 77 | struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream); |
fa654e08 LPC |
78 | int (*prepare_slave_config)(struct snd_pcm_substream *substream, |
79 | struct snd_pcm_hw_params *params, | |
80 | struct dma_slave_config *slave_config); | |
28c4468b LPC |
81 | struct dma_slave_config slave_config; |
82 | int ret; | |
83 | ||
a894bd7f LJ |
84 | memset(&slave_config, 0, sizeof(slave_config)); |
85 | ||
fa654e08 LPC |
86 | if (!pcm->config) |
87 | prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config; | |
88 | else | |
89 | prepare_slave_config = pcm->config->prepare_slave_config; | |
90 | ||
91 | if (prepare_slave_config) { | |
92 | ret = prepare_slave_config(substream, params, &slave_config); | |
28c4468b LPC |
93 | if (ret) |
94 | return ret; | |
95 | ||
96 | ret = dmaengine_slave_config(chan, &slave_config); | |
97 | if (ret) | |
98 | return ret; | |
99 | } | |
100 | ||
d708c2b3 | 101 | return 0; |
28c4468b LPC |
102 | } |
103 | ||
ece23171 KM |
104 | static int |
105 | dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component *component, | |
106 | struct snd_pcm_substream *substream) | |
28c4468b | 107 | { |
0ceef681 | 108 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
be7ee5f3 | 109 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
c0de42bf | 110 | struct device *dma_dev = dmaengine_dma_dev(pcm, substream); |
28c4468b | 111 | struct dma_chan *chan = pcm->chan[substream->stream]; |
c0de42bf | 112 | struct snd_dmaengine_dai_dma_data *dma_data; |
c0de42bf | 113 | struct snd_pcm_hardware hw; |
28c4468b | 114 | |
6e1276a5 BL |
115 | if (rtd->num_cpus > 1) { |
116 | dev_err(rtd->dev, | |
117 | "%s doesn't support Multi CPU yet\n", __func__); | |
118 | return -EINVAL; | |
119 | } | |
120 | ||
fa654e08 | 121 | if (pcm->config && pcm->config->pcm_hardware) |
c0de42bf | 122 | return snd_soc_set_runtime_hwparams(substream, |
28c4468b | 123 | pcm->config->pcm_hardware); |
28c4468b | 124 | |
c2233a26 | 125 | dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream); |
c0de42bf LPC |
126 | |
127 | memset(&hw, 0, sizeof(hw)); | |
128 | hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | |
129 | SNDRV_PCM_INFO_INTERLEAVED; | |
130 | hw.periods_min = 2; | |
131 | hw.periods_max = UINT_MAX; | |
132 | hw.period_bytes_min = 256; | |
133 | hw.period_bytes_max = dma_get_max_seg_size(dma_dev); | |
134 | hw.buffer_bytes_max = SIZE_MAX; | |
135 | hw.fifo_size = dma_data->fifo_size; | |
136 | ||
a22f33b0 LPC |
137 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE) |
138 | hw.info |= SNDRV_PCM_INFO_BATCH; | |
139 | ||
13012809 SW |
140 | /** |
141 | * FIXME: Remove the return value check to align with the code | |
142 | * before adding snd_dmaengine_pcm_refine_runtime_hwparams | |
143 | * function. | |
144 | */ | |
145 | snd_dmaengine_pcm_refine_runtime_hwparams(substream, | |
146 | dma_data, | |
147 | &hw, | |
148 | chan); | |
c0de42bf LPC |
149 | |
150 | return snd_soc_set_runtime_hwparams(substream, &hw); | |
28c4468b LPC |
151 | } |
152 | ||
ece23171 KM |
153 | static int dmaengine_pcm_open(struct snd_soc_component *component, |
154 | struct snd_pcm_substream *substream) | |
28c4468b | 155 | { |
be7ee5f3 | 156 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
c0de42bf LPC |
157 | struct dma_chan *chan = pcm->chan[substream->stream]; |
158 | int ret; | |
28c4468b | 159 | |
ece23171 | 160 | ret = dmaengine_pcm_set_runtime_hwparams(component, substream); |
c0de42bf LPC |
161 | if (ret) |
162 | return ret; | |
163 | ||
164 | return snd_dmaengine_pcm_open(substream, chan); | |
28c4468b LPC |
165 | } |
166 | ||
ece23171 KM |
167 | static int dmaengine_pcm_close(struct snd_soc_component *component, |
168 | struct snd_pcm_substream *substream) | |
169 | { | |
170 | return snd_dmaengine_pcm_close(substream); | |
171 | } | |
172 | ||
ece23171 KM |
173 | static int dmaengine_pcm_trigger(struct snd_soc_component *component, |
174 | struct snd_pcm_substream *substream, int cmd) | |
175 | { | |
176 | return snd_dmaengine_pcm_trigger(substream, cmd); | |
177 | } | |
178 | ||
c999836d | 179 | static struct dma_chan *dmaengine_pcm_compat_request_channel( |
ece23171 | 180 | struct snd_soc_component *component, |
c999836d LPC |
181 | struct snd_soc_pcm_runtime *rtd, |
182 | struct snd_pcm_substream *substream) | |
183 | { | |
be7ee5f3 | 184 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
90130d2e | 185 | struct snd_dmaengine_dai_dma_data *dma_data; |
ec4f2857 | 186 | dma_filter_fn fn = NULL; |
90130d2e | 187 | |
6e1276a5 BL |
188 | if (rtd->num_cpus > 1) { |
189 | dev_err(rtd->dev, | |
190 | "%s doesn't support Multi CPU yet\n", __func__); | |
191 | return NULL; | |
192 | } | |
193 | ||
c2233a26 | 194 | dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream); |
c999836d | 195 | |
d1e1406c LPC |
196 | if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0]) |
197 | return pcm->chan[0]; | |
198 | ||
ec4f2857 | 199 | if (pcm->config && pcm->config->compat_request_channel) |
c999836d LPC |
200 | return pcm->config->compat_request_channel(rtd, substream); |
201 | ||
ec4f2857 XL |
202 | if (pcm->config) |
203 | fn = pcm->config->compat_filter_fn; | |
204 | ||
205 | return snd_dmaengine_pcm_request_channel(fn, dma_data->filter_data); | |
c999836d LPC |
206 | } |
207 | ||
acde50a7 LPC |
208 | static bool dmaengine_pcm_can_report_residue(struct device *dev, |
209 | struct dma_chan *chan) | |
478028e0 LPC |
210 | { |
211 | struct dma_slave_caps dma_caps; | |
212 | int ret; | |
213 | ||
214 | ret = dma_get_slave_caps(chan, &dma_caps); | |
acde50a7 LPC |
215 | if (ret != 0) { |
216 | dev_warn(dev, "Failed to get DMA channel capabilities, falling back to period counting: %d\n", | |
217 | ret); | |
218 | return false; | |
219 | } | |
478028e0 LPC |
220 | |
221 | if (dma_caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) | |
222 | return false; | |
223 | ||
224 | return true; | |
225 | } | |
226 | ||
ece23171 KM |
227 | static int dmaengine_pcm_new(struct snd_soc_component *component, |
228 | struct snd_soc_pcm_runtime *rtd) | |
28c4468b | 229 | { |
be7ee5f3 | 230 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
28c4468b | 231 | const struct snd_dmaengine_pcm_config *config = pcm->config; |
be7ee5f3 | 232 | struct device *dev = component->dev; |
28c4468b | 233 | struct snd_pcm_substream *substream; |
fa654e08 LPC |
234 | size_t prealloc_buffer_size; |
235 | size_t max_buffer_size; | |
28c4468b | 236 | unsigned int i; |
28c4468b | 237 | |
fa654e08 LPC |
238 | if (config && config->prealloc_buffer_size) { |
239 | prealloc_buffer_size = config->prealloc_buffer_size; | |
240 | max_buffer_size = config->pcm_hardware->buffer_bytes_max; | |
241 | } else { | |
242 | prealloc_buffer_size = 512 * 1024; | |
243 | max_buffer_size = SIZE_MAX; | |
244 | } | |
245 | ||
ee10fbe1 | 246 | for_each_pcm_streams(i) { |
28c4468b LPC |
247 | substream = rtd->pcm->streams[i].substream; |
248 | if (!substream) | |
249 | continue; | |
250 | ||
76d9c68b | 251 | if (!pcm->chan[i] && config && config->chan_names[i]) |
9bfa24e9 | 252 | pcm->chan[i] = dma_request_slave_channel(dev, |
76d9c68b | 253 | config->chan_names[i]); |
9bfa24e9 | 254 | |
d1e1406c | 255 | if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) { |
ece23171 KM |
256 | pcm->chan[i] = dmaengine_pcm_compat_request_channel( |
257 | component, rtd, substream); | |
c999836d LPC |
258 | } |
259 | ||
28c4468b | 260 | if (!pcm->chan[i]) { |
be7ee5f3 | 261 | dev_err(component->dev, |
28c4468b | 262 | "Missing dma channel for stream: %d\n", i); |
de7621e8 | 263 | return -EINVAL; |
28c4468b LPC |
264 | } |
265 | ||
d708c2b3 | 266 | snd_pcm_set_managed_buffer(substream, |
ca2b0295 | 267 | SNDRV_DMA_TYPE_DEV_IRAM, |
28c4468b | 268 | dmaengine_dma_dev(pcm, substream), |
fa654e08 LPC |
269 | prealloc_buffer_size, |
270 | max_buffer_size); | |
478028e0 | 271 | |
acde50a7 | 272 | if (!dmaengine_pcm_can_report_residue(dev, pcm->chan[i])) |
478028e0 | 273 | pcm->flags |= SND_DMAENGINE_PCM_FLAG_NO_RESIDUE; |
2ec42f31 PU |
274 | |
275 | if (rtd->pcm->streams[i].pcm->name[0] == '\0') { | |
48118a93 PU |
276 | strscpy_pad(rtd->pcm->streams[i].pcm->name, |
277 | rtd->pcm->streams[i].pcm->id, | |
278 | sizeof(rtd->pcm->streams[i].pcm->name)); | |
2ec42f31 | 279 | } |
28c4468b LPC |
280 | } |
281 | ||
282 | return 0; | |
28c4468b LPC |
283 | } |
284 | ||
93b943ed | 285 | static snd_pcm_uframes_t dmaengine_pcm_pointer( |
ece23171 | 286 | struct snd_soc_component *component, |
93b943ed LPC |
287 | struct snd_pcm_substream *substream) |
288 | { | |
be7ee5f3 | 289 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
93b943ed LPC |
290 | |
291 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE) | |
292 | return snd_dmaengine_pcm_pointer_no_residue(substream); | |
293 | else | |
294 | return snd_dmaengine_pcm_pointer(substream); | |
295 | } | |
296 | ||
ece23171 KM |
297 | static int dmaengine_copy_user(struct snd_soc_component *component, |
298 | struct snd_pcm_substream *substream, | |
78648092 | 299 | int channel, unsigned long hwoff, |
40d1299f | 300 | void __user *buf, unsigned long bytes) |
78648092 | 301 | { |
78648092 OM |
302 | struct snd_pcm_runtime *runtime = substream->runtime; |
303 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); | |
304 | int (*process)(struct snd_pcm_substream *substream, | |
305 | int channel, unsigned long hwoff, | |
306 | void *buf, unsigned long bytes) = pcm->config->process; | |
307 | bool is_playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; | |
308 | void *dma_ptr = runtime->dma_area + hwoff + | |
309 | channel * (runtime->dma_bytes / runtime->channels); | |
310 | int ret; | |
311 | ||
312 | if (is_playback) | |
40d1299f | 313 | if (copy_from_user(dma_ptr, buf, bytes)) |
78648092 OM |
314 | return -EFAULT; |
315 | ||
316 | if (process) { | |
40d1299f | 317 | ret = process(substream, channel, hwoff, (__force void *)buf, bytes); |
78648092 OM |
318 | if (ret < 0) |
319 | return ret; | |
320 | } | |
321 | ||
322 | if (!is_playback) | |
40d1299f | 323 | if (copy_to_user(buf, dma_ptr, bytes)) |
78648092 OM |
324 | return -EFAULT; |
325 | ||
326 | return 0; | |
327 | } | |
328 | ||
ece23171 KM |
329 | static const struct snd_soc_component_driver dmaengine_pcm_component = { |
330 | .name = SND_DMAENGINE_PCM_DRV_NAME, | |
331 | .probe_order = SND_SOC_COMP_ORDER_LATE, | |
28c4468b | 332 | .open = dmaengine_pcm_open, |
ece23171 | 333 | .close = dmaengine_pcm_close, |
28c4468b | 334 | .hw_params = dmaengine_pcm_hw_params, |
ece23171 | 335 | .trigger = dmaengine_pcm_trigger, |
93b943ed | 336 | .pointer = dmaengine_pcm_pointer, |
ece23171 | 337 | .pcm_construct = dmaengine_pcm_new, |
28c4468b LPC |
338 | }; |
339 | ||
ece23171 KM |
340 | static const struct snd_soc_component_driver dmaengine_pcm_component_process = { |
341 | .name = SND_DMAENGINE_PCM_DRV_NAME, | |
342 | .probe_order = SND_SOC_COMP_ORDER_LATE, | |
78648092 | 343 | .open = dmaengine_pcm_open, |
ece23171 | 344 | .close = dmaengine_pcm_close, |
78648092 | 345 | .hw_params = dmaengine_pcm_hw_params, |
ece23171 | 346 | .trigger = dmaengine_pcm_trigger, |
78648092 OM |
347 | .pointer = dmaengine_pcm_pointer, |
348 | .copy_user = dmaengine_copy_user, | |
ece23171 | 349 | .pcm_construct = dmaengine_pcm_new, |
78648092 OM |
350 | }; |
351 | ||
28c4468b LPC |
352 | static const char * const dmaengine_pcm_dma_channel_names[] = { |
353 | [SNDRV_PCM_STREAM_PLAYBACK] = "tx", | |
354 | [SNDRV_PCM_STREAM_CAPTURE] = "rx", | |
355 | }; | |
356 | ||
5eda87b8 | 357 | static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm, |
194c7dea | 358 | struct device *dev, const struct snd_dmaengine_pcm_config *config) |
d1e1406c LPC |
359 | { |
360 | unsigned int i; | |
11b3a7ad | 361 | const char *name; |
5eda87b8 | 362 | struct dma_chan *chan; |
d1e1406c | 363 | |
76d9c68b SN |
364 | if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || (!dev->of_node && |
365 | !(config && config->dma_dev && config->dma_dev->of_node))) | |
5eda87b8 | 366 | return 0; |
d1e1406c | 367 | |
2b67f8ba | 368 | if (config && config->dma_dev) { |
194c7dea SW |
369 | /* |
370 | * If this warning is seen, it probably means that your Linux | |
371 | * device structure does not match your HW device structure. | |
372 | * It would be best to refactor the Linux device structure to | |
373 | * correctly match the HW structure. | |
374 | */ | |
375 | dev_warn(dev, "DMA channels sourced from device %s", | |
376 | dev_name(config->dma_dev)); | |
377 | dev = config->dma_dev; | |
378 | } | |
379 | ||
ee10fbe1 | 380 | for_each_pcm_streams(i) { |
11b3a7ad SW |
381 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) |
382 | name = "rx-tx"; | |
383 | else | |
384 | name = dmaengine_pcm_dma_channel_names[i]; | |
2b67f8ba | 385 | if (config && config->chan_names[i]) |
194c7dea | 386 | name = config->chan_names[i]; |
de8cf952 | 387 | chan = dma_request_chan(dev, name); |
5eda87b8 | 388 | if (IS_ERR(chan)) { |
e9036c2a | 389 | if (PTR_ERR(chan) == -EPROBE_DEFER) |
5eda87b8 SW |
390 | return -EPROBE_DEFER; |
391 | pcm->chan[i] = NULL; | |
392 | } else { | |
393 | pcm->chan[i] = chan; | |
394 | } | |
11b3a7ad SW |
395 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) |
396 | break; | |
d1e1406c | 397 | } |
11b3a7ad SW |
398 | |
399 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) | |
400 | pcm->chan[1] = pcm->chan[0]; | |
5eda87b8 SW |
401 | |
402 | return 0; | |
d1e1406c LPC |
403 | } |
404 | ||
6b9f3e65 SW |
405 | static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm) |
406 | { | |
407 | unsigned int i; | |
408 | ||
ee10fbe1 | 409 | for_each_pcm_streams(i) { |
6b9f3e65 SW |
410 | if (!pcm->chan[i]) |
411 | continue; | |
412 | dma_release_channel(pcm->chan[i]); | |
413 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) | |
414 | break; | |
415 | } | |
416 | } | |
417 | ||
28c4468b LPC |
418 | /** |
419 | * snd_dmaengine_pcm_register - Register a dmaengine based PCM device | |
420 | * @dev: The parent device for the PCM device | |
421 | * @config: Platform specific PCM configuration | |
422 | * @flags: Platform specific quirks | |
423 | */ | |
424 | int snd_dmaengine_pcm_register(struct device *dev, | |
425 | const struct snd_dmaengine_pcm_config *config, unsigned int flags) | |
426 | { | |
ea029dd8 | 427 | const struct snd_soc_component_driver *driver; |
28c4468b | 428 | struct dmaengine_pcm *pcm; |
6b9f3e65 | 429 | int ret; |
28c4468b | 430 | |
28c4468b LPC |
431 | pcm = kzalloc(sizeof(*pcm), GFP_KERNEL); |
432 | if (!pcm) | |
433 | return -ENOMEM; | |
434 | ||
f0b3bdbd FE |
435 | #ifdef CONFIG_DEBUG_FS |
436 | pcm->component.debugfs_prefix = "dma"; | |
437 | #endif | |
28c4468b | 438 | pcm->config = config; |
d1e1406c | 439 | pcm->flags = flags; |
28c4468b | 440 | |
5eda87b8 SW |
441 | ret = dmaengine_pcm_request_chan_of(pcm, dev, config); |
442 | if (ret) | |
b84acf44 | 443 | goto err_free_dma; |
28c4468b | 444 | |
78648092 | 445 | if (config && config->process) |
ea029dd8 | 446 | driver = &dmaengine_pcm_component_process; |
78648092 | 447 | else |
ea029dd8 CR |
448 | driver = &dmaengine_pcm_component; |
449 | ||
450 | ret = snd_soc_component_initialize(&pcm->component, driver, dev); | |
451 | if (ret) | |
452 | goto err_free_dma; | |
453 | ||
454 | ret = snd_soc_add_component(&pcm->component, NULL, 0); | |
6b9f3e65 SW |
455 | if (ret) |
456 | goto err_free_dma; | |
457 | ||
458 | return 0; | |
459 | ||
460 | err_free_dma: | |
461 | dmaengine_pcm_release_chan(pcm); | |
462 | kfree(pcm); | |
463 | return ret; | |
28c4468b LPC |
464 | } |
465 | EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_register); | |
466 | ||
467 | /** | |
468 | * snd_dmaengine_pcm_unregister - Removes a dmaengine based PCM device | |
469 | * @dev: Parent device the PCM was register with | |
470 | * | |
471 | * Removes a dmaengine based PCM device previously registered with | |
472 | * snd_dmaengine_pcm_register. | |
473 | */ | |
474 | void snd_dmaengine_pcm_unregister(struct device *dev) | |
475 | { | |
be7ee5f3 | 476 | struct snd_soc_component *component; |
28c4468b | 477 | struct dmaengine_pcm *pcm; |
28c4468b | 478 | |
be7ee5f3 KM |
479 | component = snd_soc_lookup_component(dev, SND_DMAENGINE_PCM_DRV_NAME); |
480 | if (!component) | |
28c4468b LPC |
481 | return; |
482 | ||
be7ee5f3 | 483 | pcm = soc_component_to_pcm(component); |
28c4468b | 484 | |
58f30150 | 485 | snd_soc_unregister_component_by_driver(dev, component->driver); |
6b9f3e65 | 486 | dmaengine_pcm_release_chan(pcm); |
28c4468b LPC |
487 | kfree(pcm); |
488 | } | |
489 | EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister); | |
490 | ||
491 | MODULE_LICENSE("GPL"); |