[mirror_ubuntu-jammy-kernel.git] / sound / soc / stm / stm32_sai.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * STM32 ALSA SoC Digital Audio Interface (SAI) driver.
 *
 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
 * Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics.
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/pinctrl/consumer.h>
#include <linux/reset.h>

#include <sound/dmaengine_pcm.h>
#include <sound/core.h>

#include "stm32_sai.h"

static const struct stm32_sai_conf stm32_sai_conf_f4 = {
	.version = SAI_STM32F4,
	.has_spdif = false,
};

static const struct stm32_sai_conf stm32_sai_conf_h7 = {
	.version = SAI_STM32H7,
	.has_spdif = true,
};

static const struct of_device_id stm32_sai_ids[] = {
	{ .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 },
	{ .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 },
	{}
};

static int stm32_sai_pclk_disable(struct device *dev)
{
	struct stm32_sai_data *sai = dev_get_drvdata(dev);

	clk_disable_unprepare(sai->pclk);

	return 0;
}

static int stm32_sai_pclk_enable(struct device *dev)
{
	struct stm32_sai_data *sai = dev_get_drvdata(dev);
	int ret;

	ret = clk_prepare_enable(sai->pclk);
	if (ret) {
		dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
		return ret;
	}

	return 0;
}

static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci)
{
	int ret;

	/* Enable peripheral clock to allow GCR register access */
	ret = stm32_sai_pclk_enable(&sai->pdev->dev);
	if (ret)
		return ret;

	writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base);

	stm32_sai_pclk_disable(&sai->pdev->dev);

	return 0;
}

static int stm32_sai_sync_conf_provider(struct stm32_sai_data *sai, int synco)
{
	u32 prev_synco;
	int ret;

	/* Enable peripheral clock to allow GCR register access */
	ret = stm32_sai_pclk_enable(&sai->pdev->dev);
	if (ret)
		return ret;

	dev_dbg(&sai->pdev->dev, "Set %pOFn%s as synchro provider\n",
		sai->pdev->dev.of_node,
		synco == STM_SAI_SYNC_OUT_A ? "A" : "B");

	prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base));
	if (prev_synco != STM_SAI_SYNC_OUT_NONE && synco != prev_synco) {
		dev_err(&sai->pdev->dev, "%pOFn%s already set as sync provider\n",
			sai->pdev->dev.of_node,
			prev_synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
			stm32_sai_pclk_disable(&sai->pdev->dev);
		return -EINVAL;
	}

	writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base);

	stm32_sai_pclk_disable(&sai->pdev->dev);

	return 0;
}

static int stm32_sai_set_sync(struct stm32_sai_data *sai_client,
			      struct device_node *np_provider,
			      int synco, int synci)
{
	struct platform_device *pdev = of_find_device_by_node(np_provider);
	struct stm32_sai_data *sai_provider;
	int ret;

	if (!pdev) {
		dev_err(&sai_client->pdev->dev,
			"Device not found for node %pOFn\n", np_provider);
		of_node_put(np_provider);
		return -ENODEV;
	}

	sai_provider = platform_get_drvdata(pdev);
	if (!sai_provider) {
		dev_err(&sai_client->pdev->dev,
			"SAI sync provider data not found\n");
		ret = -EINVAL;
		goto error;
	}

	/* Configure sync client */
	ret = stm32_sai_sync_conf_client(sai_client, synci);
	if (ret < 0)
		goto error;

	/* Configure sync provider */
	ret = stm32_sai_sync_conf_provider(sai_provider, synco);

error:
	put_device(&pdev->dev);
	of_node_put(np_provider);
	return ret;
}

static int stm32_sai_probe(struct platform_device *pdev)
{
	struct stm32_sai_data *sai;
	struct reset_control *rst;
	struct resource *res;
	const struct of_device_id *of_id;

	sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
	if (!sai)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	sai->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(sai->base))
		return PTR_ERR(sai->base);

	of_id = of_match_device(stm32_sai_ids, &pdev->dev);
	if (of_id)
		sai->conf = (struct stm32_sai_conf *)of_id->data;
	else
		return -EINVAL;

	if (!STM_SAI_IS_F4(sai)) {
		sai->pclk = devm_clk_get(&pdev->dev, "pclk");
		if (IS_ERR(sai->pclk)) {
			dev_err(&pdev->dev, "missing bus clock pclk\n");
			return PTR_ERR(sai->pclk);
		}
	}

	sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k");
	if (IS_ERR(sai->clk_x8k)) {
		dev_err(&pdev->dev, "missing x8k parent clock\n");
		return PTR_ERR(sai->clk_x8k);
	}

	sai->clk_x11k = devm_clk_get(&pdev->dev, "x11k");
	if (IS_ERR(sai->clk_x11k)) {
		dev_err(&pdev->dev, "missing x11k parent clock\n");
		return PTR_ERR(sai->clk_x11k);
	}

	/* init irqs */
	sai->irq = platform_get_irq(pdev, 0);
	if (sai->irq < 0) {
		dev_err(&pdev->dev, "no irq for node %s\n", pdev->name);
		return sai->irq;
	}

	/* reset */
	rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
	if (!IS_ERR(rst)) {
		reset_control_assert(rst);
		udelay(2);
		reset_control_deassert(rst);
	}

	sai->pdev = pdev;
	sai->set_sync = &stm32_sai_set_sync;
	platform_set_drvdata(pdev, sai);

	return devm_of_platform_populate(&pdev->dev);
}

#ifdef CONFIG_PM_SLEEP
/*
 * When pins are shared by two sai sub instances, pins have to be defined
 * in sai parent node. In this case, pins state is not managed by alsa fw.
 * These pins are managed in suspend/resume callbacks.
 */
static int stm32_sai_suspend(struct device *dev)
{
	struct stm32_sai_data *sai = dev_get_drvdata(dev);
	int ret;

	ret = stm32_sai_pclk_enable(dev);
	if (ret)
		return ret;

	sai->gcr = readl_relaxed(sai->base);
	stm32_sai_pclk_disable(dev);

	return pinctrl_pm_select_sleep_state(dev);
}

static int stm32_sai_resume(struct device *dev)
{
	struct stm32_sai_data *sai = dev_get_drvdata(dev);
	int ret;

	ret = stm32_sai_pclk_enable(dev);
	if (ret)
		return ret;

	writel_relaxed(sai->gcr, sai->base);
	stm32_sai_pclk_disable(dev);

	return pinctrl_pm_select_default_state(dev);
}
#endif /* CONFIG_PM_SLEEP */

static const struct dev_pm_ops stm32_sai_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_suspend, stm32_sai_resume)
};

MODULE_DEVICE_TABLE(of, stm32_sai_ids);

static struct platform_driver stm32_sai_driver = {
	.driver = {
		.name = "st,stm32-sai",
		.of_match_table = stm32_sai_ids,
		.pm = &stm32_sai_pm_ops,
	},
	.probe = stm32_sai_probe,
};

module_platform_driver(stm32_sai_driver);

MODULE_DESCRIPTION("STM32 Soc SAI Interface");
MODULE_AUTHOR("Olivier Moysan <olivier.moysan@st.com>");
MODULE_ALIAS("platform:st,stm32-sai");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
1802d0be	1	// SPDX-License-Identifier: GPL-2.0-only
3e086edf	2	/*
	3	* STM32 ALSA SoC Digital Audio Interface (SAI) driver.
	4	*
	5	* Copyright (C) 2016, STMicroelectronics - All Rights Reserved
	6	* Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics.
3e086edf	7	*/
3e086edf	8
5914d285	9	#include <linux/bitfield.h>
3e086edf	10	#include <linux/clk.h>
	11	#include <linux/delay.h>
	12	#include <linux/module.h>
	13	#include <linux/of_platform.h>
cf881773	14	#include <linux/pinctrl/consumer.h>
3e086edf	15	#include <linux/reset.h>
	16
	17	#include <sound/dmaengine_pcm.h>
	18	#include <sound/core.h>
	19
	20	#include "stm32_sai.h"
	21
03e78a24	22	static const struct stm32_sai_conf stm32_sai_conf_f4 = {
03e78a24	23	.version = SAI_STM32F4,
6eb17d70	24	.has_spdif = false,
03e78a24	25	};
	26
	27	static const struct stm32_sai_conf stm32_sai_conf_h7 = {
	28	.version = SAI_STM32H7,
6eb17d70	29	.has_spdif = true,
03e78a24	30	};
03e78a24	31
3e086edf	32	static const struct of_device_id stm32_sai_ids[] = {
03e78a24	33	{ .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 },
03e78a24	34	{ .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 },
3e086edf	35	{}
	36	};
	37
cf881773 OM	38	static int stm32_sai_pclk_disable(struct device *dev)
	39	{
	40	struct stm32_sai_data *sai = dev_get_drvdata(dev);
	41
	42	clk_disable_unprepare(sai->pclk);
	43
	44	return 0;
	45	}
	46
	47	static int stm32_sai_pclk_enable(struct device *dev)
5914d285	48	{
cf881773	49	struct stm32_sai_data *sai = dev_get_drvdata(dev);
5914d285 OM	50	int ret;
5914d285 OM	51
5914d285 OM	52	ret = clk_prepare_enable(sai->pclk);
	53	if (ret) {
	54	dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
	55	return ret;
	56	}
	57
cf881773 OM	58	return 0;
	59	}
	60
	61	static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci)
	62	{
	63	int ret;
	64
	65	/* Enable peripheral clock to allow GCR register access */
	66	ret = stm32_sai_pclk_enable(&sai->pdev->dev);
	67	if (ret)
	68	return ret;
	69
5914d285 OM	70	writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base);
5914d285 OM	71
cf881773	72	stm32_sai_pclk_disable(&sai->pdev->dev);
5914d285 OM	73
	74	return 0;
	75	}
	76
7dd0d835	77	static int stm32_sai_sync_conf_provider(struct stm32_sai_data *sai, int synco)
5914d285	78	{
5914d285 OM	79	u32 prev_synco;
	80	int ret;
	81
	82	/* Enable peripheral clock to allow GCR register access */
cf881773 OM	83	ret = stm32_sai_pclk_enable(&sai->pdev->dev);
cf881773 OM	84	if (ret)
5914d285	85	return ret;
5914d285	86
dc43d3aa RH	87	dev_dbg(&sai->pdev->dev, "Set %pOFn%s as synchro provider\n",
dc43d3aa RH	88	sai->pdev->dev.of_node,
5914d285 OM	89	synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
	90
	91	prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base));
	92	if (prev_synco != STM_SAI_SYNC_OUT_NONE && synco != prev_synco) {
dc43d3aa RH	93	dev_err(&sai->pdev->dev, "%pOFn%s already set as sync provider\n",
dc43d3aa RH	94	sai->pdev->dev.of_node,
5914d285	95	prev_synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
cf881773	96	stm32_sai_pclk_disable(&sai->pdev->dev);
5914d285 OM	97	return -EINVAL;
	98	}
	99
	100	writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base);
	101
cf881773	102	stm32_sai_pclk_disable(&sai->pdev->dev);
5914d285 OM	103
	104	return 0;
	105	}
	106
7dd0d835	107	static int stm32_sai_set_sync(struct stm32_sai_data *sai_client,
	108	struct device_node *np_provider,
	109	int synco, int synci)
5914d285	110	{
7dd0d835	111	struct platform_device *pdev = of_find_device_by_node(np_provider);
7dd0d835	112	struct stm32_sai_data *sai_provider;
5914d285 OM	113	int ret;
5914d285 OM	114
7dd0d835	115	if (!pdev) {
7dd0d835	116	dev_err(&sai_client->pdev->dev,
5d585e1e	117	"Device not found for node %pOFn\n", np_provider);
d4180b4c	118	of_node_put(np_provider);
7dd0d835	119	return -ENODEV;
5914d285	120	}
5914d285	121
7dd0d835	122	sai_provider = platform_get_drvdata(pdev);
	123	if (!sai_provider) {
	124	dev_err(&sai_client->pdev->dev,
	125	"SAI sync provider data not found\n");
1c3816a1	126	ret = -EINVAL;
d4180b4c	127	goto error;
7dd0d835	128	}
5914d285 OM	129
5914d285 OM	130	/* Configure sync client */
7dd0d835	131	ret = stm32_sai_sync_conf_client(sai_client, synci);
7dd0d835	132	if (ret < 0)
d4180b4c	133	goto error;
5914d285 OM	134
5914d285 OM	135	/* Configure sync provider */
1c3816a1 WY	136	ret = stm32_sai_sync_conf_provider(sai_provider, synco);
1c3816a1 WY	137
d4180b4c	138	error:
1c3816a1	139	put_device(&pdev->dev);
d4180b4c	140	of_node_put(np_provider);
1c3816a1	141	return ret;
5914d285 OM	142	}
5914d285 OM	143
3e086edf	144	static int stm32_sai_probe(struct platform_device *pdev)
3e086edf	145	{
3e086edf	146	struct stm32_sai_data *sai;
	147	struct reset_control *rst;
	148	struct resource *res;
3e086edf	149	const struct of_device_id *of_id;
	150
	151	sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
	152	if (!sai)
	153	return -ENOMEM;
	154
	155	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5914d285 OM	156	sai->base = devm_ioremap_resource(&pdev->dev, res);
	157	if (IS_ERR(sai->base))
	158	return PTR_ERR(sai->base);
3e086edf	159
	160	of_id = of_match_device(stm32_sai_ids, &pdev->dev);
	161	if (of_id)
03e78a24	162	sai->conf = (struct stm32_sai_conf *)of_id->data;
3e086edf	163	else
	164	return -EINVAL;
	165
5914d285 OM	166	if (!STM_SAI_IS_F4(sai)) {
	167	sai->pclk = devm_clk_get(&pdev->dev, "pclk");
	168	if (IS_ERR(sai->pclk)) {
	169	dev_err(&pdev->dev, "missing bus clock pclk\n");
	170	return PTR_ERR(sai->pclk);
	171	}
	172	}
	173
3e086edf	174	sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k");
	175	if (IS_ERR(sai->clk_x8k)) {
	176	dev_err(&pdev->dev, "missing x8k parent clock\n");
	177	return PTR_ERR(sai->clk_x8k);
	178	}
	179
	180	sai->clk_x11k = devm_clk_get(&pdev->dev, "x11k");
	181	if (IS_ERR(sai->clk_x11k)) {
	182	dev_err(&pdev->dev, "missing x11k parent clock\n");
	183	return PTR_ERR(sai->clk_x11k);
	184	}
	185
	186	/* init irqs */
	187	sai->irq = platform_get_irq(pdev, 0);
	188	if (sai->irq < 0) {
	189	dev_err(&pdev->dev, "no irq for node %s\n", pdev->name);
	190	return sai->irq;
	191	}
	192
	193	/* reset */
3c6f6c53	194	rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
3e086edf	195	if (!IS_ERR(rst)) {
	196	reset_control_assert(rst);
	197	udelay(2);
	198	reset_control_deassert(rst);
	199	}
	200
	201	sai->pdev = pdev;
7dd0d835	202	sai->set_sync = &stm32_sai_set_sync;
3e086edf	203	platform_set_drvdata(pdev, sai);
3e086edf	204
512d1bb4	205	return devm_of_platform_populate(&pdev->dev);
3e086edf	206	}
3e086edf	207
cf881773 OM	208	#ifdef CONFIG_PM_SLEEP
	209	/*
	210	* When pins are shared by two sai sub instances, pins have to be defined
	211	* in sai parent node. In this case, pins state is not managed by alsa fw.
	212	* These pins are managed in suspend/resume callbacks.
	213	*/
	214	static int stm32_sai_suspend(struct device *dev)
	215	{
	216	struct stm32_sai_data *sai = dev_get_drvdata(dev);
	217	int ret;
	218
	219	ret = stm32_sai_pclk_enable(dev);
	220	if (ret)
	221	return ret;
	222
	223	sai->gcr = readl_relaxed(sai->base);
	224	stm32_sai_pclk_disable(dev);
	225
	226	return pinctrl_pm_select_sleep_state(dev);
	227	}
	228
	229	static int stm32_sai_resume(struct device *dev)
	230	{
	231	struct stm32_sai_data *sai = dev_get_drvdata(dev);
	232	int ret;
	233
	234	ret = stm32_sai_pclk_enable(dev);
	235	if (ret)
	236	return ret;
	237
	238	writel_relaxed(sai->gcr, sai->base);
	239	stm32_sai_pclk_disable(dev);
	240
	241	return pinctrl_pm_select_default_state(dev);
	242	}
	243	#endif /* CONFIG_PM_SLEEP */
	244
	245	static const struct dev_pm_ops stm32_sai_pm_ops = {
	246	SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_suspend, stm32_sai_resume)
	247	};
	248
3e086edf	249	MODULE_DEVICE_TABLE(of, stm32_sai_ids);
	250
	251	static struct platform_driver stm32_sai_driver = {
	252	.driver = {
	253	.name = "st,stm32-sai",
	254	.of_match_table = stm32_sai_ids,
cf881773	255	.pm = &stm32_sai_pm_ops,
3e086edf	256	},
3e086edf	257	.probe = stm32_sai_probe,
3e086edf	258	};
	259
	260	module_platform_driver(stm32_sai_driver);
	261
	262	MODULE_DESCRIPTION("STM32 Soc SAI Interface");
602fdadc	263	MODULE_AUTHOR("Olivier Moysan <olivier.moysan@st.com>");
3e086edf	264	MODULE_ALIAS("platform:st,stm32-sai");
3e086edf	265	MODULE_LICENSE("GPL v2");