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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
e155fcc2 MA |
2 | /* |
3 | * ALSA SoC Voice Codec Interface for TI DAVINCI processor | |
4 | * | |
5 | * Copyright (C) 2010 Texas Instruments. | |
6 | * | |
7 | * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com> | |
e155fcc2 MA |
8 | */ |
9 | ||
10 | #include <linux/init.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/device.h> | |
13 | #include <linux/delay.h> | |
923a0042 | 14 | #include <linux/slab.h> |
e155fcc2 MA |
15 | #include <linux/io.h> |
16 | #include <linux/mfd/davinci_voicecodec.h> | |
17 | ||
18 | #include <sound/core.h> | |
19 | #include <sound/pcm.h> | |
20 | #include <sound/pcm_params.h> | |
21 | #include <sound/initval.h> | |
22 | #include <sound/soc.h> | |
62731d33 | 23 | #include <sound/dmaengine_pcm.h> |
e155fcc2 | 24 | |
62731d33 | 25 | #include "edma-pcm.h" |
e155fcc2 | 26 | #include "davinci-i2s.h" |
e155fcc2 MA |
27 | |
28 | #define MOD_REG_BIT(val, mask, set) do { \ | |
29 | if (set) { \ | |
30 | val |= mask; \ | |
31 | } else { \ | |
32 | val &= ~mask; \ | |
33 | } \ | |
34 | } while (0) | |
35 | ||
36 | struct davinci_vcif_dev { | |
37 | struct davinci_vc *davinci_vc; | |
62731d33 PU |
38 | struct snd_dmaengine_dai_dma_data dma_data[2]; |
39 | int dma_request[2]; | |
e155fcc2 MA |
40 | }; |
41 | ||
42 | static void davinci_vcif_start(struct snd_pcm_substream *substream) | |
43 | { | |
44 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
45 | struct davinci_vcif_dev *davinci_vcif_dev = | |
f0fba2ad | 46 | snd_soc_dai_get_drvdata(rtd->cpu_dai); |
e155fcc2 MA |
47 | struct davinci_vc *davinci_vc = davinci_vcif_dev->davinci_vc; |
48 | u32 w; | |
49 | ||
50 | /* Start the sample generator and enable transmitter/receiver */ | |
51 | w = readl(davinci_vc->base + DAVINCI_VC_CTRL); | |
52 | ||
53 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
3012f43e | 54 | MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 0); |
e155fcc2 | 55 | else |
3012f43e | 56 | MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 0); |
e155fcc2 MA |
57 | |
58 | writel(w, davinci_vc->base + DAVINCI_VC_CTRL); | |
59 | } | |
60 | ||
61 | static void davinci_vcif_stop(struct snd_pcm_substream *substream) | |
62 | { | |
63 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
64 | struct davinci_vcif_dev *davinci_vcif_dev = | |
f0fba2ad | 65 | snd_soc_dai_get_drvdata(rtd->cpu_dai); |
e155fcc2 MA |
66 | struct davinci_vc *davinci_vc = davinci_vcif_dev->davinci_vc; |
67 | u32 w; | |
68 | ||
69 | /* Reset transmitter/receiver and sample rate/frame sync generators */ | |
70 | w = readl(davinci_vc->base + DAVINCI_VC_CTRL); | |
71 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
3012f43e | 72 | MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 1); |
e155fcc2 | 73 | else |
3012f43e | 74 | MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 1); |
e155fcc2 MA |
75 | |
76 | writel(w, davinci_vc->base + DAVINCI_VC_CTRL); | |
77 | } | |
78 | ||
79 | static int davinci_vcif_hw_params(struct snd_pcm_substream *substream, | |
80 | struct snd_pcm_hw_params *params, | |
81 | struct snd_soc_dai *dai) | |
82 | { | |
f0fba2ad | 83 | struct davinci_vcif_dev *davinci_vcif_dev = snd_soc_dai_get_drvdata(dai); |
e155fcc2 | 84 | struct davinci_vc *davinci_vc = davinci_vcif_dev->davinci_vc; |
e155fcc2 MA |
85 | u32 w; |
86 | ||
87 | /* Restart the codec before setup */ | |
88 | davinci_vcif_stop(substream); | |
89 | davinci_vcif_start(substream); | |
90 | ||
91 | /* General line settings */ | |
92 | writel(DAVINCI_VC_CTRL_MASK, davinci_vc->base + DAVINCI_VC_CTRL); | |
93 | ||
94 | writel(DAVINCI_VC_INT_MASK, davinci_vc->base + DAVINCI_VC_INTCLR); | |
95 | ||
96 | writel(DAVINCI_VC_INT_MASK, davinci_vc->base + DAVINCI_VC_INTEN); | |
97 | ||
98 | w = readl(davinci_vc->base + DAVINCI_VC_CTRL); | |
99 | ||
100 | /* Determine xfer data type */ | |
101 | switch (params_format(params)) { | |
102 | case SNDRV_PCM_FORMAT_U8: | |
e155fcc2 MA |
103 | MOD_REG_BIT(w, DAVINCI_VC_CTRL_RD_BITS_8 | |
104 | DAVINCI_VC_CTRL_RD_UNSIGNED | | |
105 | DAVINCI_VC_CTRL_WD_BITS_8 | | |
106 | DAVINCI_VC_CTRL_WD_UNSIGNED, 1); | |
107 | break; | |
108 | case SNDRV_PCM_FORMAT_S8: | |
e155fcc2 MA |
109 | MOD_REG_BIT(w, DAVINCI_VC_CTRL_RD_BITS_8 | |
110 | DAVINCI_VC_CTRL_WD_BITS_8, 1); | |
111 | ||
112 | MOD_REG_BIT(w, DAVINCI_VC_CTRL_RD_UNSIGNED | | |
113 | DAVINCI_VC_CTRL_WD_UNSIGNED, 0); | |
114 | break; | |
115 | case SNDRV_PCM_FORMAT_S16_LE: | |
e155fcc2 MA |
116 | MOD_REG_BIT(w, DAVINCI_VC_CTRL_RD_BITS_8 | |
117 | DAVINCI_VC_CTRL_RD_UNSIGNED | | |
118 | DAVINCI_VC_CTRL_WD_BITS_8 | | |
119 | DAVINCI_VC_CTRL_WD_UNSIGNED, 0); | |
120 | break; | |
121 | default: | |
122 | printk(KERN_WARNING "davinci-vcif: unsupported PCM format"); | |
123 | return -EINVAL; | |
124 | } | |
125 | ||
e155fcc2 MA |
126 | writel(w, davinci_vc->base + DAVINCI_VC_CTRL); |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
131 | static int davinci_vcif_trigger(struct snd_pcm_substream *substream, int cmd, | |
132 | struct snd_soc_dai *dai) | |
133 | { | |
134 | int ret = 0; | |
135 | ||
136 | switch (cmd) { | |
137 | case SNDRV_PCM_TRIGGER_START: | |
138 | case SNDRV_PCM_TRIGGER_RESUME: | |
139 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
140 | davinci_vcif_start(substream); | |
82d1d521 | 141 | break; |
e155fcc2 MA |
142 | case SNDRV_PCM_TRIGGER_STOP: |
143 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
144 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
145 | davinci_vcif_stop(substream); | |
146 | break; | |
147 | default: | |
148 | ret = -EINVAL; | |
149 | } | |
150 | ||
151 | return ret; | |
152 | } | |
153 | ||
154 | #define DAVINCI_VCIF_RATES SNDRV_PCM_RATE_8000_48000 | |
155 | ||
85e7652d | 156 | static const struct snd_soc_dai_ops davinci_vcif_dai_ops = { |
e155fcc2 MA |
157 | .trigger = davinci_vcif_trigger, |
158 | .hw_params = davinci_vcif_hw_params, | |
159 | }; | |
160 | ||
62731d33 PU |
161 | static int davinci_vcif_dai_probe(struct snd_soc_dai *dai) |
162 | { | |
163 | struct davinci_vcif_dev *dev = snd_soc_dai_get_drvdata(dai); | |
164 | ||
165 | dai->playback_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; | |
166 | dai->capture_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE]; | |
167 | ||
168 | return 0; | |
169 | } | |
170 | ||
f0fba2ad | 171 | static struct snd_soc_dai_driver davinci_vcif_dai = { |
62731d33 | 172 | .probe = davinci_vcif_dai_probe, |
e155fcc2 MA |
173 | .playback = { |
174 | .channels_min = 1, | |
175 | .channels_max = 2, | |
176 | .rates = DAVINCI_VCIF_RATES, | |
177 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | |
178 | .capture = { | |
179 | .channels_min = 1, | |
180 | .channels_max = 2, | |
181 | .rates = DAVINCI_VCIF_RATES, | |
182 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | |
183 | .ops = &davinci_vcif_dai_ops, | |
184 | ||
185 | }; | |
e155fcc2 | 186 | |
ee226ce1 KM |
187 | static const struct snd_soc_component_driver davinci_vcif_component = { |
188 | .name = "davinci-vcif", | |
189 | }; | |
190 | ||
e155fcc2 MA |
191 | static int davinci_vcif_probe(struct platform_device *pdev) |
192 | { | |
cb5811cf | 193 | struct davinci_vc *davinci_vc = pdev->dev.platform_data; |
e155fcc2 MA |
194 | struct davinci_vcif_dev *davinci_vcif_dev; |
195 | int ret; | |
196 | ||
a3bb8f3f JL |
197 | davinci_vcif_dev = devm_kzalloc(&pdev->dev, |
198 | sizeof(struct davinci_vcif_dev), | |
199 | GFP_KERNEL); | |
dc092339 | 200 | if (!davinci_vcif_dev) |
e155fcc2 | 201 | return -ENOMEM; |
e155fcc2 MA |
202 | |
203 | /* DMA tx params */ | |
204 | davinci_vcif_dev->davinci_vc = davinci_vc; | |
62731d33 PU |
205 | davinci_vcif_dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data = |
206 | &davinci_vc->davinci_vcif.dma_tx_channel; | |
207 | davinci_vcif_dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = | |
208 | davinci_vc->davinci_vcif.dma_tx_addr; | |
e155fcc2 MA |
209 | |
210 | /* DMA rx params */ | |
62731d33 PU |
211 | davinci_vcif_dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].filter_data = |
212 | &davinci_vc->davinci_vcif.dma_rx_channel; | |
213 | davinci_vcif_dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = | |
214 | davinci_vc->davinci_vcif.dma_rx_addr; | |
e155fcc2 | 215 | |
f0fba2ad | 216 | dev_set_drvdata(&pdev->dev, davinci_vcif_dev); |
e155fcc2 | 217 | |
553de19a VT |
218 | ret = devm_snd_soc_register_component(&pdev->dev, |
219 | &davinci_vcif_component, | |
220 | &davinci_vcif_dai, 1); | |
e155fcc2 MA |
221 | if (ret != 0) { |
222 | dev_err(&pdev->dev, "could not register dai\n"); | |
a3bb8f3f | 223 | return ret; |
e155fcc2 MA |
224 | } |
225 | ||
62731d33 | 226 | ret = edma_pcm_platform_register(&pdev->dev); |
f08095a4 HG |
227 | if (ret) { |
228 | dev_err(&pdev->dev, "register PCM failed: %d\n", ret); | |
f08095a4 HG |
229 | return ret; |
230 | } | |
231 | ||
e155fcc2 | 232 | return 0; |
e155fcc2 MA |
233 | } |
234 | ||
e155fcc2 MA |
235 | static struct platform_driver davinci_vcif_driver = { |
236 | .probe = davinci_vcif_probe, | |
e155fcc2 | 237 | .driver = { |
f0fba2ad | 238 | .name = "davinci-vcif", |
e155fcc2 MA |
239 | }, |
240 | }; | |
241 | ||
f9b8a514 | 242 | module_platform_driver(davinci_vcif_driver); |
e155fcc2 MA |
243 | |
244 | MODULE_AUTHOR("Miguel Aguilar"); | |
245 | MODULE_DESCRIPTION("Texas Instruments DaVinci ASoC Voice Codec Interface"); | |
246 | MODULE_LICENSE("GPL"); |