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1/*
2 * Generic TXx9 ACLC platform driver
3 *
4 * Copyright (C) 2009 Atsushi Nemoto
5 *
6 * Based on RBTX49xx patch from CELF patch archive.
7 * (C) Copyright TOSHIBA CORPORATION 2004-2006
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/scatterlist.h>
5a0e3ad6 18#include <linux/slab.h>
ff495d3a 19#include <linux/dmaengine.h>
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20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
24#include "txx9aclc.h"
25
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26static struct txx9aclc_soc_device {
27 struct txx9aclc_dmadata dmadata[2];
28} txx9aclc_soc_device;
29
30/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
31static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
32
33static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
34 struct txx9aclc_dmadata *dmadata);
35
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36static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
37 /*
38 * REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
39 * needs more works for noncoherent MIPS.
40 */
41 .info = SNDRV_PCM_INFO_INTERLEAVED |
42 SNDRV_PCM_INFO_BATCH |
43 SNDRV_PCM_INFO_PAUSE,
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44 .period_bytes_min = 1024,
45 .period_bytes_max = 8 * 1024,
46 .periods_min = 2,
47 .periods_max = 4096,
48 .buffer_bytes_max = 32 * 1024,
49};
50
51static int txx9aclc_pcm_hw_params(struct snd_pcm_substream *substream,
52 struct snd_pcm_hw_params *params)
53{
54 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
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55 struct snd_pcm_runtime *runtime = substream->runtime;
56 struct txx9aclc_dmadata *dmadata = runtime->private_data;
57 int ret;
58
59 ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
60 if (ret < 0)
61 return ret;
62
f0fba2ad 63 dev_dbg(rtd->platform->dev,
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64 "runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
65 "runtime->min_align %ld\n",
66 (unsigned long)runtime->dma_area,
67 (unsigned long)runtime->dma_addr, runtime->dma_bytes,
68 runtime->min_align);
f0fba2ad 69 dev_dbg(rtd->platform->dev,
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70 "periods %d period_bytes %d stream %d\n",
71 params_periods(params), params_period_bytes(params),
72 substream->stream);
73
74 dmadata->substream = substream;
75 dmadata->pos = 0;
76 return 0;
77}
78
79static int txx9aclc_pcm_hw_free(struct snd_pcm_substream *substream)
80{
81 return snd_pcm_lib_free_pages(substream);
82}
83
84static int txx9aclc_pcm_prepare(struct snd_pcm_substream *substream)
85{
86 struct snd_pcm_runtime *runtime = substream->runtime;
87 struct txx9aclc_dmadata *dmadata = runtime->private_data;
88
89 dmadata->dma_addr = runtime->dma_addr;
90 dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
91 dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
92
93 if (dmadata->buffer_bytes == dmadata->period_bytes) {
94 dmadata->frag_bytes = dmadata->period_bytes >> 1;
95 dmadata->frags = 2;
96 } else {
97 dmadata->frag_bytes = dmadata->period_bytes;
98 dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
99 }
100 dmadata->frag_count = 0;
101 dmadata->pos = 0;
102 return 0;
103}
104
105static void txx9aclc_dma_complete(void *arg)
106{
107 struct txx9aclc_dmadata *dmadata = arg;
108 unsigned long flags;
109
110 /* dma completion handler cannot submit new operations */
111 spin_lock_irqsave(&dmadata->dma_lock, flags);
112 if (dmadata->frag_count >= 0) {
113 dmadata->dmacount--;
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114 if (!WARN_ON(dmadata->dmacount < 0))
115 tasklet_schedule(&dmadata->tasklet);
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116 }
117 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
118}
119
120static struct dma_async_tx_descriptor *
121txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
122{
123 struct dma_chan *chan = dmadata->dma_chan;
124 struct dma_async_tx_descriptor *desc;
125 struct scatterlist sg;
126
127 sg_init_table(&sg, 1);
128 sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
129 dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
130 sg_dma_address(&sg) = buf_dma_addr;
16052827 131 desc = dmaengine_prep_slave_sg(chan, &sg, 1,
e24805dd 132 dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
35e16581 133 DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
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134 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
135 if (!desc) {
136 dev_err(&chan->dev->device, "cannot prepare slave dma\n");
137 return NULL;
138 }
139 desc->callback = txx9aclc_dma_complete;
140 desc->callback_param = dmadata;
ff495d3a 141 dmaengine_submit(desc);
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142 return desc;
143}
144
145#define NR_DMA_CHAIN 2
146
147static void txx9aclc_dma_tasklet(unsigned long data)
148{
149 struct txx9aclc_dmadata *dmadata = (struct txx9aclc_dmadata *)data;
150 struct dma_chan *chan = dmadata->dma_chan;
151 struct dma_async_tx_descriptor *desc;
152 struct snd_pcm_substream *substream = dmadata->substream;
153 u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
154 ACCTL_AUDODMA : ACCTL_AUDIDMA;
155 int i;
156 unsigned long flags;
157
158 spin_lock_irqsave(&dmadata->dma_lock, flags);
159 if (dmadata->frag_count < 0) {
f0fba2ad 160 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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161 void __iomem *base = drvdata->base;
162
163 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
ff495d3a 164 dmaengine_terminate_all(chan);
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165 /* first time */
166 for (i = 0; i < NR_DMA_CHAIN; i++) {
167 desc = txx9aclc_dma_submit(dmadata,
168 dmadata->dma_addr + i * dmadata->frag_bytes);
169 if (!desc)
170 return;
171 }
172 dmadata->dmacount = NR_DMA_CHAIN;
ff495d3a 173 dma_async_issue_pending(chan);
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174 spin_lock_irqsave(&dmadata->dma_lock, flags);
175 __raw_writel(ctlbit, base + ACCTLEN);
176 dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
177 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
178 return;
179 }
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180 if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
181 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
182 return;
183 }
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184 while (dmadata->dmacount < NR_DMA_CHAIN) {
185 dmadata->dmacount++;
186 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
187 desc = txx9aclc_dma_submit(dmadata,
188 dmadata->dma_addr +
189 dmadata->frag_count * dmadata->frag_bytes);
190 if (!desc)
191 return;
ff495d3a 192 dma_async_issue_pending(chan);
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193
194 spin_lock_irqsave(&dmadata->dma_lock, flags);
195 dmadata->frag_count++;
196 dmadata->frag_count %= dmadata->frags;
197 dmadata->pos += dmadata->frag_bytes;
198 dmadata->pos %= dmadata->buffer_bytes;
199 if ((dmadata->frag_count * dmadata->frag_bytes) %
200 dmadata->period_bytes == 0)
201 snd_pcm_period_elapsed(substream);
202 }
203 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
204}
205
206static int txx9aclc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
207{
208 struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
f0fba2ad 209 struct txx9aclc_plat_drvdata *drvdata =txx9aclc_drvdata;
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210 void __iomem *base = drvdata->base;
211 unsigned long flags;
212 int ret = 0;
213 u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
214 ACCTL_AUDODMA : ACCTL_AUDIDMA;
215
216 spin_lock_irqsave(&dmadata->dma_lock, flags);
217 switch (cmd) {
218 case SNDRV_PCM_TRIGGER_START:
219 dmadata->frag_count = -1;
220 tasklet_schedule(&dmadata->tasklet);
221 break;
222 case SNDRV_PCM_TRIGGER_STOP:
223 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
224 case SNDRV_PCM_TRIGGER_SUSPEND:
225 __raw_writel(ctlbit, base + ACCTLDIS);
226 break;
227 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
228 case SNDRV_PCM_TRIGGER_RESUME:
229 __raw_writel(ctlbit, base + ACCTLEN);
230 break;
231 default:
232 ret = -EINVAL;
233 }
234 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
235 return ret;
236}
237
238static snd_pcm_uframes_t
239txx9aclc_pcm_pointer(struct snd_pcm_substream *substream)
240{
241 struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
242
243 return bytes_to_frames(substream->runtime, dmadata->pos);
244}
245
246static int txx9aclc_pcm_open(struct snd_pcm_substream *substream)
247{
f0fba2ad 248 struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
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249 struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
250 int ret;
251
252 ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
253 if (ret)
254 return ret;
255 /* ensure that buffer size is a multiple of period size */
256 ret = snd_pcm_hw_constraint_integer(substream->runtime,
257 SNDRV_PCM_HW_PARAM_PERIODS);
258 if (ret < 0)
259 return ret;
260 substream->runtime->private_data = dmadata;
261 return 0;
262}
263
264static int txx9aclc_pcm_close(struct snd_pcm_substream *substream)
265{
266 struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
267 struct dma_chan *chan = dmadata->dma_chan;
268
269 dmadata->frag_count = -1;
ff495d3a 270 dmaengine_terminate_all(chan);
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271 return 0;
272}
273
274static struct snd_pcm_ops txx9aclc_pcm_ops = {
275 .open = txx9aclc_pcm_open,
276 .close = txx9aclc_pcm_close,
277 .ioctl = snd_pcm_lib_ioctl,
278 .hw_params = txx9aclc_pcm_hw_params,
279 .hw_free = txx9aclc_pcm_hw_free,
280 .prepare = txx9aclc_pcm_prepare,
281 .trigger = txx9aclc_pcm_trigger,
282 .pointer = txx9aclc_pcm_pointer,
283};
284
285static void txx9aclc_pcm_free_dma_buffers(struct snd_pcm *pcm)
286{
287 snd_pcm_lib_preallocate_free_for_all(pcm);
288}
289
552d1ef6 290static int txx9aclc_pcm_new(struct snd_soc_pcm_runtime *rtd)
e24805dd 291{
06132fdf 292 struct snd_card *card = rtd->card->snd_card;
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293 struct snd_soc_dai *dai = rtd->cpu_dai;
294 struct snd_pcm *pcm = rtd->pcm;
2a374b78 295 struct platform_device *pdev = to_platform_device(rtd->platform->dev);
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296 struct txx9aclc_soc_device *dev;
297 struct resource *r;
298 int i;
299 int ret;
300
301 /* at this point onwards the AC97 component has probed and this will be valid */
302 dev = snd_soc_dai_get_drvdata(dai);
303
304 dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
305 dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
306 for (i = 0; i < 2; i++) {
307 r = platform_get_resource(pdev, IORESOURCE_DMA, i);
308 if (!r) {
309 ret = -EBUSY;
310 goto exit;
311 }
312 dev->dmadata[i].dma_res = r;
313 ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
314 if (ret)
315 goto exit;
316 }
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317 return snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
318 card->dev, 64 * 1024, 4 * 1024 * 1024);
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319
320exit:
321 for (i = 0; i < 2; i++) {
322 if (dev->dmadata[i].dma_chan)
323 dma_release_channel(dev->dmadata[i].dma_chan);
324 dev->dmadata[i].dma_chan = NULL;
325 }
326 return ret;
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327}
328
329static bool filter(struct dma_chan *chan, void *param)
330{
331 struct txx9aclc_dmadata *dmadata = param;
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332 char *devname;
333 bool found = false;
e24805dd 334
647613e9 335 devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
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336 (int)dmadata->dma_res->start);
337 if (strcmp(dev_name(chan->device->dev), devname) == 0) {
338 chan->private = &dmadata->dma_slave;
647613e9 339 found = true;
e24805dd 340 }
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341 kfree(devname);
342 return found;
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343}
344
345static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
346 struct txx9aclc_dmadata *dmadata)
347{
f0fba2ad 348 struct txx9aclc_plat_drvdata *drvdata =txx9aclc_drvdata;
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349 struct txx9dmac_slave *ds = &dmadata->dma_slave;
350 dma_cap_mask_t mask;
351
352 spin_lock_init(&dmadata->dma_lock);
353
354 ds->reg_width = sizeof(u32);
355 if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
356 ds->tx_reg = drvdata->physbase + ACAUDODAT;
357 ds->rx_reg = 0;
358 } else {
359 ds->tx_reg = 0;
360 ds->rx_reg = drvdata->physbase + ACAUDIDAT;
361 }
362
363 /* Try to grab a DMA channel */
364 dma_cap_zero(mask);
365 dma_cap_set(DMA_SLAVE, mask);
366 dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
367 if (!dmadata->dma_chan) {
f0fba2ad 368 printk(KERN_ERR
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369 "DMA channel for %s is not available\n",
370 dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
371 "playback" : "capture");
372 return -EBUSY;
373 }
374 tasklet_init(&dmadata->tasklet, txx9aclc_dma_tasklet,
375 (unsigned long)dmadata);
376 return 0;
377}
378
f0fba2ad 379static int txx9aclc_pcm_probe(struct snd_soc_platform *platform)
e24805dd 380{
f0fba2ad 381 snd_soc_platform_set_drvdata(platform, &txx9aclc_soc_device);
e24805dd 382 return 0;
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383}
384
f0fba2ad 385static int txx9aclc_pcm_remove(struct snd_soc_platform *platform)
e24805dd 386{
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387 struct txx9aclc_soc_device *dev = snd_soc_platform_get_drvdata(platform);
388 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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389 void __iomem *base = drvdata->base;
390 int i;
391
392 /* disable all FIFO DMAs */
393 __raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
394 /* dummy R/W to clear pending DMAREQ if any */
395 __raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
396
397 for (i = 0; i < 2; i++) {
398 struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
399 struct dma_chan *chan = dmadata->dma_chan;
400 if (chan) {
401 dmadata->frag_count = -1;
ff495d3a 402 dmaengine_terminate_all(chan);
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403 dma_release_channel(chan);
404 }
405 dev->dmadata[i].dma_chan = NULL;
406 }
407 return 0;
408}
409
f0fba2ad 410static struct snd_soc_platform_driver txx9aclc_soc_platform = {
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411 .probe = txx9aclc_pcm_probe,
412 .remove = txx9aclc_pcm_remove,
f0fba2ad 413 .ops = &txx9aclc_pcm_ops,
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414 .pcm_new = txx9aclc_pcm_new,
415 .pcm_free = txx9aclc_pcm_free_dma_buffers,
416};
e24805dd 417
d8628d1c 418static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
e24805dd 419{
f0fba2ad 420 return snd_soc_register_platform(&pdev->dev, &txx9aclc_soc_platform);
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421}
422
d8628d1c 423static int txx9aclc_soc_platform_remove(struct platform_device *pdev)
e24805dd 424{
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425 snd_soc_unregister_platform(&pdev->dev);
426 return 0;
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427}
428
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429static struct platform_driver txx9aclc_pcm_driver = {
430 .driver = {
431 .name = "txx9aclc-pcm-audio",
432 .owner = THIS_MODULE,
433 },
434
435 .probe = txx9aclc_soc_platform_probe,
d8628d1c 436 .remove = txx9aclc_soc_platform_remove,
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437};
438
33d316cd 439module_platform_driver(txx9aclc_pcm_driver);
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440
441MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
442MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
443MODULE_LICENSE("GPL");