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[mirror_ubuntu-bionic-kernel.git] / sound / soc / ux500 / ux500_msp_dai.c
CommitLineData
3592b7f6
OL		 1/*
2 * Copyright (C) ST-Ericsson SA 2012
3 *
4 * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
5 * Roger Nilsson <roger.xr.nilsson@stericsson.com>
6 * for ST-Ericsson.
7 *
8 * License terms:
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/slab.h>
17#include <linux/bitops.h>
18#include <linux/platform_device.h>
19#include <linux/clk.h>
f382acbe 20#include <linux/of.h>
3592b7f6
OL		 21#include <linux/regulator/consumer.h>
22#include <linux/mfd/dbx500-prcmu.h>
ab0fc6ce 23#include <linux/platform_data/asoc-ux500-msp.h>
3592b7f6 24
3592b7f6
OL		 25#include <sound/soc.h>
26#include <sound/soc-dai.h>
f382acbe 27#include <sound/dmaengine_pcm.h>
3592b7f6
OL		 28
29#include "ux500_msp_i2s.h"
30#include "ux500_msp_dai.h"
1428c20f 31#include "ux500_pcm.h"
3592b7f6
OL		 32
33static int setup_pcm_multichan(struct snd_soc_dai *dai,
34 struct ux500_msp_config *msp_config)
35{
36 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
37 struct msp_multichannel_config *multi =
38 &msp_config->multichannel_config;
39
40 if (drvdata->slots > 1) {
41 msp_config->multichannel_configured = 1;
42
43 multi->tx_multichannel_enable = true;
44 multi->rx_multichannel_enable = true;
45 multi->rx_comparison_enable_mode = MSP_COMPARISON_DISABLED;
46
47 multi->tx_channel_0_enable = drvdata->tx_mask;
48 multi->tx_channel_1_enable = 0;
49 multi->tx_channel_2_enable = 0;
50 multi->tx_channel_3_enable = 0;
51
52 multi->rx_channel_0_enable = drvdata->rx_mask;
53 multi->rx_channel_1_enable = 0;
54 multi->rx_channel_2_enable = 0;
55 multi->rx_channel_3_enable = 0;
56
57 dev_dbg(dai->dev,
58 "%s: Multichannel enabled. Slots: %d, TX: %u, RX: %u\n",
59 __func__, drvdata->slots, multi->tx_channel_0_enable,
60 multi->rx_channel_0_enable);
61 }
62
63 return 0;
64}
65
66static int setup_frameper(struct snd_soc_dai *dai, unsigned int rate,
67 struct msp_protdesc *prot_desc)
68{
69 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
70
71 switch (drvdata->slots) {
72 case 1:
73 switch (rate) {
74 case 8000:
75 prot_desc->frame_period =
76 FRAME_PER_SINGLE_SLOT_8_KHZ;
77 break;
78
79 case 16000:
80 prot_desc->frame_period =
81 FRAME_PER_SINGLE_SLOT_16_KHZ;
82 break;
83
84 case 44100:
85 prot_desc->frame_period =
86 FRAME_PER_SINGLE_SLOT_44_1_KHZ;
87 break;
88
89 case 48000:
90 prot_desc->frame_period =
91 FRAME_PER_SINGLE_SLOT_48_KHZ;
92 break;
93
94 default:
95 dev_err(dai->dev,
96 "%s: Error: Unsupported sample-rate (freq = %d)!\n",
97 __func__, rate);
98 return -EINVAL;
99 }
100 break;
101
102 case 2:
103 prot_desc->frame_period = FRAME_PER_2_SLOTS;
104 break;
105
106 case 8:
107 prot_desc->frame_period = FRAME_PER_8_SLOTS;
108 break;
109
110 case 16:
111 prot_desc->frame_period = FRAME_PER_16_SLOTS;
112 break;
113 default:
114 dev_err(dai->dev,
115 "%s: Error: Unsupported slot-count (slots = %d)!\n",
116 __func__, drvdata->slots);
117 return -EINVAL;
118 }
119
120 prot_desc->clocks_per_frame =
121 prot_desc->frame_period+1;
122
123 dev_dbg(dai->dev, "%s: Clocks per frame: %u\n",
124 __func__,
125 prot_desc->clocks_per_frame);
126
127 return 0;
128}
129
130static int setup_pcm_framing(struct snd_soc_dai *dai, unsigned int rate,
131 struct msp_protdesc *prot_desc)
132{
133 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
134
135 u32 frame_length = MSP_FRAME_LEN_1;
fe3a980c 136
3592b7f6
OL		 137 prot_desc->frame_width = 0;
138
139 switch (drvdata->slots) {
140 case 1:
141 frame_length = MSP_FRAME_LEN_1;
142 break;
143
144 case 2:
145 frame_length = MSP_FRAME_LEN_2;
146 break;
147
148 case 8:
149 frame_length = MSP_FRAME_LEN_8;
150 break;
151
152 case 16:
153 frame_length = MSP_FRAME_LEN_16;
154 break;
155 default:
156 dev_err(dai->dev,
157 "%s: Error: Unsupported slot-count (slots = %d)!\n",
158 __func__, drvdata->slots);
159 return -EINVAL;
160 }
161
162 prot_desc->tx_frame_len_1 = frame_length;
163 prot_desc->rx_frame_len_1 = frame_length;
164 prot_desc->tx_frame_len_2 = frame_length;
165 prot_desc->rx_frame_len_2 = frame_length;
166
167 prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
168 prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
169 prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
170 prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
171
172 return setup_frameper(dai, rate, prot_desc);
173}
174
175static int setup_clocking(struct snd_soc_dai *dai,
176 unsigned int fmt,
177 struct ux500_msp_config *msp_config)
178{
179 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
180 case SND_SOC_DAIFMT_NB_NF:
181 break;
182
183 case SND_SOC_DAIFMT_NB_IF:
184 msp_config->tx_fsync_pol ^= 1 << TFSPOL_SHIFT;
185 msp_config->rx_fsync_pol ^= 1 << RFSPOL_SHIFT;
186
187 break;
188
189 default:
190 dev_err(dai->dev,
c3d7abca 191 "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
3592b7f6
OL		 192 __func__, fmt);
193
194 return -EINVAL;
195 }
196
197 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
198 case SND_SOC_DAIFMT_CBM_CFM:
199 dev_dbg(dai->dev, "%s: Codec is master.\n", __func__);
200
201 msp_config->iodelay = 0x20;
202 msp_config->rx_fsync_sel = 0;
203 msp_config->tx_fsync_sel = 1 << TFSSEL_SHIFT;
204 msp_config->tx_clk_sel = 0;
205 msp_config->rx_clk_sel = 0;
206 msp_config->srg_clk_sel = 0x2 << SCKSEL_SHIFT;
207
208 break;
209
210 case SND_SOC_DAIFMT_CBS_CFS:
211 dev_dbg(dai->dev, "%s: Codec is slave.\n", __func__);
212
213 msp_config->tx_clk_sel = TX_CLK_SEL_SRG;
214 msp_config->tx_fsync_sel = TX_SYNC_SRG_PROG;
215 msp_config->rx_clk_sel = RX_CLK_SEL_SRG;
216 msp_config->rx_fsync_sel = RX_SYNC_SRG;
217 msp_config->srg_clk_sel = 1 << SCKSEL_SHIFT;
218
219 break;
220
221 default:
c3d7abca 222 dev_err(dai->dev, "%s: Error: Unsupported master (fmt = 0x%x)!\n",
3592b7f6
OL		 223 __func__, fmt);
224
225 return -EINVAL;
226 }
227
228 return 0;
229}
230
231static int setup_pcm_protdesc(struct snd_soc_dai *dai,
232 unsigned int fmt,
233 struct msp_protdesc *prot_desc)
234{
235 prot_desc->rx_phase_mode = MSP_SINGLE_PHASE;
236 prot_desc->tx_phase_mode = MSP_SINGLE_PHASE;
237 prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
238 prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
239 prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
240 prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
241 prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_HI);
242 prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_HI << RFSPOL_SHIFT;
243
244 if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_DSP_A) {
245 dev_dbg(dai->dev, "%s: DSP_A.\n", __func__);
246 prot_desc->rx_clk_pol = MSP_RISING_EDGE;
247 prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
248
249 prot_desc->rx_data_delay = MSP_DELAY_1;
250 prot_desc->tx_data_delay = MSP_DELAY_1;
251 } else {
252 dev_dbg(dai->dev, "%s: DSP_B.\n", __func__);
253 prot_desc->rx_clk_pol = MSP_FALLING_EDGE;
254 prot_desc->tx_clk_pol = MSP_RISING_EDGE;
255
256 prot_desc->rx_data_delay = MSP_DELAY_0;
257 prot_desc->tx_data_delay = MSP_DELAY_0;
258 }
259
260 prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
261 prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
262 prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
263 prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
264 prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
265
266 return 0;
267}
268
269static int setup_i2s_protdesc(struct msp_protdesc *prot_desc)
270{
271 prot_desc->rx_phase_mode = MSP_DUAL_PHASE;
272 prot_desc->tx_phase_mode = MSP_DUAL_PHASE;
273 prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
274 prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
275 prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
276 prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
277 prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_LO);
278 prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_LO << RFSPOL_SHIFT;
279
280 prot_desc->rx_frame_len_1 = MSP_FRAME_LEN_1;
281 prot_desc->rx_frame_len_2 = MSP_FRAME_LEN_1;
282 prot_desc->tx_frame_len_1 = MSP_FRAME_LEN_1;
283 prot_desc->tx_frame_len_2 = MSP_FRAME_LEN_1;
284 prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
285 prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
286 prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
287 prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
288
289 prot_desc->rx_clk_pol = MSP_RISING_EDGE;
290 prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
291
292 prot_desc->rx_data_delay = MSP_DELAY_0;
293 prot_desc->tx_data_delay = MSP_DELAY_0;
294
295 prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
296 prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
297 prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
298 prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
299 prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
300
301 return 0;
302}
303
304static int setup_msp_config(struct snd_pcm_substream *substream,
305 struct snd_soc_dai *dai,
306 struct ux500_msp_config *msp_config)
307{
308 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
309 struct msp_protdesc *prot_desc = &msp_config->protdesc;
310 struct snd_pcm_runtime *runtime = substream->runtime;
311 unsigned int fmt = drvdata->fmt;
312 int ret;
313
314 memset(msp_config, 0, sizeof(*msp_config));
315
316 msp_config->f_inputclk = drvdata->master_clk;
317
318 msp_config->tx_fifo_config = TX_FIFO_ENABLE;
319 msp_config->rx_fifo_config = RX_FIFO_ENABLE;
320 msp_config->def_elem_len = 1;
321 msp_config->direction = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
322 MSP_DIR_TX : MSP_DIR_RX;
323 msp_config->data_size = MSP_DATA_BITS_32;
324 msp_config->frame_freq = runtime->rate;
325
326 dev_dbg(dai->dev, "%s: f_inputclk = %u, frame_freq = %u.\n",
327 __func__, msp_config->f_inputclk, msp_config->frame_freq);
328 /* To avoid division by zero */
329 prot_desc->clocks_per_frame = 1;
330
331 dev_dbg(dai->dev, "%s: rate: %u, channels: %d.\n", __func__,
332 runtime->rate, runtime->channels);
333 switch (fmt &
334 (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_MASTER_MASK)) {
335 case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS:
336 dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
337
338 msp_config->default_protdesc = 1;
339 msp_config->protocol = MSP_I2S_PROTOCOL;
340 break;
341
342 case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
343 dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
344
345 msp_config->data_size = MSP_DATA_BITS_16;
346 msp_config->protocol = MSP_I2S_PROTOCOL;
347
348 ret = setup_i2s_protdesc(prot_desc);
349 if (ret < 0)
350 return ret;
351
352 break;
353
354 case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
355 case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM:
356 case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS:
357 case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM:
358 dev_dbg(dai->dev, "%s: PCM format.\n", __func__);
359
360 msp_config->data_size = MSP_DATA_BITS_16;
361 msp_config->protocol = MSP_PCM_PROTOCOL;
362
363 ret = setup_pcm_protdesc(dai, fmt, prot_desc);
364 if (ret < 0)
365 return ret;
366
367 ret = setup_pcm_multichan(dai, msp_config);
368 if (ret < 0)
369 return ret;
370
371 ret = setup_pcm_framing(dai, runtime->rate, prot_desc);
372 if (ret < 0)
373 return ret;
374
375 break;
376
377 default:
c3d7abca 378 dev_err(dai->dev, "%s: Error: Unsupported format (%d)!\n",
3592b7f6
OL		 379 __func__, fmt);
380 return -EINVAL;
381 }
382
383 return setup_clocking(dai, fmt, msp_config);
384}
385
386static int ux500_msp_dai_startup(struct snd_pcm_substream *substream,
387 struct snd_soc_dai *dai)
388{
389 int ret = 0;
390 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
391
392 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
393 snd_pcm_stream_str(substream));
394
395 /* Enable regulator */
396 ret = regulator_enable(drvdata->reg_vape);
397 if (ret != 0) {
398 dev_err(drvdata->msp->dev,
399 "%s: Failed to enable regulator!\n", __func__);
400 return ret;
401 }
402
f61ab093
UH		 403 /* Prepare and enable clocks */
404 dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__);
405 ret = clk_prepare_enable(drvdata->pclk);
406 if (ret) {
407 dev_err(drvdata->msp->dev,
408 "%s: Failed to prepare/enable pclk!\n", __func__);
409 goto err_pclk;
410 }
411
fe36a0b2 412 ret = clk_prepare_enable(drvdata->clk);
f61ab093
UH		 413 if (ret) {
414 dev_err(drvdata->msp->dev,
415 "%s: Failed to prepare/enable clk!\n", __func__);
416 goto err_clk;
417 }
3592b7f6 418
f61ab093
UH		 419 return ret;
420err_clk:
421 clk_disable_unprepare(drvdata->pclk);
422err_pclk:
423 regulator_disable(drvdata->reg_vape);
fe36a0b2 424 return ret;
3592b7f6
OL		 425}
426
427static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream,
428 struct snd_soc_dai *dai)
429{
430 int ret;
431 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
432 bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
433
434 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
435 snd_pcm_stream_str(substream));
436
437 if (drvdata->vape_opp_constraint == 1) {
438 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
439 "ux500_msp_i2s", 50);
440 drvdata->vape_opp_constraint = 0;
441 }
442
443 if (ux500_msp_i2s_close(drvdata->msp,
444 is_playback ? MSP_DIR_TX : MSP_DIR_RX)) {
445 dev_err(dai->dev,
446 "%s: Error: MSP %d (%s): Unable to close i2s.\n",
447 __func__, dai->id, snd_pcm_stream_str(substream));
448 }
449
f61ab093 450 /* Disable and unprepare clocks */
fe36a0b2 451 clk_disable_unprepare(drvdata->clk);
f61ab093 452 clk_disable_unprepare(drvdata->pclk);
3592b7f6
OL		 453
454 /* Disable regulator */
455 ret = regulator_disable(drvdata->reg_vape);
456 if (ret < 0)
457 dev_err(dai->dev,
458 "%s: ERROR: Failed to disable regulator (%d)!\n",
459 __func__, ret);
460}
461
462static int ux500_msp_dai_prepare(struct snd_pcm_substream *substream,
463 struct snd_soc_dai *dai)
464{
465 int ret = 0;
466 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
467 struct snd_pcm_runtime *runtime = substream->runtime;
468 struct ux500_msp_config msp_config;
469
470 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (rate = %d).\n", __func__,
471 dai->id, snd_pcm_stream_str(substream), runtime->rate);
472
473 setup_msp_config(substream, dai, &msp_config);
474
475 ret = ux500_msp_i2s_open(drvdata->msp, &msp_config);
476 if (ret < 0) {
477 dev_err(dai->dev, "%s: Error: msp_setup failed (ret = %d)!\n",
478 __func__, ret);
479 return ret;
480 }
481
482 /* Set OPP-level */
483 if ((drvdata->fmt & SND_SOC_DAIFMT_MASTER_MASK) &&
484 (drvdata->msp->f_bitclk > 19200000)) {
485 /* If the bit-clock is higher than 19.2MHz, Vape should be
8fcf1e5e
CG		 486 * run in 100% OPP. Only when bit-clock is used (MSP master)
487 */
3592b7f6
OL		 488 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
489 "ux500-msp-i2s", 100);
490 drvdata->vape_opp_constraint = 1;
491 } else {
492 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
493 "ux500-msp-i2s", 50);
494 drvdata->vape_opp_constraint = 0;
495 }
496
497 return ret;
498}
499
500static int ux500_msp_dai_hw_params(struct snd_pcm_substream *substream,
501 struct snd_pcm_hw_params *params,
502 struct snd_soc_dai *dai)
503{
504 unsigned int mask, slots_active;
505 struct snd_pcm_runtime *runtime = substream->runtime;
506 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
507
508 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n",
509 __func__, dai->id, snd_pcm_stream_str(substream));
510
511 switch (drvdata->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
512 case SND_SOC_DAIFMT_I2S:
513 snd_pcm_hw_constraint_minmax(runtime,
514 SNDRV_PCM_HW_PARAM_CHANNELS,
515 1, 2);
516 break;
517
518 case SND_SOC_DAIFMT_DSP_B:
519 case SND_SOC_DAIFMT_DSP_A:
520 mask = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
521 drvdata->tx_mask :
522 drvdata->rx_mask;
523
524 slots_active = hweight32(mask);
525 dev_dbg(dai->dev, "TDM-slots active: %d", slots_active);
526
1bf2d35b 527 snd_pcm_hw_constraint_single(runtime,
3592b7f6 528 SNDRV_PCM_HW_PARAM_CHANNELS,
1bf2d35b 529 slots_active);
3592b7f6
OL		 530 break;
531
532 default:
533 dev_err(dai->dev,
534 "%s: Error: Unsupported protocol (fmt = 0x%x)!\n",
535 __func__, drvdata->fmt);
536 return -EINVAL;
537 }
538
539 return 0;
540}
541
542static int ux500_msp_dai_set_dai_fmt(struct snd_soc_dai *dai,
543 unsigned int fmt)
544{
545 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
546
547 dev_dbg(dai->dev, "%s: MSP %d: Enter.\n", __func__, dai->id);
548
549 switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
550 SND_SOC_DAIFMT_MASTER_MASK)) {
551 case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS:
552 case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
553 case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS:
554 case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM:
555 case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
556 case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM:
557 break;
558
559 default:
560 dev_err(dai->dev,
561 "%s: Error: Unsupported protocol/master (fmt = 0x%x)!\n",
562 __func__, drvdata->fmt);
563 return -EINVAL;
564 }
565
566 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
567 case SND_SOC_DAIFMT_NB_NF:
568 case SND_SOC_DAIFMT_NB_IF:
569 case SND_SOC_DAIFMT_IB_IF:
570 break;
571
572 default:
573 dev_err(dai->dev,
574 "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
575 __func__, drvdata->fmt);
576 return -EINVAL;
577 }
578
579 drvdata->fmt = fmt;
580 return 0;
581}
582
583static int ux500_msp_dai_set_tdm_slot(struct snd_soc_dai *dai,
584 unsigned int tx_mask,
585 unsigned int rx_mask,
586 int slots, int slot_width)
587{
588 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
589 unsigned int cap;
590
591 switch (slots) {
592 case 1:
593 cap = 0x01;
594 break;
595 case 2:
596 cap = 0x03;
597 break;
598 case 8:
599 cap = 0xFF;
600 break;
601 case 16:
602 cap = 0xFFFF;
603 break;
604 default:
605 dev_err(dai->dev, "%s: Error: Unsupported slot-count (%d)!\n",
606 __func__, slots);
607 return -EINVAL;
608 }
609 drvdata->slots = slots;
610
611 if (!(slot_width == 16)) {
612 dev_err(dai->dev, "%s: Error: Unsupported slot-width (%d)!\n",
613 __func__, slot_width);
614 return -EINVAL;
615 }
616 drvdata->slot_width = slot_width;
617
618 drvdata->tx_mask = tx_mask & cap;
619 drvdata->rx_mask = rx_mask & cap;
620
621 return 0;
622}
623
624static int ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai *dai,
625 int clk_id, unsigned int freq, int dir)
626{
627 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
628
629 dev_dbg(dai->dev, "%s: MSP %d: Enter. clk-id: %d, freq: %u.\n",
630 __func__, dai->id, clk_id, freq);
631
632 switch (clk_id) {
633 case UX500_MSP_MASTER_CLOCK:
634 drvdata->master_clk = freq;
635 break;
636
637 default:
638 dev_err(dai->dev, "%s: MSP %d: Invalid clk-id (%d)!\n",
639 __func__, dai->id, clk_id);
640 return -EINVAL;
641 }
642
643 return 0;
644}
645
646static int ux500_msp_dai_trigger(struct snd_pcm_substream *substream,
647 int cmd, struct snd_soc_dai *dai)
648{
649 int ret = 0;
650 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
651
652 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (msp->id = %d, cmd = %d).\n",
653 __func__, dai->id, snd_pcm_stream_str(substream),
654 (int)drvdata->msp->id, cmd);
655
656 ret = ux500_msp_i2s_trigger(drvdata->msp, cmd, substream->stream);
657
658 return ret;
659}
660
f382acbe
LJ		 661static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai)
662{
663 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
664 struct snd_dmaengine_dai_dma_data *playback_dma_data;
665 struct snd_dmaengine_dai_dma_data *capture_dma_data;
666
667 playback_dma_data = devm_kzalloc(dai->dev,
668 sizeof(*playback_dma_data),
669 GFP_KERNEL);
670 if (!playback_dma_data)
671 return -ENOMEM;
672
673 capture_dma_data = devm_kzalloc(dai->dev,
674 sizeof(*capture_dma_data),
675 GFP_KERNEL);
676 if (!capture_dma_data)
677 return -ENOMEM;
678
679 playback_dma_data->addr = drvdata->msp->playback_dma_data.tx_rx_addr;
680 capture_dma_data->addr = drvdata->msp->capture_dma_data.tx_rx_addr;
681
682 playback_dma_data->maxburst = 4;
683 capture_dma_data->maxburst = 4;
684
685 snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data);
686
687 return 0;
688}
689
3592b7f6
OL		 690static int ux500_msp_dai_probe(struct snd_soc_dai *dai)
691{
692 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
f382acbe
LJ		 693 struct msp_i2s_platform_data *pdata = dai->dev->platform_data;
694 int ret;
3592b7f6 695
f382acbe
LJ		 696 if (!pdata) {
697 ret = ux500_msp_dai_of_probe(dai);
698 return ret;
699 }
3592b7f6 700
f3fe53dd
FB		 701 drvdata->msp->playback_dma_data.data_size = drvdata->slot_width;
702 drvdata->msp->capture_dma_data.data_size = drvdata->slot_width;
3592b7f6 703
f382acbe
LJ		 704 snd_soc_dai_init_dma_data(dai,
705 &drvdata->msp->playback_dma_data,
706 &drvdata->msp->capture_dma_data);
3592b7f6
OL		 707 return 0;
708}
709
710static struct snd_soc_dai_ops ux500_msp_dai_ops[] = {
711 {
712 .set_sysclk = ux500_msp_dai_set_dai_sysclk,
713 .set_fmt = ux500_msp_dai_set_dai_fmt,
714 .set_tdm_slot = ux500_msp_dai_set_tdm_slot,
715 .startup = ux500_msp_dai_startup,
716 .shutdown = ux500_msp_dai_shutdown,
717 .prepare = ux500_msp_dai_prepare,
718 .trigger = ux500_msp_dai_trigger,
719 .hw_params = ux500_msp_dai_hw_params,
720 }
721};
722
33899b19
LJ		 723static struct snd_soc_dai_driver ux500_msp_dai_drv = {
724 .probe = ux500_msp_dai_probe,
725 .suspend = NULL,
726 .resume = NULL,
727 .playback.channels_min = UX500_MSP_MIN_CHANNELS,
728 .playback.channels_max = UX500_MSP_MAX_CHANNELS,
729 .playback.rates = UX500_I2S_RATES,
730 .playback.formats = UX500_I2S_FORMATS,
731 .capture.channels_min = UX500_MSP_MIN_CHANNELS,
732 .capture.channels_max = UX500_MSP_MAX_CHANNELS,
733 .capture.rates = UX500_I2S_RATES,
734 .capture.formats = UX500_I2S_FORMATS,
735 .ops = ux500_msp_dai_ops,
3592b7f6
OL		 736};
737
42277bdd
KM		 738static const struct snd_soc_component_driver ux500_msp_component = {
739 .name = "ux500-msp",
740};
741
742
da794876 743static int ux500_msp_drv_probe(struct platform_device *pdev)
3592b7f6
OL		 744{
745 struct ux500_msp_i2s_drvdata *drvdata;
a61f9e31
LJ		 746 struct msp_i2s_platform_data *pdata = pdev->dev.platform_data;
747 struct device_node *np = pdev->dev.of_node;
3592b7f6
OL		 748 int ret = 0;
749
a61f9e31
LJ		 750 if (!pdata && !np) {
751 dev_err(&pdev->dev, "No platform data or Device Tree found\n");
752 return -ENODEV;
753 }
3592b7f6
OL		 754
755 drvdata = devm_kzalloc(&pdev->dev,
756 sizeof(struct ux500_msp_i2s_drvdata),
757 GFP_KERNEL);
0dcd4742
LJ		 758 if (!drvdata)
759 return -ENOMEM;
760
3592b7f6
OL		 761 drvdata->fmt = 0;
762 drvdata->slots = 1;
763 drvdata->tx_mask = 0x01;
764 drvdata->rx_mask = 0x01;
765 drvdata->slot_width = 16;
766 drvdata->master_clk = MSP_INPUT_FREQ_APB;
767
768 drvdata->reg_vape = devm_regulator_get(&pdev->dev, "v-ape");
769 if (IS_ERR(drvdata->reg_vape)) {
770 ret = (int)PTR_ERR(drvdata->reg_vape);
771 dev_err(&pdev->dev,
772 "%s: ERROR: Failed to get Vape supply (%d)!\n",
773 __func__, ret);
774 return ret;
775 }
776 prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50);
777
4313489c 778 drvdata->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
f61ab093
UH		 779 if (IS_ERR(drvdata->pclk)) {
780 ret = (int)PTR_ERR(drvdata->pclk);
4313489c
JL		 781 dev_err(&pdev->dev,
782 "%s: ERROR: devm_clk_get of pclk failed (%d)!\n",
f61ab093 783 __func__, ret);
4313489c 784 return ret;
f61ab093
UH		 785 }
786
4313489c 787 drvdata->clk = devm_clk_get(&pdev->dev, NULL);
3592b7f6
OL		 788 if (IS_ERR(drvdata->clk)) {
789 ret = (int)PTR_ERR(drvdata->clk);
4313489c
JL		 790 dev_err(&pdev->dev,
791 "%s: ERROR: devm_clk_get failed (%d)!\n",
3592b7f6 792 __func__, ret);
4313489c 793 return ret;
3592b7f6
OL		 794 }
795
796 ret = ux500_msp_i2s_init_msp(pdev, &drvdata->msp,
797 pdev->dev.platform_data);
798 if (!drvdata->msp) {
799 dev_err(&pdev->dev,
800 "%s: ERROR: Failed to init MSP-struct (%d)!",
801 __func__, ret);
4313489c 802 return ret;
3592b7f6
OL		 803 }
804 dev_set_drvdata(&pdev->dev, drvdata);
805
42277bdd 806 ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component,
33899b19 807 &ux500_msp_dai_drv, 1);
3592b7f6
OL		 808 if (ret < 0) {
809 dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n",
810 __func__, drvdata->msp->id);
4313489c 811 return ret;
3592b7f6
OL		 812 }
813
1428c20f
LJ		 814 ret = ux500_pcm_register_platform(pdev);
815 if (ret < 0) {
816 dev_err(&pdev->dev,
817 "Error: %s: Failed to register PCM platform device!\n",
818 __func__);
819 goto err_reg_plat;
820 }
821
3592b7f6
OL		 822 return 0;
823
1428c20f 824err_reg_plat:
42277bdd 825 snd_soc_unregister_component(&pdev->dev);
3592b7f6
OL		 826 return ret;
827}
828
da794876 829static int ux500_msp_drv_remove(struct platform_device *pdev)
3592b7f6
OL		 830{
831 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
832
1428c20f
LJ		 833 ux500_pcm_unregister_platform(pdev);
834
42277bdd 835 snd_soc_unregister_component(&pdev->dev);
3592b7f6 836
3592b7f6
OL		 837 prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s");
838
3592b7f6
OL		 839 ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp);
840
841 return 0;
842}
843
49731c23
LJ		 844static const struct of_device_id ux500_msp_i2s_match[] = {
845 { .compatible = "stericsson,ux500-msp-i2s", },
846 {},
847};
c81740e0 848MODULE_DEVICE_TABLE(of, ux500_msp_i2s_match);
49731c23 849
3592b7f6
OL		 850static struct platform_driver msp_i2s_driver = {
851 .driver = {
852 .name = "ux500-msp-i2s",
49731c23 853 .of_match_table = ux500_msp_i2s_match,
3592b7f6
OL		 854 },
855 .probe = ux500_msp_drv_probe,
856 .remove = ux500_msp_drv_remove,
857};
858module_platform_driver(msp_i2s_driver);
859
85f24391 860MODULE_LICENSE("GPL v2");
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