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ALSA: x86: Drop had_get_hwstate()
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5dab11d8
JA
1/*
2 * intel_hdmi_audio.c - Intel HDMI audio driver
3 *
4 * Copyright (C) 2016 Intel Corp
5 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
6 * Ramesh Babu K V <ramesh.babu@intel.com>
7 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
8 * Jerome Anand <jerome.anand@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 * ALSA driver for Intel HDMI audio
22 */
23
5dab11d8
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24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/slab.h>
27#include <linux/module.h>
da864809 28#include <linux/interrupt.h>
5dab11d8
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29#include <linux/acpi.h>
30#include <asm/cacheflush.h>
31#include <sound/pcm.h>
32#include <sound/core.h>
33#include <sound/pcm_params.h>
34#include <sound/initval.h>
35#include <sound/control.h>
36#include <sound/initval.h>
da864809 37#include <drm/intel_lpe_audio.h>
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38#include "intel_hdmi_audio.h"
39
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40/*standard module options for ALSA. This module supports only one card*/
41static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
42static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
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43
44module_param_named(index, hdmi_card_index, int, 0444);
45MODULE_PARM_DESC(index,
46 "Index value for INTEL Intel HDMI Audio controller.");
47module_param_named(id, hdmi_card_id, charp, 0444);
48MODULE_PARM_DESC(id,
49 "ID string for INTEL Intel HDMI Audio controller.");
50
51/*
52 * ELD SA bits in the CEA Speaker Allocation data block
53 */
54static int eld_speaker_allocation_bits[] = {
55 [0] = FL | FR,
56 [1] = LFE,
57 [2] = FC,
58 [3] = RL | RR,
59 [4] = RC,
60 [5] = FLC | FRC,
61 [6] = RLC | RRC,
62 /* the following are not defined in ELD yet */
63 [7] = 0,
64};
65
66/*
67 * This is an ordered list!
68 *
69 * The preceding ones have better chances to be selected by
70 * hdmi_channel_allocation().
71 */
72static struct cea_channel_speaker_allocation channel_allocations[] = {
73/* channel: 7 6 5 4 3 2 1 0 */
74{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
75 /* 2.1 */
76{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
77 /* Dolby Surround */
78{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
79 /* surround40 */
80{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
81 /* surround41 */
82{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
83 /* surround50 */
84{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
85 /* surround51 */
86{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
87 /* 6.1 */
88{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
89 /* surround71 */
90{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
91
92{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
93{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
94{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
95{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
96{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
97{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
98{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
99{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
100{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
101{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
102{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
103{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
104{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
105{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
106{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
107{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
108{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
109{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
110{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
111{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
112{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
113{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
114{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
115};
116
117static struct channel_map_table map_tables[] = {
118 { SNDRV_CHMAP_FL, 0x00, FL },
119 { SNDRV_CHMAP_FR, 0x01, FR },
120 { SNDRV_CHMAP_RL, 0x04, RL },
121 { SNDRV_CHMAP_RR, 0x05, RR },
122 { SNDRV_CHMAP_LFE, 0x02, LFE },
123 { SNDRV_CHMAP_FC, 0x03, FC },
124 { SNDRV_CHMAP_RLC, 0x06, RLC },
125 { SNDRV_CHMAP_RRC, 0x07, RRC },
126 {} /* terminator */
127};
128
129/* hardware capability structure */
130static const struct snd_pcm_hardware snd_intel_hadstream = {
131 .info = (SNDRV_PCM_INFO_INTERLEAVED |
132 SNDRV_PCM_INFO_DOUBLE |
133 SNDRV_PCM_INFO_MMAP|
134 SNDRV_PCM_INFO_MMAP_VALID |
135 SNDRV_PCM_INFO_BATCH),
136 .formats = (SNDRV_PCM_FMTBIT_S24 |
137 SNDRV_PCM_FMTBIT_U24),
138 .rates = SNDRV_PCM_RATE_32000 |
139 SNDRV_PCM_RATE_44100 |
140 SNDRV_PCM_RATE_48000 |
141 SNDRV_PCM_RATE_88200 |
142 SNDRV_PCM_RATE_96000 |
143 SNDRV_PCM_RATE_176400 |
144 SNDRV_PCM_RATE_192000,
145 .rate_min = HAD_MIN_RATE,
146 .rate_max = HAD_MAX_RATE,
147 .channels_min = HAD_MIN_CHANNEL,
148 .channels_max = HAD_MAX_CHANNEL,
149 .buffer_bytes_max = HAD_MAX_BUFFER,
150 .period_bytes_min = HAD_MIN_PERIOD_BYTES,
151 .period_bytes_max = HAD_MAX_PERIOD_BYTES,
152 .periods_min = HAD_MIN_PERIODS,
153 .periods_max = HAD_MAX_PERIODS,
154 .fifo_size = HAD_FIFO_SIZE,
155};
156
157/* Register access functions */
da864809
TI
158static inline void
159mid_hdmi_audio_read(struct snd_intelhad *ctx, u32 reg, u32 *val)
5dab11d8 160{
da864809 161 *val = ioread32(ctx->mmio_start + ctx->had_config_offset + reg);
5dab11d8
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162}
163
da864809
TI
164static inline void
165mid_hdmi_audio_write(struct snd_intelhad *ctx, u32 reg, u32 val)
5dab11d8 166{
da864809 167 iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg);
5dab11d8
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168}
169
372d855f
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170static int had_read_register(struct snd_intelhad *intelhaddata,
171 u32 offset, u32 *data)
5dab11d8 172{
79f439ea
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173 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
174 return -ENODEV;
5dab11d8 175
da864809
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176 mid_hdmi_audio_read(intelhaddata, offset, data);
177 return 0;
178}
179
180static void fixup_dp_config(struct snd_intelhad *intelhaddata,
181 u32 offset, u32 *data)
182{
183 if (intelhaddata->dp_output) {
184 if (offset == AUD_CONFIG && (*data & AUD_CONFIG_VALID_BIT))
185 *data |= AUD_CONFIG_DP_MODE | AUD_CONFIG_BLOCK_BIT;
186 }
5dab11d8
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187}
188
372d855f
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189static int had_write_register(struct snd_intelhad *intelhaddata,
190 u32 offset, u32 data)
5dab11d8 191{
79f439ea
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192 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
193 return -ENODEV;
5dab11d8 194
da864809
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195 fixup_dp_config(intelhaddata, offset, &data);
196 mid_hdmi_audio_write(intelhaddata, offset, data);
197 return 0;
5dab11d8
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198}
199
372d855f
TI
200static int had_read_modify(struct snd_intelhad *intelhaddata, u32 offset,
201 u32 data, u32 mask)
5dab11d8 202{
da864809 203 u32 val_tmp;
5dab11d8 204
79f439ea
TI
205 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
206 return -ENODEV;
5dab11d8 207
da864809
TI
208 mid_hdmi_audio_read(intelhaddata, offset, &val_tmp);
209 val_tmp &= ~mask;
210 val_tmp |= (data & mask);
211
212 fixup_dp_config(intelhaddata, offset, &val_tmp);
213 mid_hdmi_audio_write(intelhaddata, offset, val_tmp);
214 return 0;
5dab11d8 215}
da864809
TI
216
217/*
218 * function to read-modify AUD_CONFIG register on VLV2.
219 * The had_read_modify() function should not directly be used on VLV2 for
220 * updating AUD_CONFIG register.
5dab11d8
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221 * This is because:
222 * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2
223 * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always
224 * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the
225 * register. This field should be 1xy binary for configuration with 6 or
226 * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio)
227 * causes the "channels" field to be updated as 0xy binary resulting in
228 * bad audio. The fix is to always write the AUD_CONFIG[6:4] with
229 * appropriate value when doing read-modify of AUD_CONFIG register.
230 *
231 * @substream: the current substream or NULL if no active substream
232 * @data : data to be written
233 * @mask : mask
234 *
235 */
da864809 236static int had_read_modify_aud_config_v2(struct snd_intelhad *intelhaddata,
5dab11d8
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237 u32 data, u32 mask)
238{
da864809 239 struct snd_pcm_substream *substream;
5dab11d8
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240 union aud_cfg cfg_val = {.cfg_regval = 0};
241 u8 channels;
242
243 /*
244 * If substream is NULL, there is no active stream.
245 * In this case just set channels to 2
246 */
da864809
TI
247 substream = intelhaddata->stream_info.had_substream;
248 if (substream && substream->runtime)
5dab11d8
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249 channels = substream->runtime->channels;
250 else
251 channels = 2;
252 cfg_val.cfg_regx_v2.num_ch = channels - 2;
253
254 data = data | cfg_val.cfg_regval;
255 mask = mask | AUD_CONFIG_CH_MASK_V2;
256
c75b0476
TI
257 dev_dbg(intelhaddata->dev, "%s : data = %x, mask =%x\n",
258 __func__, data, mask);
5dab11d8 259
79dda75a 260 return had_read_modify(intelhaddata, AUD_CONFIG, data, mask);
5dab11d8
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261}
262
372d855f 263static void snd_intelhad_enable_audio_int(struct snd_intelhad *ctx, bool enable)
da864809
TI
264{
265 u32 status_reg;
266
267 if (enable) {
268 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS_v2, &status_reg);
269 status_reg |= HDMI_AUDIO_BUFFER_DONE | HDMI_AUDIO_UNDERRUN;
270 mid_hdmi_audio_write(ctx, AUD_HDMI_STATUS_v2, status_reg);
271 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS_v2, &status_reg);
272 }
273}
274
372d855f
TI
275static void snd_intelhad_enable_audio(struct snd_intelhad *intelhaddata,
276 bool enable)
5dab11d8 277{
da864809
TI
278 had_read_modify_aud_config_v2(intelhaddata, enable ? BIT(0) : 0,
279 BIT(0));
5dab11d8
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280}
281
79dda75a
TI
282static void snd_intelhad_reset_audio(struct snd_intelhad *intelhaddata,
283 u8 reset)
5dab11d8 284{
79dda75a 285 had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, reset);
5dab11d8
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286}
287
288/**
289 * initialize audio channel status registers
290 * This function is called in the prepare callback
291 */
292static int had_prog_status_reg(struct snd_pcm_substream *substream,
293 struct snd_intelhad *intelhaddata)
294{
295 union aud_cfg cfg_val = {.cfg_regval = 0};
296 union aud_ch_status_0 ch_stat0 = {.status_0_regval = 0};
297 union aud_ch_status_1 ch_stat1 = {.status_1_regval = 0};
298 int format;
299
5dab11d8
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300 ch_stat0.status_0_regx.lpcm_id = (intelhaddata->aes_bits &
301 IEC958_AES0_NONAUDIO)>>1;
302 ch_stat0.status_0_regx.clk_acc = (intelhaddata->aes_bits &
303 IEC958_AES3_CON_CLOCK)>>4;
4812dcc4 304 cfg_val.cfg_regx_v2.val_bit = ch_stat0.status_0_regx.lpcm_id;
5dab11d8
JA
305
306 switch (substream->runtime->rate) {
307 case AUD_SAMPLE_RATE_32:
308 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_32KHZ;
309 break;
310
311 case AUD_SAMPLE_RATE_44_1:
312 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_44KHZ;
313 break;
314 case AUD_SAMPLE_RATE_48:
315 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_48KHZ;
316 break;
317 case AUD_SAMPLE_RATE_88_2:
318 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_88KHZ;
319 break;
320 case AUD_SAMPLE_RATE_96:
321 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_96KHZ;
322 break;
323 case AUD_SAMPLE_RATE_176_4:
324 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_176KHZ;
325 break;
326 case AUD_SAMPLE_RATE_192:
327 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_192KHZ;
328 break;
329
330 default:
331 /* control should never come here */
332 return -EINVAL;
333 break;
334
335 }
79dda75a
TI
336 had_write_register(intelhaddata,
337 AUD_CH_STATUS_0, ch_stat0.status_0_regval);
5dab11d8
JA
338
339 format = substream->runtime->format;
340
341 if (format == SNDRV_PCM_FORMAT_S16_LE) {
342 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_20;
343 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_16BITS;
344 } else if (format == SNDRV_PCM_FORMAT_S24_LE) {
345 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_24;
346 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_24BITS;
347 } else {
348 ch_stat1.status_1_regx.max_wrd_len = 0;
349 ch_stat1.status_1_regx.wrd_len = 0;
350 }
79dda75a
TI
351 had_write_register(intelhaddata,
352 AUD_CH_STATUS_1, ch_stat1.status_1_regval);
5dab11d8
JA
353 return 0;
354}
355
76296ef0 356/*
5dab11d8
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357 * function to initialize audio
358 * registers and buffer confgiuration registers
359 * This function is called in the prepare callback
360 */
76296ef0
TI
361static int snd_intelhad_audio_ctrl(struct snd_pcm_substream *substream,
362 struct snd_intelhad *intelhaddata)
5dab11d8
JA
363{
364 union aud_cfg cfg_val = {.cfg_regval = 0};
365 union aud_buf_config buf_cfg = {.buf_cfgval = 0};
366 u8 channels;
367
368 had_prog_status_reg(substream, intelhaddata);
369
370 buf_cfg.buf_cfg_regx_v2.audio_fifo_watermark = FIFO_THRESHOLD;
371 buf_cfg.buf_cfg_regx_v2.dma_fifo_watermark = DMA_FIFO_THRESHOLD;
372 buf_cfg.buf_cfg_regx_v2.aud_delay = 0;
79dda75a 373 had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.buf_cfgval);
5dab11d8
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374
375 channels = substream->runtime->channels;
376 cfg_val.cfg_regx_v2.num_ch = channels - 2;
377 if (channels <= 2)
378 cfg_val.cfg_regx_v2.layout = LAYOUT0;
379 else
380 cfg_val.cfg_regx_v2.layout = LAYOUT1;
381
964ca808 382 cfg_val.cfg_regx_v2.val_bit = 1;
79dda75a 383 had_write_register(intelhaddata, AUD_CONFIG, cfg_val.cfg_regval);
5dab11d8
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384 return 0;
385}
386
5dab11d8
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387/*
388 * Compute derived values in channel_allocations[].
389 */
390static void init_channel_allocations(void)
391{
392 int i, j;
393 struct cea_channel_speaker_allocation *p;
394
5dab11d8
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395 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
396 p = channel_allocations + i;
397 p->channels = 0;
398 p->spk_mask = 0;
399 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
400 if (p->speakers[j]) {
401 p->channels++;
402 p->spk_mask |= p->speakers[j];
403 }
404 }
405}
406
407/*
408 * The transformation takes two steps:
409 *
410 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
411 * spk_mask => (channel_allocations[]) => ai->CA
412 *
413 * TODO: it could select the wrong CA from multiple candidates.
414 */
415static int snd_intelhad_channel_allocation(struct snd_intelhad *intelhaddata,
416 int channels)
417{
418 int i;
419 int ca = 0;
420 int spk_mask = 0;
421
422 /*
423 * CA defaults to 0 for basic stereo audio
424 */
425 if (channels <= 2)
426 return 0;
427
428 /*
429 * expand ELD's speaker allocation mask
430 *
431 * ELD tells the speaker mask in a compact(paired) form,
432 * expand ELD's notions to match the ones used by Audio InfoFrame.
433 */
434
435 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
da864809 436 if (intelhaddata->eld.speaker_allocation_block & (1 << i))
5dab11d8
JA
437 spk_mask |= eld_speaker_allocation_bits[i];
438 }
439
440 /* search for the first working match in the CA table */
441 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
442 if (channels == channel_allocations[i].channels &&
443 (spk_mask & channel_allocations[i].spk_mask) ==
444 channel_allocations[i].spk_mask) {
445 ca = channel_allocations[i].ca_index;
446 break;
447 }
448 }
449
c75b0476 450 dev_dbg(intelhaddata->dev, "select CA 0x%x for %d\n", ca, channels);
5dab11d8
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451
452 return ca;
453}
454
455/* from speaker bit mask to ALSA API channel position */
456static int spk_to_chmap(int spk)
457{
458 struct channel_map_table *t = map_tables;
459
460 for (; t->map; t++) {
461 if (t->spk_mask == spk)
462 return t->map;
463 }
464 return 0;
465}
466
372d855f 467static void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata)
5dab11d8
JA
468{
469 int i = 0, c = 0;
470 int spk_mask = 0;
471 struct snd_pcm_chmap_elem *chmap;
472 u8 eld_high, eld_high_mask = 0xF0;
473 u8 high_msb;
474
475 chmap = kzalloc(sizeof(*chmap), GFP_KERNEL);
476 if (chmap == NULL) {
477 intelhaddata->chmap->chmap = NULL;
478 return;
479 }
480
c75b0476 481 dev_dbg(intelhaddata->dev, "eld.speaker_allocation_block = %x\n",
da864809 482 intelhaddata->eld.speaker_allocation_block);
5dab11d8
JA
483
484 /* WA: Fix the max channel supported to 8 */
485
486 /*
487 * Sink may support more than 8 channels, if eld_high has more than
488 * one bit set. SOC supports max 8 channels.
489 * Refer eld_speaker_allocation_bits, for sink speaker allocation
490 */
491
492 /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */
da864809 493 eld_high = intelhaddata->eld.speaker_allocation_block & eld_high_mask;
5dab11d8
JA
494 if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) {
495 /* eld_high & (eld_high-1): if more than 1 bit set */
496 /* 0x1F: 7 channels */
497 for (i = 1; i < 4; i++) {
498 high_msb = eld_high & (0x80 >> i);
499 if (high_msb) {
da864809 500 intelhaddata->eld.speaker_allocation_block &=
5dab11d8
JA
501 high_msb | 0xF;
502 break;
503 }
504 }
505 }
506
507 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
da864809 508 if (intelhaddata->eld.speaker_allocation_block & (1 << i))
5dab11d8
JA
509 spk_mask |= eld_speaker_allocation_bits[i];
510 }
511
512 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
513 if (spk_mask == channel_allocations[i].spk_mask) {
514 for (c = 0; c < channel_allocations[i].channels; c++) {
515 chmap->map[c] = spk_to_chmap(
516 channel_allocations[i].speakers[
517 (MAX_SPEAKERS - 1)-c]);
518 }
519 chmap->channels = channel_allocations[i].channels;
520 intelhaddata->chmap->chmap = chmap;
521 break;
522 }
523 }
524 if (i >= ARRAY_SIZE(channel_allocations)) {
525 intelhaddata->chmap->chmap = NULL;
526 kfree(chmap);
527 }
528}
529
530/*
531 * ALSA API channel-map control callbacks
532 */
533static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol,
534 struct snd_ctl_elem_info *uinfo)
535{
536 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
537 struct snd_intelhad *intelhaddata = info->private_data;
538
539 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
540 return -ENODEV;
541 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
542 uinfo->count = HAD_MAX_CHANNEL;
543 uinfo->value.integer.min = 0;
544 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
545 return 0;
546}
547
548static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol,
549 struct snd_ctl_elem_value *ucontrol)
550{
551 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
552 struct snd_intelhad *intelhaddata = info->private_data;
553 int i = 0;
554 const struct snd_pcm_chmap_elem *chmap;
555
556 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
557 return -ENODEV;
558 if (intelhaddata->chmap->chmap == NULL)
559 return -ENODATA;
560 chmap = intelhaddata->chmap->chmap;
c75b0476 561 for (i = 0; i < chmap->channels; i++)
5dab11d8 562 ucontrol->value.integer.value[i] = chmap->map[i];
5dab11d8
JA
563
564 return 0;
565}
566
567static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata,
568 struct snd_pcm *pcm)
569{
570 int err = 0;
571
572 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
573 NULL, 0, (unsigned long)intelhaddata,
574 &intelhaddata->chmap);
575 if (err < 0)
576 return err;
577
578 intelhaddata->chmap->private_data = intelhaddata;
e9d65abf
TI
579 intelhaddata->chmap->kctl->info = had_chmap_ctl_info;
580 intelhaddata->chmap->kctl->get = had_chmap_ctl_get;
5dab11d8
JA
581 intelhaddata->chmap->chmap = NULL;
582 return 0;
583}
584
76296ef0
TI
585/*
586 * snd_intelhad_prog_dip - to initialize Data Island Packets registers
5dab11d8
JA
587 *
588 * @substream:substream for which the prepare function is called
589 * @intelhaddata:substream private data
590 *
591 * This function is called in the prepare callback
592 */
76296ef0
TI
593static void snd_intelhad_prog_dip(struct snd_pcm_substream *substream,
594 struct snd_intelhad *intelhaddata)
5dab11d8
JA
595{
596 int i;
597 union aud_ctrl_st ctrl_state = {.ctrl_val = 0};
598 union aud_info_frame2 frame2 = {.fr2_val = 0};
599 union aud_info_frame3 frame3 = {.fr3_val = 0};
600 u8 checksum = 0;
964ca808 601 u32 info_frame;
5dab11d8
JA
602 int channels;
603
604 channels = substream->runtime->channels;
605
79dda75a 606 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val);
5dab11d8 607
964ca808
PLB
608 if (intelhaddata->dp_output) {
609 info_frame = DP_INFO_FRAME_WORD1;
610 frame2.fr2_val = 1;
611 } else {
612 info_frame = HDMI_INFO_FRAME_WORD1;
613 frame2.fr2_regx.chnl_cnt = substream->runtime->channels - 1;
5dab11d8 614
964ca808
PLB
615 frame3.fr3_regx.chnl_alloc = snd_intelhad_channel_allocation(
616 intelhaddata, channels);
5dab11d8 617
964ca808
PLB
618 /*Calculte the byte wide checksum for all valid DIP words*/
619 for (i = 0; i < BYTES_PER_WORD; i++)
620 checksum += (info_frame >> i*BITS_PER_BYTE) & MASK_BYTE0;
621 for (i = 0; i < BYTES_PER_WORD; i++)
622 checksum += (frame2.fr2_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
623 for (i = 0; i < BYTES_PER_WORD; i++)
624 checksum += (frame3.fr3_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
5dab11d8 625
964ca808
PLB
626 frame2.fr2_regx.chksum = -(checksum);
627 }
5dab11d8 628
79dda75a
TI
629 had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, info_frame);
630 had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, frame2.fr2_val);
631 had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, frame3.fr3_val);
5dab11d8
JA
632
633 /* program remaining DIP words with zero */
634 for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
79dda75a 635 had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, 0x0);
5dab11d8
JA
636
637 ctrl_state.ctrl_regx.dip_freq = 1;
638 ctrl_state.ctrl_regx.dip_en_sta = 1;
79dda75a 639 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val);
5dab11d8
JA
640}
641
642/**
643 * snd_intelhad_prog_buffer - programs buffer
644 * address and length registers
645 *
646 * @substream:substream for which the prepare function is called
647 * @intelhaddata:substream private data
648 *
649 * This function programs ring buffer address and length into registers.
650 */
372d855f 651static int snd_intelhad_prog_buffer(struct snd_intelhad *intelhaddata,
5dab11d8
JA
652 int start, int end)
653{
654 u32 ring_buf_addr, ring_buf_size, period_bytes;
655 u8 i, num_periods;
656 struct snd_pcm_substream *substream;
657
658 substream = intelhaddata->stream_info.had_substream;
c75b0476 659 if (WARN_ON(!substream))
5dab11d8 660 return 0;
5dab11d8
JA
661
662 ring_buf_addr = substream->runtime->dma_addr;
663 ring_buf_size = snd_pcm_lib_buffer_bytes(substream);
664 intelhaddata->stream_info.ring_buf_size = ring_buf_size;
665 period_bytes = frames_to_bytes(substream->runtime,
666 substream->runtime->period_size);
667 num_periods = substream->runtime->periods;
668
669 /*
670 * buffer addr should be 64 byte aligned, period bytes
671 * will be used to calculate addr offset
672 */
673 period_bytes &= ~0x3F;
674
675 /* Hardware supports MAX_PERIODS buffers */
676 if (end >= HAD_MAX_PERIODS)
677 return -EINVAL;
678
679 for (i = start; i <= end; i++) {
680 /* Program the buf registers with addr and len */
681 intelhaddata->buf_info[i].buf_addr = ring_buf_addr +
682 (i * period_bytes);
683 if (i < num_periods-1)
684 intelhaddata->buf_info[i].buf_size = period_bytes;
685 else
686 intelhaddata->buf_info[i].buf_size = ring_buf_size -
687 (period_bytes*i);
688
79dda75a
TI
689 had_write_register(intelhaddata,
690 AUD_BUF_A_ADDR + (i * HAD_REG_WIDTH),
5dab11d8
JA
691 intelhaddata->buf_info[i].buf_addr |
692 BIT(0) | BIT(1));
79dda75a
TI
693 had_write_register(intelhaddata,
694 AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
5dab11d8
JA
695 period_bytes);
696 intelhaddata->buf_info[i].is_valid = true;
697 }
c75b0476
TI
698 dev_dbg(intelhaddata->dev, "%s:buf[%d-%d] addr=%#x and size=%d\n",
699 __func__, start, end,
700 intelhaddata->buf_info[start].buf_addr,
701 intelhaddata->buf_info[start].buf_size);
5dab11d8
JA
702 intelhaddata->valid_buf_cnt = num_periods;
703 return 0;
704}
705
372d855f 706static int snd_intelhad_read_len(struct snd_intelhad *intelhaddata)
5dab11d8
JA
707{
708 int i, retval = 0;
709 u32 len[4];
710
711 for (i = 0; i < 4 ; i++) {
79dda75a
TI
712 had_read_register(intelhaddata,
713 AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
714 &len[i]);
5dab11d8
JA
715 if (!len[i])
716 retval++;
717 }
718 if (retval != 1) {
719 for (i = 0; i < 4 ; i++)
c75b0476
TI
720 dev_dbg(intelhaddata->dev, "buf[%d] size=%d\n",
721 i, len[i]);
5dab11d8
JA
722 }
723
724 return retval;
725}
726
964ca808
PLB
727static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate)
728{
729 u32 maud_val;
730
731 /* Select maud according to DP 1.2 spec*/
732 if (link_rate == DP_2_7_GHZ) {
733 switch (aud_samp_freq) {
734 case AUD_SAMPLE_RATE_32:
735 maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL;
736 break;
737
738 case AUD_SAMPLE_RATE_44_1:
739 maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL;
740 break;
741
742 case AUD_SAMPLE_RATE_48:
743 maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL;
744 break;
745
746 case AUD_SAMPLE_RATE_88_2:
747 maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL;
748 break;
749
750 case AUD_SAMPLE_RATE_96:
751 maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL;
752 break;
753
754 case AUD_SAMPLE_RATE_176_4:
755 maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL;
756 break;
757
758 case HAD_MAX_RATE:
759 maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL;
760 break;
761
762 default:
763 maud_val = -EINVAL;
764 break;
765 }
766 } else if (link_rate == DP_1_62_GHZ) {
767 switch (aud_samp_freq) {
768 case AUD_SAMPLE_RATE_32:
769 maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL;
770 break;
771
772 case AUD_SAMPLE_RATE_44_1:
773 maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL;
774 break;
775
776 case AUD_SAMPLE_RATE_48:
777 maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL;
778 break;
779
780 case AUD_SAMPLE_RATE_88_2:
781 maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL;
782 break;
783
784 case AUD_SAMPLE_RATE_96:
785 maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL;
786 break;
787
788 case AUD_SAMPLE_RATE_176_4:
789 maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL;
790 break;
791
792 case HAD_MAX_RATE:
793 maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL;
794 break;
795
796 default:
797 maud_val = -EINVAL;
798 break;
799 }
800 } else
801 maud_val = -EINVAL;
802
803 return maud_val;
804}
805
76296ef0
TI
806/*
807 * snd_intelhad_prog_cts - Program HDMI audio CTS value
5dab11d8
JA
808 *
809 * @aud_samp_freq: sampling frequency of audio data
810 * @tmds: sampling frequency of the display data
811 * @n_param: N value, depends on aud_samp_freq
812 * @intelhaddata:substream private data
813 *
814 * Program CTS register based on the audio and display sampling frequency
815 */
76296ef0
TI
816static void snd_intelhad_prog_cts(u32 aud_samp_freq, u32 tmds,
817 u32 link_rate, u32 n_param,
818 struct snd_intelhad *intelhaddata)
5dab11d8
JA
819{
820 u32 cts_val;
821 u64 dividend, divisor;
822
964ca808
PLB
823 if (intelhaddata->dp_output) {
824 /* Substitute cts_val with Maud according to DP 1.2 spec*/
825 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate);
826 } else {
827 /* Calculate CTS according to HDMI 1.3a spec*/
828 dividend = (u64)tmds * n_param*1000;
829 divisor = 128 * aud_samp_freq;
830 cts_val = div64_u64(dividend, divisor);
831 }
c75b0476 832 dev_dbg(intelhaddata->dev, "TMDS value=%d, N value=%d, CTS Value=%d\n",
964ca808 833 tmds, n_param, cts_val);
79dda75a 834 had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val));
5dab11d8
JA
835}
836
837static int had_calculate_n_value(u32 aud_samp_freq)
838{
839 s32 n_val;
840
841 /* Select N according to HDMI 1.3a spec*/
842 switch (aud_samp_freq) {
843 case AUD_SAMPLE_RATE_32:
844 n_val = 4096;
845 break;
846
847 case AUD_SAMPLE_RATE_44_1:
848 n_val = 6272;
849 break;
850
851 case AUD_SAMPLE_RATE_48:
852 n_val = 6144;
853 break;
854
855 case AUD_SAMPLE_RATE_88_2:
856 n_val = 12544;
857 break;
858
859 case AUD_SAMPLE_RATE_96:
860 n_val = 12288;
861 break;
862
863 case AUD_SAMPLE_RATE_176_4:
864 n_val = 25088;
865 break;
866
867 case HAD_MAX_RATE:
868 n_val = 24576;
869 break;
870
871 default:
872 n_val = -EINVAL;
873 break;
874 }
875 return n_val;
876}
877
76296ef0
TI
878/*
879 * snd_intelhad_prog_n - Program HDMI audio N value
5dab11d8
JA
880 *
881 * @aud_samp_freq: sampling frequency of audio data
882 * @n_param: N value, depends on aud_samp_freq
883 * @intelhaddata:substream private data
884 *
885 * This function is called in the prepare callback.
886 * It programs based on the audio and display sampling frequency
887 */
76296ef0
TI
888static int snd_intelhad_prog_n(u32 aud_samp_freq, u32 *n_param,
889 struct snd_intelhad *intelhaddata)
5dab11d8
JA
890{
891 s32 n_val;
892
964ca808
PLB
893 if (intelhaddata->dp_output) {
894 /*
895 * According to DP specs, Maud and Naud values hold
896 * a relationship, which is stated as:
897 * Maud/Naud = 512 * fs / f_LS_Clk
898 * where, fs is the sampling frequency of the audio stream
899 * and Naud is 32768 for Async clock.
900 */
901
902 n_val = DP_NAUD_VAL;
903 } else
904 n_val = had_calculate_n_value(aud_samp_freq);
5dab11d8
JA
905
906 if (n_val < 0)
907 return n_val;
908
79dda75a 909 had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val));
5dab11d8
JA
910 *n_param = n_val;
911 return 0;
912}
913
372d855f 914static void snd_intelhad_handle_underrun(struct snd_intelhad *intelhaddata)
5dab11d8 915{
79f439ea 916 u32 hdmi_status = 0, i = 0;
5dab11d8
JA
917
918 /* Handle Underrun interrupt within Audio Unit */
79dda75a 919 had_write_register(intelhaddata, AUD_CONFIG, 0);
5dab11d8 920 /* Reset buffer pointers */
79dda75a
TI
921 had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, 1);
922 had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, 0);
5dab11d8
JA
923 /**
924 * The interrupt status 'sticky' bits might not be cleared by
925 * setting '1' to that bit once...
926 */
927 do { /* clear bit30, 31 AUD_HDMI_STATUS */
79dda75a
TI
928 had_read_register(intelhaddata, AUD_HDMI_STATUS_v2,
929 &hdmi_status);
c75b0476 930 dev_dbg(intelhaddata->dev, "HDMI status =0x%x\n", hdmi_status);
5dab11d8
JA
931 if (hdmi_status & AUD_CONFIG_MASK_UNDERRUN) {
932 i++;
79dda75a
TI
933 had_write_register(intelhaddata,
934 AUD_HDMI_STATUS_v2, hdmi_status);
5dab11d8
JA
935 } else
936 break;
937 } while (i < MAX_CNT);
938 if (i >= MAX_CNT)
c75b0476 939 dev_err(intelhaddata->dev, "Unable to clear UNDERRUN bits\n");
5dab11d8
JA
940}
941
942/**
943 * snd_intelhad_open - stream initializations are done here
944 * @substream:substream for which the stream function is called
945 *
946 * This function is called whenever a PCM stream is opened
947 */
948static int snd_intelhad_open(struct snd_pcm_substream *substream)
949{
950 struct snd_intelhad *intelhaddata;
951 struct snd_pcm_runtime *runtime;
952 struct had_stream_pvt *stream;
5647aec2 953 struct had_stream_data *had_stream;
5dab11d8
JA
954 int retval;
955
5dab11d8 956 intelhaddata = snd_pcm_substream_chip(substream);
5647aec2 957 had_stream = &intelhaddata->stream_data;
5dab11d8 958 runtime = substream->runtime;
6ddb3ab6 959 intelhaddata->underrun_count = 0;
5dab11d8
JA
960
961 pm_runtime_get(intelhaddata->dev);
962
79f439ea 963 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
c75b0476
TI
964 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
965 __func__);
5dab11d8
JA
966 retval = -ENODEV;
967 goto exit_put_handle;
968 }
969
970 /* Check, if device already in use */
971 if (runtime->private_data) {
c75b0476 972 dev_dbg(intelhaddata->dev, "Device already in use\n");
5dab11d8
JA
973 retval = -EBUSY;
974 goto exit_put_handle;
975 }
976
977 /* set the runtime hw parameter with local snd_pcm_hardware struct */
978 runtime->hw = snd_intel_hadstream;
979
980 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
981 if (!stream) {
982 retval = -ENOMEM;
983 goto exit_put_handle;
984 }
985 stream->stream_status = STREAM_INIT;
986 runtime->private_data = stream;
987
988 retval = snd_pcm_hw_constraint_integer(runtime,
989 SNDRV_PCM_HW_PARAM_PERIODS);
990 if (retval < 0)
991 goto exit_err;
992
993 /* Make sure, that the period size is always aligned
994 * 64byte boundary
995 */
996 retval = snd_pcm_hw_constraint_step(substream->runtime, 0,
997 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
998 if (retval < 0) {
c75b0476
TI
999 dev_dbg(intelhaddata->dev, "%s:step_size=64 failed,err=%d\n",
1000 __func__, retval);
5dab11d8
JA
1001 goto exit_err;
1002 }
1003
1004 return retval;
1005exit_err:
1006 kfree(stream);
1007exit_put_handle:
1008 pm_runtime_put(intelhaddata->dev);
1009 runtime->private_data = NULL;
1010 return retval;
1011}
1012
df76df12 1013/*
5dab11d8 1014 * had_period_elapsed - updates the hardware pointer status
df76df12 1015 * @had_substream: substream for which the stream function is called
5dab11d8 1016 */
df76df12 1017static void had_period_elapsed(struct snd_pcm_substream *substream)
5dab11d8 1018{
5dab11d8
JA
1019 struct had_stream_pvt *stream;
1020
5dab11d8
JA
1021 if (!substream || !substream->runtime)
1022 return;
1023 stream = substream->runtime->private_data;
1024 if (!stream)
1025 return;
1026
1027 if (stream->stream_status != STREAM_RUNNING)
1028 return;
1029 snd_pcm_period_elapsed(substream);
1030}
1031
1032/**
1033 * snd_intelhad_init_stream - internal function to initialize stream info
1034 * @substream:substream for which the stream function is called
1035 *
1036 */
1037static int snd_intelhad_init_stream(struct snd_pcm_substream *substream)
1038{
1039 struct snd_intelhad *intelhaddata = snd_pcm_substream_chip(substream);
1040
5dab11d8
JA
1041 intelhaddata->stream_info.had_substream = substream;
1042 intelhaddata->stream_info.buffer_ptr = 0;
1043 intelhaddata->stream_info.buffer_rendered = 0;
1044 intelhaddata->stream_info.sfreq = substream->runtime->rate;
1045 return 0;
1046}
1047
1048/**
1049 * snd_intelhad_close- to free parameteres when stream is stopped
1050 *
1051 * @substream: substream for which the function is called
1052 *
1053 * This function is called by ALSA framework when stream is stopped
1054 */
1055static int snd_intelhad_close(struct snd_pcm_substream *substream)
1056{
1057 struct snd_intelhad *intelhaddata;
1058 struct snd_pcm_runtime *runtime;
1059
5dab11d8
JA
1060 intelhaddata = snd_pcm_substream_chip(substream);
1061 runtime = substream->runtime;
1062
c75b0476 1063 if (WARN_ON(!runtime->private_data))
5dab11d8 1064 return 0;
5dab11d8
JA
1065
1066 intelhaddata->stream_info.buffer_rendered = 0;
1067 intelhaddata->stream_info.buffer_ptr = 0;
1068 intelhaddata->stream_info.str_id = 0;
1069 intelhaddata->stream_info.had_substream = NULL;
1070
1071 /* Check if following drv_status modification is required - VA */
1072 if (intelhaddata->drv_status != HAD_DRV_DISCONNECTED) {
1073 intelhaddata->drv_status = HAD_DRV_CONNECTED;
c75b0476
TI
1074 dev_dbg(intelhaddata->dev,
1075 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
5dab11d8
JA
1076 __func__, __LINE__);
1077 }
1078 kfree(runtime->private_data);
1079 runtime->private_data = NULL;
1080 pm_runtime_put(intelhaddata->dev);
1081 return 0;
1082}
1083
1084/**
1085 * snd_intelhad_hw_params- to setup the hardware parameters
1086 * like allocating the buffers
1087 *
1088 * @substream: substream for which the function is called
1089 * @hw_params: hardware parameters
1090 *
1091 * This function is called by ALSA framework when hardware params are set
1092 */
1093static int snd_intelhad_hw_params(struct snd_pcm_substream *substream,
1094 struct snd_pcm_hw_params *hw_params)
1095{
c75b0476 1096 struct snd_intelhad *intelhaddata;
5dab11d8
JA
1097 unsigned long addr;
1098 int pages, buf_size, retval;
1099
5dab11d8
JA
1100 if (!hw_params)
1101 return -EINVAL;
1102
c75b0476 1103 intelhaddata = snd_pcm_substream_chip(substream);
5dab11d8
JA
1104 buf_size = params_buffer_bytes(hw_params);
1105 retval = snd_pcm_lib_malloc_pages(substream, buf_size);
1106 if (retval < 0)
1107 return retval;
c75b0476
TI
1108 dev_dbg(intelhaddata->dev, "%s:allocated memory = %d\n",
1109 __func__, buf_size);
5dab11d8
JA
1110 /* mark the pages as uncached region */
1111 addr = (unsigned long) substream->runtime->dma_area;
1112 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE;
1113 retval = set_memory_uc(addr, pages);
1114 if (retval) {
c75b0476
TI
1115 dev_err(intelhaddata->dev, "set_memory_uc failed.Error:%d\n",
1116 retval);
5dab11d8
JA
1117 return retval;
1118 }
1119 memset(substream->runtime->dma_area, 0, buf_size);
1120
1121 return retval;
1122}
1123
1124/**
1125 * snd_intelhad_hw_free- to release the resources allocated during
1126 * hardware params setup
1127 *
1128 * @substream: substream for which the function is called
1129 *
1130 * This function is called by ALSA framework before close callback.
1131 *
1132 */
1133static int snd_intelhad_hw_free(struct snd_pcm_substream *substream)
1134{
1135 unsigned long addr;
1136 u32 pages;
1137
5dab11d8
JA
1138 /* mark back the pages as cached/writeback region before the free */
1139 if (substream->runtime->dma_area != NULL) {
1140 addr = (unsigned long) substream->runtime->dma_area;
1141 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) /
1142 PAGE_SIZE;
1143 set_memory_wb(addr, pages);
1144 return snd_pcm_lib_free_pages(substream);
1145 }
1146 return 0;
1147}
1148
1149/**
1150 * snd_intelhad_pcm_trigger - stream activities are handled here
1151 * @substream:substream for which the stream function is called
1152 * @cmd:the stream commamd thats requested from upper layer
1153 * This function is called whenever an a stream activity is invoked
1154 */
1155static int snd_intelhad_pcm_trigger(struct snd_pcm_substream *substream,
1156 int cmd)
1157{
da864809 1158 int retval = 0;
5dab11d8
JA
1159 unsigned long flag_irq;
1160 struct snd_intelhad *intelhaddata;
1161 struct had_stream_pvt *stream;
5647aec2 1162 struct had_stream_data *had_stream;
5dab11d8 1163
5dab11d8
JA
1164 intelhaddata = snd_pcm_substream_chip(substream);
1165 stream = substream->runtime->private_data;
5647aec2 1166 had_stream = &intelhaddata->stream_data;
5dab11d8
JA
1167
1168 switch (cmd) {
1169 case SNDRV_PCM_TRIGGER_START:
5dab11d8 1170 /* Disable local INTRs till register prgmng is done */
79f439ea 1171 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
c75b0476
TI
1172 dev_dbg(intelhaddata->dev,
1173 "_START: HDMI cable plugged-out\n");
5dab11d8
JA
1174 retval = -ENODEV;
1175 break;
1176 }
1177 stream->stream_status = STREAM_RUNNING;
1178
1179 had_stream->stream_type = HAD_RUNNING_STREAM;
1180
1181 /* Enable Audio */
da864809
TI
1182 snd_intelhad_enable_audio_int(intelhaddata, true);
1183 snd_intelhad_enable_audio(intelhaddata, true);
5dab11d8
JA
1184 break;
1185
1186 case SNDRV_PCM_TRIGGER_STOP:
5dab11d8
JA
1187 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irq);
1188 intelhaddata->stream_info.str_id = 0;
1189 intelhaddata->curr_buf = 0;
1190
c75b0476 1191 /* Stop reporting BUFFER_DONE/UNDERRUN to above layers */
5dab11d8
JA
1192
1193 had_stream->stream_type = HAD_INIT;
1194 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irq);
1195 /* Disable Audio */
da864809
TI
1196 snd_intelhad_enable_audio_int(intelhaddata, false);
1197 snd_intelhad_enable_audio(intelhaddata, false);
5dab11d8 1198 /* Reset buffer pointers */
79dda75a
TI
1199 snd_intelhad_reset_audio(intelhaddata, 1);
1200 snd_intelhad_reset_audio(intelhaddata, 0);
5dab11d8 1201 stream->stream_status = STREAM_DROPPED;
da864809 1202 snd_intelhad_enable_audio_int(intelhaddata, false);
5dab11d8
JA
1203 break;
1204
1205 default:
1206 retval = -EINVAL;
1207 }
1208 return retval;
1209}
1210
1211/**
1212 * snd_intelhad_pcm_prepare- internal preparation before starting a stream
1213 *
1214 * @substream: substream for which the function is called
1215 *
1216 * This function is called when a stream is started for internal preparation.
1217 */
1218static int snd_intelhad_pcm_prepare(struct snd_pcm_substream *substream)
1219{
1220 int retval;
1221 u32 disp_samp_freq, n_param;
964ca808 1222 u32 link_rate = 0;
5dab11d8
JA
1223 struct snd_intelhad *intelhaddata;
1224 struct snd_pcm_runtime *runtime;
5647aec2 1225 struct had_stream_data *had_stream;
5dab11d8 1226
5dab11d8
JA
1227 intelhaddata = snd_pcm_substream_chip(substream);
1228 runtime = substream->runtime;
5647aec2 1229 had_stream = &intelhaddata->stream_data;
5dab11d8 1230
79f439ea 1231 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
c75b0476
TI
1232 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
1233 __func__);
5dab11d8
JA
1234 retval = -ENODEV;
1235 goto prep_end;
1236 }
1237
c75b0476 1238 dev_dbg(intelhaddata->dev, "period_size=%d\n",
5dab11d8 1239 (int)frames_to_bytes(runtime, runtime->period_size));
c75b0476
TI
1240 dev_dbg(intelhaddata->dev, "periods=%d\n", runtime->periods);
1241 dev_dbg(intelhaddata->dev, "buffer_size=%d\n",
1242 (int)snd_pcm_lib_buffer_bytes(substream));
1243 dev_dbg(intelhaddata->dev, "rate=%d\n", runtime->rate);
1244 dev_dbg(intelhaddata->dev, "channels=%d\n", runtime->channels);
5dab11d8
JA
1245
1246 if (intelhaddata->stream_info.str_id) {
c75b0476
TI
1247 dev_dbg(intelhaddata->dev,
1248 "_prepare is called for existing str_id#%d\n",
5dab11d8
JA
1249 intelhaddata->stream_info.str_id);
1250 retval = snd_intelhad_pcm_trigger(substream,
1251 SNDRV_PCM_TRIGGER_STOP);
1252 return retval;
1253 }
1254
1255 retval = snd_intelhad_init_stream(substream);
1256 if (retval)
1257 goto prep_end;
1258
1259
1260 /* Get N value in KHz */
da864809 1261 disp_samp_freq = intelhaddata->tmds_clock_speed;
5dab11d8 1262
76296ef0
TI
1263 retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1264 intelhaddata);
5dab11d8 1265 if (retval) {
c75b0476
TI
1266 dev_err(intelhaddata->dev,
1267 "programming N value failed %#x\n", retval);
5dab11d8
JA
1268 goto prep_end;
1269 }
964ca808
PLB
1270
1271 if (intelhaddata->dp_output)
da864809 1272 link_rate = intelhaddata->link_rate;
964ca808 1273
76296ef0
TI
1274 snd_intelhad_prog_cts(substream->runtime->rate,
1275 disp_samp_freq, link_rate,
1276 n_param, intelhaddata);
5dab11d8 1277
76296ef0 1278 snd_intelhad_prog_dip(substream, intelhaddata);
5dab11d8 1279
76296ef0 1280 retval = snd_intelhad_audio_ctrl(substream, intelhaddata);
5dab11d8
JA
1281
1282 /* Prog buffer address */
1283 retval = snd_intelhad_prog_buffer(intelhaddata,
1284 HAD_BUF_TYPE_A, HAD_BUF_TYPE_D);
1285
1286 /*
1287 * Program channel mapping in following order:
1288 * FL, FR, C, LFE, RL, RR
1289 */
1290
79dda75a 1291 had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);
5dab11d8
JA
1292
1293prep_end:
1294 return retval;
1295}
1296
1297/**
1298 * snd_intelhad_pcm_pointer- to send the current buffer pointerprocessed by hw
1299 *
1300 * @substream: substream for which the function is called
1301 *
1302 * This function is called by ALSA framework to get the current hw buffer ptr
1303 * when a period is elapsed
1304 */
1305static snd_pcm_uframes_t snd_intelhad_pcm_pointer(
1306 struct snd_pcm_substream *substream)
1307{
1308 struct snd_intelhad *intelhaddata;
1309 u32 bytes_rendered = 0;
1310 u32 t;
1311 int buf_id;
1312
5dab11d8
JA
1313 intelhaddata = snd_pcm_substream_chip(substream);
1314
79f439ea
TI
1315 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
1316 return SNDRV_PCM_POS_XRUN;
1317
5dab11d8 1318 if (intelhaddata->flag_underrun) {
e9d65abf 1319 intelhaddata->flag_underrun = false;
5dab11d8
JA
1320 return SNDRV_PCM_POS_XRUN;
1321 }
1322
1323 /* Use a hw register to calculate sub-period position reports.
1324 * This makes PulseAudio happier.
1325 */
1326
1327 buf_id = intelhaddata->curr_buf % 4;
79dda75a
TI
1328 had_read_register(intelhaddata,
1329 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), &t);
232892fb
JA
1330
1331 if ((t == 0) || (t == ((u32)-1L))) {
6ddb3ab6 1332 intelhaddata->underrun_count++;
c75b0476
TI
1333 dev_dbg(intelhaddata->dev,
1334 "discovered buffer done for buf %d, count = %d\n",
6ddb3ab6 1335 buf_id, intelhaddata->underrun_count);
232892fb 1336
6ddb3ab6 1337 if (intelhaddata->underrun_count > (HAD_MIN_PERIODS/2)) {
c75b0476
TI
1338 dev_dbg(intelhaddata->dev,
1339 "assume audio_codec_reset, underrun = %d - do xrun\n",
6ddb3ab6
TI
1340 intelhaddata->underrun_count);
1341 intelhaddata->underrun_count = 0;
232892fb
JA
1342 return SNDRV_PCM_POS_XRUN;
1343 }
1344 } else {
1345 /* Reset Counter */
6ddb3ab6 1346 intelhaddata->underrun_count = 0;
5dab11d8 1347 }
232892fb 1348
5dab11d8
JA
1349 t = intelhaddata->buf_info[buf_id].buf_size - t;
1350
1351 if (intelhaddata->stream_info.buffer_rendered)
1352 div_u64_rem(intelhaddata->stream_info.buffer_rendered,
1353 intelhaddata->stream_info.ring_buf_size,
1354 &(bytes_rendered));
1355
1356 intelhaddata->stream_info.buffer_ptr = bytes_to_frames(
1357 substream->runtime,
1358 bytes_rendered + t);
1359 return intelhaddata->stream_info.buffer_ptr;
1360}
1361
1362/**
1363 * snd_intelhad_pcm_mmap- mmaps a kernel buffer to user space for copying data
1364 *
1365 * @substream: substream for which the function is called
1366 * @vma: struct instance of memory VMM memory area
1367 *
1368 * This function is called by OS when a user space component
1369 * tries to get mmap memory from driver
1370 */
1371static int snd_intelhad_pcm_mmap(struct snd_pcm_substream *substream,
1372 struct vm_area_struct *vma)
1373{
5dab11d8
JA
1374 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1375 return remap_pfn_range(vma, vma->vm_start,
1376 substream->dma_buffer.addr >> PAGE_SHIFT,
1377 vma->vm_end - vma->vm_start, vma->vm_page_prot);
1378}
1379
da864809 1380static int hdmi_audio_mode_change(struct snd_intelhad *intelhaddata)
5dab11d8 1381{
da864809 1382 struct snd_pcm_substream *substream;
5dab11d8
JA
1383 int retval = 0;
1384 u32 disp_samp_freq, n_param;
964ca808 1385 u32 link_rate = 0;
5dab11d8 1386
da864809
TI
1387 substream = intelhaddata->stream_info.had_substream;
1388 if (!substream || !substream->runtime)
1389 return 0;
5dab11d8
JA
1390
1391 /* Disable Audio */
da864809 1392 snd_intelhad_enable_audio(intelhaddata, false);
5dab11d8
JA
1393
1394 /* Update CTS value */
da864809 1395 disp_samp_freq = intelhaddata->tmds_clock_speed;
5dab11d8 1396
76296ef0
TI
1397 retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1398 intelhaddata);
5dab11d8 1399 if (retval) {
c75b0476
TI
1400 dev_err(intelhaddata->dev,
1401 "programming N value failed %#x\n", retval);
5dab11d8
JA
1402 goto out;
1403 }
964ca808
PLB
1404
1405 if (intelhaddata->dp_output)
da864809 1406 link_rate = intelhaddata->link_rate;
964ca808 1407
76296ef0
TI
1408 snd_intelhad_prog_cts(substream->runtime->rate,
1409 disp_samp_freq, link_rate,
1410 n_param, intelhaddata);
5dab11d8
JA
1411
1412 /* Enable Audio */
da864809 1413 snd_intelhad_enable_audio(intelhaddata, true);
5dab11d8
JA
1414
1415out:
1416 return retval;
1417}
1418
372d855f
TI
1419/*
1420 * hdmi_lpe_audio_suspend - power management suspend function
1421 *
1422 * @pdev: platform device
1423 *
1424 * This function is called by client driver to suspend the
1425 * hdmi audio.
1426 */
1427static int hdmi_lpe_audio_suspend(struct platform_device *pdev,
1428 pm_message_t state)
1429{
1430 struct had_stream_data *had_stream;
1431 unsigned long flag_irqs;
1432 struct snd_pcm_substream *substream;
1433 struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev);
1434
372d855f
TI
1435 had_stream = &intelhaddata->stream_data;
1436 substream = intelhaddata->stream_info.had_substream;
1437
e29c0f96 1438 if (!pm_runtime_status_suspended(intelhaddata->dev)) {
c75b0476 1439 dev_err(intelhaddata->dev, "audio stream is active\n");
372d855f
TI
1440 return -EAGAIN;
1441 }
1442
372d855f
TI
1443 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1444 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1445 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
c75b0476 1446 dev_dbg(intelhaddata->dev, "had not connected\n");
372d855f
TI
1447 return 0;
1448 }
1449
1450 if (intelhaddata->drv_status == HAD_DRV_SUSPENDED) {
1451 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
c75b0476 1452 dev_dbg(intelhaddata->dev, "had already suspended\n");
372d855f
TI
1453 return 0;
1454 }
1455
1456 intelhaddata->drv_status = HAD_DRV_SUSPENDED;
c75b0476
TI
1457 dev_dbg(intelhaddata->dev,
1458 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_SUSPENDED\n",
372d855f
TI
1459 __func__, __LINE__);
1460
1461 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1462 snd_intelhad_enable_audio_int(intelhaddata, false);
372d855f
TI
1463 return 0;
1464}
1465
1466/*
1467 * hdmi_lpe_audio_resume - power management resume function
1468 *
1469 *@pdev: platform device
1470 *
1471 * This function is called by client driver to resume the
1472 * hdmi audio.
1473 */
1474static int hdmi_lpe_audio_resume(struct platform_device *pdev)
1475{
1476 struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev);
1477 unsigned long flag_irqs;
1478
372d855f
TI
1479 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1480 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1481 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
c75b0476 1482 dev_dbg(intelhaddata->dev, "had not connected\n");
372d855f
TI
1483 return 0;
1484 }
1485
1486 if (intelhaddata->drv_status != HAD_DRV_SUSPENDED) {
1487 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
caa2a61a 1488 dev_dbg(intelhaddata->dev, "had is not in suspended state\n");
372d855f
TI
1489 return 0;
1490 }
1491
372d855f 1492 intelhaddata->drv_status = HAD_DRV_CONNECTED;
c75b0476
TI
1493 dev_dbg(intelhaddata->dev,
1494 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
372d855f
TI
1495 __func__, __LINE__);
1496 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1497 snd_intelhad_enable_audio_int(intelhaddata, true);
372d855f
TI
1498 return 0;
1499}
1500
1501static inline int had_chk_intrmiss(struct snd_intelhad *intelhaddata,
1502 enum intel_had_aud_buf_type buf_id)
1503{
1504 int i, intr_count = 0;
1505 enum intel_had_aud_buf_type buff_done;
1506 u32 buf_size, buf_addr;
1507 struct had_stream_data *had_stream;
1508 unsigned long flag_irqs;
1509
1510 had_stream = &intelhaddata->stream_data;
1511
1512 buff_done = buf_id;
1513
1514 intr_count = snd_intelhad_read_len(intelhaddata);
1515 if (intr_count > 1) {
1516 /* In case of active playback */
c75b0476
TI
1517 dev_err(intelhaddata->dev,
1518 "Driver detected %d missed buffer done interrupt(s)\n",
1519 (intr_count - 1));
372d855f
TI
1520 if (intr_count > 3)
1521 return intr_count;
1522
1523 buf_id += (intr_count - 1);
1524 /* Reprogram registers*/
1525 for (i = buff_done; i < buf_id; i++) {
1526 int j = i % 4;
1527
1528 buf_size = intelhaddata->buf_info[j].buf_size;
1529 buf_addr = intelhaddata->buf_info[j].buf_addr;
1530 had_write_register(intelhaddata,
1531 AUD_BUF_A_LENGTH +
1532 (j * HAD_REG_WIDTH), buf_size);
1533 had_write_register(intelhaddata,
1534 AUD_BUF_A_ADDR+(j * HAD_REG_WIDTH),
1535 (buf_addr | BIT(0) | BIT(1)));
1536 }
1537 buf_id = buf_id % 4;
1538 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1539 intelhaddata->buff_done = buf_id;
1540 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1541 }
1542
1543 return intr_count;
1544}
1545
1546static int had_process_buffer_done(struct snd_intelhad *intelhaddata)
1547{
1548 u32 len = 1;
1549 enum intel_had_aud_buf_type buf_id;
1550 enum intel_had_aud_buf_type buff_done;
1551 struct pcm_stream_info *stream;
1552 u32 buf_size;
1553 struct had_stream_data *had_stream;
1554 int intr_count;
1555 enum had_status_stream stream_type;
1556 unsigned long flag_irqs;
1557
1558 had_stream = &intelhaddata->stream_data;
1559 stream = &intelhaddata->stream_info;
1560 intr_count = 1;
1561
1562 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1563 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1564 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
c75b0476
TI
1565 dev_dbg(intelhaddata->dev,
1566 "%s:Device already disconnected\n", __func__);
372d855f
TI
1567 return 0;
1568 }
1569 buf_id = intelhaddata->curr_buf;
1570 intelhaddata->buff_done = buf_id;
1571 buff_done = intelhaddata->buff_done;
1572 buf_size = intelhaddata->buf_info[buf_id].buf_size;
1573 stream_type = had_stream->stream_type;
1574
372d855f
TI
1575 /* Every debug statement has an implication
1576 * of ~5msec. Thus, avoid having >3 debug statements
1577 * for each buffer_done handling.
1578 */
1579
1580 /* Check for any intr_miss in case of active playback */
1581 if (had_stream->stream_type == HAD_RUNNING_STREAM) {
1582 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1583 intr_count = had_chk_intrmiss(intelhaddata, buf_id);
1584 if (!intr_count || (intr_count > 3)) {
c75b0476
TI
1585 dev_err(intelhaddata->dev,
1586 "HAD SW state in non-recoverable mode\n");
372d855f
TI
1587 return 0;
1588 }
1589 buf_id += (intr_count - 1);
1590 buf_id = buf_id % 4;
1591 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1592 }
1593
1594 intelhaddata->buf_info[buf_id].is_valid = true;
1595 if (intelhaddata->valid_buf_cnt-1 == buf_id) {
1596 if (had_stream->stream_type >= HAD_RUNNING_STREAM)
1597 intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1598 } else
1599 intelhaddata->curr_buf = buf_id + 1;
1600
1601 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1602
79f439ea 1603 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
c75b0476 1604 dev_dbg(intelhaddata->dev, "HDMI cable plugged-out\n");
372d855f
TI
1605 return 0;
1606 }
1607
1608 /*Reprogram the registers with addr and length*/
1609 had_write_register(intelhaddata,
1610 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1611 buf_size);
1612 had_write_register(intelhaddata,
1613 AUD_BUF_A_ADDR + (buf_id * HAD_REG_WIDTH),
1614 intelhaddata->buf_info[buf_id].buf_addr |
1615 BIT(0) | BIT(1));
1616
1617 had_read_register(intelhaddata,
1618 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1619 &len);
c75b0476 1620 dev_dbg(intelhaddata->dev, "%s:Enabled buf[%d]\n", __func__, buf_id);
372d855f
TI
1621
1622 /* In case of actual data,
1623 * report buffer_done to above ALSA layer
1624 */
df76df12 1625 buf_size = intelhaddata->buf_info[buf_id].buf_size;
372d855f
TI
1626 if (stream_type >= HAD_RUNNING_STREAM) {
1627 intelhaddata->stream_info.buffer_rendered +=
1628 (intr_count * buf_size);
df76df12 1629 had_period_elapsed(stream->had_substream);
372d855f
TI
1630 }
1631
1632 return 0;
1633}
1634
1635static int had_process_buffer_underrun(struct snd_intelhad *intelhaddata)
1636{
1637 enum intel_had_aud_buf_type buf_id;
1638 struct pcm_stream_info *stream;
1639 struct had_stream_data *had_stream;
1640 enum had_status_stream stream_type;
1641 unsigned long flag_irqs;
1642 int drv_status;
1643
1644 had_stream = &intelhaddata->stream_data;
1645 stream = &intelhaddata->stream_info;
1646
1647 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1648 buf_id = intelhaddata->curr_buf;
1649 stream_type = had_stream->stream_type;
1650 intelhaddata->buff_done = buf_id;
1651 drv_status = intelhaddata->drv_status;
1652 if (stream_type == HAD_RUNNING_STREAM)
1653 intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1654
1655 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1656
c75b0476 1657 dev_dbg(intelhaddata->dev, "Enter:%s buf_id=%d, stream_type=%d\n",
372d855f
TI
1658 __func__, buf_id, stream_type);
1659
1660 snd_intelhad_handle_underrun(intelhaddata);
1661
1662 if (drv_status == HAD_DRV_DISCONNECTED) {
c75b0476
TI
1663 dev_dbg(intelhaddata->dev,
1664 "%s:Device already disconnected\n", __func__);
372d855f
TI
1665 return 0;
1666 }
1667
1668 if (stream_type == HAD_RUNNING_STREAM) {
1669 /* Report UNDERRUN error to above layers */
e9d65abf 1670 intelhaddata->flag_underrun = true;
df76df12 1671 had_period_elapsed(stream->had_substream);
372d855f
TI
1672 }
1673
1674 return 0;
1675}
1676
1677static int had_process_hot_plug(struct snd_intelhad *intelhaddata)
1678{
1679 enum intel_had_aud_buf_type buf_id;
1680 struct snd_pcm_substream *substream;
1681 struct had_stream_data *had_stream;
1682 unsigned long flag_irqs;
1683
372d855f
TI
1684 substream = intelhaddata->stream_info.had_substream;
1685 had_stream = &intelhaddata->stream_data;
1686
1687 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1688 if (intelhaddata->drv_status == HAD_DRV_CONNECTED) {
c75b0476 1689 dev_dbg(intelhaddata->dev, "Device already connected\n");
372d855f
TI
1690 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1691 return 0;
1692 }
1693 buf_id = intelhaddata->curr_buf;
1694 intelhaddata->buff_done = buf_id;
1695 intelhaddata->drv_status = HAD_DRV_CONNECTED;
c75b0476
TI
1696 dev_dbg(intelhaddata->dev,
1697 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
372d855f
TI
1698 __func__, __LINE__);
1699 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1700
c75b0476
TI
1701 dev_dbg(intelhaddata->dev, "Processing HOT_PLUG, buf_id = %d\n",
1702 buf_id);
372d855f
TI
1703
1704 /* Safety check */
1705 if (substream) {
c75b0476
TI
1706 dev_dbg(intelhaddata->dev,
1707 "Force to stop the active stream by disconnection\n");
372d855f
TI
1708 /* Set runtime->state to hw_params done */
1709 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
1710 }
1711
1712 had_build_channel_allocation_map(intelhaddata);
1713
1714 return 0;
1715}
1716
1717static int had_process_hot_unplug(struct snd_intelhad *intelhaddata)
1718{
1719 enum intel_had_aud_buf_type buf_id;
1720 struct had_stream_data *had_stream;
1721 unsigned long flag_irqs;
1722
372d855f
TI
1723 had_stream = &intelhaddata->stream_data;
1724 buf_id = intelhaddata->curr_buf;
1725
1726 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1727
1728 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
c75b0476 1729 dev_dbg(intelhaddata->dev, "Device already disconnected\n");
372d855f
TI
1730 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1731 return 0;
1732
1733 } else {
1734 /* Disable Audio */
1735 snd_intelhad_enable_audio_int(intelhaddata, false);
1736 snd_intelhad_enable_audio(intelhaddata, false);
1737 }
1738
1739 intelhaddata->drv_status = HAD_DRV_DISCONNECTED;
c75b0476
TI
1740 dev_dbg(intelhaddata->dev,
1741 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
372d855f
TI
1742 __func__, __LINE__);
1743
1744 /* Report to above ALSA layer */
1745 if (intelhaddata->stream_info.had_substream != NULL) {
1746 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
372d855f
TI
1747 snd_pcm_stop(intelhaddata->stream_info.had_substream,
1748 SNDRV_PCM_STATE_SETUP);
1749 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1750 }
1751
1752 had_stream->stream_type = HAD_INIT;
1753 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1754 kfree(intelhaddata->chmap->chmap);
1755 intelhaddata->chmap->chmap = NULL;
372d855f
TI
1756
1757 return 0;
1758}
1759
1760/* PCM operations structure and the calls back for the same */
1761static struct snd_pcm_ops snd_intelhad_playback_ops = {
5dab11d8
JA
1762 .open = snd_intelhad_open,
1763 .close = snd_intelhad_close,
1764 .ioctl = snd_pcm_lib_ioctl,
1765 .hw_params = snd_intelhad_hw_params,
1766 .hw_free = snd_intelhad_hw_free,
1767 .prepare = snd_intelhad_pcm_prepare,
1768 .trigger = snd_intelhad_pcm_trigger,
1769 .pointer = snd_intelhad_pcm_pointer,
1770 .mmap = snd_intelhad_pcm_mmap,
1771};
1772
5dab11d8
JA
1773static int had_iec958_info(struct snd_kcontrol *kcontrol,
1774 struct snd_ctl_elem_info *uinfo)
1775{
1776 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1777 uinfo->count = 1;
1778 return 0;
1779}
1780
1781static int had_iec958_get(struct snd_kcontrol *kcontrol,
1782 struct snd_ctl_elem_value *ucontrol)
1783{
1784 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1785
1786 ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff;
1787 ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff;
1788 ucontrol->value.iec958.status[2] =
1789 (intelhaddata->aes_bits >> 16) & 0xff;
1790 ucontrol->value.iec958.status[3] =
1791 (intelhaddata->aes_bits >> 24) & 0xff;
1792 return 0;
1793}
372d855f 1794
5dab11d8
JA
1795static int had_iec958_mask_get(struct snd_kcontrol *kcontrol,
1796 struct snd_ctl_elem_value *ucontrol)
1797{
1798 ucontrol->value.iec958.status[0] = 0xff;
1799 ucontrol->value.iec958.status[1] = 0xff;
1800 ucontrol->value.iec958.status[2] = 0xff;
1801 ucontrol->value.iec958.status[3] = 0xff;
1802 return 0;
1803}
372d855f 1804
5dab11d8
JA
1805static int had_iec958_put(struct snd_kcontrol *kcontrol,
1806 struct snd_ctl_elem_value *ucontrol)
1807{
1808 unsigned int val;
1809 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1810
5dab11d8
JA
1811 val = (ucontrol->value.iec958.status[0] << 0) |
1812 (ucontrol->value.iec958.status[1] << 8) |
1813 (ucontrol->value.iec958.status[2] << 16) |
1814 (ucontrol->value.iec958.status[3] << 24);
1815 if (intelhaddata->aes_bits != val) {
1816 intelhaddata->aes_bits = val;
1817 return 1;
1818 }
1819 return 1;
1820}
1821
1822static struct snd_kcontrol_new had_control_iec958_mask = {
1823 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1824 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1825 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
1826 .info = had_iec958_info, /* shared */
1827 .get = had_iec958_mask_get,
1828};
1829
1830static struct snd_kcontrol_new had_control_iec958 = {
1831 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1832 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1833 .info = had_iec958_info,
1834 .get = had_iec958_get,
1835 .put = had_iec958_put
1836};
1837
da864809
TI
1838static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id)
1839{
1840 struct snd_intelhad *ctx = dev_id;
1841 u32 audio_stat, audio_reg;
1842
1843 audio_reg = AUD_HDMI_STATUS_v2;
1844 mid_hdmi_audio_read(ctx, audio_reg, &audio_stat);
1845
1846 if (audio_stat & HDMI_AUDIO_UNDERRUN) {
1847 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_UNDERRUN);
1848 had_process_buffer_underrun(ctx);
1849 }
1850
1851 if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
1852 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_BUFFER_DONE);
1853 had_process_buffer_done(ctx);
1854 }
1855
1856 return IRQ_HANDLED;
1857}
1858
1859static void notify_audio_lpe(struct platform_device *pdev)
1860{
1861 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
da864809 1862
99b2ab9d
TI
1863 schedule_work(&ctx->hdmi_audio_wq);
1864}
da864809 1865
99b2ab9d
TI
1866static void had_audio_wq(struct work_struct *work)
1867{
1868 struct snd_intelhad *ctx =
1869 container_of(work, struct snd_intelhad, hdmi_audio_wq);
1870 struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data;
da864809 1871
99b2ab9d
TI
1872 if (!pdata->hdmi_connected) {
1873 dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
1874 __func__);
da864809 1875
99b2ab9d
TI
1876 if (ctx->state != hdmi_connector_status_connected) {
1877 dev_dbg(ctx->dev, "%s: Already Unplugged!\n",
da864809 1878 __func__);
99b2ab9d
TI
1879 return;
1880 }
1881
1882 ctx->state = hdmi_connector_status_disconnected;
1883 had_process_hot_unplug(ctx);
da864809
TI
1884
1885 } else {
1886 struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
1887
1888 switch (eld->pipe_id) {
1889 case 0:
1890 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1891 break;
1892 case 1:
1893 ctx->had_config_offset = AUDIO_HDMI_CONFIG_B;
1894 break;
1895 case 2:
1896 ctx->had_config_offset = AUDIO_HDMI_CONFIG_C;
1897 break;
1898 default:
99b2ab9d 1899 dev_dbg(ctx->dev, "Invalid pipe %d\n",
da864809
TI
1900 eld->pipe_id);
1901 break;
1902 }
1903
1904 memcpy(&ctx->eld, eld->eld_data, sizeof(ctx->eld));
1905
1906 had_process_hot_plug(ctx);
1907
1908 ctx->state = hdmi_connector_status_connected;
1909
99b2ab9d 1910 dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
da864809
TI
1911 __func__, eld->port_id, pdata->tmds_clock_speed);
1912
1913 if (pdata->tmds_clock_speed) {
1914 ctx->tmds_clock_speed = pdata->tmds_clock_speed;
1915 ctx->dp_output = pdata->dp_output;
1916 ctx->link_rate = pdata->link_rate;
1917
1918 /* Process mode change if stream is active */
1919 if (ctx->stream_data.stream_type == HAD_RUNNING_STREAM)
1920 hdmi_audio_mode_change(ctx);
1921 }
1922 }
1923}
1924
1925/* release resources */
1926static void hdmi_lpe_audio_free(struct snd_card *card)
1927{
1928 struct snd_intelhad *ctx = card->private_data;
1929
99b2ab9d
TI
1930 cancel_work_sync(&ctx->hdmi_audio_wq);
1931
da864809
TI
1932 if (ctx->mmio_start)
1933 iounmap(ctx->mmio_start);
1934 if (ctx->irq >= 0)
1935 free_irq(ctx->irq, ctx);
1936}
1937
79dda75a 1938/*
da864809 1939 * hdmi_lpe_audio_probe - start bridge with i915
5dab11d8 1940 *
da864809
TI
1941 * This function is called when the i915 driver creates the
1942 * hdmi-lpe-audio platform device. Card creation is deferred until a
1943 * hot plug event is received
5dab11d8 1944 */
da864809 1945static int hdmi_lpe_audio_probe(struct platform_device *pdev)
5dab11d8 1946{
5dab11d8 1947 struct snd_card *card;
da864809
TI
1948 struct snd_intelhad *ctx;
1949 struct snd_pcm *pcm;
1950 struct intel_hdmi_lpe_audio_pdata *pdata;
1951 int irq;
1952 struct resource *res_mmio;
1953 int ret;
1954 unsigned long flags;
1955
da864809
TI
1956 dev_dbg(&pdev->dev, "dma_mask: %p\n", pdev->dev.dma_mask);
1957
1958 pdata = pdev->dev.platform_data;
1959 if (!pdata) {
1960 dev_err(&pdev->dev, "%s: quit: pdata not allocated by i915!!\n", __func__);
1961 return -EINVAL;
1962 }
5dab11d8 1963
da864809
TI
1964 /* get resources */
1965 irq = platform_get_irq(pdev, 0);
1966 if (irq < 0) {
1967 dev_err(&pdev->dev, "Could not get irq resource\n");
1968 return -ENODEV;
1969 }
1970
1971 res_mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1972 if (!res_mmio) {
1973 dev_err(&pdev->dev, "Could not get IO_MEM resources\n");
1974 return -ENXIO;
1975 }
5dab11d8 1976
5647aec2 1977 /* create a card instance with ALSA framework */
da864809
TI
1978 ret = snd_card_new(&pdev->dev, hdmi_card_index, hdmi_card_id,
1979 THIS_MODULE, sizeof(*ctx), &card);
1980 if (ret)
1981 return ret;
1982
1983 ctx = card->private_data;
1984 spin_lock_init(&ctx->had_spinlock);
1985 ctx->drv_status = HAD_DRV_DISCONNECTED;
1986 ctx->dev = &pdev->dev;
1987 ctx->card = card;
e9d65abf 1988 ctx->flag_underrun = false;
da864809
TI
1989 ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
1990 strcpy(card->driver, INTEL_HAD);
1991 strcpy(card->shortname, INTEL_HAD);
1992
1993 ctx->irq = -1;
1994 ctx->tmds_clock_speed = DIS_SAMPLE_RATE_148_5;
99b2ab9d 1995 INIT_WORK(&ctx->hdmi_audio_wq, had_audio_wq);
da864809
TI
1996 ctx->state = hdmi_connector_status_disconnected;
1997
1998 card->private_free = hdmi_lpe_audio_free;
1999
2000 /* assume pipe A as default */
2001 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
2002
2003 platform_set_drvdata(pdev, ctx);
2004
2005 dev_dbg(&pdev->dev, "%s: mmio_start = 0x%x, mmio_end = 0x%x\n",
2006 __func__, (unsigned int)res_mmio->start,
2007 (unsigned int)res_mmio->end);
2008
2009 ctx->mmio_start = ioremap_nocache(res_mmio->start,
2010 (size_t)(resource_size(res_mmio)));
2011 if (!ctx->mmio_start) {
2012 dev_err(&pdev->dev, "Could not get ioremap\n");
2013 ret = -EACCES;
2014 goto err;
2015 }
5dab11d8 2016
da864809
TI
2017 /* setup interrupt handler */
2018 ret = request_irq(irq, display_pipe_interrupt_handler, 0,
2019 pdev->name, ctx);
2020 if (ret < 0) {
2021 dev_err(&pdev->dev, "request_irq failed\n");
2022 goto err;
2023 }
5dab11d8 2024
da864809
TI
2025 ctx->irq = irq;
2026
2027 ret = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS,
2028 MAX_CAP_STREAMS, &pcm);
2029 if (ret)
5dab11d8
JA
2030 goto err;
2031
2032 /* setup private data which can be retrieved when required */
da864809 2033 pcm->private_data = ctx;
5dab11d8
JA
2034 pcm->info_flags = 0;
2035 strncpy(pcm->name, card->shortname, strlen(card->shortname));
da864809 2036 /* setup the ops for playabck */
5dab11d8
JA
2037 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
2038 &snd_intelhad_playback_ops);
2039 /* allocate dma pages for ALSA stream operations
2040 * memory allocated is based on size, not max value
2041 * thus using same argument for max & size
2042 */
da864809 2043 snd_pcm_lib_preallocate_pages_for_all(pcm,
5dab11d8
JA
2044 SNDRV_DMA_TYPE_DEV, NULL,
2045 HAD_MAX_BUFFER, HAD_MAX_BUFFER);
5dab11d8 2046
5dab11d8 2047 /* IEC958 controls */
da864809
TI
2048 ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958_mask, ctx));
2049 if (ret < 0)
5dab11d8 2050 goto err;
da864809
TI
2051 ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958, ctx));
2052 if (ret < 0)
5dab11d8
JA
2053 goto err;
2054
2055 init_channel_allocations();
2056
2057 /* Register channel map controls */
da864809
TI
2058 ret = had_register_chmap_ctls(ctx, pcm);
2059 if (ret < 0)
5dab11d8
JA
2060 goto err;
2061
da864809
TI
2062 ret = snd_card_register(card);
2063 if (ret)
36ec0d99
TI
2064 goto err;
2065
da864809
TI
2066 spin_lock_irqsave(&pdata->lpe_audio_slock, flags);
2067 pdata->notify_audio_lpe = notify_audio_lpe;
99b2ab9d 2068 pdata->notify_pending = false;
da864809
TI
2069 spin_unlock_irqrestore(&pdata->lpe_audio_slock, flags);
2070
2071 pm_runtime_set_active(&pdev->dev);
2072 pm_runtime_enable(&pdev->dev);
2073
99b2ab9d 2074 dev_dbg(&pdev->dev, "%s: handle pending notification\n", __func__);
da864809 2075 schedule_work(&ctx->hdmi_audio_wq);
5dab11d8 2076
79dda75a 2077 return 0;
5647aec2 2078
5dab11d8
JA
2079err:
2080 snd_card_free(card);
da864809 2081 return ret;
5dab11d8
JA
2082}
2083
79dda75a 2084/*
da864809 2085 * hdmi_lpe_audio_remove - stop bridge with i915
5dab11d8 2086 *
da864809
TI
2087 * This function is called when the platform device is destroyed. The sound
2088 * card should have been removed on hot plug event.
5dab11d8 2089 */
da864809 2090static int hdmi_lpe_audio_remove(struct platform_device *pdev)
5dab11d8 2091{
da864809 2092 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
5dab11d8 2093
da864809
TI
2094 if (ctx->drv_status != HAD_DRV_DISCONNECTED)
2095 snd_intelhad_enable_audio_int(ctx, false);
2096 snd_card_free(ctx->card);
5dab11d8
JA
2097 return 0;
2098}
2099
da864809
TI
2100static struct platform_driver hdmi_lpe_audio_driver = {
2101 .driver = {
2102 .name = "hdmi-lpe-audio",
2103 },
2104 .probe = hdmi_lpe_audio_probe,
2105 .remove = hdmi_lpe_audio_remove,
2106 .suspend = hdmi_lpe_audio_suspend,
2107 .resume = hdmi_lpe_audio_resume
2108};
2109
2110module_platform_driver(hdmi_lpe_audio_driver);
2111MODULE_ALIAS("platform:hdmi_lpe_audio");
2112
5dab11d8
JA
2113MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>");
2114MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>");
2115MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>");
2116MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>");
2117MODULE_DESCRIPTION("Intel HDMI Audio driver");
2118MODULE_LICENSE("GPL v2");
2119MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}");