projects / rustc.git / blame
| Commit | Line | Data |
|---|---|---|
| a2a8927a XL |
1 | # `asm_experimental_arch` |
| 2 | ||
| 5099ac24 | 3 | The tracking issue for this feature is: [#93335] |
| a2a8927a | 4 | |
| 5099ac24 | 5 | [#93335]: https://github.com/rust-lang/rust/issues/93335 |
| a2a8927a XL |
6 | |
| 7 | ------------------------ | |
| 8 | ||
| 9 | This feature tracks `asm!` and `global_asm!` support for the following architectures: | |
| 10 | - NVPTX | |
| 11 | - PowerPC | |
| 12 | - Hexagon | |
| 13 | - MIPS32r2 and MIPS64r2 | |
| 14 | - wasm32 | |
| 15 | - BPF | |
| 16 | - SPIR-V | |
| 17 | - AVR | |
| 5099ac24 | 18 | - MSP430 |
| a2a8927a XL |
19 | |
| 20 | ## Register classes | |
| 21 | ||
| 22 | | Architecture | Register class | Registers | LLVM constraint code | | |
| 23 | | ------------ | -------------- | ---------------------------------- | -------------------- | | |
| 24 | | MIPS | `reg` | `$[2-25]` | `r` | | |
| 25 | | MIPS | `freg` | `$f[0-31]` | `f` | | |
| 26 | | NVPTX | `reg16` | None\* | `h` | | |
| 27 | | NVPTX | `reg32` | None\* | `r` | | |
| 28 | | NVPTX | `reg64` | None\* | `l` | | |
| 29 | | Hexagon | `reg` | `r[0-28]` | `r` | | |
| 30 | | PowerPC | `reg` | `r[0-31]` | `r` | | |
| 31 | | PowerPC | `reg_nonzero` | `r[1-31]` | `b` | | |
| 32 | | PowerPC | `freg` | `f[0-31]` | `f` | | |
| 33 | | PowerPC | `cr` | `cr[0-7]`, `cr` | Only clobbers | | |
| 34 | | PowerPC | `xer` | `xer` | Only clobbers | | |
| 35 | | wasm32 | `local` | None\* | `r` | | |
| 36 | | BPF | `reg` | `r[0-10]` | `r` | | |
| 37 | | BPF | `wreg` | `w[0-10]` | `w` | | |
| 38 | | AVR | `reg` | `r[2-25]`, `XH`, `XL`, `ZH`, `ZL` | `r` | | |
| 39 | | AVR | `reg_upper` | `r[16-25]`, `XH`, `XL`, `ZH`, `ZL` | `d` | | |
| 40 | | AVR | `reg_pair` | `r3r2` .. `r25r24`, `X`, `Z` | `r` | | |
| 41 | | AVR | `reg_iw` | `r25r24`, `X`, `Z` | `w` | | |
| 42 | | AVR | `reg_ptr` | `X`, `Z` | `e` | | |
| 5099ac24 | 43 | | MSP430 | `reg` | `r[0-15]` | `r` | |
| a2a8927a XL |
44 | |
| 45 | > **Notes**: | |
| 46 | > - NVPTX doesn't have a fixed register set, so named registers are not supported. | |
| 47 | > | |
| 48 | > - WebAssembly doesn't have registers, so named registers are not supported. | |
| 49 | ||
| 50 | # Register class supported types | |
| 51 | ||
| 52 | | Architecture | Register class | Target feature | Allowed types | | |
| 53 | | ------------ | ------------------------------- | -------------- | --------------------------------------- | | |
| 54 | | MIPS32 | `reg` | None | `i8`, `i16`, `i32`, `f32` | | |
| 55 | | MIPS32 | `freg` | None | `f32`, `f64` | | |
| 56 | | MIPS64 | `reg` | None | `i8`, `i16`, `i32`, `i64`, `f32`, `f64` | | |
| 57 | | MIPS64 | `freg` | None | `f32`, `f64` | | |
| 58 | | NVPTX | `reg16` | None | `i8`, `i16` | | |
| 59 | | NVPTX | `reg32` | None | `i8`, `i16`, `i32`, `f32` | | |
| 60 | | NVPTX | `reg64` | None | `i8`, `i16`, `i32`, `f32`, `i64`, `f64` | | |
| 61 | | Hexagon | `reg` | None | `i8`, `i16`, `i32`, `f32` | | |
| 62 | | PowerPC | `reg` | None | `i8`, `i16`, `i32` | | |
| 63 | | PowerPC | `reg_nonzero` | None | `i8`, `i16`, `i32` | | |
| 64 | | PowerPC | `freg` | None | `f32`, `f64` | | |
| 65 | | PowerPC | `cr` | N/A | Only clobbers | | |
| 66 | | PowerPC | `xer` | N/A | Only clobbers | | |
| 67 | | wasm32 | `local` | None | `i8` `i16` `i32` `i64` `f32` `f64` | | |
| 68 | | BPF | `reg` | None | `i8` `i16` `i32` `i64` | | |
| 69 | | BPF | `wreg` | `alu32` | `i8` `i16` `i32` | | |
| 70 | | AVR | `reg`, `reg_upper` | None | `i8` | | |
| 71 | | AVR | `reg_pair`, `reg_iw`, `reg_ptr` | None | `i16` | | |
| 5099ac24 | 72 | | MSP430 | `reg` | None | `i8`, `i16` | |
| a2a8927a XL |
73 | |
| 74 | ## Register aliases | |
| 75 | ||
| 76 | | Architecture | Base register | Aliases | | |
| 77 | | ------------ | ------------- | --------- | | |
| 78 | | Hexagon | `r29` | `sp` | | |
| 79 | | Hexagon | `r30` | `fr` | | |
| 80 | | Hexagon | `r31` | `lr` | | |
| 81 | | BPF | `r[0-10]` | `w[0-10]` | | |
| 82 | | AVR | `XH` | `r27` | | |
| 83 | | AVR | `XL` | `r26` | | |
| 84 | | AVR | `ZH` | `r31` | | |
| 85 | | AVR | `ZL` | `r30` | | |
| 5099ac24 FG |
86 | | MSP430 | `r0` | `pc` | |
| 87 | | MSP430 | `r1` | `sp` | | |
| 88 | | MSP430 | `r2` | `sr` | | |
| 89 | | MSP430 | `r3` | `cg` | | |
| 90 | | MSP430 | `r4` | `fp` | | |
| 91 | ||
| 92 | > **Notes**: | |
| 93 | > - TI does not mandate a frame pointer for MSP430, but toolchains are allowed | |
| 94 | to use one; LLVM uses `r4`. | |
| a2a8927a XL |
95 | |
| 96 | ## Unsupported registers | |
| 97 | ||
| 98 | | Architecture | Unsupported register | Reason | | |
| 99 | | ------------ | --------------------------------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | | |
| 100 | | All | `sp` | The stack pointer must be restored to its original value at the end of an asm code block. | | |
| 5099ac24 | 101 | | All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR), `r4` (MSP430) | The frame pointer cannot be used as an input or output. | |
| a2a8927a XL |
102 | | All | `r19` (Hexagon) | This is used internally by LLVM as a "base pointer" for functions with complex stack frames. | |
| 103 | | MIPS | `$0` or `$zero` | This is a constant zero register which can't be modified. | | |
| 104 | | MIPS | `$1` or `$at` | Reserved for assembler. | | |
| 105 | | MIPS | `$26`/`$k0`, `$27`/`$k1` | OS-reserved registers. | | |
| 106 | | MIPS | `$28`/`$gp` | Global pointer cannot be used as inputs or outputs. | | |
| 107 | | MIPS | `$ra` | Return address cannot be used as inputs or outputs. | | |
| 108 | | Hexagon | `lr` | This is the link register which cannot be used as an input or output. | | |
| 109 | | AVR | `r0`, `r1`, `r1r0` | Due to an issue in LLVM, the `r0` and `r1` registers cannot be used as inputs or outputs. If modified, they must be restored to their original values before the end of the block. | | |
| 5099ac24 | 110 | |MSP430 | `r0`, `r2`, `r3` | These are the program counter, status register, and constant generator respectively. Neither the status register nor constant generator can be written to. | |
| a2a8927a XL |
111 | |
| 112 | ## Template modifiers | |
| 113 | ||
| 114 | | Architecture | Register class | Modifier | Example output | LLVM modifier | | |
| 115 | | ------------ | -------------- | -------- | -------------- | ------------- | | |
| 116 | | MIPS | `reg` | None | `$2` | None | | |
| 117 | | MIPS | `freg` | None | `$f0` | None | | |
| 118 | | NVPTX | `reg16` | None | `rs0` | None | | |
| 119 | | NVPTX | `reg32` | None | `r0` | None | | |
| 120 | | NVPTX | `reg64` | None | `rd0` | None | | |
| 121 | | Hexagon | `reg` | None | `r0` | None | | |
| 122 | | PowerPC | `reg` | None | `0` | None | | |
| 123 | | PowerPC | `reg_nonzero` | None | `3` | `b` | | |
| 124 | | PowerPC | `freg` | None | `0` | None | | |
| 125 | ||
| 126 | # Flags covered by `preserves_flags` | |
| 127 | ||
| 128 | These flags registers must be restored upon exiting the asm block if the `preserves_flags` option is set: | |
| 129 | - AVR | |
| 130 | - The status register `SREG`. | |
| 5099ac24 FG |
131 | - MSP430 |
| 132 | - The status register `r2`. |